1 /* Target-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2018 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "solib-svr4.h"
25 #include "mips-tdep.h"
28 #include "trad-frame.h"
29 #include "tramp-frame.h"
35 #include "target-descriptions.h"
37 #include "mips-linux-tdep.h"
38 #include "glibc-tdep.h"
39 #include "linux-tdep.h"
40 #include "xml-syscall.h"
41 #include "gdb_signals.h"
43 #include "features/mips-linux.c"
44 #include "features/mips-dsp-linux.c"
45 #include "features/mips64-linux.c"
46 #include "features/mips64-dsp-linux.c"
48 static struct target_so_ops mips_svr4_so_ops;
50 /* This enum represents the signals' numbers on the MIPS
51 architecture. It just contains the signal definitions which are
52 different from the generic implementation.
54 It is derived from the file <arch/mips/include/uapi/asm/signal.h>,
55 from the Linux kernel tree. */
59 MIPS_LINUX_SIGEMT = 7,
60 MIPS_LINUX_SIGBUS = 10,
61 MIPS_LINUX_SIGSYS = 12,
62 MIPS_LINUX_SIGUSR1 = 16,
63 MIPS_LINUX_SIGUSR2 = 17,
64 MIPS_LINUX_SIGCHLD = 18,
65 MIPS_LINUX_SIGCLD = MIPS_LINUX_SIGCHLD,
66 MIPS_LINUX_SIGPWR = 19,
67 MIPS_LINUX_SIGWINCH = 20,
68 MIPS_LINUX_SIGURG = 21,
69 MIPS_LINUX_SIGIO = 22,
70 MIPS_LINUX_SIGPOLL = MIPS_LINUX_SIGIO,
71 MIPS_LINUX_SIGSTOP = 23,
72 MIPS_LINUX_SIGTSTP = 24,
73 MIPS_LINUX_SIGCONT = 25,
74 MIPS_LINUX_SIGTTIN = 26,
75 MIPS_LINUX_SIGTTOU = 27,
76 MIPS_LINUX_SIGVTALRM = 28,
77 MIPS_LINUX_SIGPROF = 29,
78 MIPS_LINUX_SIGXCPU = 30,
79 MIPS_LINUX_SIGXFSZ = 31,
81 MIPS_LINUX_SIGRTMIN = 32,
82 MIPS_LINUX_SIGRT64 = 64,
83 MIPS_LINUX_SIGRTMAX = 127,
86 /* Figure out where the longjmp will land.
87 We expect the first arg to be a pointer to the jmp_buf structure
88 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
89 at. The pc is copied into PC. This routine returns 1 on
92 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
93 #define MIPS_LINUX_JB_PC 0
96 mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
99 struct gdbarch *gdbarch = get_frame_arch (frame);
100 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
101 gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
103 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
105 if (target_read_memory ((jb_addr
106 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE),
107 buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
110 *pc = extract_unsigned_integer (buf,
111 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
117 /* Transform the bits comprising a 32-bit register to the right size
118 for regcache_raw_supply(). This is needed when mips_isa_regsize()
122 supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
124 regcache->raw_supply_integer (regnum, (const gdb_byte *) addr, 4, true);
127 /* Unpack an elf_gregset_t into GDB's register cache. */
130 mips_supply_gregset (struct regcache *regcache,
131 const mips_elf_gregset_t *gregsetp)
134 const mips_elf_greg_t *regp = *gregsetp;
135 struct gdbarch *gdbarch = regcache->arch ();
137 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
138 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
140 if (mips_linux_restart_reg_p (gdbarch))
141 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0);
143 supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO);
144 supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI);
146 supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc,
148 supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
149 regp + EF_CP0_BADVADDR);
150 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
151 supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause,
152 regp + EF_CP0_CAUSE);
154 /* Fill the inaccessible zero register with zero. */
155 regcache->raw_supply_zeroed (MIPS_ZERO_REGNUM);
159 mips_supply_gregset_wrapper (const struct regset *regset,
160 struct regcache *regcache,
161 int regnum, const void *gregs, size_t len)
163 gdb_assert (len >= sizeof (mips_elf_gregset_t));
165 mips_supply_gregset (regcache, (const mips_elf_gregset_t *)gregs);
168 /* Pack our registers (or one register) into an elf_gregset_t. */
171 mips_fill_gregset (const struct regcache *regcache,
172 mips_elf_gregset_t *gregsetp, int regno)
174 struct gdbarch *gdbarch = regcache->arch ();
176 mips_elf_greg_t *regp = *gregsetp;
181 memset (regp, 0, sizeof (mips_elf_gregset_t));
182 for (regi = 1; regi < 32; regi++)
183 mips_fill_gregset (regcache, gregsetp, regi);
184 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
185 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
186 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
187 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
188 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
189 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
190 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
194 if (regno > 0 && regno < 32)
196 dst = regp + regno + EF_REG0;
197 regcache_raw_collect (regcache, regno, dst);
201 if (regno == mips_regnum (gdbarch)->lo)
203 else if (regno == mips_regnum (gdbarch)->hi)
205 else if (regno == mips_regnum (gdbarch)->pc)
206 regaddr = EF_CP0_EPC;
207 else if (regno == mips_regnum (gdbarch)->badvaddr)
208 regaddr = EF_CP0_BADVADDR;
209 else if (regno == MIPS_PS_REGNUM)
210 regaddr = EF_CP0_STATUS;
211 else if (regno == mips_regnum (gdbarch)->cause)
212 regaddr = EF_CP0_CAUSE;
213 else if (mips_linux_restart_reg_p (gdbarch)
214 && regno == MIPS_RESTART_REGNUM)
221 dst = regp + regaddr;
222 regcache_raw_collect (regcache, regno, dst);
227 mips_fill_gregset_wrapper (const struct regset *regset,
228 const struct regcache *regcache,
229 int regnum, void *gregs, size_t len)
231 gdb_assert (len >= sizeof (mips_elf_gregset_t));
233 mips_fill_gregset (regcache, (mips_elf_gregset_t *)gregs, regnum);
236 /* Support for 64-bit ABIs. */
238 /* Figure out where the longjmp will land.
239 We expect the first arg to be a pointer to the jmp_buf structure
240 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
241 at. The pc is copied into PC. This routine returns 1 on
244 /* Details about jmp_buf. */
246 #define MIPS64_LINUX_JB_PC 0
249 mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
252 struct gdbarch *gdbarch = get_frame_arch (frame);
253 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
255 = (gdb_byte *) alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
256 int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8;
258 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
260 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
262 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
265 *pc = extract_unsigned_integer (buf,
266 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
272 /* Register set support functions. These operate on standard 64-bit
273 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
274 target will still use the 64-bit format for PTRACE_GETREGS. */
276 /* Supply a 64-bit register. */
279 supply_64bit_reg (struct regcache *regcache, int regnum,
282 struct gdbarch *gdbarch = regcache->arch ();
283 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
284 && register_size (gdbarch, regnum) == 4)
285 regcache_raw_supply (regcache, regnum, buf + 4);
287 regcache_raw_supply (regcache, regnum, buf);
290 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
293 mips64_supply_gregset (struct regcache *regcache,
294 const mips64_elf_gregset_t *gregsetp)
297 const mips64_elf_greg_t *regp = *gregsetp;
298 struct gdbarch *gdbarch = regcache->arch ();
300 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
301 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
302 (const gdb_byte *) (regp + regi));
304 if (mips_linux_restart_reg_p (gdbarch))
305 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM,
306 (const gdb_byte *) (regp + MIPS64_EF_REG0));
308 supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo,
309 (const gdb_byte *) (regp + MIPS64_EF_LO));
310 supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi,
311 (const gdb_byte *) (regp + MIPS64_EF_HI));
313 supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc,
314 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
315 supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
316 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
317 supply_64bit_reg (regcache, MIPS_PS_REGNUM,
318 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
319 supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause,
320 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
322 /* Fill the inaccessible zero register with zero. */
323 regcache->raw_supply_zeroed (MIPS_ZERO_REGNUM);
327 mips64_supply_gregset_wrapper (const struct regset *regset,
328 struct regcache *regcache,
329 int regnum, const void *gregs, size_t len)
331 gdb_assert (len >= sizeof (mips64_elf_gregset_t));
333 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *)gregs);
336 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
339 mips64_fill_gregset (const struct regcache *regcache,
340 mips64_elf_gregset_t *gregsetp, int regno)
342 struct gdbarch *gdbarch = regcache->arch ();
344 mips64_elf_greg_t *regp = *gregsetp;
349 memset (regp, 0, sizeof (mips64_elf_gregset_t));
350 for (regi = 1; regi < 32; regi++)
351 mips64_fill_gregset (regcache, gregsetp, regi);
352 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
353 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
354 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
355 mips64_fill_gregset (regcache, gregsetp,
356 mips_regnum (gdbarch)->badvaddr);
357 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
358 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
359 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
363 if (regno > 0 && regno < 32)
364 regaddr = regno + MIPS64_EF_REG0;
365 else if (regno == mips_regnum (gdbarch)->lo)
366 regaddr = MIPS64_EF_LO;
367 else if (regno == mips_regnum (gdbarch)->hi)
368 regaddr = MIPS64_EF_HI;
369 else if (regno == mips_regnum (gdbarch)->pc)
370 regaddr = MIPS64_EF_CP0_EPC;
371 else if (regno == mips_regnum (gdbarch)->badvaddr)
372 regaddr = MIPS64_EF_CP0_BADVADDR;
373 else if (regno == MIPS_PS_REGNUM)
374 regaddr = MIPS64_EF_CP0_STATUS;
375 else if (regno == mips_regnum (gdbarch)->cause)
376 regaddr = MIPS64_EF_CP0_CAUSE;
377 else if (mips_linux_restart_reg_p (gdbarch)
378 && regno == MIPS_RESTART_REGNUM)
379 regaddr = MIPS64_EF_REG0;
385 dst = regp + regaddr;
386 regcache->raw_collect_integer (regno, (gdb_byte *) dst, 8, true);
391 mips64_fill_gregset_wrapper (const struct regset *regset,
392 const struct regcache *regcache,
393 int regnum, void *gregs, size_t len)
395 gdb_assert (len >= sizeof (mips64_elf_gregset_t));
397 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *)gregs, regnum);
400 /* Likewise, unpack an elf_fpregset_t. Linux only uses even-numbered
401 FPR slots in the Status.FR=0 mode, storing even-odd FPR pairs as the
402 SDC1 instruction would. When run on MIPS I architecture processors
403 all FPR slots used to be used, unusually, holding the respective FPRs
404 in the first 4 bytes, but that was corrected for consistency, with
405 `linux-mips.org' (LMO) commit 42533948caac ("Major pile of FP emulator
406 changes."), the fix corrected with LMO commit 849fa7a50dff ("R3k FPU
407 ptrace() handling fixes."), and then broken and fixed over and over
408 again, until last time fixed with commit 80cbfad79096 ("MIPS: Correct
409 MIPS I FP context layout"). */
412 mips64_supply_fpregset (struct regcache *regcache,
413 const mips64_elf_fpregset_t *fpregsetp)
415 struct gdbarch *gdbarch = regcache->arch ();
418 if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4)
419 for (regi = 0; regi < 32; regi++)
421 const gdb_byte *reg_ptr
422 = (const gdb_byte *) (*fpregsetp + (regi & ~1));
423 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
425 regcache_raw_supply (regcache,
426 gdbarch_fp0_regnum (gdbarch) + regi,
430 for (regi = 0; regi < 32; regi++)
431 regcache_raw_supply (regcache,
432 gdbarch_fp0_regnum (gdbarch) + regi,
433 (const char *) (*fpregsetp + regi));
435 supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status,
436 (const gdb_byte *) (*fpregsetp + 32));
438 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
439 include it - but the result of PTRACE_GETFPREGS does. The best we
440 can do is to assume that its value is present. */
441 supply_32bit_reg (regcache,
442 mips_regnum (gdbarch)->fp_implementation_revision,
443 (const gdb_byte *) (*fpregsetp + 32) + 4);
447 mips64_supply_fpregset_wrapper (const struct regset *regset,
448 struct regcache *regcache,
449 int regnum, const void *gregs, size_t len)
451 gdb_assert (len >= sizeof (mips64_elf_fpregset_t));
453 mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *)gregs);
456 /* Likewise, pack one or all floating point registers into an
457 elf_fpregset_t. See `mips_supply_fpregset' for an explanation
461 mips64_fill_fpregset (const struct regcache *regcache,
462 mips64_elf_fpregset_t *fpregsetp, int regno)
464 struct gdbarch *gdbarch = regcache->arch ();
467 if ((regno >= gdbarch_fp0_regnum (gdbarch))
468 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
470 if (register_size (gdbarch, regno) == 4)
472 int regi = regno - gdbarch_fp0_regnum (gdbarch);
474 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
475 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
477 regcache_raw_collect (regcache, regno, to);
481 to = (gdb_byte *) (*fpregsetp + regno
482 - gdbarch_fp0_regnum (gdbarch));
483 regcache_raw_collect (regcache, regno, to);
486 else if (regno == mips_regnum (gdbarch)->fp_control_status)
488 to = (gdb_byte *) (*fpregsetp + 32);
489 regcache->raw_collect_integer (regno, to, 4, true);
491 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
493 to = (gdb_byte *) (*fpregsetp + 32) + 4;
494 regcache->raw_collect_integer (regno, to, 4, true);
496 else if (regno == -1)
500 for (regi = 0; regi < 32; regi++)
501 mips64_fill_fpregset (regcache, fpregsetp,
502 gdbarch_fp0_regnum (gdbarch) + regi);
503 mips64_fill_fpregset (regcache, fpregsetp,
504 mips_regnum (gdbarch)->fp_control_status);
505 mips64_fill_fpregset (regcache, fpregsetp,
506 mips_regnum (gdbarch)->fp_implementation_revision);
511 mips64_fill_fpregset_wrapper (const struct regset *regset,
512 const struct regcache *regcache,
513 int regnum, void *gregs, size_t len)
515 gdb_assert (len >= sizeof (mips64_elf_fpregset_t));
517 mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *)gregs, regnum);
520 static const struct regset mips_linux_gregset =
522 NULL, mips_supply_gregset_wrapper, mips_fill_gregset_wrapper
525 static const struct regset mips64_linux_gregset =
527 NULL, mips64_supply_gregset_wrapper, mips64_fill_gregset_wrapper
530 static const struct regset mips64_linux_fpregset =
532 NULL, mips64_supply_fpregset_wrapper, mips64_fill_fpregset_wrapper
536 mips_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
537 iterate_over_regset_sections_cb *cb,
539 const struct regcache *regcache)
541 if (register_size (gdbarch, MIPS_ZERO_REGNUM) == 4)
543 cb (".reg", sizeof (mips_elf_gregset_t), &mips_linux_gregset,
545 cb (".reg2", sizeof (mips64_elf_fpregset_t), &mips64_linux_fpregset,
550 cb (".reg", sizeof (mips64_elf_gregset_t), &mips64_linux_gregset,
552 cb (".reg2", sizeof (mips64_elf_fpregset_t), &mips64_linux_fpregset,
557 static const struct target_desc *
558 mips_linux_core_read_description (struct gdbarch *gdbarch,
559 struct target_ops *target,
562 asection *section = bfd_get_section_by_name (abfd, ".reg");
566 switch (bfd_section_size (abfd, section))
568 case sizeof (mips_elf_gregset_t):
569 return mips_tdesc_gp32;
571 case sizeof (mips64_elf_gregset_t):
572 return mips_tdesc_gp64;
580 /* Check the code at PC for a dynamic linker lazy resolution stub.
581 GNU ld for MIPS has put lazy resolution stubs into a ".MIPS.stubs"
582 section uniformly since version 2.15. If the pc is in that section,
583 then we are in such a stub. Before that ".stub" was used in 32-bit
584 ELF binaries, however we do not bother checking for that since we
585 have never had and that case should be extremely rare these days.
586 Instead we pattern-match on the code generated by GNU ld. They look
594 (with the appropriate doubleword instructions for N64). As any lazy
595 resolution stubs in microMIPS binaries will always be in a
596 ".MIPS.stubs" section we only ever verify standard MIPS patterns. */
599 mips_linux_in_dynsym_stub (CORE_ADDR pc)
601 gdb_byte buf[28], *p;
602 ULONGEST insn, insn1;
603 int n64 = (mips_abi (target_gdbarch ()) == MIPS_ABI_N64);
604 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
606 if (in_mips_stubs_section (pc))
609 read_memory (pc - 12, buf, 28);
613 /* ld t9,0x8010(gp) */
618 /* lw t9,0x8010(gp) */
625 insn = extract_unsigned_integer (p, 4, byte_order);
633 insn = extract_unsigned_integer (p + 4, 4, byte_order);
636 /* 'daddu t7,ra' or 'or t7, ra, zero'*/
637 if (insn != 0x03e0782d || insn != 0x03e07825)
643 /* 'addu t7,ra' or 'or t7, ra, zero'*/
644 if (insn != 0x03e07821 || insn != 0x03e07825)
649 insn = extract_unsigned_integer (p + 8, 4, byte_order);
651 if (insn != 0x0320f809)
654 insn = extract_unsigned_integer (p + 12, 4, byte_order);
657 /* daddiu t8,zero,0 */
658 if ((insn & 0xffff0000) != 0x64180000)
663 /* addiu t8,zero,0 */
664 if ((insn & 0xffff0000) != 0x24180000)
671 /* Return non-zero iff PC belongs to the dynamic linker resolution
672 code, a PLT entry, or a lazy binding stub. */
675 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
677 /* Check whether PC is in the dynamic linker. This also checks
678 whether it is in the .plt section, used by non-PIC executables. */
679 if (svr4_in_dynsym_resolve_code (pc))
682 /* Likewise for the stubs. They live in the .MIPS.stubs section these
683 days, so we check if the PC is within, than fall back to a pattern
685 if (mips_linux_in_dynsym_stub (pc))
691 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
692 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
693 implementation of this triggers at "fixup" from the same objfile as
694 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
695 "__dl_runtime_resolve" directly. An unresolved lazy binding
696 stub will point to _dl_runtime_resolve, which will first call
697 __dl_runtime_resolve, and then pass control to the resolved
701 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
703 struct bound_minimal_symbol resolver;
705 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
707 if (resolver.minsym && BMSYMBOL_VALUE_ADDRESS (resolver) == pc)
708 return frame_unwind_caller_pc (get_current_frame ());
710 return glibc_skip_solib_resolver (gdbarch, pc);
713 /* Signal trampoline support. There are four supported layouts for a
714 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
715 n64 rt_sigframe. We handle them all independently; not the most
716 efficient way, but simplest. First, declare all the unwinders. */
718 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
719 struct frame_info *this_frame,
720 struct trad_frame_cache *this_cache,
723 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
724 struct frame_info *this_frame,
725 struct trad_frame_cache *this_cache,
728 static int mips_linux_sigframe_validate (const struct tramp_frame *self,
729 struct frame_info *this_frame,
732 static int micromips_linux_sigframe_validate (const struct tramp_frame *self,
733 struct frame_info *this_frame,
736 #define MIPS_NR_LINUX 4000
737 #define MIPS_NR_N64_LINUX 5000
738 #define MIPS_NR_N32_LINUX 6000
740 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
741 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
742 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
743 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
745 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
746 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
747 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
748 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
749 #define MIPS_INST_SYSCALL 0x0000000c
751 #define MICROMIPS_INST_LI_V0 0x3040
752 #define MICROMIPS_INST_POOL32A 0x0000
753 #define MICROMIPS_INST_SYSCALL 0x8b7c
755 static const struct tramp_frame mips_linux_o32_sigframe = {
759 { MIPS_INST_LI_V0_SIGRETURN, -1 },
760 { MIPS_INST_SYSCALL, -1 },
761 { TRAMP_SENTINEL_INSN, -1 }
763 mips_linux_o32_sigframe_init,
764 mips_linux_sigframe_validate
767 static const struct tramp_frame mips_linux_o32_rt_sigframe = {
771 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
772 { MIPS_INST_SYSCALL, -1 },
773 { TRAMP_SENTINEL_INSN, -1 } },
774 mips_linux_o32_sigframe_init,
775 mips_linux_sigframe_validate
778 static const struct tramp_frame mips_linux_n32_rt_sigframe = {
782 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
783 { MIPS_INST_SYSCALL, -1 },
784 { TRAMP_SENTINEL_INSN, -1 }
786 mips_linux_n32n64_sigframe_init,
787 mips_linux_sigframe_validate
790 static const struct tramp_frame mips_linux_n64_rt_sigframe = {
794 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
795 { MIPS_INST_SYSCALL, -1 },
796 { TRAMP_SENTINEL_INSN, -1 }
798 mips_linux_n32n64_sigframe_init,
799 mips_linux_sigframe_validate
802 static const struct tramp_frame micromips_linux_o32_sigframe = {
806 { MICROMIPS_INST_LI_V0, -1 },
807 { MIPS_NR_sigreturn, -1 },
808 { MICROMIPS_INST_POOL32A, -1 },
809 { MICROMIPS_INST_SYSCALL, -1 },
810 { TRAMP_SENTINEL_INSN, -1 }
812 mips_linux_o32_sigframe_init,
813 micromips_linux_sigframe_validate
816 static const struct tramp_frame micromips_linux_o32_rt_sigframe = {
820 { MICROMIPS_INST_LI_V0, -1 },
821 { MIPS_NR_rt_sigreturn, -1 },
822 { MICROMIPS_INST_POOL32A, -1 },
823 { MICROMIPS_INST_SYSCALL, -1 },
824 { TRAMP_SENTINEL_INSN, -1 }
826 mips_linux_o32_sigframe_init,
827 micromips_linux_sigframe_validate
830 static const struct tramp_frame micromips_linux_n32_rt_sigframe = {
834 { MICROMIPS_INST_LI_V0, -1 },
835 { MIPS_NR_N32_rt_sigreturn, -1 },
836 { MICROMIPS_INST_POOL32A, -1 },
837 { MICROMIPS_INST_SYSCALL, -1 },
838 { TRAMP_SENTINEL_INSN, -1 }
840 mips_linux_n32n64_sigframe_init,
841 micromips_linux_sigframe_validate
844 static const struct tramp_frame micromips_linux_n64_rt_sigframe = {
848 { MICROMIPS_INST_LI_V0, -1 },
849 { MIPS_NR_N64_rt_sigreturn, -1 },
850 { MICROMIPS_INST_POOL32A, -1 },
851 { MICROMIPS_INST_SYSCALL, -1 },
852 { TRAMP_SENTINEL_INSN, -1 }
854 mips_linux_n32n64_sigframe_init,
855 micromips_linux_sigframe_validate
859 /* The unwinder for o32 signal frames. The legacy structures look
863 u32 sf_ass[4]; [argument save space for o32]
864 u32 sf_code[2]; [signal trampoline or fill]
865 struct sigcontext sf_sc;
869 Pre-2.6.12 sigcontext:
872 unsigned int sc_regmask; [Unused]
873 unsigned int sc_status;
874 unsigned long long sc_pc;
875 unsigned long long sc_regs[32];
876 unsigned long long sc_fpregs[32];
877 unsigned int sc_ownedfp;
878 unsigned int sc_fpc_csr;
879 unsigned int sc_fpc_eir; [Unused]
880 unsigned int sc_used_math;
881 unsigned int sc_ssflags; [Unused]
882 [Alignment hole of four bytes]
883 unsigned long long sc_mdhi;
884 unsigned long long sc_mdlo;
886 unsigned int sc_cause; [Unused]
887 unsigned int sc_badvaddr; [Unused]
889 unsigned long sc_sigset[4]; [kernel's sigset_t]
892 Post-2.6.12 sigcontext (SmartMIPS/DSP support added):
895 unsigned int sc_regmask; [Unused]
896 unsigned int sc_status; [Unused]
897 unsigned long long sc_pc;
898 unsigned long long sc_regs[32];
899 unsigned long long sc_fpregs[32];
901 unsigned int sc_fpc_csr;
902 unsigned int sc_fpc_eir; [Unused]
903 unsigned int sc_used_math;
905 [Alignment hole of four bytes]
906 unsigned long long sc_mdhi;
907 unsigned long long sc_mdlo;
908 unsigned long sc_hi1;
909 unsigned long sc_lo1;
910 unsigned long sc_hi2;
911 unsigned long sc_lo2;
912 unsigned long sc_hi3;
913 unsigned long sc_lo3;
916 The RT signal frames look like this:
919 u32 rs_ass[4]; [argument save space for o32]
920 u32 rs_code[2] [signal trampoline or fill]
921 struct siginfo rs_info;
922 struct ucontext rs_uc;
926 unsigned long uc_flags;
927 struct ucontext *uc_link;
929 [Alignment hole of four bytes]
930 struct sigcontext uc_mcontext;
935 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
937 #define RTSIGFRAME_SIGINFO_SIZE 128
938 #define STACK_T_SIZE (3 * 4)
939 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
940 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
941 + RTSIGFRAME_SIGINFO_SIZE \
942 + UCONTEXT_SIGCONTEXT_OFFSET)
944 #define SIGCONTEXT_PC (1 * 8)
945 #define SIGCONTEXT_REGS (2 * 8)
946 #define SIGCONTEXT_FPREGS (34 * 8)
947 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
948 #define SIGCONTEXT_DSPCTL (68 * 8 + 0)
949 #define SIGCONTEXT_HI (69 * 8)
950 #define SIGCONTEXT_LO (70 * 8)
951 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
952 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
953 #define SIGCONTEXT_HI1 (71 * 8 + 0)
954 #define SIGCONTEXT_LO1 (71 * 8 + 4)
955 #define SIGCONTEXT_HI2 (72 * 8 + 0)
956 #define SIGCONTEXT_LO2 (72 * 8 + 4)
957 #define SIGCONTEXT_HI3 (73 * 8 + 0)
958 #define SIGCONTEXT_LO3 (73 * 8 + 4)
960 #define SIGCONTEXT_REG_SIZE 8
963 mips_linux_o32_sigframe_init (const struct tramp_frame *self,
964 struct frame_info *this_frame,
965 struct trad_frame_cache *this_cache,
968 struct gdbarch *gdbarch = get_frame_arch (this_frame);
970 CORE_ADDR frame_sp = get_frame_sp (this_frame);
971 CORE_ADDR sigcontext_base;
972 const struct mips_regnum *regs = mips_regnum (gdbarch);
975 if (self == &mips_linux_o32_sigframe
976 || self == µmips_linux_o32_sigframe)
977 sigcontext_base = frame_sp + SIGFRAME_SIGCONTEXT_OFFSET;
979 sigcontext_base = frame_sp + RTSIGFRAME_SIGCONTEXT_OFFSET;
981 /* I'm not proud of this hack. Eventually we will have the
982 infrastructure to indicate the size of saved registers on a
983 per-frame basis, but right now we don't; the kernel saves eight
984 bytes but we only want four. Use regs_base to access any
986 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
987 regs_base = sigcontext_base + 4;
989 regs_base = sigcontext_base;
991 if (mips_linux_restart_reg_p (gdbarch))
992 trad_frame_set_reg_addr (this_cache,
994 + gdbarch_num_regs (gdbarch)),
995 regs_base + SIGCONTEXT_REGS);
997 for (ireg = 1; ireg < 32; ireg++)
998 trad_frame_set_reg_addr (this_cache,
999 (ireg + MIPS_ZERO_REGNUM
1000 + gdbarch_num_regs (gdbarch)),
1001 (regs_base + SIGCONTEXT_REGS
1002 + ireg * SIGCONTEXT_REG_SIZE));
1004 for (ireg = 0; ireg < 32; ireg++)
1005 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
1006 trad_frame_set_reg_addr (this_cache,
1007 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1008 (sigcontext_base + SIGCONTEXT_FPREGS + 4
1009 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1011 trad_frame_set_reg_addr (this_cache,
1012 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1013 (sigcontext_base + SIGCONTEXT_FPREGS
1014 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1016 trad_frame_set_reg_addr (this_cache,
1017 regs->pc + gdbarch_num_regs (gdbarch),
1018 regs_base + SIGCONTEXT_PC);
1020 trad_frame_set_reg_addr (this_cache,
1021 (regs->fp_control_status
1022 + gdbarch_num_regs (gdbarch)),
1023 sigcontext_base + SIGCONTEXT_FPCSR);
1025 if (regs->dspctl != -1)
1026 trad_frame_set_reg_addr (this_cache,
1027 regs->dspctl + gdbarch_num_regs (gdbarch),
1028 sigcontext_base + SIGCONTEXT_DSPCTL);
1030 trad_frame_set_reg_addr (this_cache,
1031 regs->hi + gdbarch_num_regs (gdbarch),
1032 regs_base + SIGCONTEXT_HI);
1033 trad_frame_set_reg_addr (this_cache,
1034 regs->lo + gdbarch_num_regs (gdbarch),
1035 regs_base + SIGCONTEXT_LO);
1037 if (regs->dspacc != -1)
1039 trad_frame_set_reg_addr (this_cache,
1040 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1041 sigcontext_base + SIGCONTEXT_HI1);
1042 trad_frame_set_reg_addr (this_cache,
1043 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1044 sigcontext_base + SIGCONTEXT_LO1);
1045 trad_frame_set_reg_addr (this_cache,
1046 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1047 sigcontext_base + SIGCONTEXT_HI2);
1048 trad_frame_set_reg_addr (this_cache,
1049 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1050 sigcontext_base + SIGCONTEXT_LO2);
1051 trad_frame_set_reg_addr (this_cache,
1052 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1053 sigcontext_base + SIGCONTEXT_HI3);
1054 trad_frame_set_reg_addr (this_cache,
1055 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1056 sigcontext_base + SIGCONTEXT_LO3);
1060 trad_frame_set_reg_addr (this_cache,
1061 regs->cause + gdbarch_num_regs (gdbarch),
1062 sigcontext_base + SIGCONTEXT_CAUSE);
1063 trad_frame_set_reg_addr (this_cache,
1064 regs->badvaddr + gdbarch_num_regs (gdbarch),
1065 sigcontext_base + SIGCONTEXT_BADVADDR);
1068 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1069 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1073 /* For N32/N64 things look different. There is no non-rt signal frame.
1075 struct rt_sigframe_n32 {
1076 u32 rs_ass[4]; [ argument save space for o32 ]
1077 u32 rs_code[2]; [ signal trampoline or fill ]
1078 struct siginfo rs_info;
1079 struct ucontextn32 rs_uc;
1082 struct ucontextn32 {
1086 struct sigcontext uc_mcontext;
1087 sigset_t uc_sigmask; [ mask last for extensibility ]
1090 struct rt_sigframe {
1091 u32 rs_ass[4]; [ argument save space for o32 ]
1092 u32 rs_code[2]; [ signal trampoline ]
1093 struct siginfo rs_info;
1094 struct ucontext rs_uc;
1098 unsigned long uc_flags;
1099 struct ucontext *uc_link;
1101 struct sigcontext uc_mcontext;
1102 sigset_t uc_sigmask; [ mask last for extensibility ]
1105 And the sigcontext is different (this is for both n32 and n64):
1108 unsigned long long sc_regs[32];
1109 unsigned long long sc_fpregs[32];
1110 unsigned long long sc_mdhi;
1111 unsigned long long sc_hi1;
1112 unsigned long long sc_hi2;
1113 unsigned long long sc_hi3;
1114 unsigned long long sc_mdlo;
1115 unsigned long long sc_lo1;
1116 unsigned long long sc_lo2;
1117 unsigned long long sc_lo3;
1118 unsigned long long sc_pc;
1119 unsigned int sc_fpc_csr;
1120 unsigned int sc_used_math;
1121 unsigned int sc_dsp;
1122 unsigned int sc_reserved;
1125 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1126 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1130 #define N32_STACK_T_SIZE STACK_T_SIZE
1131 #define N64_STACK_T_SIZE (2 * 8 + 4)
1132 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1133 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1134 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1135 + RTSIGFRAME_SIGINFO_SIZE \
1136 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1137 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1138 + RTSIGFRAME_SIGINFO_SIZE \
1139 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1141 #define N64_SIGCONTEXT_REGS (0 * 8)
1142 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1143 #define N64_SIGCONTEXT_HI (64 * 8)
1144 #define N64_SIGCONTEXT_HI1 (65 * 8)
1145 #define N64_SIGCONTEXT_HI2 (66 * 8)
1146 #define N64_SIGCONTEXT_HI3 (67 * 8)
1147 #define N64_SIGCONTEXT_LO (68 * 8)
1148 #define N64_SIGCONTEXT_LO1 (69 * 8)
1149 #define N64_SIGCONTEXT_LO2 (70 * 8)
1150 #define N64_SIGCONTEXT_LO3 (71 * 8)
1151 #define N64_SIGCONTEXT_PC (72 * 8)
1152 #define N64_SIGCONTEXT_FPCSR (73 * 8 + 0)
1153 #define N64_SIGCONTEXT_DSPCTL (74 * 8 + 0)
1155 #define N64_SIGCONTEXT_REG_SIZE 8
1158 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
1159 struct frame_info *this_frame,
1160 struct trad_frame_cache *this_cache,
1163 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1165 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1166 CORE_ADDR sigcontext_base;
1167 const struct mips_regnum *regs = mips_regnum (gdbarch);
1169 if (self == &mips_linux_n32_rt_sigframe
1170 || self == µmips_linux_n32_rt_sigframe)
1171 sigcontext_base = frame_sp + N32_SIGFRAME_SIGCONTEXT_OFFSET;
1173 sigcontext_base = frame_sp + N64_SIGFRAME_SIGCONTEXT_OFFSET;
1175 if (mips_linux_restart_reg_p (gdbarch))
1176 trad_frame_set_reg_addr (this_cache,
1177 (MIPS_RESTART_REGNUM
1178 + gdbarch_num_regs (gdbarch)),
1179 sigcontext_base + N64_SIGCONTEXT_REGS);
1181 for (ireg = 1; ireg < 32; ireg++)
1182 trad_frame_set_reg_addr (this_cache,
1183 (ireg + MIPS_ZERO_REGNUM
1184 + gdbarch_num_regs (gdbarch)),
1185 (sigcontext_base + N64_SIGCONTEXT_REGS
1186 + ireg * N64_SIGCONTEXT_REG_SIZE));
1188 for (ireg = 0; ireg < 32; ireg++)
1189 trad_frame_set_reg_addr (this_cache,
1190 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1191 (sigcontext_base + N64_SIGCONTEXT_FPREGS
1192 + ireg * N64_SIGCONTEXT_REG_SIZE));
1194 trad_frame_set_reg_addr (this_cache,
1195 regs->pc + gdbarch_num_regs (gdbarch),
1196 sigcontext_base + N64_SIGCONTEXT_PC);
1198 trad_frame_set_reg_addr (this_cache,
1199 (regs->fp_control_status
1200 + gdbarch_num_regs (gdbarch)),
1201 sigcontext_base + N64_SIGCONTEXT_FPCSR);
1203 trad_frame_set_reg_addr (this_cache,
1204 regs->hi + gdbarch_num_regs (gdbarch),
1205 sigcontext_base + N64_SIGCONTEXT_HI);
1206 trad_frame_set_reg_addr (this_cache,
1207 regs->lo + gdbarch_num_regs (gdbarch),
1208 sigcontext_base + N64_SIGCONTEXT_LO);
1210 if (regs->dspacc != -1)
1212 trad_frame_set_reg_addr (this_cache,
1213 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1214 sigcontext_base + N64_SIGCONTEXT_HI1);
1215 trad_frame_set_reg_addr (this_cache,
1216 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1217 sigcontext_base + N64_SIGCONTEXT_LO1);
1218 trad_frame_set_reg_addr (this_cache,
1219 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1220 sigcontext_base + N64_SIGCONTEXT_HI2);
1221 trad_frame_set_reg_addr (this_cache,
1222 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1223 sigcontext_base + N64_SIGCONTEXT_LO2);
1224 trad_frame_set_reg_addr (this_cache,
1225 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1226 sigcontext_base + N64_SIGCONTEXT_HI3);
1227 trad_frame_set_reg_addr (this_cache,
1228 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1229 sigcontext_base + N64_SIGCONTEXT_LO3);
1231 if (regs->dspctl != -1)
1232 trad_frame_set_reg_addr (this_cache,
1233 regs->dspctl + gdbarch_num_regs (gdbarch),
1234 sigcontext_base + N64_SIGCONTEXT_DSPCTL);
1236 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1237 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1240 /* Implement struct tramp_frame's "validate" method for standard MIPS code. */
1243 mips_linux_sigframe_validate (const struct tramp_frame *self,
1244 struct frame_info *this_frame,
1247 return mips_pc_is_mips (*pc);
1250 /* Implement struct tramp_frame's "validate" method for microMIPS code. */
1253 micromips_linux_sigframe_validate (const struct tramp_frame *self,
1254 struct frame_info *this_frame,
1257 if (mips_pc_is_micromips (get_frame_arch (this_frame), *pc))
1259 *pc = mips_unmake_compact_addr (*pc);
1266 /* Implement the "write_pc" gdbarch method. */
1269 mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1271 struct gdbarch *gdbarch = regcache->arch ();
1273 mips_write_pc (regcache, pc);
1275 /* Clear the syscall restart flag. */
1276 if (mips_linux_restart_reg_p (gdbarch))
1277 regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0);
1280 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1283 mips_linux_restart_reg_p (struct gdbarch *gdbarch)
1285 /* If we do not have a target description with registers, then
1286 MIPS_RESTART_REGNUM will not be included in the register set. */
1287 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1290 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1291 either be GPR-sized or missing. */
1292 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0;
1295 /* When FRAME is at a syscall instruction, return the PC of the next
1296 instruction to be executed. */
1299 mips_linux_syscall_next_pc (struct frame_info *frame)
1301 CORE_ADDR pc = get_frame_pc (frame);
1302 ULONGEST v0 = get_frame_register_unsigned (frame, MIPS_V0_REGNUM);
1304 /* If we are about to make a sigreturn syscall, use the unwinder to
1305 decode the signal frame. */
1306 if (v0 == MIPS_NR_sigreturn
1307 || v0 == MIPS_NR_rt_sigreturn
1308 || v0 == MIPS_NR_N64_rt_sigreturn
1309 || v0 == MIPS_NR_N32_rt_sigreturn)
1310 return frame_unwind_caller_pc (get_current_frame ());
1315 /* Return the current system call's number present in the
1316 v0 register. When the function fails, it returns -1. */
1319 mips_linux_get_syscall_number (struct gdbarch *gdbarch,
1322 struct regcache *regcache = get_thread_regcache (ptid);
1323 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1324 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1325 int regsize = register_size (gdbarch, MIPS_V0_REGNUM);
1326 /* The content of a register */
1331 /* Make sure we're in a known ABI */
1332 gdb_assert (tdep->mips_abi == MIPS_ABI_O32
1333 || tdep->mips_abi == MIPS_ABI_N32
1334 || tdep->mips_abi == MIPS_ABI_N64);
1336 gdb_assert (regsize <= sizeof (buf));
1338 /* Getting the system call number from the register.
1339 syscall number is in v0 or $2. */
1340 regcache->cooked_read (MIPS_V0_REGNUM, buf);
1342 ret = extract_signed_integer (buf, regsize, byte_order);
1347 /* Implementation of `gdbarch_gdb_signal_to_target', as defined in
1351 mips_gdb_signal_to_target (struct gdbarch *gdbarch,
1352 enum gdb_signal signal)
1356 case GDB_SIGNAL_EMT:
1357 return MIPS_LINUX_SIGEMT;
1359 case GDB_SIGNAL_BUS:
1360 return MIPS_LINUX_SIGBUS;
1362 case GDB_SIGNAL_SYS:
1363 return MIPS_LINUX_SIGSYS;
1365 case GDB_SIGNAL_USR1:
1366 return MIPS_LINUX_SIGUSR1;
1368 case GDB_SIGNAL_USR2:
1369 return MIPS_LINUX_SIGUSR2;
1371 case GDB_SIGNAL_CHLD:
1372 return MIPS_LINUX_SIGCHLD;
1374 case GDB_SIGNAL_PWR:
1375 return MIPS_LINUX_SIGPWR;
1377 case GDB_SIGNAL_WINCH:
1378 return MIPS_LINUX_SIGWINCH;
1380 case GDB_SIGNAL_URG:
1381 return MIPS_LINUX_SIGURG;
1384 return MIPS_LINUX_SIGIO;
1386 case GDB_SIGNAL_POLL:
1387 return MIPS_LINUX_SIGPOLL;
1389 case GDB_SIGNAL_STOP:
1390 return MIPS_LINUX_SIGSTOP;
1392 case GDB_SIGNAL_TSTP:
1393 return MIPS_LINUX_SIGTSTP;
1395 case GDB_SIGNAL_CONT:
1396 return MIPS_LINUX_SIGCONT;
1398 case GDB_SIGNAL_TTIN:
1399 return MIPS_LINUX_SIGTTIN;
1401 case GDB_SIGNAL_TTOU:
1402 return MIPS_LINUX_SIGTTOU;
1404 case GDB_SIGNAL_VTALRM:
1405 return MIPS_LINUX_SIGVTALRM;
1407 case GDB_SIGNAL_PROF:
1408 return MIPS_LINUX_SIGPROF;
1410 case GDB_SIGNAL_XCPU:
1411 return MIPS_LINUX_SIGXCPU;
1413 case GDB_SIGNAL_XFSZ:
1414 return MIPS_LINUX_SIGXFSZ;
1416 /* GDB_SIGNAL_REALTIME_32 is not continuous in <gdb/signals.def>,
1417 therefore we have to handle it here. */
1418 case GDB_SIGNAL_REALTIME_32:
1419 return MIPS_LINUX_SIGRTMIN;
1422 if (signal >= GDB_SIGNAL_REALTIME_33
1423 && signal <= GDB_SIGNAL_REALTIME_63)
1425 int offset = signal - GDB_SIGNAL_REALTIME_33;
1427 return MIPS_LINUX_SIGRTMIN + 1 + offset;
1429 else if (signal >= GDB_SIGNAL_REALTIME_64
1430 && signal <= GDB_SIGNAL_REALTIME_127)
1432 int offset = signal - GDB_SIGNAL_REALTIME_64;
1434 return MIPS_LINUX_SIGRT64 + offset;
1437 return linux_gdb_signal_to_target (gdbarch, signal);
1440 /* Translate signals based on MIPS signal values.
1441 Adapted from gdb/common/signals.c. */
1443 static enum gdb_signal
1444 mips_gdb_signal_from_target (struct gdbarch *gdbarch, int signal)
1448 case MIPS_LINUX_SIGEMT:
1449 return GDB_SIGNAL_EMT;
1451 case MIPS_LINUX_SIGBUS:
1452 return GDB_SIGNAL_BUS;
1454 case MIPS_LINUX_SIGSYS:
1455 return GDB_SIGNAL_SYS;
1457 case MIPS_LINUX_SIGUSR1:
1458 return GDB_SIGNAL_USR1;
1460 case MIPS_LINUX_SIGUSR2:
1461 return GDB_SIGNAL_USR2;
1463 case MIPS_LINUX_SIGCHLD:
1464 return GDB_SIGNAL_CHLD;
1466 case MIPS_LINUX_SIGPWR:
1467 return GDB_SIGNAL_PWR;
1469 case MIPS_LINUX_SIGWINCH:
1470 return GDB_SIGNAL_WINCH;
1472 case MIPS_LINUX_SIGURG:
1473 return GDB_SIGNAL_URG;
1475 /* No way to differentiate between SIGIO and SIGPOLL.
1476 Therefore, we just handle the first one. */
1477 case MIPS_LINUX_SIGIO:
1478 return GDB_SIGNAL_IO;
1480 case MIPS_LINUX_SIGSTOP:
1481 return GDB_SIGNAL_STOP;
1483 case MIPS_LINUX_SIGTSTP:
1484 return GDB_SIGNAL_TSTP;
1486 case MIPS_LINUX_SIGCONT:
1487 return GDB_SIGNAL_CONT;
1489 case MIPS_LINUX_SIGTTIN:
1490 return GDB_SIGNAL_TTIN;
1492 case MIPS_LINUX_SIGTTOU:
1493 return GDB_SIGNAL_TTOU;
1495 case MIPS_LINUX_SIGVTALRM:
1496 return GDB_SIGNAL_VTALRM;
1498 case MIPS_LINUX_SIGPROF:
1499 return GDB_SIGNAL_PROF;
1501 case MIPS_LINUX_SIGXCPU:
1502 return GDB_SIGNAL_XCPU;
1504 case MIPS_LINUX_SIGXFSZ:
1505 return GDB_SIGNAL_XFSZ;
1508 if (signal >= MIPS_LINUX_SIGRTMIN && signal <= MIPS_LINUX_SIGRTMAX)
1510 /* GDB_SIGNAL_REALTIME values are not contiguous, map parts of
1511 the MIPS block to the respective GDB_SIGNAL_REALTIME blocks. */
1512 int offset = signal - MIPS_LINUX_SIGRTMIN;
1515 return GDB_SIGNAL_REALTIME_32;
1516 else if (offset < 32)
1517 return (enum gdb_signal) (offset - 1
1518 + (int) GDB_SIGNAL_REALTIME_33);
1520 return (enum gdb_signal) (offset - 32
1521 + (int) GDB_SIGNAL_REALTIME_64);
1524 return linux_gdb_signal_from_target (gdbarch, signal);
1527 /* Initialize one of the GNU/Linux OS ABIs. */
1530 mips_linux_init_abi (struct gdbarch_info info,
1531 struct gdbarch *gdbarch)
1533 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1534 enum mips_abi abi = mips_abi (gdbarch);
1535 struct tdesc_arch_data *tdesc_data = info.tdesc_data;
1537 linux_init_abi (info, gdbarch);
1539 /* Get the syscall number from the arch's register. */
1540 set_gdbarch_get_syscall_number (gdbarch, mips_linux_get_syscall_number);
1545 set_gdbarch_get_longjmp_target (gdbarch,
1546 mips_linux_get_longjmp_target);
1547 set_solib_svr4_fetch_link_map_offsets
1548 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1549 tramp_frame_prepend_unwinder (gdbarch, µmips_linux_o32_sigframe);
1550 tramp_frame_prepend_unwinder (gdbarch,
1551 µmips_linux_o32_rt_sigframe);
1552 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1553 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
1554 set_xml_syscall_file_name (gdbarch, "syscalls/mips-o32-linux.xml");
1557 set_gdbarch_get_longjmp_target (gdbarch,
1558 mips_linux_get_longjmp_target);
1559 set_solib_svr4_fetch_link_map_offsets
1560 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1561 set_gdbarch_long_double_bit (gdbarch, 128);
1562 /* These floatformats should probably be renamed. MIPS uses
1563 the same 128-bit IEEE floating point format that IA-64 uses,
1564 except that the quiet/signalling NaN bit is reversed (GDB
1565 does not distinguish between quiet and signalling NaNs). */
1566 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1567 tramp_frame_prepend_unwinder (gdbarch,
1568 µmips_linux_n32_rt_sigframe);
1569 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
1570 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n32-linux.xml");
1573 set_gdbarch_get_longjmp_target (gdbarch,
1574 mips64_linux_get_longjmp_target);
1575 set_solib_svr4_fetch_link_map_offsets
1576 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1577 set_gdbarch_long_double_bit (gdbarch, 128);
1578 /* These floatformats should probably be renamed. MIPS uses
1579 the same 128-bit IEEE floating point format that IA-64 uses,
1580 except that the quiet/signalling NaN bit is reversed (GDB
1581 does not distinguish between quiet and signalling NaNs). */
1582 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1583 tramp_frame_prepend_unwinder (gdbarch,
1584 µmips_linux_n64_rt_sigframe);
1585 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
1586 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n64-linux.xml");
1592 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1594 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
1596 /* Enable TLS support. */
1597 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1598 svr4_fetch_objfile_link_map);
1600 /* Initialize this lazily, to avoid an initialization order
1601 dependency on solib-svr4.c's _initialize routine. */
1602 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL)
1604 mips_svr4_so_ops = svr4_so_ops;
1605 mips_svr4_so_ops.in_dynsym_resolve_code
1606 = mips_linux_in_dynsym_resolve_code;
1608 set_solib_ops (gdbarch, &mips_svr4_so_ops);
1610 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc);
1612 set_gdbarch_core_read_description (gdbarch,
1613 mips_linux_core_read_description);
1615 set_gdbarch_iterate_over_regset_sections
1616 (gdbarch, mips_linux_iterate_over_regset_sections);
1618 set_gdbarch_gdb_signal_from_target (gdbarch,
1619 mips_gdb_signal_from_target);
1621 set_gdbarch_gdb_signal_to_target (gdbarch,
1622 mips_gdb_signal_to_target);
1624 tdep->syscall_next_pc = mips_linux_syscall_next_pc;
1628 const struct tdesc_feature *feature;
1630 /* If we have target-described registers, then we can safely
1631 reserve a number for MIPS_RESTART_REGNUM (whether it is
1632 described or not). */
1633 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM);
1634 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1635 set_gdbarch_num_pseudo_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1637 /* If it's present, then assign it to the reserved number. */
1638 feature = tdesc_find_feature (info.target_desc,
1639 "org.gnu.gdb.mips.linux");
1640 if (feature != NULL)
1641 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM,
1647 _initialize_mips_linux_tdep (void)
1649 const struct bfd_arch_info *arch_info;
1651 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1653 arch_info = arch_info->next)
1655 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1657 mips_linux_init_abi);
1660 /* Initialize the standard target descriptions. */
1661 initialize_tdesc_mips_linux ();
1662 initialize_tdesc_mips_dsp_linux ();
1663 initialize_tdesc_mips64_linux ();
1664 initialize_tdesc_mips64_dsp_linux ();