1 /* Target-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001, 2002, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "solib-svr4.h"
26 #include "mips-tdep.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
31 #include "trad-frame.h"
32 #include "tramp-frame.h"
35 #include "solib-svr4.h"
38 #include "target-descriptions.h"
39 #include "mips-linux-tdep.h"
41 static struct target_so_ops mips_svr4_so_ops;
43 /* Figure out where the longjmp will land.
44 We expect the first arg to be a pointer to the jmp_buf structure
45 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
46 at. The pc is copied into PC. This routine returns 1 on
49 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
50 #define MIPS_LINUX_JB_PC 0
53 mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
56 struct gdbarch *gdbarch = get_frame_arch (frame);
57 char buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
59 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
61 if (target_read_memory (jb_addr
62 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE,
63 buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
66 *pc = extract_unsigned_integer (buf,
67 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
72 /* Transform the bits comprising a 32-bit register to the right size
73 for regcache_raw_supply(). This is needed when mips_isa_regsize()
77 supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
79 gdb_byte buf[MAX_REGISTER_SIZE];
80 store_signed_integer (buf,
81 register_size (get_regcache_arch (regcache), regnum),
82 extract_signed_integer (addr, 4));
83 regcache_raw_supply (regcache, regnum, buf);
86 /* Unpack an elf_gregset_t into GDB's register cache. */
89 mips_supply_gregset (struct regcache *regcache,
90 const mips_elf_gregset_t *gregsetp)
93 const mips_elf_greg_t *regp = *gregsetp;
94 char zerobuf[MAX_REGISTER_SIZE];
95 struct gdbarch *gdbarch = get_regcache_arch (regcache);
97 memset (zerobuf, 0, MAX_REGISTER_SIZE);
99 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
100 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
102 if (mips_linux_restart_reg_p (gdbarch))
103 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0);
105 supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO);
106 supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI);
108 supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc,
110 supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
111 regp + EF_CP0_BADVADDR);
112 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
113 supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause,
114 regp + EF_CP0_CAUSE);
116 /* Fill inaccessible registers with zero. */
117 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
118 regcache_raw_supply (regcache, MIPS_UNUSED_REGNUM, zerobuf);
119 for (regi = MIPS_FIRST_EMBED_REGNUM;
120 regi <= MIPS_LAST_EMBED_REGNUM;
122 regcache_raw_supply (regcache, regi, zerobuf);
125 /* Pack our registers (or one register) into an elf_gregset_t. */
128 mips_fill_gregset (const struct regcache *regcache,
129 mips_elf_gregset_t *gregsetp, int regno)
131 struct gdbarch *gdbarch = get_regcache_arch (regcache);
133 mips_elf_greg_t *regp = *gregsetp;
138 memset (regp, 0, sizeof (mips_elf_gregset_t));
139 for (regi = 1; regi < 32; regi++)
140 mips_fill_gregset (regcache, gregsetp, regi);
141 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
142 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
143 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
144 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
145 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
146 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
147 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
151 if (regno > 0 && regno < 32)
153 dst = regp + regno + EF_REG0;
154 regcache_raw_collect (regcache, regno, dst);
158 if (regno == mips_regnum (gdbarch)->lo)
160 else if (regno == mips_regnum (gdbarch)->hi)
162 else if (regno == mips_regnum (gdbarch)->pc)
163 regaddr = EF_CP0_EPC;
164 else if (regno == mips_regnum (gdbarch)->badvaddr)
165 regaddr = EF_CP0_BADVADDR;
166 else if (regno == MIPS_PS_REGNUM)
167 regaddr = EF_CP0_STATUS;
168 else if (regno == mips_regnum (gdbarch)->cause)
169 regaddr = EF_CP0_CAUSE;
170 else if (mips_linux_restart_reg_p (gdbarch)
171 && regno == MIPS_RESTART_REGNUM)
178 dst = regp + regaddr;
179 regcache_raw_collect (regcache, regno, dst);
183 /* Likewise, unpack an elf_fpregset_t. */
186 mips_supply_fpregset (struct regcache *regcache,
187 const mips_elf_fpregset_t *fpregsetp)
189 struct gdbarch *gdbarch = get_regcache_arch (regcache);
191 char zerobuf[MAX_REGISTER_SIZE];
193 memset (zerobuf, 0, MAX_REGISTER_SIZE);
195 for (regi = 0; regi < 32; regi++)
196 regcache_raw_supply (regcache,
197 gdbarch_fp0_regnum (gdbarch) + regi,
200 regcache_raw_supply (regcache,
201 mips_regnum (gdbarch)->fp_control_status,
204 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
205 regcache_raw_supply (regcache,
206 mips_regnum (gdbarch)->fp_implementation_revision,
210 /* Likewise, pack one or all floating point registers into an
214 mips_fill_fpregset (const struct regcache *regcache,
215 mips_elf_fpregset_t *fpregsetp, int regno)
217 struct gdbarch *gdbarch = get_regcache_arch (regcache);
220 if ((regno >= gdbarch_fp0_regnum (gdbarch))
221 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
223 to = (char *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch));
224 regcache_raw_collect (regcache, regno, to);
226 else if (regno == mips_regnum (gdbarch)->fp_control_status)
228 to = (char *) (*fpregsetp + 32);
229 regcache_raw_collect (regcache, regno, to);
231 else if (regno == -1)
235 for (regi = 0; regi < 32; regi++)
236 mips_fill_fpregset (regcache, fpregsetp,
237 gdbarch_fp0_regnum (gdbarch) + regi);
238 mips_fill_fpregset (regcache, fpregsetp,
239 mips_regnum (gdbarch)->fp_control_status);
243 /* Support for 64-bit ABIs. */
245 /* Figure out where the longjmp will land.
246 We expect the first arg to be a pointer to the jmp_buf structure
247 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
248 at. The pc is copied into PC. This routine returns 1 on
251 /* Details about jmp_buf. */
253 #define MIPS64_LINUX_JB_PC 0
256 mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
259 struct gdbarch *gdbarch = get_frame_arch (frame);
260 void *buf = alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
261 int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8;
263 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
265 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
267 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
270 *pc = extract_unsigned_integer (buf,
271 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
276 /* Register set support functions. These operate on standard 64-bit
277 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
278 target will still use the 64-bit format for PTRACE_GETREGS. */
280 /* Supply a 64-bit register. */
283 supply_64bit_reg (struct regcache *regcache, int regnum,
286 struct gdbarch *gdbarch = get_regcache_arch (regcache);
287 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
288 && register_size (gdbarch, regnum) == 4)
289 regcache_raw_supply (regcache, regnum, buf + 4);
291 regcache_raw_supply (regcache, regnum, buf);
294 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
297 mips64_supply_gregset (struct regcache *regcache,
298 const mips64_elf_gregset_t *gregsetp)
301 const mips64_elf_greg_t *regp = *gregsetp;
302 gdb_byte zerobuf[MAX_REGISTER_SIZE];
303 struct gdbarch *gdbarch = get_regcache_arch (regcache);
305 memset (zerobuf, 0, MAX_REGISTER_SIZE);
307 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
308 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
309 (const gdb_byte *)(regp + regi));
311 if (mips_linux_restart_reg_p (gdbarch))
312 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM,
313 (const gdb_byte *)(regp + MIPS64_EF_REG0));
315 supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo,
316 (const gdb_byte *) (regp + MIPS64_EF_LO));
317 supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi,
318 (const gdb_byte *) (regp + MIPS64_EF_HI));
320 supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc,
321 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
322 supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
323 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
324 supply_64bit_reg (regcache, MIPS_PS_REGNUM,
325 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
326 supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause,
327 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
329 /* Fill inaccessible registers with zero. */
330 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
331 regcache_raw_supply (regcache, MIPS_UNUSED_REGNUM, zerobuf);
332 for (regi = MIPS_FIRST_EMBED_REGNUM;
333 regi <= MIPS_LAST_EMBED_REGNUM;
335 regcache_raw_supply (regcache, regi, zerobuf);
338 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
341 mips64_fill_gregset (const struct regcache *regcache,
342 mips64_elf_gregset_t *gregsetp, int regno)
344 struct gdbarch *gdbarch = get_regcache_arch (regcache);
346 mips64_elf_greg_t *regp = *gregsetp;
351 memset (regp, 0, sizeof (mips64_elf_gregset_t));
352 for (regi = 1; regi < 32; regi++)
353 mips64_fill_gregset (regcache, gregsetp, regi);
354 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
355 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
356 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
357 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
358 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
359 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
360 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
364 if (regno > 0 && regno < 32)
365 regaddr = regno + MIPS64_EF_REG0;
366 else if (regno == mips_regnum (gdbarch)->lo)
367 regaddr = MIPS64_EF_LO;
368 else if (regno == mips_regnum (gdbarch)->hi)
369 regaddr = MIPS64_EF_HI;
370 else if (regno == mips_regnum (gdbarch)->pc)
371 regaddr = MIPS64_EF_CP0_EPC;
372 else if (regno == mips_regnum (gdbarch)->badvaddr)
373 regaddr = MIPS64_EF_CP0_BADVADDR;
374 else if (regno == MIPS_PS_REGNUM)
375 regaddr = MIPS64_EF_CP0_STATUS;
376 else if (regno == mips_regnum (gdbarch)->cause)
377 regaddr = MIPS64_EF_CP0_CAUSE;
378 else if (mips_linux_restart_reg_p (gdbarch)
379 && regno == MIPS_RESTART_REGNUM)
380 regaddr = MIPS64_EF_REG0;
386 gdb_byte buf[MAX_REGISTER_SIZE];
389 regcache_raw_collect (regcache, regno, buf);
390 val = extract_signed_integer (buf, register_size (gdbarch, regno));
391 dst = regp + regaddr;
392 store_signed_integer (dst, 8, val);
396 /* Likewise, unpack an elf_fpregset_t. */
399 mips64_supply_fpregset (struct regcache *regcache,
400 const mips64_elf_fpregset_t *fpregsetp)
402 struct gdbarch *gdbarch = get_regcache_arch (regcache);
405 /* See mips_linux_o32_sigframe_init for a description of the
406 peculiar FP register layout. */
407 if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4)
408 for (regi = 0; regi < 32; regi++)
410 const gdb_byte *reg_ptr = (const gdb_byte *)(*fpregsetp + (regi & ~1));
411 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
413 regcache_raw_supply (regcache,
414 gdbarch_fp0_regnum (gdbarch) + regi,
418 for (regi = 0; regi < 32; regi++)
419 regcache_raw_supply (regcache,
420 gdbarch_fp0_regnum (gdbarch) + regi,
421 (const char *)(*fpregsetp + regi));
423 supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status,
424 (const gdb_byte *)(*fpregsetp + 32));
426 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
427 include it - but the result of PTRACE_GETFPREGS does. The best we
428 can do is to assume that its value is present. */
429 supply_32bit_reg (regcache,
430 mips_regnum (gdbarch)->fp_implementation_revision,
431 (const gdb_byte *)(*fpregsetp + 32) + 4);
434 /* Likewise, pack one or all floating point registers into an
438 mips64_fill_fpregset (const struct regcache *regcache,
439 mips64_elf_fpregset_t *fpregsetp, int regno)
441 struct gdbarch *gdbarch = get_regcache_arch (regcache);
444 if ((regno >= gdbarch_fp0_regnum (gdbarch))
445 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
447 /* See mips_linux_o32_sigframe_init for a description of the
448 peculiar FP register layout. */
449 if (register_size (gdbarch, regno) == 4)
451 int regi = regno - gdbarch_fp0_regnum (gdbarch);
453 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
454 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
456 regcache_raw_collect (regcache, regno, to);
460 to = (gdb_byte *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch));
461 regcache_raw_collect (regcache, regno, to);
464 else if (regno == mips_regnum (gdbarch)->fp_control_status)
466 gdb_byte buf[MAX_REGISTER_SIZE];
469 regcache_raw_collect (regcache, regno, buf);
470 val = extract_signed_integer (buf, register_size (gdbarch, regno));
471 to = (gdb_byte *) (*fpregsetp + 32);
472 store_signed_integer (to, 4, val);
474 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
476 gdb_byte buf[MAX_REGISTER_SIZE];
479 regcache_raw_collect (regcache, regno, buf);
480 val = extract_signed_integer (buf, register_size (gdbarch, regno));
481 to = (gdb_byte *) (*fpregsetp + 32) + 4;
482 store_signed_integer (to, 4, val);
484 else if (regno == -1)
488 for (regi = 0; regi < 32; regi++)
489 mips64_fill_fpregset (regcache, fpregsetp,
490 gdbarch_fp0_regnum (gdbarch) + regi);
491 mips64_fill_fpregset (regcache, fpregsetp,
492 mips_regnum (gdbarch)->fp_control_status);
493 mips64_fill_fpregset (regcache, fpregsetp,
494 (mips_regnum (gdbarch)
495 ->fp_implementation_revision));
500 /* Use a local version of this function to get the correct types for
501 regsets, until multi-arch core support is ready. */
504 fetch_core_registers (struct regcache *regcache,
505 char *core_reg_sect, unsigned core_reg_size,
506 int which, CORE_ADDR reg_addr)
508 mips_elf_gregset_t gregset;
509 mips_elf_fpregset_t fpregset;
510 mips64_elf_gregset_t gregset64;
511 mips64_elf_fpregset_t fpregset64;
515 if (core_reg_size == sizeof (gregset))
517 memcpy ((char *) &gregset, core_reg_sect, sizeof (gregset));
518 mips_supply_gregset (regcache,
519 (const mips_elf_gregset_t *) &gregset);
521 else if (core_reg_size == sizeof (gregset64))
523 memcpy ((char *) &gregset64, core_reg_sect, sizeof (gregset64));
524 mips64_supply_gregset (regcache,
525 (const mips64_elf_gregset_t *) &gregset64);
529 warning (_("wrong size gregset struct in core file"));
534 if (core_reg_size == sizeof (fpregset))
536 memcpy ((char *) &fpregset, core_reg_sect, sizeof (fpregset));
537 mips_supply_fpregset (regcache,
538 (const mips_elf_fpregset_t *) &fpregset);
540 else if (core_reg_size == sizeof (fpregset64))
542 memcpy ((char *) &fpregset64, core_reg_sect,
543 sizeof (fpregset64));
544 mips64_supply_fpregset (regcache,
545 (const mips64_elf_fpregset_t *) &fpregset64);
549 warning (_("wrong size fpregset struct in core file"));
554 /* Register that we are able to handle ELF file formats using standard
555 procfs "regset" structures. */
557 static struct core_fns regset_core_fns =
559 bfd_target_elf_flavour, /* core_flavour */
560 default_check_format, /* check_format */
561 default_core_sniffer, /* core_sniffer */
562 fetch_core_registers, /* core_read_registers */
566 static const struct target_desc *
567 mips_linux_core_read_description (struct gdbarch *gdbarch,
568 struct target_ops *target,
571 asection *section = bfd_get_section_by_name (abfd, ".reg");
575 switch (bfd_section_size (abfd, section))
577 case sizeof (mips_elf_gregset_t):
578 return mips_tdesc_gp32;
580 case sizeof (mips64_elf_gregset_t):
581 return mips_tdesc_gp64;
589 /* Check the code at PC for a dynamic linker lazy resolution stub.
590 Because they aren't in the .plt section, we pattern-match on the
591 code generated by GNU ld. They look like this:
598 (with the appropriate doubleword instructions for N64). Also
599 return the dynamic symbol index used in the last instruction. */
602 mips_linux_in_dynsym_stub (CORE_ADDR pc, char *name)
604 unsigned char buf[28], *p;
605 ULONGEST insn, insn1;
606 int n64 = (mips_abi (current_gdbarch) == MIPS_ABI_N64);
608 read_memory (pc - 12, buf, 28);
612 /* ld t9,0x8010(gp) */
617 /* lw t9,0x8010(gp) */
624 insn = extract_unsigned_integer (p, 4);
632 insn = extract_unsigned_integer (p + 4, 4);
636 if (insn != 0x03e0782d)
642 if (insn != 0x03e07821)
646 insn = extract_unsigned_integer (p + 8, 4);
648 if (insn != 0x0320f809)
651 insn = extract_unsigned_integer (p + 12, 4);
654 /* daddiu t8,zero,0 */
655 if ((insn & 0xffff0000) != 0x64180000)
660 /* addiu t8,zero,0 */
661 if ((insn & 0xffff0000) != 0x24180000)
665 return (insn & 0xffff);
668 /* Return non-zero iff PC belongs to the dynamic linker resolution
669 code or to a stub. */
672 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
674 /* Check whether PC is in the dynamic linker. This also checks
675 whether it is in the .plt section, which MIPS does not use. */
676 if (svr4_in_dynsym_resolve_code (pc))
679 /* Pattern match for the stub. It would be nice if there were a
680 more efficient way to avoid this check. */
681 if (mips_linux_in_dynsym_stub (pc, NULL))
687 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
688 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
689 implementation of this triggers at "fixup" from the same objfile as
690 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
691 "__dl_runtime_resolve" directly. An unresolved PLT entry will
692 point to _dl_runtime_resolve, which will first call
693 __dl_runtime_resolve, and then pass control to the resolved
697 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
699 struct minimal_symbol *resolver;
701 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
703 if (resolver && SYMBOL_VALUE_ADDRESS (resolver) == pc)
704 return frame_pc_unwind (get_current_frame ());
709 /* Signal trampoline support. There are four supported layouts for a
710 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
711 n64 rt_sigframe. We handle them all independently; not the most
712 efficient way, but simplest. First, declare all the unwinders. */
714 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
715 struct frame_info *this_frame,
716 struct trad_frame_cache *this_cache,
719 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
720 struct frame_info *this_frame,
721 struct trad_frame_cache *this_cache,
724 #define MIPS_NR_LINUX 4000
725 #define MIPS_NR_N64_LINUX 5000
726 #define MIPS_NR_N32_LINUX 6000
728 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
729 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
730 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
731 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
733 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
734 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
735 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
736 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
737 #define MIPS_INST_SYSCALL 0x0000000c
739 static const struct tramp_frame mips_linux_o32_sigframe = {
743 { MIPS_INST_LI_V0_SIGRETURN, -1 },
744 { MIPS_INST_SYSCALL, -1 },
745 { TRAMP_SENTINEL_INSN, -1 }
747 mips_linux_o32_sigframe_init
750 static const struct tramp_frame mips_linux_o32_rt_sigframe = {
754 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
755 { MIPS_INST_SYSCALL, -1 },
756 { TRAMP_SENTINEL_INSN, -1 } },
757 mips_linux_o32_sigframe_init
760 static const struct tramp_frame mips_linux_n32_rt_sigframe = {
764 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
765 { MIPS_INST_SYSCALL, -1 },
766 { TRAMP_SENTINEL_INSN, -1 }
768 mips_linux_n32n64_sigframe_init
771 static const struct tramp_frame mips_linux_n64_rt_sigframe = {
775 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
776 { MIPS_INST_SYSCALL, -1 },
777 { TRAMP_SENTINEL_INSN, -1 }
779 mips_linux_n32n64_sigframe_init
783 /* The unwinder for o32 signal frames. The legacy structures look
787 u32 sf_ass[4]; [argument save space for o32]
788 u32 sf_code[2]; [signal trampoline]
789 struct sigcontext sf_sc;
794 unsigned int sc_regmask; [Unused]
795 unsigned int sc_status;
796 unsigned long long sc_pc;
797 unsigned long long sc_regs[32];
798 unsigned long long sc_fpregs[32];
799 unsigned int sc_ownedfp;
800 unsigned int sc_fpc_csr;
801 unsigned int sc_fpc_eir; [Unused]
802 unsigned int sc_used_math;
803 unsigned int sc_ssflags; [Unused]
804 [Alignment hole of four bytes]
805 unsigned long long sc_mdhi;
806 unsigned long long sc_mdlo;
808 unsigned int sc_cause; [Unused]
809 unsigned int sc_badvaddr; [Unused]
811 unsigned long sc_sigset[4]; [kernel's sigset_t]
814 The RT signal frames look like this:
817 u32 rs_ass[4]; [argument save space for o32]
818 u32 rs_code[2] [signal trampoline]
819 struct siginfo rs_info;
820 struct ucontext rs_uc;
824 unsigned long uc_flags;
825 struct ucontext *uc_link;
827 [Alignment hole of four bytes]
828 struct sigcontext uc_mcontext;
833 #define SIGFRAME_CODE_OFFSET (4 * 4)
834 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
836 #define RTSIGFRAME_SIGINFO_SIZE 128
837 #define STACK_T_SIZE (3 * 4)
838 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
839 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
840 + RTSIGFRAME_SIGINFO_SIZE \
841 + UCONTEXT_SIGCONTEXT_OFFSET)
843 #define SIGCONTEXT_PC (1 * 8)
844 #define SIGCONTEXT_REGS (2 * 8)
845 #define SIGCONTEXT_FPREGS (34 * 8)
846 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
847 #define SIGCONTEXT_HI (69 * 8)
848 #define SIGCONTEXT_LO (70 * 8)
849 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
850 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
852 #define SIGCONTEXT_REG_SIZE 8
855 mips_linux_o32_sigframe_init (const struct tramp_frame *self,
856 struct frame_info *this_frame,
857 struct trad_frame_cache *this_cache,
860 struct gdbarch *gdbarch = get_frame_arch (this_frame);
861 int ireg, reg_position;
862 CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
863 const struct mips_regnum *regs = mips_regnum (gdbarch);
866 if (self == &mips_linux_o32_sigframe)
867 sigcontext_base += SIGFRAME_SIGCONTEXT_OFFSET;
869 sigcontext_base += RTSIGFRAME_SIGCONTEXT_OFFSET;
871 /* I'm not proud of this hack. Eventually we will have the
872 infrastructure to indicate the size of saved registers on a
873 per-frame basis, but right now we don't; the kernel saves eight
874 bytes but we only want four. Use regs_base to access any
876 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
877 regs_base = sigcontext_base + 4;
879 regs_base = sigcontext_base;
881 if (mips_linux_restart_reg_p (gdbarch))
882 trad_frame_set_reg_addr (this_cache,
884 + gdbarch_num_regs (gdbarch)),
885 regs_base + SIGCONTEXT_REGS);
887 for (ireg = 1; ireg < 32; ireg++)
888 trad_frame_set_reg_addr (this_cache,
889 ireg + MIPS_ZERO_REGNUM
890 + gdbarch_num_regs (gdbarch),
891 regs_base + SIGCONTEXT_REGS
892 + ireg * SIGCONTEXT_REG_SIZE);
894 /* The way that floating point registers are saved, unfortunately,
895 depends on the architecture the kernel is built for. For the r3000 and
896 tx39, four bytes of each register are at the beginning of each of the
897 32 eight byte slots. For everything else, the registers are saved
898 using double precision; only the even-numbered slots are initialized,
899 and the high bits are the odd-numbered register. Assume the latter
900 layout, since we can't tell, and it's much more common. Which bits are
901 the "high" bits depends on endianness. */
902 for (ireg = 0; ireg < 32; ireg++)
903 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
904 trad_frame_set_reg_addr (this_cache,
906 gdbarch_num_regs (gdbarch),
907 sigcontext_base + SIGCONTEXT_FPREGS + 4
908 + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
910 trad_frame_set_reg_addr (this_cache,
912 + gdbarch_num_regs (gdbarch),
913 sigcontext_base + SIGCONTEXT_FPREGS
914 + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
916 trad_frame_set_reg_addr (this_cache,
917 regs->pc + gdbarch_num_regs (gdbarch),
918 regs_base + SIGCONTEXT_PC);
920 trad_frame_set_reg_addr (this_cache,
921 regs->fp_control_status
922 + gdbarch_num_regs (gdbarch),
923 sigcontext_base + SIGCONTEXT_FPCSR);
924 trad_frame_set_reg_addr (this_cache,
925 regs->hi + gdbarch_num_regs (gdbarch),
926 regs_base + SIGCONTEXT_HI);
927 trad_frame_set_reg_addr (this_cache,
928 regs->lo + gdbarch_num_regs (gdbarch),
929 regs_base + SIGCONTEXT_LO);
930 trad_frame_set_reg_addr (this_cache,
931 regs->cause + gdbarch_num_regs (gdbarch),
932 sigcontext_base + SIGCONTEXT_CAUSE);
933 trad_frame_set_reg_addr (this_cache,
934 regs->badvaddr + gdbarch_num_regs (gdbarch),
935 sigcontext_base + SIGCONTEXT_BADVADDR);
937 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
938 trad_frame_set_id (this_cache,
939 frame_id_build (func - SIGFRAME_CODE_OFFSET,
944 /* For N32/N64 things look different. There is no non-rt signal frame.
946 struct rt_sigframe_n32 {
947 u32 rs_ass[4]; [ argument save space for o32 ]
948 u32 rs_code[2]; [ signal trampoline ]
949 struct siginfo rs_info;
950 struct ucontextn32 rs_uc;
957 struct sigcontext uc_mcontext;
958 sigset_t uc_sigmask; [ mask last for extensibility ]
962 u32 rs_ass[4]; [ argument save space for o32 ]
963 u32 rs_code[2]; [ signal trampoline ]
964 struct siginfo rs_info;
965 struct ucontext rs_uc;
969 unsigned long uc_flags;
970 struct ucontext *uc_link;
972 struct sigcontext uc_mcontext;
973 sigset_t uc_sigmask; [ mask last for extensibility ]
976 And the sigcontext is different (this is for both n32 and n64):
979 unsigned long long sc_regs[32];
980 unsigned long long sc_fpregs[32];
981 unsigned long long sc_mdhi;
982 unsigned long long sc_hi1;
983 unsigned long long sc_hi2;
984 unsigned long long sc_hi3;
985 unsigned long long sc_mdlo;
986 unsigned long long sc_lo1;
987 unsigned long long sc_lo2;
988 unsigned long long sc_lo3;
989 unsigned long long sc_pc;
990 unsigned int sc_fpc_csr;
991 unsigned int sc_used_math;
993 unsigned int sc_reserved;
996 That is the post-2.6.12 definition of the 64-bit sigcontext; before
997 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1001 #define N32_STACK_T_SIZE STACK_T_SIZE
1002 #define N64_STACK_T_SIZE (2 * 8 + 4)
1003 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1004 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1005 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1006 + RTSIGFRAME_SIGINFO_SIZE \
1007 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1008 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1009 + RTSIGFRAME_SIGINFO_SIZE \
1010 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1012 #define N64_SIGCONTEXT_REGS (0 * 8)
1013 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1014 #define N64_SIGCONTEXT_HI (64 * 8)
1015 #define N64_SIGCONTEXT_LO (68 * 8)
1016 #define N64_SIGCONTEXT_PC (72 * 8)
1017 #define N64_SIGCONTEXT_FPCSR (73 * 8)
1019 #define N64_SIGCONTEXT_REG_SIZE 8
1022 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
1023 struct frame_info *this_frame,
1024 struct trad_frame_cache *this_cache,
1027 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1028 int ireg, reg_position;
1029 CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
1030 const struct mips_regnum *regs = mips_regnum (gdbarch);
1032 if (self == &mips_linux_n32_rt_sigframe)
1033 sigcontext_base += N32_SIGFRAME_SIGCONTEXT_OFFSET;
1035 sigcontext_base += N64_SIGFRAME_SIGCONTEXT_OFFSET;
1037 if (mips_linux_restart_reg_p (gdbarch))
1038 trad_frame_set_reg_addr (this_cache,
1039 (MIPS_RESTART_REGNUM
1040 + gdbarch_num_regs (gdbarch)),
1041 sigcontext_base + N64_SIGCONTEXT_REGS);
1043 for (ireg = 1; ireg < 32; ireg++)
1044 trad_frame_set_reg_addr (this_cache,
1045 ireg + MIPS_ZERO_REGNUM
1046 + gdbarch_num_regs (gdbarch),
1047 sigcontext_base + N64_SIGCONTEXT_REGS
1048 + ireg * N64_SIGCONTEXT_REG_SIZE);
1050 for (ireg = 0; ireg < 32; ireg++)
1051 trad_frame_set_reg_addr (this_cache,
1053 + gdbarch_num_regs (gdbarch),
1054 sigcontext_base + N64_SIGCONTEXT_FPREGS
1055 + ireg * N64_SIGCONTEXT_REG_SIZE);
1057 trad_frame_set_reg_addr (this_cache,
1058 regs->pc + gdbarch_num_regs (gdbarch),
1059 sigcontext_base + N64_SIGCONTEXT_PC);
1061 trad_frame_set_reg_addr (this_cache,
1062 regs->fp_control_status
1063 + gdbarch_num_regs (gdbarch),
1064 sigcontext_base + N64_SIGCONTEXT_FPCSR);
1065 trad_frame_set_reg_addr (this_cache,
1066 regs->hi + gdbarch_num_regs (gdbarch),
1067 sigcontext_base + N64_SIGCONTEXT_HI);
1068 trad_frame_set_reg_addr (this_cache,
1069 regs->lo + gdbarch_num_regs (gdbarch),
1070 sigcontext_base + N64_SIGCONTEXT_LO);
1072 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1073 trad_frame_set_id (this_cache,
1074 frame_id_build (func - SIGFRAME_CODE_OFFSET,
1079 mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1081 struct gdbarch *gdbarch = get_regcache_arch (regcache);
1082 regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc);
1084 /* Clear the syscall restart flag. */
1085 if (mips_linux_restart_reg_p (gdbarch))
1086 regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0);
1089 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1092 mips_linux_restart_reg_p (struct gdbarch *gdbarch)
1094 /* If we do not have a target description with registers, then
1095 MIPS_RESTART_REGNUM will not be included in the register set. */
1096 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1099 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1100 either be GPR-sized or missing. */
1101 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0;
1104 /* Initialize one of the GNU/Linux OS ABIs. */
1107 mips_linux_init_abi (struct gdbarch_info info,
1108 struct gdbarch *gdbarch)
1110 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1111 enum mips_abi abi = mips_abi (gdbarch);
1112 struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info;
1117 set_gdbarch_get_longjmp_target (gdbarch,
1118 mips_linux_get_longjmp_target);
1119 set_solib_svr4_fetch_link_map_offsets
1120 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1121 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1122 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
1125 set_gdbarch_get_longjmp_target (gdbarch,
1126 mips_linux_get_longjmp_target);
1127 set_solib_svr4_fetch_link_map_offsets
1128 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1129 set_gdbarch_long_double_bit (gdbarch, 128);
1130 /* These floatformats should probably be renamed. MIPS uses
1131 the same 128-bit IEEE floating point format that IA-64 uses,
1132 except that the quiet/signalling NaN bit is reversed (GDB
1133 does not distinguish between quiet and signalling NaNs). */
1134 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1135 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
1138 set_gdbarch_get_longjmp_target (gdbarch,
1139 mips64_linux_get_longjmp_target);
1140 set_solib_svr4_fetch_link_map_offsets
1141 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1142 set_gdbarch_long_double_bit (gdbarch, 128);
1143 /* These floatformats should probably be renamed. MIPS uses
1144 the same 128-bit IEEE floating point format that IA-64 uses,
1145 except that the quiet/signalling NaN bit is reversed (GDB
1146 does not distinguish between quiet and signalling NaNs). */
1147 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1148 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
1154 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
1155 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1157 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
1159 /* Enable TLS support. */
1160 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1161 svr4_fetch_objfile_link_map);
1163 /* Initialize this lazily, to avoid an initialization order
1164 dependency on solib-svr4.c's _initialize routine. */
1165 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL)
1167 mips_svr4_so_ops = svr4_so_ops;
1168 mips_svr4_so_ops.in_dynsym_resolve_code
1169 = mips_linux_in_dynsym_resolve_code;
1171 set_solib_ops (gdbarch, &mips_svr4_so_ops);
1173 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc);
1175 set_gdbarch_core_read_description (gdbarch,
1176 mips_linux_core_read_description);
1180 const struct tdesc_feature *feature;
1182 /* If we have target-described registers, then we can safely
1183 reserve a number for MIPS_RESTART_REGNUM (whether it is
1184 described or not). */
1185 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM);
1186 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1188 /* If it's present, then assign it to the reserved number. */
1189 feature = tdesc_find_feature (info.target_desc,
1190 "org.gnu.gdb.mips.linux");
1191 if (feature != NULL)
1192 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM,
1198 _initialize_mips_linux_tdep (void)
1200 const struct bfd_arch_info *arch_info;
1202 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1204 arch_info = arch_info->next)
1206 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1208 mips_linux_init_abi);
1211 deprecated_add_core_fns (®set_core_fns);