1 /* Target-dependent code for GNU/Linux on MIPS processors.
3 Copyright 2001, 2002, 2004 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
25 #include "solib-svr4.h"
27 #include "mips-tdep.h"
28 #include "gdb_string.h"
29 #include "gdb_assert.h"
32 #include "trad-frame.h"
33 #include "tramp-frame.h"
35 /* Copied from <asm/elf.h>. */
39 typedef unsigned char elf_greg_t[4];
40 typedef elf_greg_t elf_gregset_t[ELF_NGREG];
42 typedef unsigned char elf_fpreg_t[8];
43 typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
45 /* 0 - 31 are integer registers, 32 - 63 are fp registers. */
60 #define EF_CP0_BADVADDR 41
61 #define EF_CP0_STATUS 42
62 #define EF_CP0_CAUSE 43
66 /* Figure out where the longjmp will land.
67 We expect the first arg to be a pointer to the jmp_buf structure
68 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
69 at. The pc is copied into PC. This routine returns 1 on
72 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
73 #define MIPS_LINUX_JB_PC 0
76 mips_linux_get_longjmp_target (CORE_ADDR *pc)
79 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
81 jb_addr = read_register (MIPS_A0_REGNUM);
83 if (target_read_memory (jb_addr
84 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE,
85 buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
88 *pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
93 /* Transform the bits comprising a 32-bit register to the right size
94 for regcache_raw_supply(). This is needed when mips_isa_regsize()
98 supply_32bit_reg (int regnum, const void *addr)
100 char buf[MAX_REGISTER_SIZE];
101 store_signed_integer (buf, register_size (current_gdbarch, regnum),
102 extract_signed_integer (addr, 4));
103 regcache_raw_supply (current_regcache, regnum, buf);
106 /* Unpack an elf_gregset_t into GDB's register cache. */
109 supply_gregset (elf_gregset_t *gregsetp)
112 elf_greg_t *regp = *gregsetp;
113 char zerobuf[MAX_REGISTER_SIZE];
115 memset (zerobuf, 0, MAX_REGISTER_SIZE);
117 for (regi = EF_REG0; regi <= EF_REG31; regi++)
118 supply_32bit_reg ((regi - EF_REG0), (char *)(regp + regi));
120 supply_32bit_reg (mips_regnum (current_gdbarch)->lo,
121 (char *)(regp + EF_LO));
122 supply_32bit_reg (mips_regnum (current_gdbarch)->hi,
123 (char *)(regp + EF_HI));
125 supply_32bit_reg (mips_regnum (current_gdbarch)->pc,
126 (char *)(regp + EF_CP0_EPC));
127 supply_32bit_reg (mips_regnum (current_gdbarch)->badvaddr,
128 (char *)(regp + EF_CP0_BADVADDR));
129 supply_32bit_reg (MIPS_PS_REGNUM, (char *)(regp + EF_CP0_STATUS));
130 supply_32bit_reg (mips_regnum (current_gdbarch)->cause,
131 (char *)(regp + EF_CP0_CAUSE));
133 /* Fill inaccessible registers with zero. */
134 regcache_raw_supply (current_regcache, MIPS_UNUSED_REGNUM, zerobuf);
135 for (regi = MIPS_FIRST_EMBED_REGNUM;
136 regi < MIPS_LAST_EMBED_REGNUM;
138 regcache_raw_supply (current_regcache, regi, zerobuf);
141 /* Pack our registers (or one register) into an elf_gregset_t. */
144 fill_gregset (elf_gregset_t *gregsetp, int regno)
147 elf_greg_t *regp = *gregsetp;
152 memset (regp, 0, sizeof (elf_gregset_t));
153 for (regi = 0; regi < 32; regi++)
154 fill_gregset (gregsetp, regi);
155 fill_gregset (gregsetp, mips_regnum (current_gdbarch)->lo);
156 fill_gregset (gregsetp, mips_regnum (current_gdbarch)->hi);
157 fill_gregset (gregsetp, mips_regnum (current_gdbarch)->pc);
158 fill_gregset (gregsetp, mips_regnum (current_gdbarch)->badvaddr);
159 fill_gregset (gregsetp, MIPS_PS_REGNUM);
160 fill_gregset (gregsetp, mips_regnum (current_gdbarch)->cause);
167 dst = regp + regno + EF_REG0;
168 regcache_raw_collect (current_regcache, regno, dst);
172 if (regno == mips_regnum (current_gdbarch)->lo)
174 else if (regno == mips_regnum (current_gdbarch)->hi)
176 else if (regno == mips_regnum (current_gdbarch)->pc)
177 regaddr = EF_CP0_EPC;
178 else if (regno == mips_regnum (current_gdbarch)->badvaddr)
179 regaddr = EF_CP0_BADVADDR;
180 else if (regno == MIPS_PS_REGNUM)
181 regaddr = EF_CP0_STATUS;
182 else if (regno == mips_regnum (current_gdbarch)->cause)
183 regaddr = EF_CP0_CAUSE;
189 dst = regp + regaddr;
190 regcache_raw_collect (current_regcache, regno, dst);
194 /* Likewise, unpack an elf_fpregset_t. */
197 supply_fpregset (elf_fpregset_t *fpregsetp)
200 char zerobuf[MAX_REGISTER_SIZE];
202 memset (zerobuf, 0, MAX_REGISTER_SIZE);
204 for (regi = 0; regi < 32; regi++)
205 regcache_raw_supply (current_regcache, FP0_REGNUM + regi,
206 (char *)(*fpregsetp + regi));
208 regcache_raw_supply (current_regcache,
209 mips_regnum (current_gdbarch)->fp_control_status,
210 (char *)(*fpregsetp + 32));
212 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
213 regcache_raw_supply (current_regcache,
214 mips_regnum (current_gdbarch)->fp_implementation_revision,
218 /* Likewise, pack one or all floating point registers into an
222 fill_fpregset (elf_fpregset_t *fpregsetp, int regno)
226 if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
228 to = (char *) (*fpregsetp + regno - FP0_REGNUM);
229 regcache_raw_collect (current_regcache, regno, to);
231 else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
233 to = (char *) (*fpregsetp + 32);
234 regcache_raw_collect (current_regcache, regno, to);
236 else if (regno == -1)
240 for (regi = 0; regi < 32; regi++)
241 fill_fpregset (fpregsetp, FP0_REGNUM + regi);
242 fill_fpregset (fpregsetp,
243 mips_regnum (current_gdbarch)->fp_control_status);
247 /* Map gdb internal register number to ptrace ``address''.
248 These ``addresses'' are normally defined in <asm/ptrace.h>. */
251 mips_linux_register_addr (int regno, CORE_ADDR blockend)
255 if (regno < 0 || regno >= NUM_REGS)
256 error (_("Bogon register number %d."), regno);
260 else if ((regno >= mips_regnum (current_gdbarch)->fp0)
261 && (regno < mips_regnum (current_gdbarch)->fp0 + 32))
262 regaddr = FPR_BASE + (regno - mips_regnum (current_gdbarch)->fp0);
263 else if (regno == mips_regnum (current_gdbarch)->pc)
265 else if (regno == mips_regnum (current_gdbarch)->cause)
267 else if (regno == mips_regnum (current_gdbarch)->badvaddr)
269 else if (regno == mips_regnum (current_gdbarch)->lo)
271 else if (regno == mips_regnum (current_gdbarch)->hi)
273 else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
275 else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
278 error (_("Unknowable register number %d."), regno);
284 /* Fetch (and possibly build) an appropriate link_map_offsets
285 structure for native GNU/Linux MIPS targets using the struct
286 offsets defined in link.h (but without actual reference to that
289 This makes it possible to access GNU/Linux MIPS shared libraries
290 from a GDB that was built on a different host platform (for cross
293 static struct link_map_offsets *
294 mips_linux_svr4_fetch_link_map_offsets (void)
296 static struct link_map_offsets lmo;
297 static struct link_map_offsets *lmp = NULL;
303 lmo.r_debug_size = 8; /* The actual size is 20 bytes, but
304 this is all we need. */
305 lmo.r_map_offset = 4;
308 lmo.link_map_size = 20;
310 lmo.l_addr_offset = 0;
313 lmo.l_name_offset = 4;
316 lmo.l_next_offset = 12;
319 lmo.l_prev_offset = 16;
326 /* Support for 64-bit ABIs. */
328 /* Copied from <asm/elf.h>. */
329 #define MIPS64_ELF_NGREG 45
330 #define MIPS64_ELF_NFPREG 33
332 typedef unsigned char mips64_elf_greg_t[8];
333 typedef mips64_elf_greg_t mips64_elf_gregset_t[MIPS64_ELF_NGREG];
335 typedef unsigned char mips64_elf_fpreg_t[8];
336 typedef mips64_elf_fpreg_t mips64_elf_fpregset_t[MIPS64_ELF_NFPREG];
338 /* 0 - 31 are integer registers, 32 - 63 are fp registers. */
339 #define MIPS64_FPR_BASE 32
341 #define MIPS64_CAUSE 65
342 #define MIPS64_BADVADDR 66
343 #define MIPS64_MMHI 67
344 #define MIPS64_MMLO 68
345 #define MIPS64_FPC_CSR 69
346 #define MIPS64_FPC_EIR 70
348 #define MIPS64_EF_REG0 0
349 #define MIPS64_EF_REG31 31
350 #define MIPS64_EF_LO 32
351 #define MIPS64_EF_HI 33
352 #define MIPS64_EF_CP0_EPC 34
353 #define MIPS64_EF_CP0_BADVADDR 35
354 #define MIPS64_EF_CP0_STATUS 36
355 #define MIPS64_EF_CP0_CAUSE 37
357 #define MIPS64_EF_SIZE 304
359 /* Figure out where the longjmp will land.
360 We expect the first arg to be a pointer to the jmp_buf structure
361 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
362 at. The pc is copied into PC. This routine returns 1 on
365 /* Details about jmp_buf. */
367 #define MIPS64_LINUX_JB_PC 0
370 mips64_linux_get_longjmp_target (CORE_ADDR *pc)
373 void *buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
374 int element_size = TARGET_PTR_BIT == 32 ? 4 : 8;
376 jb_addr = read_register (MIPS_A0_REGNUM);
378 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
379 buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
382 *pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
387 /* Unpack an elf_gregset_t into GDB's register cache. */
390 mips64_supply_gregset (mips64_elf_gregset_t *gregsetp)
393 mips64_elf_greg_t *regp = *gregsetp;
394 char zerobuf[MAX_REGISTER_SIZE];
396 memset (zerobuf, 0, MAX_REGISTER_SIZE);
398 for (regi = MIPS64_EF_REG0; regi <= MIPS64_EF_REG31; regi++)
399 regcache_raw_supply (current_regcache, (regi - MIPS64_EF_REG0),
400 (char *)(regp + regi));
402 regcache_raw_supply (current_regcache,
403 mips_regnum (current_gdbarch)->lo,
404 (char *) (regp + MIPS64_EF_LO));
405 regcache_raw_supply (current_regcache,
406 mips_regnum (current_gdbarch)->hi,
407 (char *) (regp + MIPS64_EF_HI));
409 regcache_raw_supply (current_regcache,
410 mips_regnum (current_gdbarch)->pc,
411 (char *) (regp + MIPS64_EF_CP0_EPC));
412 regcache_raw_supply (current_regcache,
413 mips_regnum (current_gdbarch)->badvaddr,
414 (char *) (regp + MIPS64_EF_CP0_BADVADDR));
415 regcache_raw_supply (current_regcache, MIPS_PS_REGNUM,
416 (char *) (regp + MIPS64_EF_CP0_STATUS));
417 regcache_raw_supply (current_regcache,
418 mips_regnum (current_gdbarch)->cause,
419 (char *) (regp + MIPS64_EF_CP0_CAUSE));
421 /* Fill inaccessible registers with zero. */
422 regcache_raw_supply (current_regcache, MIPS_UNUSED_REGNUM, zerobuf);
423 for (regi = MIPS_FIRST_EMBED_REGNUM;
424 regi < MIPS_LAST_EMBED_REGNUM;
426 regcache_raw_supply (current_regcache, regi, zerobuf);
429 /* Pack our registers (or one register) into an elf_gregset_t. */
432 mips64_fill_gregset (mips64_elf_gregset_t *gregsetp, int regno)
435 mips64_elf_greg_t *regp = *gregsetp;
440 memset (regp, 0, sizeof (mips64_elf_gregset_t));
441 for (regi = 0; regi < 32; regi++)
442 mips64_fill_gregset (gregsetp, regi);
443 mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->lo);
444 mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->hi);
445 mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->pc);
446 mips64_fill_gregset (gregsetp,
447 mips_regnum (current_gdbarch)->badvaddr);
448 mips64_fill_gregset (gregsetp, MIPS_PS_REGNUM);
449 mips64_fill_gregset (gregsetp,
450 mips_regnum (current_gdbarch)->cause);
457 dst = regp + regno + MIPS64_EF_REG0;
458 regcache_raw_collect (current_regcache, regno, dst);
462 if (regno == mips_regnum (current_gdbarch)->lo)
463 regaddr = MIPS64_EF_LO;
464 else if (regno == mips_regnum (current_gdbarch)->hi)
465 regaddr = MIPS64_EF_HI;
466 else if (regno == mips_regnum (current_gdbarch)->pc)
467 regaddr = MIPS64_EF_CP0_EPC;
468 else if (regno == mips_regnum (current_gdbarch)->badvaddr)
469 regaddr = MIPS64_EF_CP0_BADVADDR;
470 else if (regno == MIPS_PS_REGNUM)
471 regaddr = MIPS64_EF_CP0_STATUS;
472 else if (regno == mips_regnum (current_gdbarch)->cause)
473 regaddr = MIPS64_EF_CP0_CAUSE;
479 dst = regp + regaddr;
480 regcache_raw_collect (current_regcache, regno, dst);
484 /* Likewise, unpack an elf_fpregset_t. */
487 mips64_supply_fpregset (mips64_elf_fpregset_t *fpregsetp)
490 char zerobuf[MAX_REGISTER_SIZE];
492 memset (zerobuf, 0, MAX_REGISTER_SIZE);
494 for (regi = 0; regi < 32; regi++)
495 regcache_raw_supply (current_regcache, FP0_REGNUM + regi,
496 (char *)(*fpregsetp + regi));
498 regcache_raw_supply (current_regcache,
499 mips_regnum (current_gdbarch)->fp_control_status,
500 (char *)(*fpregsetp + 32));
502 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
503 regcache_raw_supply (current_regcache,
504 mips_regnum (current_gdbarch)->fp_implementation_revision,
508 /* Likewise, pack one or all floating point registers into an
512 mips64_fill_fpregset (mips64_elf_fpregset_t *fpregsetp, int regno)
516 if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
518 to = (char *) (*fpregsetp + regno - FP0_REGNUM);
519 regcache_raw_collect (current_regcache, regno, to);
521 else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
523 to = (char *) (*fpregsetp + 32);
524 regcache_raw_collect (current_regcache, regno, to);
526 else if (regno == -1)
530 for (regi = 0; regi < 32; regi++)
531 mips64_fill_fpregset (fpregsetp, FP0_REGNUM + regi);
532 mips64_fill_fpregset(fpregsetp,
533 mips_regnum (current_gdbarch)->fp_control_status);
538 /* Map gdb internal register number to ptrace ``address''.
539 These ``addresses'' are normally defined in <asm/ptrace.h>. */
542 mips64_linux_register_addr (int regno, CORE_ADDR blockend)
546 if (regno < 0 || regno >= NUM_REGS)
547 error (_("Bogon register number %d."), regno);
551 else if ((regno >= mips_regnum (current_gdbarch)->fp0)
552 && (regno < mips_regnum (current_gdbarch)->fp0 + 32))
553 regaddr = MIPS64_FPR_BASE + (regno - FP0_REGNUM);
554 else if (regno == mips_regnum (current_gdbarch)->pc)
556 else if (regno == mips_regnum (current_gdbarch)->cause)
557 regaddr = MIPS64_CAUSE;
558 else if (regno == mips_regnum (current_gdbarch)->badvaddr)
559 regaddr = MIPS64_BADVADDR;
560 else if (regno == mips_regnum (current_gdbarch)->lo)
561 regaddr = MIPS64_MMLO;
562 else if (regno == mips_regnum (current_gdbarch)->hi)
563 regaddr = MIPS64_MMHI;
564 else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
565 regaddr = MIPS64_FPC_CSR;
566 else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
567 regaddr = MIPS64_FPC_EIR;
569 error (_("Unknowable register number %d."), regno);
574 /* Use a local version of this function to get the correct types for
575 regsets, until multi-arch core support is ready. */
578 fetch_core_registers (char *core_reg_sect, unsigned core_reg_size,
579 int which, CORE_ADDR reg_addr)
581 elf_gregset_t gregset;
582 elf_fpregset_t fpregset;
583 mips64_elf_gregset_t gregset64;
584 mips64_elf_fpregset_t fpregset64;
588 if (core_reg_size == sizeof (gregset))
590 memcpy ((char *) &gregset, core_reg_sect, sizeof (gregset));
591 supply_gregset (&gregset);
593 else if (core_reg_size == sizeof (gregset64))
595 memcpy ((char *) &gregset64, core_reg_sect, sizeof (gregset64));
596 mips64_supply_gregset (&gregset64);
600 warning (_("wrong size gregset struct in core file"));
605 if (core_reg_size == sizeof (fpregset))
607 memcpy ((char *) &fpregset, core_reg_sect, sizeof (fpregset));
608 supply_fpregset (&fpregset);
610 else if (core_reg_size == sizeof (fpregset64))
612 memcpy ((char *) &fpregset64, core_reg_sect,
613 sizeof (fpregset64));
614 mips64_supply_fpregset (&fpregset64);
618 warning (_("wrong size fpregset struct in core file"));
623 /* Register that we are able to handle ELF file formats using standard
624 procfs "regset" structures. */
626 static struct core_fns regset_core_fns =
628 bfd_target_elf_flavour, /* core_flavour */
629 default_check_format, /* check_format */
630 default_core_sniffer, /* core_sniffer */
631 fetch_core_registers, /* core_read_registers */
635 /* Fetch (and possibly build) an appropriate link_map_offsets
636 structure for native GNU/Linux MIPS targets using the struct
637 offsets defined in link.h (but without actual reference to that
640 This makes it possible to access GNU/Linux MIPS shared libraries
641 from a GDB that was built on a different host platform (for cross
644 static struct link_map_offsets *
645 mips64_linux_svr4_fetch_link_map_offsets (void)
647 static struct link_map_offsets lmo;
648 static struct link_map_offsets *lmp = NULL;
654 lmo.r_debug_size = 16; /* The actual size is 40 bytes, but
655 this is all we need. */
656 lmo.r_map_offset = 8;
659 lmo.link_map_size = 40;
661 lmo.l_addr_offset = 0;
664 lmo.l_name_offset = 8;
667 lmo.l_next_offset = 24;
670 lmo.l_prev_offset = 32;
677 /* Handle for obtaining pointer to the current register_addr()
678 function for a given architecture. */
679 static struct gdbarch_data *register_addr_data;
682 register_addr (int regno, CORE_ADDR blockend)
684 CORE_ADDR (*register_addr_ptr) (int, CORE_ADDR) =
685 gdbarch_data (current_gdbarch, register_addr_data);
687 gdb_assert (register_addr_ptr != 0);
689 return register_addr_ptr (regno, blockend);
693 set_mips_linux_register_addr (struct gdbarch *gdbarch,
694 CORE_ADDR (*register_addr_ptr) (int,
697 deprecated_set_gdbarch_data (gdbarch, register_addr_data,
702 init_register_addr_data (struct gdbarch *gdbarch)
707 /* Check the code at PC for a dynamic linker lazy resolution stub.
708 Because they aren't in the .plt section, we pattern-match on the
709 code generated by GNU ld. They look like this:
716 (with the appropriate doubleword instructions for N64). Also
717 return the dynamic symbol index used in the last instruction. */
720 mips_linux_in_dynsym_stub (CORE_ADDR pc, char *name)
722 unsigned char buf[28], *p;
723 ULONGEST insn, insn1;
724 int n64 = (mips_abi (current_gdbarch) == MIPS_ABI_N64);
726 read_memory (pc - 12, buf, 28);
730 /* ld t9,0x8010(gp) */
735 /* lw t9,0x8010(gp) */
742 insn = extract_unsigned_integer (p, 4);
750 insn = extract_unsigned_integer (p + 4, 4);
754 if (insn != 0x03e0782d)
760 if (insn != 0x03e07821)
764 insn = extract_unsigned_integer (p + 8, 4);
766 if (insn != 0x0320f809)
769 insn = extract_unsigned_integer (p + 12, 4);
772 /* daddiu t8,zero,0 */
773 if ((insn & 0xffff0000) != 0x64180000)
778 /* addiu t8,zero,0 */
779 if ((insn & 0xffff0000) != 0x24180000)
783 return (insn & 0xffff);
786 /* Return non-zero iff PC belongs to the dynamic linker resolution
787 code or to a stub. */
790 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
792 /* Check whether PC is in the dynamic linker. This also checks
793 whether it is in the .plt section, which MIPS does not use. */
794 if (in_solib_dynsym_resolve_code (pc))
797 /* Pattern match for the stub. It would be nice if there were a
798 more efficient way to avoid this check. */
799 if (mips_linux_in_dynsym_stub (pc, NULL))
805 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
806 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
807 implementation of this triggers at "fixup" from the same objfile as
808 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
809 "__dl_runtime_resolve" directly. An unresolved PLT entry will
810 point to _dl_runtime_resolve, which will first call
811 __dl_runtime_resolve, and then pass control to the resolved
815 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
817 struct minimal_symbol *resolver;
819 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
821 if (resolver && SYMBOL_VALUE_ADDRESS (resolver) == pc)
822 return frame_pc_unwind (get_current_frame ());
827 /* Signal trampoline support. There are four supported layouts for a
828 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
829 n64 rt_sigframe. We handle them all independently; not the most
830 efficient way, but simplest. First, declare all the unwinders. */
832 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
833 struct frame_info *next_frame,
834 struct trad_frame_cache *this_cache,
837 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
838 struct frame_info *next_frame,
839 struct trad_frame_cache *this_cache,
842 #define MIPS_NR_LINUX 4000
843 #define MIPS_NR_N64_LINUX 5000
844 #define MIPS_NR_N32_LINUX 6000
846 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
847 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
848 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
849 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
851 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
852 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
853 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
854 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
855 #define MIPS_INST_SYSCALL 0x0000000c
857 static const struct tramp_frame mips_linux_o32_sigframe = {
861 { MIPS_INST_LI_V0_SIGRETURN, -1 },
862 { MIPS_INST_SYSCALL, -1 },
863 { TRAMP_SENTINEL_INSN, -1 }
865 mips_linux_o32_sigframe_init
868 static const struct tramp_frame mips_linux_o32_rt_sigframe = {
872 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
873 { MIPS_INST_SYSCALL, -1 },
874 { TRAMP_SENTINEL_INSN, -1 } },
875 mips_linux_o32_sigframe_init
878 static const struct tramp_frame mips_linux_n32_rt_sigframe = {
882 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
883 { MIPS_INST_SYSCALL, -1 },
884 { TRAMP_SENTINEL_INSN, -1 }
886 mips_linux_n32n64_sigframe_init
889 static const struct tramp_frame mips_linux_n64_rt_sigframe = {
892 { MIPS_INST_LI_V0_N64_RT_SIGRETURN,
894 TRAMP_SENTINEL_INSN },
895 mips_linux_n32n64_sigframe_init
899 /* The unwinder for o32 signal frames. The legacy structures look
903 u32 sf_ass[4]; [argument save space for o32]
904 u32 sf_code[2]; [signal trampoline]
905 struct sigcontext sf_sc;
910 unsigned int sc_regmask; [Unused]
911 unsigned int sc_status;
912 unsigned long long sc_pc;
913 unsigned long long sc_regs[32];
914 unsigned long long sc_fpregs[32];
915 unsigned int sc_ownedfp;
916 unsigned int sc_fpc_csr;
917 unsigned int sc_fpc_eir; [Unused]
918 unsigned int sc_used_math;
919 unsigned int sc_ssflags; [Unused]
920 [Alignment hole of four bytes]
921 unsigned long long sc_mdhi;
922 unsigned long long sc_mdlo;
924 unsigned int sc_cause; [Unused]
925 unsigned int sc_badvaddr; [Unused]
927 unsigned long sc_sigset[4]; [kernel's sigset_t]
930 The RT signal frames look like this:
933 u32 rs_ass[4]; [argument save space for o32]
934 u32 rs_code[2] [signal trampoline]
935 struct siginfo rs_info;
936 struct ucontext rs_uc;
940 unsigned long uc_flags;
941 struct ucontext *uc_link;
943 [Alignment hole of four bytes]
944 struct sigcontext uc_mcontext;
949 #define SIGFRAME_CODE_OFFSET (4 * 4)
950 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
952 #define RTSIGFRAME_SIGINFO_SIZE 128
953 #define STACK_T_SIZE (3 * 4)
954 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
955 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
956 + RTSIGFRAME_SIGINFO_SIZE \
957 + UCONTEXT_SIGCONTEXT_OFFSET)
959 #define SIGCONTEXT_PC (1 * 8)
960 #define SIGCONTEXT_REGS (2 * 8)
961 #define SIGCONTEXT_FPREGS (34 * 8)
962 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
963 #define SIGCONTEXT_HI (69 * 8)
964 #define SIGCONTEXT_LO (70 * 8)
965 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
966 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
968 #define SIGCONTEXT_REG_SIZE 8
971 mips_linux_o32_sigframe_init (const struct tramp_frame *self,
972 struct frame_info *next_frame,
973 struct trad_frame_cache *this_cache,
976 int ireg, reg_position;
977 CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
978 const struct mips_regnum *regs = mips_regnum (current_gdbarch);
980 if (self == &mips_linux_o32_sigframe)
981 sigcontext_base += SIGFRAME_SIGCONTEXT_OFFSET;
983 sigcontext_base += RTSIGFRAME_SIGCONTEXT_OFFSET;
985 /* I'm not proud of this hack. Eventually we will have the
986 infrastructure to indicate the size of saved registers on a
987 per-frame basis, but right now we don't; the kernel saves eight
988 bytes but we only want four. */
989 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
990 sigcontext_base += 4;
993 trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
994 sigcontext_base + SIGCONTEXT_REGS);
997 for (ireg = 1; ireg < 32; ireg++)
998 trad_frame_set_reg_addr (this_cache,
999 ireg + MIPS_ZERO_REGNUM + NUM_REGS,
1000 sigcontext_base + SIGCONTEXT_REGS
1001 + ireg * SIGCONTEXT_REG_SIZE);
1003 for (ireg = 0; ireg < 32; ireg++)
1004 trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
1005 sigcontext_base + SIGCONTEXT_FPREGS
1006 + ireg * SIGCONTEXT_REG_SIZE);
1008 trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
1009 sigcontext_base + SIGCONTEXT_PC);
1011 trad_frame_set_reg_addr (this_cache,
1012 regs->fp_control_status + NUM_REGS,
1013 sigcontext_base + SIGCONTEXT_FPCSR);
1014 trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
1015 sigcontext_base + SIGCONTEXT_HI);
1016 trad_frame_set_reg_addr (this_cache, regs->lo + NUM_REGS,
1017 sigcontext_base + SIGCONTEXT_LO);
1018 trad_frame_set_reg_addr (this_cache, regs->cause + NUM_REGS,
1019 sigcontext_base + SIGCONTEXT_CAUSE);
1020 trad_frame_set_reg_addr (this_cache, regs->badvaddr + NUM_REGS,
1021 sigcontext_base + SIGCONTEXT_BADVADDR);
1023 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1024 trad_frame_set_id (this_cache,
1025 frame_id_build (func - SIGFRAME_CODE_OFFSET,
1030 /* For N32/N64 things look different. There is no non-rt signal frame.
1032 struct rt_sigframe_n32 {
1033 u32 rs_ass[4]; [ argument save space for o32 ]
1034 u32 rs_code[2]; [ signal trampoline ]
1035 struct siginfo rs_info;
1036 struct ucontextn32 rs_uc;
1039 struct ucontextn32 {
1043 struct sigcontext uc_mcontext;
1044 sigset_t uc_sigmask; [ mask last for extensibility ]
1047 struct rt_sigframe_n32 {
1048 u32 rs_ass[4]; [ argument save space for o32 ]
1049 u32 rs_code[2]; [ signal trampoline ]
1050 struct siginfo rs_info;
1051 struct ucontext rs_uc;
1055 unsigned long uc_flags;
1056 struct ucontext *uc_link;
1058 struct sigcontext uc_mcontext;
1059 sigset_t uc_sigmask; [ mask last for extensibility ]
1062 And the sigcontext is different (this is for both n32 and n64):
1065 unsigned long long sc_regs[32];
1066 unsigned long long sc_fpregs[32];
1067 unsigned long long sc_mdhi;
1068 unsigned long long sc_mdlo;
1069 unsigned long long sc_pc;
1070 unsigned int sc_status;
1071 unsigned int sc_fpc_csr;
1072 unsigned int sc_fpc_eir;
1073 unsigned int sc_used_math;
1074 unsigned int sc_cause;
1075 unsigned int sc_badvaddr;
1079 #define N32_STACK_T_SIZE STACK_T_SIZE
1080 #define N64_STACK_T_SIZE (2 * 8 + 4)
1081 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1082 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1083 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1084 + RTSIGFRAME_SIGINFO_SIZE \
1085 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1086 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1087 + RTSIGFRAME_SIGINFO_SIZE \
1088 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1090 #define N64_SIGCONTEXT_REGS (0 * 8)
1091 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1092 #define N64_SIGCONTEXT_HI (64 * 8)
1093 #define N64_SIGCONTEXT_LO (65 * 8)
1094 #define N64_SIGCONTEXT_PC (66 * 8)
1095 #define N64_SIGCONTEXT_FPCSR (67 * 8 + 1 * 4)
1096 #define N64_SIGCONTEXT_FIR (67 * 8 + 2 * 4)
1097 #define N64_SIGCONTEXT_CAUSE (67 * 8 + 4 * 4)
1098 #define N64_SIGCONTEXT_BADVADDR (67 * 8 + 5 * 4)
1100 #define N64_SIGCONTEXT_REG_SIZE 8
1103 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
1104 struct frame_info *next_frame,
1105 struct trad_frame_cache *this_cache,
1108 int ireg, reg_position;
1109 CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
1110 const struct mips_regnum *regs = mips_regnum (current_gdbarch);
1112 if (self == &mips_linux_n32_rt_sigframe)
1113 sigcontext_base += N32_SIGFRAME_SIGCONTEXT_OFFSET;
1115 sigcontext_base += N64_SIGFRAME_SIGCONTEXT_OFFSET;
1118 trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
1119 sigcontext_base + N64_SIGCONTEXT_REGS);
1122 for (ireg = 1; ireg < 32; ireg++)
1123 trad_frame_set_reg_addr (this_cache,
1124 ireg + MIPS_ZERO_REGNUM + NUM_REGS,
1125 sigcontext_base + N64_SIGCONTEXT_REGS
1126 + ireg * N64_SIGCONTEXT_REG_SIZE);
1128 for (ireg = 0; ireg < 32; ireg++)
1129 trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
1130 sigcontext_base + N64_SIGCONTEXT_FPREGS
1131 + ireg * N64_SIGCONTEXT_REG_SIZE);
1133 trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
1134 sigcontext_base + N64_SIGCONTEXT_PC);
1136 trad_frame_set_reg_addr (this_cache,
1137 regs->fp_control_status + NUM_REGS,
1138 sigcontext_base + N64_SIGCONTEXT_FPCSR);
1139 trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
1140 sigcontext_base + N64_SIGCONTEXT_HI);
1141 trad_frame_set_reg_addr (this_cache, regs->lo + NUM_REGS,
1142 sigcontext_base + N64_SIGCONTEXT_LO);
1143 trad_frame_set_reg_addr (this_cache, regs->cause + NUM_REGS,
1144 sigcontext_base + N64_SIGCONTEXT_CAUSE);
1145 trad_frame_set_reg_addr (this_cache, regs->badvaddr + NUM_REGS,
1146 sigcontext_base + N64_SIGCONTEXT_BADVADDR);
1148 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1149 trad_frame_set_id (this_cache,
1150 frame_id_build (func - SIGFRAME_CODE_OFFSET,
1154 /* Initialize one of the GNU/Linux OS ABIs. */
1157 mips_linux_init_abi (struct gdbarch_info info,
1158 struct gdbarch *gdbarch)
1160 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1161 enum mips_abi abi = mips_abi (gdbarch);
1166 set_gdbarch_get_longjmp_target (gdbarch,
1167 mips_linux_get_longjmp_target);
1168 set_solib_svr4_fetch_link_map_offsets
1169 (gdbarch, mips_linux_svr4_fetch_link_map_offsets);
1170 set_mips_linux_register_addr (gdbarch, mips_linux_register_addr);
1171 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1172 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
1175 set_gdbarch_get_longjmp_target (gdbarch,
1176 mips_linux_get_longjmp_target);
1177 set_solib_svr4_fetch_link_map_offsets
1178 (gdbarch, mips_linux_svr4_fetch_link_map_offsets);
1179 set_mips_linux_register_addr (gdbarch, mips64_linux_register_addr);
1180 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
1183 set_gdbarch_get_longjmp_target (gdbarch,
1184 mips64_linux_get_longjmp_target);
1185 set_solib_svr4_fetch_link_map_offsets
1186 (gdbarch, mips64_linux_svr4_fetch_link_map_offsets);
1187 set_mips_linux_register_addr (gdbarch, mips64_linux_register_addr);
1188 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
1191 internal_error (__FILE__, __LINE__, _("can't handle ABI"));
1195 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1197 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
1199 /* Enable TLS support. */
1200 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1201 svr4_fetch_objfile_link_map);
1205 _initialize_mips_linux_tdep (void)
1207 const struct bfd_arch_info *arch_info;
1209 register_addr_data =
1210 gdbarch_data_register_post_init (init_register_addr_data);
1212 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1214 arch_info = arch_info->next)
1216 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1218 mips_linux_init_abi);
1221 deprecated_add_core_fns (®set_core_fns);