1 /* Target-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001, 2002, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
26 #include "solib-svr4.h"
28 #include "mips-tdep.h"
29 #include "gdb_string.h"
30 #include "gdb_assert.h"
33 #include "trad-frame.h"
34 #include "tramp-frame.h"
38 #include "mips-linux-tdep.h"
40 /* Figure out where the longjmp will land.
41 We expect the first arg to be a pointer to the jmp_buf structure
42 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
43 at. The pc is copied into PC. This routine returns 1 on
46 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
47 #define MIPS_LINUX_JB_PC 0
50 mips_linux_get_longjmp_target (CORE_ADDR *pc)
53 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
55 jb_addr = read_register (MIPS_A0_REGNUM);
57 if (target_read_memory (jb_addr
58 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE,
59 buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
62 *pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
67 /* Transform the bits comprising a 32-bit register to the right size
68 for regcache_raw_supply(). This is needed when mips_isa_regsize()
72 supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
74 gdb_byte buf[MAX_REGISTER_SIZE];
75 store_signed_integer (buf, register_size (current_gdbarch, regnum),
76 extract_signed_integer (addr, 4));
77 regcache_raw_supply (regcache, regnum, buf);
80 /* Unpack an elf_gregset_t into GDB's register cache. */
83 mips_supply_gregset (struct regcache *regcache,
84 const mips_elf_gregset_t *gregsetp)
87 const mips_elf_greg_t *regp = *gregsetp;
88 char zerobuf[MAX_REGISTER_SIZE];
90 memset (zerobuf, 0, MAX_REGISTER_SIZE);
92 for (regi = EF_REG0; regi <= EF_REG31; regi++)
93 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
95 supply_32bit_reg (regcache, mips_regnum (current_gdbarch)->lo,
97 supply_32bit_reg (regcache, mips_regnum (current_gdbarch)->hi,
100 supply_32bit_reg (regcache, mips_regnum (current_gdbarch)->pc,
102 supply_32bit_reg (regcache, mips_regnum (current_gdbarch)->badvaddr,
103 regp + EF_CP0_BADVADDR);
104 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
105 supply_32bit_reg (regcache, mips_regnum (current_gdbarch)->cause,
106 regp + EF_CP0_CAUSE);
108 /* Fill inaccessible registers with zero. */
109 regcache_raw_supply (regcache, MIPS_UNUSED_REGNUM, zerobuf);
110 for (regi = MIPS_FIRST_EMBED_REGNUM;
111 regi < MIPS_LAST_EMBED_REGNUM;
113 regcache_raw_supply (regcache, regi, zerobuf);
116 /* Pack our registers (or one register) into an elf_gregset_t. */
119 mips_fill_gregset (const struct regcache *regcache,
120 mips_elf_gregset_t *gregsetp, int regno)
123 mips_elf_greg_t *regp = *gregsetp;
128 memset (regp, 0, sizeof (mips_elf_gregset_t));
129 for (regi = 0; regi < 32; regi++)
130 mips_fill_gregset (regcache, gregsetp, regi);
131 mips_fill_gregset (regcache, gregsetp,
132 mips_regnum (current_gdbarch)->lo);
133 mips_fill_gregset (regcache, gregsetp,
134 mips_regnum (current_gdbarch)->hi);
135 mips_fill_gregset (regcache, gregsetp,
136 mips_regnum (current_gdbarch)->pc);
137 mips_fill_gregset (regcache, gregsetp,
138 mips_regnum (current_gdbarch)->badvaddr);
139 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
140 mips_fill_gregset (regcache, gregsetp,
141 mips_regnum (current_gdbarch)->cause);
147 dst = regp + regno + EF_REG0;
148 regcache_raw_collect (regcache, regno, dst);
152 if (regno == mips_regnum (current_gdbarch)->lo)
154 else if (regno == mips_regnum (current_gdbarch)->hi)
156 else if (regno == mips_regnum (current_gdbarch)->pc)
157 regaddr = EF_CP0_EPC;
158 else if (regno == mips_regnum (current_gdbarch)->badvaddr)
159 regaddr = EF_CP0_BADVADDR;
160 else if (regno == MIPS_PS_REGNUM)
161 regaddr = EF_CP0_STATUS;
162 else if (regno == mips_regnum (current_gdbarch)->cause)
163 regaddr = EF_CP0_CAUSE;
169 dst = regp + regaddr;
170 regcache_raw_collect (regcache, regno, dst);
174 /* Likewise, unpack an elf_fpregset_t. */
177 mips_supply_fpregset (struct regcache *regcache,
178 const mips_elf_fpregset_t *fpregsetp)
181 char zerobuf[MAX_REGISTER_SIZE];
183 memset (zerobuf, 0, MAX_REGISTER_SIZE);
185 for (regi = 0; regi < 32; regi++)
186 regcache_raw_supply (regcache, FP0_REGNUM + regi, *fpregsetp + regi);
188 regcache_raw_supply (regcache,
189 mips_regnum (current_gdbarch)->fp_control_status,
192 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
193 regcache_raw_supply (regcache,
194 mips_regnum (current_gdbarch)->fp_implementation_revision,
198 /* Likewise, pack one or all floating point registers into an
202 mips_fill_fpregset (const struct regcache *regcache,
203 mips_elf_fpregset_t *fpregsetp, int regno)
207 if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
209 to = (char *) (*fpregsetp + regno - FP0_REGNUM);
210 regcache_raw_collect (regcache, regno, to);
212 else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
214 to = (char *) (*fpregsetp + 32);
215 regcache_raw_collect (regcache, regno, to);
217 else if (regno == -1)
221 for (regi = 0; regi < 32; regi++)
222 mips_fill_fpregset (regcache, fpregsetp, FP0_REGNUM + regi);
223 mips_fill_fpregset (regcache, fpregsetp,
224 mips_regnum (current_gdbarch)->fp_control_status);
228 /* Support for 64-bit ABIs. */
230 /* Figure out where the longjmp will land.
231 We expect the first arg to be a pointer to the jmp_buf structure
232 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
233 at. The pc is copied into PC. This routine returns 1 on
236 /* Details about jmp_buf. */
238 #define MIPS64_LINUX_JB_PC 0
241 mips64_linux_get_longjmp_target (CORE_ADDR *pc)
244 void *buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
245 int element_size = TARGET_PTR_BIT == 32 ? 4 : 8;
247 jb_addr = read_register (MIPS_A0_REGNUM);
249 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
250 buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
253 *pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
258 /* Register set support functions. These operate on standard 64-bit
259 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
260 target will still use the 64-bit format for PTRACE_GETREGS. */
262 /* Supply a 64-bit register. */
265 supply_64bit_reg (struct regcache *regcache, int regnum,
268 if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG
269 && register_size (current_gdbarch, regnum) == 4)
270 regcache_raw_supply (regcache, regnum, buf + 4);
272 regcache_raw_supply (regcache, regnum, buf);
275 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
278 mips64_supply_gregset (struct regcache *regcache,
279 const mips64_elf_gregset_t *gregsetp)
282 const mips64_elf_greg_t *regp = *gregsetp;
283 gdb_byte zerobuf[MAX_REGISTER_SIZE];
285 memset (zerobuf, 0, MAX_REGISTER_SIZE);
287 for (regi = MIPS64_EF_REG0; regi <= MIPS64_EF_REG31; regi++)
288 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
289 (const gdb_byte *)(regp + regi));
291 supply_64bit_reg (regcache, mips_regnum (current_gdbarch)->lo,
292 (const gdb_byte *) (regp + MIPS64_EF_LO));
293 supply_64bit_reg (regcache, mips_regnum (current_gdbarch)->hi,
294 (const gdb_byte *) (regp + MIPS64_EF_HI));
296 supply_64bit_reg (regcache, mips_regnum (current_gdbarch)->pc,
297 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
298 supply_64bit_reg (regcache, mips_regnum (current_gdbarch)->badvaddr,
299 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
300 supply_64bit_reg (regcache, MIPS_PS_REGNUM,
301 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
302 supply_64bit_reg (regcache, mips_regnum (current_gdbarch)->cause,
303 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
305 /* Fill inaccessible registers with zero. */
306 regcache_raw_supply (regcache, MIPS_UNUSED_REGNUM, zerobuf);
307 for (regi = MIPS_FIRST_EMBED_REGNUM;
308 regi < MIPS_LAST_EMBED_REGNUM;
310 regcache_raw_supply (regcache, regi, zerobuf);
313 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
316 mips64_fill_gregset (const struct regcache *regcache,
317 mips64_elf_gregset_t *gregsetp, int regno)
320 mips64_elf_greg_t *regp = *gregsetp;
325 memset (regp, 0, sizeof (mips64_elf_gregset_t));
326 for (regi = 0; regi < 32; regi++)
327 mips64_fill_gregset (regcache, gregsetp, regi);
328 mips64_fill_gregset (regcache, gregsetp,
329 mips_regnum (current_gdbarch)->lo);
330 mips64_fill_gregset (regcache, gregsetp,
331 mips_regnum (current_gdbarch)->hi);
332 mips64_fill_gregset (regcache, gregsetp,
333 mips_regnum (current_gdbarch)->pc);
334 mips64_fill_gregset (regcache, gregsetp,
335 mips_regnum (current_gdbarch)->badvaddr);
336 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
337 mips64_fill_gregset (regcache, gregsetp,
338 mips_regnum (current_gdbarch)->cause);
343 regaddr = regno + MIPS64_EF_REG0;
344 else if (regno == mips_regnum (current_gdbarch)->lo)
345 regaddr = MIPS64_EF_LO;
346 else if (regno == mips_regnum (current_gdbarch)->hi)
347 regaddr = MIPS64_EF_HI;
348 else if (regno == mips_regnum (current_gdbarch)->pc)
349 regaddr = MIPS64_EF_CP0_EPC;
350 else if (regno == mips_regnum (current_gdbarch)->badvaddr)
351 regaddr = MIPS64_EF_CP0_BADVADDR;
352 else if (regno == MIPS_PS_REGNUM)
353 regaddr = MIPS64_EF_CP0_STATUS;
354 else if (regno == mips_regnum (current_gdbarch)->cause)
355 regaddr = MIPS64_EF_CP0_CAUSE;
361 gdb_byte buf[MAX_REGISTER_SIZE];
364 regcache_raw_collect (regcache, regno, buf);
365 val = extract_signed_integer (buf,
366 register_size (current_gdbarch, regno));
367 dst = regp + regaddr;
368 store_signed_integer (dst, 8, val);
372 /* Likewise, unpack an elf_fpregset_t. */
375 mips64_supply_fpregset (struct regcache *regcache,
376 const mips64_elf_fpregset_t *fpregsetp)
380 /* See mips_linux_o32_sigframe_init for a description of the
381 peculiar FP register layout. */
382 if (register_size (current_gdbarch, FP0_REGNUM) == 4)
383 for (regi = 0; regi < 32; regi++)
385 const gdb_byte *reg_ptr = (const gdb_byte *)(*fpregsetp + (regi & ~1));
386 if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (regi & 1))
388 regcache_raw_supply (regcache, FP0_REGNUM + regi, reg_ptr);
391 for (regi = 0; regi < 32; regi++)
392 regcache_raw_supply (regcache, FP0_REGNUM + regi,
393 (const char *)(*fpregsetp + regi));
395 supply_32bit_reg (regcache, mips_regnum (current_gdbarch)->fp_control_status,
396 (const gdb_byte *)(*fpregsetp + 32));
398 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
399 include it - but the result of PTRACE_GETFPREGS does. The best we
400 can do is to assume that its value is present. */
401 supply_32bit_reg (regcache,
402 mips_regnum (current_gdbarch)->fp_implementation_revision,
403 (const gdb_byte *)(*fpregsetp + 32) + 4);
406 /* Likewise, pack one or all floating point registers into an
410 mips64_fill_fpregset (const struct regcache *regcache,
411 mips64_elf_fpregset_t *fpregsetp, int regno)
415 if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
417 /* See mips_linux_o32_sigframe_init for a description of the
418 peculiar FP register layout. */
419 if (register_size (current_gdbarch, regno) == 4)
421 int regi = regno - FP0_REGNUM;
423 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
424 if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (regi & 1))
426 regcache_raw_collect (regcache, regno, to);
430 to = (gdb_byte *) (*fpregsetp + regno - FP0_REGNUM);
431 regcache_raw_collect (regcache, regno, to);
434 else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
436 gdb_byte buf[MAX_REGISTER_SIZE];
439 regcache_raw_collect (regcache, regno, buf);
440 val = extract_signed_integer (buf,
441 register_size (current_gdbarch, regno));
442 to = (gdb_byte *) (*fpregsetp + 32);
443 store_signed_integer (to, 4, val);
445 else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
447 gdb_byte buf[MAX_REGISTER_SIZE];
450 regcache_raw_collect (regcache, regno, buf);
451 val = extract_signed_integer (buf,
452 register_size (current_gdbarch, regno));
453 to = (gdb_byte *) (*fpregsetp + 32) + 4;
454 store_signed_integer (to, 4, val);
456 else if (regno == -1)
460 for (regi = 0; regi < 32; regi++)
461 mips64_fill_fpregset (regcache, fpregsetp, FP0_REGNUM + regi);
462 mips64_fill_fpregset (regcache, fpregsetp,
463 mips_regnum (current_gdbarch)->fp_control_status);
464 mips64_fill_fpregset (regcache, fpregsetp,
465 (mips_regnum (current_gdbarch)
466 ->fp_implementation_revision));
471 /* Use a local version of this function to get the correct types for
472 regsets, until multi-arch core support is ready. */
475 fetch_core_registers (struct regcache *regcache,
476 char *core_reg_sect, unsigned core_reg_size,
477 int which, CORE_ADDR reg_addr)
479 mips_elf_gregset_t gregset;
480 mips_elf_fpregset_t fpregset;
481 mips64_elf_gregset_t gregset64;
482 mips64_elf_fpregset_t fpregset64;
486 if (core_reg_size == sizeof (gregset))
488 memcpy ((char *) &gregset, core_reg_sect, sizeof (gregset));
489 mips_supply_gregset (regcache,
490 (const mips_elf_gregset_t *) &gregset);
492 else if (core_reg_size == sizeof (gregset64))
494 memcpy ((char *) &gregset64, core_reg_sect, sizeof (gregset64));
495 mips64_supply_gregset (regcache,
496 (const mips64_elf_gregset_t *) &gregset64);
500 warning (_("wrong size gregset struct in core file"));
505 if (core_reg_size == sizeof (fpregset))
507 memcpy ((char *) &fpregset, core_reg_sect, sizeof (fpregset));
508 mips_supply_fpregset (regcache,
509 (const mips_elf_fpregset_t *) &fpregset);
511 else if (core_reg_size == sizeof (fpregset64))
513 memcpy ((char *) &fpregset64, core_reg_sect,
514 sizeof (fpregset64));
515 mips64_supply_fpregset (regcache,
516 (const mips64_elf_fpregset_t *) &fpregset64);
520 warning (_("wrong size fpregset struct in core file"));
525 /* Register that we are able to handle ELF file formats using standard
526 procfs "regset" structures. */
528 static struct core_fns regset_core_fns =
530 bfd_target_elf_flavour, /* core_flavour */
531 default_check_format, /* check_format */
532 default_core_sniffer, /* core_sniffer */
533 fetch_core_registers, /* core_read_registers */
538 /* Check the code at PC for a dynamic linker lazy resolution stub.
539 Because they aren't in the .plt section, we pattern-match on the
540 code generated by GNU ld. They look like this:
547 (with the appropriate doubleword instructions for N64). Also
548 return the dynamic symbol index used in the last instruction. */
551 mips_linux_in_dynsym_stub (CORE_ADDR pc, char *name)
553 unsigned char buf[28], *p;
554 ULONGEST insn, insn1;
555 int n64 = (mips_abi (current_gdbarch) == MIPS_ABI_N64);
557 read_memory (pc - 12, buf, 28);
561 /* ld t9,0x8010(gp) */
566 /* lw t9,0x8010(gp) */
573 insn = extract_unsigned_integer (p, 4);
581 insn = extract_unsigned_integer (p + 4, 4);
585 if (insn != 0x03e0782d)
591 if (insn != 0x03e07821)
595 insn = extract_unsigned_integer (p + 8, 4);
597 if (insn != 0x0320f809)
600 insn = extract_unsigned_integer (p + 12, 4);
603 /* daddiu t8,zero,0 */
604 if ((insn & 0xffff0000) != 0x64180000)
609 /* addiu t8,zero,0 */
610 if ((insn & 0xffff0000) != 0x24180000)
614 return (insn & 0xffff);
617 /* Return non-zero iff PC belongs to the dynamic linker resolution
618 code or to a stub. */
621 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
623 /* Check whether PC is in the dynamic linker. This also checks
624 whether it is in the .plt section, which MIPS does not use. */
625 if (in_solib_dynsym_resolve_code (pc))
628 /* Pattern match for the stub. It would be nice if there were a
629 more efficient way to avoid this check. */
630 if (mips_linux_in_dynsym_stub (pc, NULL))
636 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
637 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
638 implementation of this triggers at "fixup" from the same objfile as
639 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
640 "__dl_runtime_resolve" directly. An unresolved PLT entry will
641 point to _dl_runtime_resolve, which will first call
642 __dl_runtime_resolve, and then pass control to the resolved
646 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
648 struct minimal_symbol *resolver;
650 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
652 if (resolver && SYMBOL_VALUE_ADDRESS (resolver) == pc)
653 return frame_pc_unwind (get_current_frame ());
658 /* Signal trampoline support. There are four supported layouts for a
659 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
660 n64 rt_sigframe. We handle them all independently; not the most
661 efficient way, but simplest. First, declare all the unwinders. */
663 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
664 struct frame_info *next_frame,
665 struct trad_frame_cache *this_cache,
668 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
669 struct frame_info *next_frame,
670 struct trad_frame_cache *this_cache,
673 #define MIPS_NR_LINUX 4000
674 #define MIPS_NR_N64_LINUX 5000
675 #define MIPS_NR_N32_LINUX 6000
677 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
678 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
679 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
680 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
682 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
683 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
684 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
685 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
686 #define MIPS_INST_SYSCALL 0x0000000c
688 static const struct tramp_frame mips_linux_o32_sigframe = {
692 { MIPS_INST_LI_V0_SIGRETURN, -1 },
693 { MIPS_INST_SYSCALL, -1 },
694 { TRAMP_SENTINEL_INSN, -1 }
696 mips_linux_o32_sigframe_init
699 static const struct tramp_frame mips_linux_o32_rt_sigframe = {
703 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
704 { MIPS_INST_SYSCALL, -1 },
705 { TRAMP_SENTINEL_INSN, -1 } },
706 mips_linux_o32_sigframe_init
709 static const struct tramp_frame mips_linux_n32_rt_sigframe = {
713 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
714 { MIPS_INST_SYSCALL, -1 },
715 { TRAMP_SENTINEL_INSN, -1 }
717 mips_linux_n32n64_sigframe_init
720 static const struct tramp_frame mips_linux_n64_rt_sigframe = {
724 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
725 { MIPS_INST_SYSCALL, -1 },
726 { TRAMP_SENTINEL_INSN, -1 }
728 mips_linux_n32n64_sigframe_init
732 /* The unwinder for o32 signal frames. The legacy structures look
736 u32 sf_ass[4]; [argument save space for o32]
737 u32 sf_code[2]; [signal trampoline]
738 struct sigcontext sf_sc;
743 unsigned int sc_regmask; [Unused]
744 unsigned int sc_status;
745 unsigned long long sc_pc;
746 unsigned long long sc_regs[32];
747 unsigned long long sc_fpregs[32];
748 unsigned int sc_ownedfp;
749 unsigned int sc_fpc_csr;
750 unsigned int sc_fpc_eir; [Unused]
751 unsigned int sc_used_math;
752 unsigned int sc_ssflags; [Unused]
753 [Alignment hole of four bytes]
754 unsigned long long sc_mdhi;
755 unsigned long long sc_mdlo;
757 unsigned int sc_cause; [Unused]
758 unsigned int sc_badvaddr; [Unused]
760 unsigned long sc_sigset[4]; [kernel's sigset_t]
763 The RT signal frames look like this:
766 u32 rs_ass[4]; [argument save space for o32]
767 u32 rs_code[2] [signal trampoline]
768 struct siginfo rs_info;
769 struct ucontext rs_uc;
773 unsigned long uc_flags;
774 struct ucontext *uc_link;
776 [Alignment hole of four bytes]
777 struct sigcontext uc_mcontext;
782 #define SIGFRAME_CODE_OFFSET (4 * 4)
783 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
785 #define RTSIGFRAME_SIGINFO_SIZE 128
786 #define STACK_T_SIZE (3 * 4)
787 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
788 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
789 + RTSIGFRAME_SIGINFO_SIZE \
790 + UCONTEXT_SIGCONTEXT_OFFSET)
792 #define SIGCONTEXT_PC (1 * 8)
793 #define SIGCONTEXT_REGS (2 * 8)
794 #define SIGCONTEXT_FPREGS (34 * 8)
795 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
796 #define SIGCONTEXT_HI (69 * 8)
797 #define SIGCONTEXT_LO (70 * 8)
798 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
799 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
801 #define SIGCONTEXT_REG_SIZE 8
804 mips_linux_o32_sigframe_init (const struct tramp_frame *self,
805 struct frame_info *next_frame,
806 struct trad_frame_cache *this_cache,
809 int ireg, reg_position;
810 CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
811 const struct mips_regnum *regs = mips_regnum (current_gdbarch);
814 if (self == &mips_linux_o32_sigframe)
815 sigcontext_base += SIGFRAME_SIGCONTEXT_OFFSET;
817 sigcontext_base += RTSIGFRAME_SIGCONTEXT_OFFSET;
819 /* I'm not proud of this hack. Eventually we will have the
820 infrastructure to indicate the size of saved registers on a
821 per-frame basis, but right now we don't; the kernel saves eight
822 bytes but we only want four. Use regs_base to access any
824 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
825 regs_base = sigcontext_base + 4;
827 regs_base = sigcontext_base;
830 trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
831 regs_base + SIGCONTEXT_REGS);
834 for (ireg = 1; ireg < 32; ireg++)
835 trad_frame_set_reg_addr (this_cache,
836 ireg + MIPS_ZERO_REGNUM + NUM_REGS,
837 regs_base + SIGCONTEXT_REGS
838 + ireg * SIGCONTEXT_REG_SIZE);
840 /* The way that floating point registers are saved, unfortunately,
841 depends on the architecture the kernel is built for. For the r3000 and
842 tx39, four bytes of each register are at the beginning of each of the
843 32 eight byte slots. For everything else, the registers are saved
844 using double precision; only the even-numbered slots are initialized,
845 and the high bits are the odd-numbered register. Assume the latter
846 layout, since we can't tell, and it's much more common. Which bits are
847 the "high" bits depends on endianness. */
848 for (ireg = 0; ireg < 32; ireg++)
849 if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (ireg & 1))
850 trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
851 sigcontext_base + SIGCONTEXT_FPREGS + 4
852 + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
854 trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
855 sigcontext_base + SIGCONTEXT_FPREGS
856 + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
858 trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
859 regs_base + SIGCONTEXT_PC);
861 trad_frame_set_reg_addr (this_cache,
862 regs->fp_control_status + NUM_REGS,
863 sigcontext_base + SIGCONTEXT_FPCSR);
864 trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
865 regs_base + SIGCONTEXT_HI);
866 trad_frame_set_reg_addr (this_cache, regs->lo + NUM_REGS,
867 regs_base + SIGCONTEXT_LO);
868 trad_frame_set_reg_addr (this_cache, regs->cause + NUM_REGS,
869 sigcontext_base + SIGCONTEXT_CAUSE);
870 trad_frame_set_reg_addr (this_cache, regs->badvaddr + NUM_REGS,
871 sigcontext_base + SIGCONTEXT_BADVADDR);
873 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
874 trad_frame_set_id (this_cache,
875 frame_id_build (func - SIGFRAME_CODE_OFFSET,
880 /* For N32/N64 things look different. There is no non-rt signal frame.
882 struct rt_sigframe_n32 {
883 u32 rs_ass[4]; [ argument save space for o32 ]
884 u32 rs_code[2]; [ signal trampoline ]
885 struct siginfo rs_info;
886 struct ucontextn32 rs_uc;
893 struct sigcontext uc_mcontext;
894 sigset_t uc_sigmask; [ mask last for extensibility ]
897 struct rt_sigframe_n32 {
898 u32 rs_ass[4]; [ argument save space for o32 ]
899 u32 rs_code[2]; [ signal trampoline ]
900 struct siginfo rs_info;
901 struct ucontext rs_uc;
905 unsigned long uc_flags;
906 struct ucontext *uc_link;
908 struct sigcontext uc_mcontext;
909 sigset_t uc_sigmask; [ mask last for extensibility ]
912 And the sigcontext is different (this is for both n32 and n64):
915 unsigned long long sc_regs[32];
916 unsigned long long sc_fpregs[32];
917 unsigned long long sc_mdhi;
918 unsigned long long sc_mdlo;
919 unsigned long long sc_pc;
920 unsigned int sc_status;
921 unsigned int sc_fpc_csr;
922 unsigned int sc_fpc_eir;
923 unsigned int sc_used_math;
924 unsigned int sc_cause;
925 unsigned int sc_badvaddr;
929 #define N32_STACK_T_SIZE STACK_T_SIZE
930 #define N64_STACK_T_SIZE (2 * 8 + 4)
931 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
932 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
933 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
934 + RTSIGFRAME_SIGINFO_SIZE \
935 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
936 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
937 + RTSIGFRAME_SIGINFO_SIZE \
938 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
940 #define N64_SIGCONTEXT_REGS (0 * 8)
941 #define N64_SIGCONTEXT_FPREGS (32 * 8)
942 #define N64_SIGCONTEXT_HI (64 * 8)
943 #define N64_SIGCONTEXT_LO (65 * 8)
944 #define N64_SIGCONTEXT_PC (66 * 8)
945 #define N64_SIGCONTEXT_FPCSR (67 * 8 + 1 * 4)
946 #define N64_SIGCONTEXT_FIR (67 * 8 + 2 * 4)
947 #define N64_SIGCONTEXT_CAUSE (67 * 8 + 4 * 4)
948 #define N64_SIGCONTEXT_BADVADDR (67 * 8 + 5 * 4)
950 #define N64_SIGCONTEXT_REG_SIZE 8
953 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
954 struct frame_info *next_frame,
955 struct trad_frame_cache *this_cache,
958 int ireg, reg_position;
959 CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
960 const struct mips_regnum *regs = mips_regnum (current_gdbarch);
962 if (self == &mips_linux_n32_rt_sigframe)
963 sigcontext_base += N32_SIGFRAME_SIGCONTEXT_OFFSET;
965 sigcontext_base += N64_SIGFRAME_SIGCONTEXT_OFFSET;
968 trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
969 sigcontext_base + N64_SIGCONTEXT_REGS);
972 for (ireg = 1; ireg < 32; ireg++)
973 trad_frame_set_reg_addr (this_cache,
974 ireg + MIPS_ZERO_REGNUM + NUM_REGS,
975 sigcontext_base + N64_SIGCONTEXT_REGS
976 + ireg * N64_SIGCONTEXT_REG_SIZE);
978 for (ireg = 0; ireg < 32; ireg++)
979 trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
980 sigcontext_base + N64_SIGCONTEXT_FPREGS
981 + ireg * N64_SIGCONTEXT_REG_SIZE);
983 trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
984 sigcontext_base + N64_SIGCONTEXT_PC);
986 trad_frame_set_reg_addr (this_cache,
987 regs->fp_control_status + NUM_REGS,
988 sigcontext_base + N64_SIGCONTEXT_FPCSR);
989 trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
990 sigcontext_base + N64_SIGCONTEXT_HI);
991 trad_frame_set_reg_addr (this_cache, regs->lo + NUM_REGS,
992 sigcontext_base + N64_SIGCONTEXT_LO);
993 trad_frame_set_reg_addr (this_cache, regs->cause + NUM_REGS,
994 sigcontext_base + N64_SIGCONTEXT_CAUSE);
995 trad_frame_set_reg_addr (this_cache, regs->badvaddr + NUM_REGS,
996 sigcontext_base + N64_SIGCONTEXT_BADVADDR);
998 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
999 trad_frame_set_id (this_cache,
1000 frame_id_build (func - SIGFRAME_CODE_OFFSET,
1005 /* Initialize one of the GNU/Linux OS ABIs. */
1008 mips_linux_init_abi (struct gdbarch_info info,
1009 struct gdbarch *gdbarch)
1011 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1012 enum mips_abi abi = mips_abi (gdbarch);
1017 set_gdbarch_get_longjmp_target (gdbarch,
1018 mips_linux_get_longjmp_target);
1019 set_solib_svr4_fetch_link_map_offsets
1020 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1021 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1022 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
1025 set_gdbarch_get_longjmp_target (gdbarch,
1026 mips_linux_get_longjmp_target);
1027 set_solib_svr4_fetch_link_map_offsets
1028 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1029 set_gdbarch_long_double_bit (gdbarch, 128);
1030 /* These floatformats should probably be renamed. MIPS uses
1031 the same 128-bit IEEE floating point format that IA-64 uses,
1032 except that the quiet/signalling NaN bit is reversed (GDB
1033 does not distinguish between quiet and signalling NaNs). */
1034 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1035 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
1038 set_gdbarch_get_longjmp_target (gdbarch,
1039 mips64_linux_get_longjmp_target);
1040 set_solib_svr4_fetch_link_map_offsets
1041 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1042 set_gdbarch_long_double_bit (gdbarch, 128);
1043 /* These floatformats should probably be renamed. MIPS uses
1044 the same 128-bit IEEE floating point format that IA-64 uses,
1045 except that the quiet/signalling NaN bit is reversed (GDB
1046 does not distinguish between quiet and signalling NaNs). */
1047 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1048 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
1051 internal_error (__FILE__, __LINE__, _("can't handle ABI"));
1055 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
1056 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1058 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
1060 /* Enable TLS support. */
1061 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1062 svr4_fetch_objfile_link_map);
1066 _initialize_mips_linux_tdep (void)
1068 const struct bfd_arch_info *arch_info;
1070 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1072 arch_info = arch_info->next)
1074 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1076 mips_linux_init_abi);
1079 deprecated_add_core_fns (®set_core_fns);