1 /* Target-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "solib-svr4.h"
26 #include "mips-tdep.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
31 #include "trad-frame.h"
32 #include "tramp-frame.h"
35 #include "solib-svr4.h"
38 #include "target-descriptions.h"
40 #include "mips-linux-tdep.h"
41 #include "glibc-tdep.h"
42 #include "linux-tdep.h"
44 static struct target_so_ops mips_svr4_so_ops;
46 /* Figure out where the longjmp will land.
47 We expect the first arg to be a pointer to the jmp_buf structure
48 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
49 at. The pc is copied into PC. This routine returns 1 on
52 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
53 #define MIPS_LINUX_JB_PC 0
56 mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
59 struct gdbarch *gdbarch = get_frame_arch (frame);
60 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
61 char buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
63 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
65 if (target_read_memory (jb_addr
66 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE,
67 buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
70 *pc = extract_unsigned_integer (buf,
71 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
77 /* Transform the bits comprising a 32-bit register to the right size
78 for regcache_raw_supply(). This is needed when mips_isa_regsize()
82 supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
84 struct gdbarch *gdbarch = get_regcache_arch (regcache);
85 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
86 gdb_byte buf[MAX_REGISTER_SIZE];
87 store_signed_integer (buf, register_size (gdbarch, regnum), byte_order,
88 extract_signed_integer (addr, 4, byte_order));
89 regcache_raw_supply (regcache, regnum, buf);
92 /* Unpack an elf_gregset_t into GDB's register cache. */
95 mips_supply_gregset (struct regcache *regcache,
96 const mips_elf_gregset_t *gregsetp)
99 const mips_elf_greg_t *regp = *gregsetp;
100 char zerobuf[MAX_REGISTER_SIZE];
101 struct gdbarch *gdbarch = get_regcache_arch (regcache);
103 memset (zerobuf, 0, MAX_REGISTER_SIZE);
105 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
106 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
108 if (mips_linux_restart_reg_p (gdbarch))
109 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0);
111 supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO);
112 supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI);
114 supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc,
116 supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
117 regp + EF_CP0_BADVADDR);
118 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
119 supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause,
120 regp + EF_CP0_CAUSE);
122 /* Fill inaccessible registers with zero. */
123 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
124 regcache_raw_supply (regcache, MIPS_UNUSED_REGNUM, zerobuf);
125 for (regi = MIPS_FIRST_EMBED_REGNUM;
126 regi <= MIPS_LAST_EMBED_REGNUM;
128 regcache_raw_supply (regcache, regi, zerobuf);
132 mips_supply_gregset_wrapper (const struct regset *regset,
133 struct regcache *regcache,
134 int regnum, const void *gregs, size_t len)
136 gdb_assert (len == sizeof (mips_elf_gregset_t));
138 mips_supply_gregset (regcache, (const mips_elf_gregset_t *)gregs);
141 /* Pack our registers (or one register) into an elf_gregset_t. */
144 mips_fill_gregset (const struct regcache *regcache,
145 mips_elf_gregset_t *gregsetp, int regno)
147 struct gdbarch *gdbarch = get_regcache_arch (regcache);
149 mips_elf_greg_t *regp = *gregsetp;
154 memset (regp, 0, sizeof (mips_elf_gregset_t));
155 for (regi = 1; regi < 32; regi++)
156 mips_fill_gregset (regcache, gregsetp, regi);
157 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
158 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
159 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
160 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
161 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
162 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
163 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
167 if (regno > 0 && regno < 32)
169 dst = regp + regno + EF_REG0;
170 regcache_raw_collect (regcache, regno, dst);
174 if (regno == mips_regnum (gdbarch)->lo)
176 else if (regno == mips_regnum (gdbarch)->hi)
178 else if (regno == mips_regnum (gdbarch)->pc)
179 regaddr = EF_CP0_EPC;
180 else if (regno == mips_regnum (gdbarch)->badvaddr)
181 regaddr = EF_CP0_BADVADDR;
182 else if (regno == MIPS_PS_REGNUM)
183 regaddr = EF_CP0_STATUS;
184 else if (regno == mips_regnum (gdbarch)->cause)
185 regaddr = EF_CP0_CAUSE;
186 else if (mips_linux_restart_reg_p (gdbarch)
187 && regno == MIPS_RESTART_REGNUM)
194 dst = regp + regaddr;
195 regcache_raw_collect (regcache, regno, dst);
200 mips_fill_gregset_wrapper (const struct regset *regset,
201 const struct regcache *regcache,
202 int regnum, void *gregs, size_t len)
204 gdb_assert (len == sizeof (mips_elf_gregset_t));
206 mips_fill_gregset (regcache, (mips_elf_gregset_t *)gregs, regnum);
209 /* Likewise, unpack an elf_fpregset_t. */
212 mips_supply_fpregset (struct regcache *regcache,
213 const mips_elf_fpregset_t *fpregsetp)
215 struct gdbarch *gdbarch = get_regcache_arch (regcache);
217 char zerobuf[MAX_REGISTER_SIZE];
219 memset (zerobuf, 0, MAX_REGISTER_SIZE);
221 for (regi = 0; regi < 32; regi++)
222 regcache_raw_supply (regcache,
223 gdbarch_fp0_regnum (gdbarch) + regi,
226 regcache_raw_supply (regcache,
227 mips_regnum (gdbarch)->fp_control_status,
230 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
231 regcache_raw_supply (regcache,
232 mips_regnum (gdbarch)->fp_implementation_revision,
237 mips_supply_fpregset_wrapper (const struct regset *regset,
238 struct regcache *regcache,
239 int regnum, const void *gregs, size_t len)
241 gdb_assert (len == sizeof (mips_elf_fpregset_t));
243 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *)gregs);
246 /* Likewise, pack one or all floating point registers into an
250 mips_fill_fpregset (const struct regcache *regcache,
251 mips_elf_fpregset_t *fpregsetp, int regno)
253 struct gdbarch *gdbarch = get_regcache_arch (regcache);
256 if ((regno >= gdbarch_fp0_regnum (gdbarch))
257 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
259 to = (char *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch));
260 regcache_raw_collect (regcache, regno, to);
262 else if (regno == mips_regnum (gdbarch)->fp_control_status)
264 to = (char *) (*fpregsetp + 32);
265 regcache_raw_collect (regcache, regno, to);
267 else if (regno == -1)
271 for (regi = 0; regi < 32; regi++)
272 mips_fill_fpregset (regcache, fpregsetp,
273 gdbarch_fp0_regnum (gdbarch) + regi);
274 mips_fill_fpregset (regcache, fpregsetp,
275 mips_regnum (gdbarch)->fp_control_status);
280 mips_fill_fpregset_wrapper (const struct regset *regset,
281 const struct regcache *regcache,
282 int regnum, void *gregs, size_t len)
284 gdb_assert (len == sizeof (mips_elf_fpregset_t));
286 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *)gregs, regnum);
289 /* Support for 64-bit ABIs. */
291 /* Figure out where the longjmp will land.
292 We expect the first arg to be a pointer to the jmp_buf structure
293 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
294 at. The pc is copied into PC. This routine returns 1 on
297 /* Details about jmp_buf. */
299 #define MIPS64_LINUX_JB_PC 0
302 mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
305 struct gdbarch *gdbarch = get_frame_arch (frame);
306 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
307 void *buf = alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
308 int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8;
310 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
312 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
314 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
317 *pc = extract_unsigned_integer (buf,
318 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
324 /* Register set support functions. These operate on standard 64-bit
325 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
326 target will still use the 64-bit format for PTRACE_GETREGS. */
328 /* Supply a 64-bit register. */
331 supply_64bit_reg (struct regcache *regcache, int regnum,
334 struct gdbarch *gdbarch = get_regcache_arch (regcache);
335 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
336 && register_size (gdbarch, regnum) == 4)
337 regcache_raw_supply (regcache, regnum, buf + 4);
339 regcache_raw_supply (regcache, regnum, buf);
342 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
345 mips64_supply_gregset (struct regcache *regcache,
346 const mips64_elf_gregset_t *gregsetp)
349 const mips64_elf_greg_t *regp = *gregsetp;
350 gdb_byte zerobuf[MAX_REGISTER_SIZE];
351 struct gdbarch *gdbarch = get_regcache_arch (regcache);
353 memset (zerobuf, 0, MAX_REGISTER_SIZE);
355 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
356 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
357 (const gdb_byte *)(regp + regi));
359 if (mips_linux_restart_reg_p (gdbarch))
360 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM,
361 (const gdb_byte *)(regp + MIPS64_EF_REG0));
363 supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo,
364 (const gdb_byte *) (regp + MIPS64_EF_LO));
365 supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi,
366 (const gdb_byte *) (regp + MIPS64_EF_HI));
368 supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc,
369 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
370 supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
371 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
372 supply_64bit_reg (regcache, MIPS_PS_REGNUM,
373 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
374 supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause,
375 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
377 /* Fill inaccessible registers with zero. */
378 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
379 regcache_raw_supply (regcache, MIPS_UNUSED_REGNUM, zerobuf);
380 for (regi = MIPS_FIRST_EMBED_REGNUM;
381 regi <= MIPS_LAST_EMBED_REGNUM;
383 regcache_raw_supply (regcache, regi, zerobuf);
387 mips64_supply_gregset_wrapper (const struct regset *regset,
388 struct regcache *regcache,
389 int regnum, const void *gregs, size_t len)
391 gdb_assert (len == sizeof (mips64_elf_gregset_t));
393 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *)gregs);
396 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
399 mips64_fill_gregset (const struct regcache *regcache,
400 mips64_elf_gregset_t *gregsetp, int regno)
402 struct gdbarch *gdbarch = get_regcache_arch (regcache);
403 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
405 mips64_elf_greg_t *regp = *gregsetp;
410 memset (regp, 0, sizeof (mips64_elf_gregset_t));
411 for (regi = 1; regi < 32; regi++)
412 mips64_fill_gregset (regcache, gregsetp, regi);
413 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
414 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
415 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
416 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
417 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
418 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
419 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
423 if (regno > 0 && regno < 32)
424 regaddr = regno + MIPS64_EF_REG0;
425 else if (regno == mips_regnum (gdbarch)->lo)
426 regaddr = MIPS64_EF_LO;
427 else if (regno == mips_regnum (gdbarch)->hi)
428 regaddr = MIPS64_EF_HI;
429 else if (regno == mips_regnum (gdbarch)->pc)
430 regaddr = MIPS64_EF_CP0_EPC;
431 else if (regno == mips_regnum (gdbarch)->badvaddr)
432 regaddr = MIPS64_EF_CP0_BADVADDR;
433 else if (regno == MIPS_PS_REGNUM)
434 regaddr = MIPS64_EF_CP0_STATUS;
435 else if (regno == mips_regnum (gdbarch)->cause)
436 regaddr = MIPS64_EF_CP0_CAUSE;
437 else if (mips_linux_restart_reg_p (gdbarch)
438 && regno == MIPS_RESTART_REGNUM)
439 regaddr = MIPS64_EF_REG0;
445 gdb_byte buf[MAX_REGISTER_SIZE];
448 regcache_raw_collect (regcache, regno, buf);
449 val = extract_signed_integer (buf, register_size (gdbarch, regno),
451 dst = regp + regaddr;
452 store_signed_integer (dst, 8, byte_order, val);
457 mips64_fill_gregset_wrapper (const struct regset *regset,
458 const struct regcache *regcache,
459 int regnum, void *gregs, size_t len)
461 gdb_assert (len == sizeof (mips64_elf_gregset_t));
463 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *)gregs, regnum);
466 /* Likewise, unpack an elf_fpregset_t. */
469 mips64_supply_fpregset (struct regcache *regcache,
470 const mips64_elf_fpregset_t *fpregsetp)
472 struct gdbarch *gdbarch = get_regcache_arch (regcache);
475 /* See mips_linux_o32_sigframe_init for a description of the
476 peculiar FP register layout. */
477 if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4)
478 for (regi = 0; regi < 32; regi++)
480 const gdb_byte *reg_ptr = (const gdb_byte *)(*fpregsetp + (regi & ~1));
481 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
483 regcache_raw_supply (regcache,
484 gdbarch_fp0_regnum (gdbarch) + regi,
488 for (regi = 0; regi < 32; regi++)
489 regcache_raw_supply (regcache,
490 gdbarch_fp0_regnum (gdbarch) + regi,
491 (const char *)(*fpregsetp + regi));
493 supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status,
494 (const gdb_byte *)(*fpregsetp + 32));
496 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
497 include it - but the result of PTRACE_GETFPREGS does. The best we
498 can do is to assume that its value is present. */
499 supply_32bit_reg (regcache,
500 mips_regnum (gdbarch)->fp_implementation_revision,
501 (const gdb_byte *)(*fpregsetp + 32) + 4);
505 mips64_supply_fpregset_wrapper (const struct regset *regset,
506 struct regcache *regcache,
507 int regnum, const void *gregs, size_t len)
509 gdb_assert (len == sizeof (mips64_elf_fpregset_t));
511 mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *)gregs);
514 /* Likewise, pack one or all floating point registers into an
518 mips64_fill_fpregset (const struct regcache *regcache,
519 mips64_elf_fpregset_t *fpregsetp, int regno)
521 struct gdbarch *gdbarch = get_regcache_arch (regcache);
522 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
525 if ((regno >= gdbarch_fp0_regnum (gdbarch))
526 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
528 /* See mips_linux_o32_sigframe_init for a description of the
529 peculiar FP register layout. */
530 if (register_size (gdbarch, regno) == 4)
532 int regi = regno - gdbarch_fp0_regnum (gdbarch);
534 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
535 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
537 regcache_raw_collect (regcache, regno, to);
541 to = (gdb_byte *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch));
542 regcache_raw_collect (regcache, regno, to);
545 else if (regno == mips_regnum (gdbarch)->fp_control_status)
547 gdb_byte buf[MAX_REGISTER_SIZE];
550 regcache_raw_collect (regcache, regno, buf);
551 val = extract_signed_integer (buf, register_size (gdbarch, regno),
553 to = (gdb_byte *) (*fpregsetp + 32);
554 store_signed_integer (to, 4, byte_order, val);
556 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
558 gdb_byte buf[MAX_REGISTER_SIZE];
561 regcache_raw_collect (regcache, regno, buf);
562 val = extract_signed_integer (buf, register_size (gdbarch, regno),
564 to = (gdb_byte *) (*fpregsetp + 32) + 4;
565 store_signed_integer (to, 4, byte_order, val);
567 else if (regno == -1)
571 for (regi = 0; regi < 32; regi++)
572 mips64_fill_fpregset (regcache, fpregsetp,
573 gdbarch_fp0_regnum (gdbarch) + regi);
574 mips64_fill_fpregset (regcache, fpregsetp,
575 mips_regnum (gdbarch)->fp_control_status);
576 mips64_fill_fpregset (regcache, fpregsetp,
577 (mips_regnum (gdbarch)
578 ->fp_implementation_revision));
583 mips64_fill_fpregset_wrapper (const struct regset *regset,
584 const struct regcache *regcache,
585 int regnum, void *gregs, size_t len)
587 gdb_assert (len == sizeof (mips64_elf_fpregset_t));
589 mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *)gregs, regnum);
592 const struct regset *
593 mips_linux_regset_from_core_section (struct gdbarch *gdbarch,
594 const char *sect_name, size_t sect_size)
596 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
597 mips_elf_gregset_t gregset;
598 mips_elf_fpregset_t fpregset;
599 mips64_elf_gregset_t gregset64;
600 mips64_elf_fpregset_t fpregset64;
602 if (strcmp (sect_name, ".reg") == 0)
604 if (sect_size == sizeof (gregset))
606 if (tdep->gregset == NULL)
607 tdep->gregset = regset_alloc (gdbarch,
608 mips_supply_gregset_wrapper,
609 mips_fill_gregset_wrapper);
610 return tdep->gregset;
612 else if (sect_size == sizeof (gregset64))
614 if (tdep->gregset64 == NULL)
615 tdep->gregset64 = regset_alloc (gdbarch,
616 mips64_supply_gregset_wrapper,
617 mips64_fill_gregset_wrapper);
618 return tdep->gregset64;
622 warning (_("wrong size gregset struct in core file"));
625 else if (strcmp (sect_name, ".reg2") == 0)
627 if (sect_size == sizeof (fpregset))
629 if (tdep->fpregset == NULL)
630 tdep->fpregset = regset_alloc (gdbarch,
631 mips_supply_fpregset_wrapper,
632 mips_fill_fpregset_wrapper);
633 return tdep->fpregset;
635 else if (sect_size == sizeof (fpregset64))
637 if (tdep->fpregset64 == NULL)
638 tdep->fpregset64 = regset_alloc (gdbarch,
639 mips64_supply_fpregset_wrapper,
640 mips64_fill_fpregset_wrapper);
641 return tdep->fpregset64;
645 warning (_("wrong size fpregset struct in core file"));
652 static const struct target_desc *
653 mips_linux_core_read_description (struct gdbarch *gdbarch,
654 struct target_ops *target,
657 asection *section = bfd_get_section_by_name (abfd, ".reg");
661 switch (bfd_section_size (abfd, section))
663 case sizeof (mips_elf_gregset_t):
664 return mips_tdesc_gp32;
666 case sizeof (mips64_elf_gregset_t):
667 return mips_tdesc_gp64;
675 /* Check the code at PC for a dynamic linker lazy resolution stub.
676 Because they aren't in the .plt section, we pattern-match on the
677 code generated by GNU ld. They look like this:
684 (with the appropriate doubleword instructions for N64). Also
685 return the dynamic symbol index used in the last instruction. */
688 mips_linux_in_dynsym_stub (CORE_ADDR pc, char *name)
690 unsigned char buf[28], *p;
691 ULONGEST insn, insn1;
692 int n64 = (mips_abi (target_gdbarch) == MIPS_ABI_N64);
693 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch);
695 read_memory (pc - 12, buf, 28);
699 /* ld t9,0x8010(gp) */
704 /* lw t9,0x8010(gp) */
711 insn = extract_unsigned_integer (p, 4, byte_order);
719 insn = extract_unsigned_integer (p + 4, 4, byte_order);
723 if (insn != 0x03e0782d)
729 if (insn != 0x03e07821)
733 insn = extract_unsigned_integer (p + 8, 4, byte_order);
735 if (insn != 0x0320f809)
738 insn = extract_unsigned_integer (p + 12, 4, byte_order);
741 /* daddiu t8,zero,0 */
742 if ((insn & 0xffff0000) != 0x64180000)
747 /* addiu t8,zero,0 */
748 if ((insn & 0xffff0000) != 0x24180000)
752 return (insn & 0xffff);
755 /* Return non-zero iff PC belongs to the dynamic linker resolution
756 code, a PLT entry, or a lazy binding stub. */
759 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
761 /* Check whether PC is in the dynamic linker. This also checks
762 whether it is in the .plt section, used by non-PIC executables. */
763 if (svr4_in_dynsym_resolve_code (pc))
766 /* Pattern match for the stub. It would be nice if there were a
767 more efficient way to avoid this check. */
768 if (mips_linux_in_dynsym_stub (pc, NULL))
774 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
775 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
776 implementation of this triggers at "fixup" from the same objfile as
777 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
778 "__dl_runtime_resolve" directly. An unresolved lazy binding
779 stub will point to _dl_runtime_resolve, which will first call
780 __dl_runtime_resolve, and then pass control to the resolved
784 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
786 struct minimal_symbol *resolver;
788 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
790 if (resolver && SYMBOL_VALUE_ADDRESS (resolver) == pc)
791 return frame_unwind_caller_pc (get_current_frame ());
793 return glibc_skip_solib_resolver (gdbarch, pc);
796 /* Signal trampoline support. There are four supported layouts for a
797 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
798 n64 rt_sigframe. We handle them all independently; not the most
799 efficient way, but simplest. First, declare all the unwinders. */
801 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
802 struct frame_info *this_frame,
803 struct trad_frame_cache *this_cache,
806 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
807 struct frame_info *this_frame,
808 struct trad_frame_cache *this_cache,
811 #define MIPS_NR_LINUX 4000
812 #define MIPS_NR_N64_LINUX 5000
813 #define MIPS_NR_N32_LINUX 6000
815 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
816 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
817 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
818 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
820 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
821 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
822 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
823 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
824 #define MIPS_INST_SYSCALL 0x0000000c
826 static const struct tramp_frame mips_linux_o32_sigframe = {
830 { MIPS_INST_LI_V0_SIGRETURN, -1 },
831 { MIPS_INST_SYSCALL, -1 },
832 { TRAMP_SENTINEL_INSN, -1 }
834 mips_linux_o32_sigframe_init
837 static const struct tramp_frame mips_linux_o32_rt_sigframe = {
841 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
842 { MIPS_INST_SYSCALL, -1 },
843 { TRAMP_SENTINEL_INSN, -1 } },
844 mips_linux_o32_sigframe_init
847 static const struct tramp_frame mips_linux_n32_rt_sigframe = {
851 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
852 { MIPS_INST_SYSCALL, -1 },
853 { TRAMP_SENTINEL_INSN, -1 }
855 mips_linux_n32n64_sigframe_init
858 static const struct tramp_frame mips_linux_n64_rt_sigframe = {
862 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
863 { MIPS_INST_SYSCALL, -1 },
864 { TRAMP_SENTINEL_INSN, -1 }
866 mips_linux_n32n64_sigframe_init
870 /* The unwinder for o32 signal frames. The legacy structures look
874 u32 sf_ass[4]; [argument save space for o32]
875 u32 sf_code[2]; [signal trampoline or fill]
876 struct sigcontext sf_sc;
881 unsigned int sc_regmask; [Unused]
882 unsigned int sc_status;
883 unsigned long long sc_pc;
884 unsigned long long sc_regs[32];
885 unsigned long long sc_fpregs[32];
886 unsigned int sc_ownedfp;
887 unsigned int sc_fpc_csr;
888 unsigned int sc_fpc_eir; [Unused]
889 unsigned int sc_used_math;
890 unsigned int sc_ssflags; [Unused]
891 [Alignment hole of four bytes]
892 unsigned long long sc_mdhi;
893 unsigned long long sc_mdlo;
895 unsigned int sc_cause; [Unused]
896 unsigned int sc_badvaddr; [Unused]
898 unsigned long sc_sigset[4]; [kernel's sigset_t]
901 The RT signal frames look like this:
904 u32 rs_ass[4]; [argument save space for o32]
905 u32 rs_code[2] [signal trampoline or fill]
906 struct siginfo rs_info;
907 struct ucontext rs_uc;
911 unsigned long uc_flags;
912 struct ucontext *uc_link;
914 [Alignment hole of four bytes]
915 struct sigcontext uc_mcontext;
920 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
922 #define RTSIGFRAME_SIGINFO_SIZE 128
923 #define STACK_T_SIZE (3 * 4)
924 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
925 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
926 + RTSIGFRAME_SIGINFO_SIZE \
927 + UCONTEXT_SIGCONTEXT_OFFSET)
929 #define SIGCONTEXT_PC (1 * 8)
930 #define SIGCONTEXT_REGS (2 * 8)
931 #define SIGCONTEXT_FPREGS (34 * 8)
932 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
933 #define SIGCONTEXT_HI (69 * 8)
934 #define SIGCONTEXT_LO (70 * 8)
935 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
936 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
938 #define SIGCONTEXT_REG_SIZE 8
941 mips_linux_o32_sigframe_init (const struct tramp_frame *self,
942 struct frame_info *this_frame,
943 struct trad_frame_cache *this_cache,
946 struct gdbarch *gdbarch = get_frame_arch (this_frame);
947 int ireg, reg_position;
948 CORE_ADDR frame_sp = get_frame_sp (this_frame);
949 CORE_ADDR sigcontext_base;
950 const struct mips_regnum *regs = mips_regnum (gdbarch);
953 if (self == &mips_linux_o32_sigframe)
954 sigcontext_base = frame_sp + SIGFRAME_SIGCONTEXT_OFFSET;
956 sigcontext_base = frame_sp + RTSIGFRAME_SIGCONTEXT_OFFSET;
958 /* I'm not proud of this hack. Eventually we will have the
959 infrastructure to indicate the size of saved registers on a
960 per-frame basis, but right now we don't; the kernel saves eight
961 bytes but we only want four. Use regs_base to access any
963 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
964 regs_base = sigcontext_base + 4;
966 regs_base = sigcontext_base;
968 if (mips_linux_restart_reg_p (gdbarch))
969 trad_frame_set_reg_addr (this_cache,
971 + gdbarch_num_regs (gdbarch)),
972 regs_base + SIGCONTEXT_REGS);
974 for (ireg = 1; ireg < 32; ireg++)
975 trad_frame_set_reg_addr (this_cache,
976 ireg + MIPS_ZERO_REGNUM
977 + gdbarch_num_regs (gdbarch),
978 regs_base + SIGCONTEXT_REGS
979 + ireg * SIGCONTEXT_REG_SIZE);
981 /* The way that floating point registers are saved, unfortunately,
982 depends on the architecture the kernel is built for. For the r3000 and
983 tx39, four bytes of each register are at the beginning of each of the
984 32 eight byte slots. For everything else, the registers are saved
985 using double precision; only the even-numbered slots are initialized,
986 and the high bits are the odd-numbered register. Assume the latter
987 layout, since we can't tell, and it's much more common. Which bits are
988 the "high" bits depends on endianness. */
989 for (ireg = 0; ireg < 32; ireg++)
990 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
991 trad_frame_set_reg_addr (this_cache,
993 gdbarch_num_regs (gdbarch),
994 sigcontext_base + SIGCONTEXT_FPREGS + 4
995 + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
997 trad_frame_set_reg_addr (this_cache,
999 + gdbarch_num_regs (gdbarch),
1000 sigcontext_base + SIGCONTEXT_FPREGS
1001 + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
1003 trad_frame_set_reg_addr (this_cache,
1004 regs->pc + gdbarch_num_regs (gdbarch),
1005 regs_base + SIGCONTEXT_PC);
1007 trad_frame_set_reg_addr (this_cache,
1008 regs->fp_control_status
1009 + gdbarch_num_regs (gdbarch),
1010 sigcontext_base + SIGCONTEXT_FPCSR);
1011 trad_frame_set_reg_addr (this_cache,
1012 regs->hi + gdbarch_num_regs (gdbarch),
1013 regs_base + SIGCONTEXT_HI);
1014 trad_frame_set_reg_addr (this_cache,
1015 regs->lo + gdbarch_num_regs (gdbarch),
1016 regs_base + SIGCONTEXT_LO);
1017 trad_frame_set_reg_addr (this_cache,
1018 regs->cause + gdbarch_num_regs (gdbarch),
1019 sigcontext_base + SIGCONTEXT_CAUSE);
1020 trad_frame_set_reg_addr (this_cache,
1021 regs->badvaddr + gdbarch_num_regs (gdbarch),
1022 sigcontext_base + SIGCONTEXT_BADVADDR);
1024 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1025 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1029 /* For N32/N64 things look different. There is no non-rt signal frame.
1031 struct rt_sigframe_n32 {
1032 u32 rs_ass[4]; [ argument save space for o32 ]
1033 u32 rs_code[2]; [ signal trampoline or fill ]
1034 struct siginfo rs_info;
1035 struct ucontextn32 rs_uc;
1038 struct ucontextn32 {
1042 struct sigcontext uc_mcontext;
1043 sigset_t uc_sigmask; [ mask last for extensibility ]
1046 struct rt_sigframe {
1047 u32 rs_ass[4]; [ argument save space for o32 ]
1048 u32 rs_code[2]; [ signal trampoline ]
1049 struct siginfo rs_info;
1050 struct ucontext rs_uc;
1054 unsigned long uc_flags;
1055 struct ucontext *uc_link;
1057 struct sigcontext uc_mcontext;
1058 sigset_t uc_sigmask; [ mask last for extensibility ]
1061 And the sigcontext is different (this is for both n32 and n64):
1064 unsigned long long sc_regs[32];
1065 unsigned long long sc_fpregs[32];
1066 unsigned long long sc_mdhi;
1067 unsigned long long sc_hi1;
1068 unsigned long long sc_hi2;
1069 unsigned long long sc_hi3;
1070 unsigned long long sc_mdlo;
1071 unsigned long long sc_lo1;
1072 unsigned long long sc_lo2;
1073 unsigned long long sc_lo3;
1074 unsigned long long sc_pc;
1075 unsigned int sc_fpc_csr;
1076 unsigned int sc_used_math;
1077 unsigned int sc_dsp;
1078 unsigned int sc_reserved;
1081 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1082 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1086 #define N32_STACK_T_SIZE STACK_T_SIZE
1087 #define N64_STACK_T_SIZE (2 * 8 + 4)
1088 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1089 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1090 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1091 + RTSIGFRAME_SIGINFO_SIZE \
1092 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1093 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1094 + RTSIGFRAME_SIGINFO_SIZE \
1095 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1097 #define N64_SIGCONTEXT_REGS (0 * 8)
1098 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1099 #define N64_SIGCONTEXT_HI (64 * 8)
1100 #define N64_SIGCONTEXT_LO (68 * 8)
1101 #define N64_SIGCONTEXT_PC (72 * 8)
1102 #define N64_SIGCONTEXT_FPCSR (73 * 8)
1104 #define N64_SIGCONTEXT_REG_SIZE 8
1107 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
1108 struct frame_info *this_frame,
1109 struct trad_frame_cache *this_cache,
1112 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1113 int ireg, reg_position;
1114 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1115 CORE_ADDR sigcontext_base;
1116 const struct mips_regnum *regs = mips_regnum (gdbarch);
1118 if (self == &mips_linux_n32_rt_sigframe)
1119 sigcontext_base = frame_sp + N32_SIGFRAME_SIGCONTEXT_OFFSET;
1121 sigcontext_base = frame_sp + N64_SIGFRAME_SIGCONTEXT_OFFSET;
1123 if (mips_linux_restart_reg_p (gdbarch))
1124 trad_frame_set_reg_addr (this_cache,
1125 (MIPS_RESTART_REGNUM
1126 + gdbarch_num_regs (gdbarch)),
1127 sigcontext_base + N64_SIGCONTEXT_REGS);
1129 for (ireg = 1; ireg < 32; ireg++)
1130 trad_frame_set_reg_addr (this_cache,
1131 ireg + MIPS_ZERO_REGNUM
1132 + gdbarch_num_regs (gdbarch),
1133 sigcontext_base + N64_SIGCONTEXT_REGS
1134 + ireg * N64_SIGCONTEXT_REG_SIZE);
1136 for (ireg = 0; ireg < 32; ireg++)
1137 trad_frame_set_reg_addr (this_cache,
1139 + gdbarch_num_regs (gdbarch),
1140 sigcontext_base + N64_SIGCONTEXT_FPREGS
1141 + ireg * N64_SIGCONTEXT_REG_SIZE);
1143 trad_frame_set_reg_addr (this_cache,
1144 regs->pc + gdbarch_num_regs (gdbarch),
1145 sigcontext_base + N64_SIGCONTEXT_PC);
1147 trad_frame_set_reg_addr (this_cache,
1148 regs->fp_control_status
1149 + gdbarch_num_regs (gdbarch),
1150 sigcontext_base + N64_SIGCONTEXT_FPCSR);
1151 trad_frame_set_reg_addr (this_cache,
1152 regs->hi + gdbarch_num_regs (gdbarch),
1153 sigcontext_base + N64_SIGCONTEXT_HI);
1154 trad_frame_set_reg_addr (this_cache,
1155 regs->lo + gdbarch_num_regs (gdbarch),
1156 sigcontext_base + N64_SIGCONTEXT_LO);
1158 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1159 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1163 mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1165 struct gdbarch *gdbarch = get_regcache_arch (regcache);
1166 regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc);
1168 /* Clear the syscall restart flag. */
1169 if (mips_linux_restart_reg_p (gdbarch))
1170 regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0);
1173 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1176 mips_linux_restart_reg_p (struct gdbarch *gdbarch)
1178 /* If we do not have a target description with registers, then
1179 MIPS_RESTART_REGNUM will not be included in the register set. */
1180 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1183 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1184 either be GPR-sized or missing. */
1185 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0;
1188 /* When FRAME is at a syscall instruction, return the PC of the next
1189 instruction to be executed. */
1192 mips_linux_syscall_next_pc (struct frame_info *frame)
1194 CORE_ADDR pc = get_frame_pc (frame);
1195 ULONGEST v0 = get_frame_register_unsigned (frame, MIPS_V0_REGNUM);
1197 /* If we are about to make a sigreturn syscall, use the unwinder to
1198 decode the signal frame. */
1199 if (v0 == MIPS_NR_sigreturn
1200 || v0 == MIPS_NR_rt_sigreturn
1201 || v0 == MIPS_NR_N64_rt_sigreturn
1202 || v0 == MIPS_NR_N32_rt_sigreturn)
1203 return frame_unwind_caller_pc (get_current_frame ());
1208 /* Initialize one of the GNU/Linux OS ABIs. */
1211 mips_linux_init_abi (struct gdbarch_info info,
1212 struct gdbarch *gdbarch)
1214 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1215 enum mips_abi abi = mips_abi (gdbarch);
1216 struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info;
1218 linux_init_abi (info, gdbarch);
1223 set_gdbarch_get_longjmp_target (gdbarch,
1224 mips_linux_get_longjmp_target);
1225 set_solib_svr4_fetch_link_map_offsets
1226 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1227 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1228 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
1231 set_gdbarch_get_longjmp_target (gdbarch,
1232 mips_linux_get_longjmp_target);
1233 set_solib_svr4_fetch_link_map_offsets
1234 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1235 set_gdbarch_long_double_bit (gdbarch, 128);
1236 /* These floatformats should probably be renamed. MIPS uses
1237 the same 128-bit IEEE floating point format that IA-64 uses,
1238 except that the quiet/signalling NaN bit is reversed (GDB
1239 does not distinguish between quiet and signalling NaNs). */
1240 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1241 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
1244 set_gdbarch_get_longjmp_target (gdbarch,
1245 mips64_linux_get_longjmp_target);
1246 set_solib_svr4_fetch_link_map_offsets
1247 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1248 set_gdbarch_long_double_bit (gdbarch, 128);
1249 /* These floatformats should probably be renamed. MIPS uses
1250 the same 128-bit IEEE floating point format that IA-64 uses,
1251 except that the quiet/signalling NaN bit is reversed (GDB
1252 does not distinguish between quiet and signalling NaNs). */
1253 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1254 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
1260 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1262 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
1264 /* Enable TLS support. */
1265 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1266 svr4_fetch_objfile_link_map);
1268 /* Initialize this lazily, to avoid an initialization order
1269 dependency on solib-svr4.c's _initialize routine. */
1270 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL)
1272 mips_svr4_so_ops = svr4_so_ops;
1273 mips_svr4_so_ops.in_dynsym_resolve_code
1274 = mips_linux_in_dynsym_resolve_code;
1276 set_solib_ops (gdbarch, &mips_svr4_so_ops);
1278 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc);
1280 set_gdbarch_core_read_description (gdbarch,
1281 mips_linux_core_read_description);
1283 set_gdbarch_regset_from_core_section (gdbarch,
1284 mips_linux_regset_from_core_section);
1286 tdep->syscall_next_pc = mips_linux_syscall_next_pc;
1290 const struct tdesc_feature *feature;
1292 /* If we have target-described registers, then we can safely
1293 reserve a number for MIPS_RESTART_REGNUM (whether it is
1294 described or not). */
1295 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM);
1296 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1298 /* If it's present, then assign it to the reserved number. */
1299 feature = tdesc_find_feature (info.target_desc,
1300 "org.gnu.gdb.mips.linux");
1301 if (feature != NULL)
1302 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM,
1307 /* Provide a prototype to silence -Wmissing-prototypes. */
1308 extern initialize_file_ftype _initialize_mips_linux_tdep;
1311 _initialize_mips_linux_tdep (void)
1313 const struct bfd_arch_info *arch_info;
1315 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1317 arch_info = arch_info->next)
1319 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1321 mips_linux_init_abi);