1 /* Target-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001, 2002, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
26 #include "solib-svr4.h"
28 #include "mips-tdep.h"
29 #include "gdb_string.h"
30 #include "gdb_assert.h"
33 #include "trad-frame.h"
34 #include "tramp-frame.h"
37 #include "solib-svr4.h"
40 #include "target-descriptions.h"
41 #include "mips-linux-tdep.h"
43 static struct target_so_ops mips_svr4_so_ops;
45 /* Figure out where the longjmp will land.
46 We expect the first arg to be a pointer to the jmp_buf structure
47 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
48 at. The pc is copied into PC. This routine returns 1 on
51 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
52 #define MIPS_LINUX_JB_PC 0
55 mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
58 char buf[gdbarch_ptr_bit (current_gdbarch) / TARGET_CHAR_BIT];
60 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
62 if (target_read_memory (jb_addr
63 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE,
65 gdbarch_ptr_bit (current_gdbarch) / TARGET_CHAR_BIT))
68 *pc = extract_unsigned_integer (buf,
69 gdbarch_ptr_bit (current_gdbarch)
75 /* Transform the bits comprising a 32-bit register to the right size
76 for regcache_raw_supply(). This is needed when mips_isa_regsize()
80 supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
82 gdb_byte buf[MAX_REGISTER_SIZE];
83 store_signed_integer (buf, register_size (current_gdbarch, regnum),
84 extract_signed_integer (addr, 4));
85 regcache_raw_supply (regcache, regnum, buf);
88 /* Unpack an elf_gregset_t into GDB's register cache. */
91 mips_supply_gregset (struct regcache *regcache,
92 const mips_elf_gregset_t *gregsetp)
95 const mips_elf_greg_t *regp = *gregsetp;
96 char zerobuf[MAX_REGISTER_SIZE];
98 memset (zerobuf, 0, MAX_REGISTER_SIZE);
100 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
101 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
103 if (mips_linux_restart_reg_p (current_gdbarch))
104 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0);
106 supply_32bit_reg (regcache, mips_regnum (current_gdbarch)->lo,
108 supply_32bit_reg (regcache, mips_regnum (current_gdbarch)->hi,
111 supply_32bit_reg (regcache, mips_regnum (current_gdbarch)->pc,
113 supply_32bit_reg (regcache, mips_regnum (current_gdbarch)->badvaddr,
114 regp + EF_CP0_BADVADDR);
115 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
116 supply_32bit_reg (regcache, mips_regnum (current_gdbarch)->cause,
117 regp + EF_CP0_CAUSE);
119 /* Fill inaccessible registers with zero. */
120 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
121 regcache_raw_supply (regcache, MIPS_UNUSED_REGNUM, zerobuf);
122 for (regi = MIPS_FIRST_EMBED_REGNUM;
123 regi <= MIPS_LAST_EMBED_REGNUM;
125 regcache_raw_supply (regcache, regi, zerobuf);
128 /* Pack our registers (or one register) into an elf_gregset_t. */
131 mips_fill_gregset (const struct regcache *regcache,
132 mips_elf_gregset_t *gregsetp, int regno)
135 mips_elf_greg_t *regp = *gregsetp;
140 memset (regp, 0, sizeof (mips_elf_gregset_t));
141 for (regi = 1; regi < 32; regi++)
142 mips_fill_gregset (regcache, gregsetp, regi);
143 mips_fill_gregset (regcache, gregsetp,
144 mips_regnum (current_gdbarch)->lo);
145 mips_fill_gregset (regcache, gregsetp,
146 mips_regnum (current_gdbarch)->hi);
147 mips_fill_gregset (regcache, gregsetp,
148 mips_regnum (current_gdbarch)->pc);
149 mips_fill_gregset (regcache, gregsetp,
150 mips_regnum (current_gdbarch)->badvaddr);
151 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
152 mips_fill_gregset (regcache, gregsetp,
153 mips_regnum (current_gdbarch)->cause);
154 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
158 if (regno > 0 && regno < 32)
160 dst = regp + regno + EF_REG0;
161 regcache_raw_collect (regcache, regno, dst);
165 if (regno == mips_regnum (current_gdbarch)->lo)
167 else if (regno == mips_regnum (current_gdbarch)->hi)
169 else if (regno == mips_regnum (current_gdbarch)->pc)
170 regaddr = EF_CP0_EPC;
171 else if (regno == mips_regnum (current_gdbarch)->badvaddr)
172 regaddr = EF_CP0_BADVADDR;
173 else if (regno == MIPS_PS_REGNUM)
174 regaddr = EF_CP0_STATUS;
175 else if (regno == mips_regnum (current_gdbarch)->cause)
176 regaddr = EF_CP0_CAUSE;
177 else if (mips_linux_restart_reg_p (current_gdbarch)
178 && regno == MIPS_RESTART_REGNUM)
185 dst = regp + regaddr;
186 regcache_raw_collect (regcache, regno, dst);
190 /* Likewise, unpack an elf_fpregset_t. */
193 mips_supply_fpregset (struct regcache *regcache,
194 const mips_elf_fpregset_t *fpregsetp)
197 char zerobuf[MAX_REGISTER_SIZE];
199 memset (zerobuf, 0, MAX_REGISTER_SIZE);
201 for (regi = 0; regi < 32; regi++)
202 regcache_raw_supply (regcache, FP0_REGNUM + regi, *fpregsetp + regi);
204 regcache_raw_supply (regcache,
205 mips_regnum (current_gdbarch)->fp_control_status,
208 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
209 regcache_raw_supply (regcache,
210 mips_regnum (current_gdbarch)->fp_implementation_revision,
214 /* Likewise, pack one or all floating point registers into an
218 mips_fill_fpregset (const struct regcache *regcache,
219 mips_elf_fpregset_t *fpregsetp, int regno)
223 if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
225 to = (char *) (*fpregsetp + regno - FP0_REGNUM);
226 regcache_raw_collect (regcache, regno, to);
228 else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
230 to = (char *) (*fpregsetp + 32);
231 regcache_raw_collect (regcache, regno, to);
233 else if (regno == -1)
237 for (regi = 0; regi < 32; regi++)
238 mips_fill_fpregset (regcache, fpregsetp, FP0_REGNUM + regi);
239 mips_fill_fpregset (regcache, fpregsetp,
240 mips_regnum (current_gdbarch)->fp_control_status);
244 /* Support for 64-bit ABIs. */
246 /* Figure out where the longjmp will land.
247 We expect the first arg to be a pointer to the jmp_buf structure
248 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
249 at. The pc is copied into PC. This routine returns 1 on
252 /* Details about jmp_buf. */
254 #define MIPS64_LINUX_JB_PC 0
257 mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
260 void *buf = alloca (gdbarch_ptr_bit (current_gdbarch) / TARGET_CHAR_BIT);
261 int element_size = gdbarch_ptr_bit (current_gdbarch) == 32 ? 4 : 8;
263 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
265 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
267 gdbarch_ptr_bit (current_gdbarch) / TARGET_CHAR_BIT))
270 *pc = extract_unsigned_integer (buf,
271 gdbarch_ptr_bit (current_gdbarch)
277 /* Register set support functions. These operate on standard 64-bit
278 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
279 target will still use the 64-bit format for PTRACE_GETREGS. */
281 /* Supply a 64-bit register. */
284 supply_64bit_reg (struct regcache *regcache, int regnum,
287 if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG
288 && register_size (current_gdbarch, regnum) == 4)
289 regcache_raw_supply (regcache, regnum, buf + 4);
291 regcache_raw_supply (regcache, regnum, buf);
294 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
297 mips64_supply_gregset (struct regcache *regcache,
298 const mips64_elf_gregset_t *gregsetp)
301 const mips64_elf_greg_t *regp = *gregsetp;
302 gdb_byte zerobuf[MAX_REGISTER_SIZE];
304 memset (zerobuf, 0, MAX_REGISTER_SIZE);
306 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
307 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
308 (const gdb_byte *)(regp + regi));
310 if (mips_linux_restart_reg_p (current_gdbarch))
311 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM,
312 (const gdb_byte *)(regp + MIPS64_EF_REG0));
314 supply_64bit_reg (regcache, mips_regnum (current_gdbarch)->lo,
315 (const gdb_byte *) (regp + MIPS64_EF_LO));
316 supply_64bit_reg (regcache, mips_regnum (current_gdbarch)->hi,
317 (const gdb_byte *) (regp + MIPS64_EF_HI));
319 supply_64bit_reg (regcache, mips_regnum (current_gdbarch)->pc,
320 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
321 supply_64bit_reg (regcache, mips_regnum (current_gdbarch)->badvaddr,
322 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
323 supply_64bit_reg (regcache, MIPS_PS_REGNUM,
324 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
325 supply_64bit_reg (regcache, mips_regnum (current_gdbarch)->cause,
326 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
328 /* Fill inaccessible registers with zero. */
329 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
330 regcache_raw_supply (regcache, MIPS_UNUSED_REGNUM, zerobuf);
331 for (regi = MIPS_FIRST_EMBED_REGNUM;
332 regi <= MIPS_LAST_EMBED_REGNUM;
334 regcache_raw_supply (regcache, regi, zerobuf);
337 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
340 mips64_fill_gregset (const struct regcache *regcache,
341 mips64_elf_gregset_t *gregsetp, int regno)
344 mips64_elf_greg_t *regp = *gregsetp;
349 memset (regp, 0, sizeof (mips64_elf_gregset_t));
350 for (regi = 1; regi < 32; regi++)
351 mips64_fill_gregset (regcache, gregsetp, regi);
352 mips64_fill_gregset (regcache, gregsetp,
353 mips_regnum (current_gdbarch)->lo);
354 mips64_fill_gregset (regcache, gregsetp,
355 mips_regnum (current_gdbarch)->hi);
356 mips64_fill_gregset (regcache, gregsetp,
357 mips_regnum (current_gdbarch)->pc);
358 mips64_fill_gregset (regcache, gregsetp,
359 mips_regnum (current_gdbarch)->badvaddr);
360 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
361 mips64_fill_gregset (regcache, gregsetp,
362 mips_regnum (current_gdbarch)->cause);
363 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
367 if (regno > 0 && regno < 32)
368 regaddr = regno + MIPS64_EF_REG0;
369 else if (regno == mips_regnum (current_gdbarch)->lo)
370 regaddr = MIPS64_EF_LO;
371 else if (regno == mips_regnum (current_gdbarch)->hi)
372 regaddr = MIPS64_EF_HI;
373 else if (regno == mips_regnum (current_gdbarch)->pc)
374 regaddr = MIPS64_EF_CP0_EPC;
375 else if (regno == mips_regnum (current_gdbarch)->badvaddr)
376 regaddr = MIPS64_EF_CP0_BADVADDR;
377 else if (regno == MIPS_PS_REGNUM)
378 regaddr = MIPS64_EF_CP0_STATUS;
379 else if (regno == mips_regnum (current_gdbarch)->cause)
380 regaddr = MIPS64_EF_CP0_CAUSE;
381 else if (mips_linux_restart_reg_p (current_gdbarch)
382 && regno == MIPS_RESTART_REGNUM)
383 regaddr = MIPS64_EF_REG0;
389 gdb_byte buf[MAX_REGISTER_SIZE];
392 regcache_raw_collect (regcache, regno, buf);
393 val = extract_signed_integer (buf,
394 register_size (current_gdbarch, regno));
395 dst = regp + regaddr;
396 store_signed_integer (dst, 8, val);
400 /* Likewise, unpack an elf_fpregset_t. */
403 mips64_supply_fpregset (struct regcache *regcache,
404 const mips64_elf_fpregset_t *fpregsetp)
408 /* See mips_linux_o32_sigframe_init for a description of the
409 peculiar FP register layout. */
410 if (register_size (current_gdbarch, FP0_REGNUM) == 4)
411 for (regi = 0; regi < 32; regi++)
413 const gdb_byte *reg_ptr = (const gdb_byte *)(*fpregsetp + (regi & ~1));
414 if ((gdbarch_byte_order (current_gdbarch)
415 == BFD_ENDIAN_BIG) != (regi & 1))
417 regcache_raw_supply (regcache, FP0_REGNUM + regi, reg_ptr);
420 for (regi = 0; regi < 32; regi++)
421 regcache_raw_supply (regcache, FP0_REGNUM + regi,
422 (const char *)(*fpregsetp + regi));
424 supply_32bit_reg (regcache, mips_regnum (current_gdbarch)->fp_control_status,
425 (const gdb_byte *)(*fpregsetp + 32));
427 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
428 include it - but the result of PTRACE_GETFPREGS does. The best we
429 can do is to assume that its value is present. */
430 supply_32bit_reg (regcache,
431 mips_regnum (current_gdbarch)->fp_implementation_revision,
432 (const gdb_byte *)(*fpregsetp + 32) + 4);
435 /* Likewise, pack one or all floating point registers into an
439 mips64_fill_fpregset (const struct regcache *regcache,
440 mips64_elf_fpregset_t *fpregsetp, int regno)
444 if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
446 /* See mips_linux_o32_sigframe_init for a description of the
447 peculiar FP register layout. */
448 if (register_size (current_gdbarch, regno) == 4)
450 int regi = regno - FP0_REGNUM;
452 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
453 if ((gdbarch_byte_order (current_gdbarch)
454 == BFD_ENDIAN_BIG) != (regi & 1))
456 regcache_raw_collect (regcache, regno, to);
460 to = (gdb_byte *) (*fpregsetp + regno - FP0_REGNUM);
461 regcache_raw_collect (regcache, regno, to);
464 else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
466 gdb_byte buf[MAX_REGISTER_SIZE];
469 regcache_raw_collect (regcache, regno, buf);
470 val = extract_signed_integer (buf,
471 register_size (current_gdbarch, regno));
472 to = (gdb_byte *) (*fpregsetp + 32);
473 store_signed_integer (to, 4, val);
475 else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
477 gdb_byte buf[MAX_REGISTER_SIZE];
480 regcache_raw_collect (regcache, regno, buf);
481 val = extract_signed_integer (buf,
482 register_size (current_gdbarch, regno));
483 to = (gdb_byte *) (*fpregsetp + 32) + 4;
484 store_signed_integer (to, 4, val);
486 else if (regno == -1)
490 for (regi = 0; regi < 32; regi++)
491 mips64_fill_fpregset (regcache, fpregsetp, FP0_REGNUM + regi);
492 mips64_fill_fpregset (regcache, fpregsetp,
493 mips_regnum (current_gdbarch)->fp_control_status);
494 mips64_fill_fpregset (regcache, fpregsetp,
495 (mips_regnum (current_gdbarch)
496 ->fp_implementation_revision));
501 /* Use a local version of this function to get the correct types for
502 regsets, until multi-arch core support is ready. */
505 fetch_core_registers (struct regcache *regcache,
506 char *core_reg_sect, unsigned core_reg_size,
507 int which, CORE_ADDR reg_addr)
509 mips_elf_gregset_t gregset;
510 mips_elf_fpregset_t fpregset;
511 mips64_elf_gregset_t gregset64;
512 mips64_elf_fpregset_t fpregset64;
516 if (core_reg_size == sizeof (gregset))
518 memcpy ((char *) &gregset, core_reg_sect, sizeof (gregset));
519 mips_supply_gregset (regcache,
520 (const mips_elf_gregset_t *) &gregset);
522 else if (core_reg_size == sizeof (gregset64))
524 memcpy ((char *) &gregset64, core_reg_sect, sizeof (gregset64));
525 mips64_supply_gregset (regcache,
526 (const mips64_elf_gregset_t *) &gregset64);
530 warning (_("wrong size gregset struct in core file"));
535 if (core_reg_size == sizeof (fpregset))
537 memcpy ((char *) &fpregset, core_reg_sect, sizeof (fpregset));
538 mips_supply_fpregset (regcache,
539 (const mips_elf_fpregset_t *) &fpregset);
541 else if (core_reg_size == sizeof (fpregset64))
543 memcpy ((char *) &fpregset64, core_reg_sect,
544 sizeof (fpregset64));
545 mips64_supply_fpregset (regcache,
546 (const mips64_elf_fpregset_t *) &fpregset64);
550 warning (_("wrong size fpregset struct in core file"));
555 /* Register that we are able to handle ELF file formats using standard
556 procfs "regset" structures. */
558 static struct core_fns regset_core_fns =
560 bfd_target_elf_flavour, /* core_flavour */
561 default_check_format, /* check_format */
562 default_core_sniffer, /* core_sniffer */
563 fetch_core_registers, /* core_read_registers */
568 /* Check the code at PC for a dynamic linker lazy resolution stub.
569 Because they aren't in the .plt section, we pattern-match on the
570 code generated by GNU ld. They look like this:
577 (with the appropriate doubleword instructions for N64). Also
578 return the dynamic symbol index used in the last instruction. */
581 mips_linux_in_dynsym_stub (CORE_ADDR pc, char *name)
583 unsigned char buf[28], *p;
584 ULONGEST insn, insn1;
585 int n64 = (mips_abi (current_gdbarch) == MIPS_ABI_N64);
587 read_memory (pc - 12, buf, 28);
591 /* ld t9,0x8010(gp) */
596 /* lw t9,0x8010(gp) */
603 insn = extract_unsigned_integer (p, 4);
611 insn = extract_unsigned_integer (p + 4, 4);
615 if (insn != 0x03e0782d)
621 if (insn != 0x03e07821)
625 insn = extract_unsigned_integer (p + 8, 4);
627 if (insn != 0x0320f809)
630 insn = extract_unsigned_integer (p + 12, 4);
633 /* daddiu t8,zero,0 */
634 if ((insn & 0xffff0000) != 0x64180000)
639 /* addiu t8,zero,0 */
640 if ((insn & 0xffff0000) != 0x24180000)
644 return (insn & 0xffff);
647 /* Return non-zero iff PC belongs to the dynamic linker resolution
648 code or to a stub. */
651 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
653 /* Check whether PC is in the dynamic linker. This also checks
654 whether it is in the .plt section, which MIPS does not use. */
655 if (svr4_in_dynsym_resolve_code (pc))
658 /* Pattern match for the stub. It would be nice if there were a
659 more efficient way to avoid this check. */
660 if (mips_linux_in_dynsym_stub (pc, NULL))
666 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
667 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
668 implementation of this triggers at "fixup" from the same objfile as
669 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
670 "__dl_runtime_resolve" directly. An unresolved PLT entry will
671 point to _dl_runtime_resolve, which will first call
672 __dl_runtime_resolve, and then pass control to the resolved
676 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
678 struct minimal_symbol *resolver;
680 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
682 if (resolver && SYMBOL_VALUE_ADDRESS (resolver) == pc)
683 return frame_pc_unwind (get_current_frame ());
688 /* Signal trampoline support. There are four supported layouts for a
689 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
690 n64 rt_sigframe. We handle them all independently; not the most
691 efficient way, but simplest. First, declare all the unwinders. */
693 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
694 struct frame_info *next_frame,
695 struct trad_frame_cache *this_cache,
698 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
699 struct frame_info *next_frame,
700 struct trad_frame_cache *this_cache,
703 #define MIPS_NR_LINUX 4000
704 #define MIPS_NR_N64_LINUX 5000
705 #define MIPS_NR_N32_LINUX 6000
707 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
708 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
709 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
710 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
712 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
713 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
714 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
715 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
716 #define MIPS_INST_SYSCALL 0x0000000c
718 static const struct tramp_frame mips_linux_o32_sigframe = {
722 { MIPS_INST_LI_V0_SIGRETURN, -1 },
723 { MIPS_INST_SYSCALL, -1 },
724 { TRAMP_SENTINEL_INSN, -1 }
726 mips_linux_o32_sigframe_init
729 static const struct tramp_frame mips_linux_o32_rt_sigframe = {
733 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
734 { MIPS_INST_SYSCALL, -1 },
735 { TRAMP_SENTINEL_INSN, -1 } },
736 mips_linux_o32_sigframe_init
739 static const struct tramp_frame mips_linux_n32_rt_sigframe = {
743 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
744 { MIPS_INST_SYSCALL, -1 },
745 { TRAMP_SENTINEL_INSN, -1 }
747 mips_linux_n32n64_sigframe_init
750 static const struct tramp_frame mips_linux_n64_rt_sigframe = {
754 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
755 { MIPS_INST_SYSCALL, -1 },
756 { TRAMP_SENTINEL_INSN, -1 }
758 mips_linux_n32n64_sigframe_init
762 /* The unwinder for o32 signal frames. The legacy structures look
766 u32 sf_ass[4]; [argument save space for o32]
767 u32 sf_code[2]; [signal trampoline]
768 struct sigcontext sf_sc;
773 unsigned int sc_regmask; [Unused]
774 unsigned int sc_status;
775 unsigned long long sc_pc;
776 unsigned long long sc_regs[32];
777 unsigned long long sc_fpregs[32];
778 unsigned int sc_ownedfp;
779 unsigned int sc_fpc_csr;
780 unsigned int sc_fpc_eir; [Unused]
781 unsigned int sc_used_math;
782 unsigned int sc_ssflags; [Unused]
783 [Alignment hole of four bytes]
784 unsigned long long sc_mdhi;
785 unsigned long long sc_mdlo;
787 unsigned int sc_cause; [Unused]
788 unsigned int sc_badvaddr; [Unused]
790 unsigned long sc_sigset[4]; [kernel's sigset_t]
793 The RT signal frames look like this:
796 u32 rs_ass[4]; [argument save space for o32]
797 u32 rs_code[2] [signal trampoline]
798 struct siginfo rs_info;
799 struct ucontext rs_uc;
803 unsigned long uc_flags;
804 struct ucontext *uc_link;
806 [Alignment hole of four bytes]
807 struct sigcontext uc_mcontext;
812 #define SIGFRAME_CODE_OFFSET (4 * 4)
813 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
815 #define RTSIGFRAME_SIGINFO_SIZE 128
816 #define STACK_T_SIZE (3 * 4)
817 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
818 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
819 + RTSIGFRAME_SIGINFO_SIZE \
820 + UCONTEXT_SIGCONTEXT_OFFSET)
822 #define SIGCONTEXT_PC (1 * 8)
823 #define SIGCONTEXT_REGS (2 * 8)
824 #define SIGCONTEXT_FPREGS (34 * 8)
825 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
826 #define SIGCONTEXT_HI (69 * 8)
827 #define SIGCONTEXT_LO (70 * 8)
828 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
829 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
831 #define SIGCONTEXT_REG_SIZE 8
834 mips_linux_o32_sigframe_init (const struct tramp_frame *self,
835 struct frame_info *next_frame,
836 struct trad_frame_cache *this_cache,
839 int ireg, reg_position;
840 CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
841 const struct mips_regnum *regs = mips_regnum (current_gdbarch);
844 if (self == &mips_linux_o32_sigframe)
845 sigcontext_base += SIGFRAME_SIGCONTEXT_OFFSET;
847 sigcontext_base += RTSIGFRAME_SIGCONTEXT_OFFSET;
849 /* I'm not proud of this hack. Eventually we will have the
850 infrastructure to indicate the size of saved registers on a
851 per-frame basis, but right now we don't; the kernel saves eight
852 bytes but we only want four. Use regs_base to access any
854 if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
855 regs_base = sigcontext_base + 4;
857 regs_base = sigcontext_base;
859 if (mips_linux_restart_reg_p (current_gdbarch))
860 trad_frame_set_reg_addr (this_cache,
862 + gdbarch_num_regs (current_gdbarch)),
863 regs_base + SIGCONTEXT_REGS);
865 for (ireg = 1; ireg < 32; ireg++)
866 trad_frame_set_reg_addr (this_cache,
867 ireg + MIPS_ZERO_REGNUM
868 + gdbarch_num_regs (current_gdbarch),
869 regs_base + SIGCONTEXT_REGS
870 + ireg * SIGCONTEXT_REG_SIZE);
872 /* The way that floating point registers are saved, unfortunately,
873 depends on the architecture the kernel is built for. For the r3000 and
874 tx39, four bytes of each register are at the beginning of each of the
875 32 eight byte slots. For everything else, the registers are saved
876 using double precision; only the even-numbered slots are initialized,
877 and the high bits are the odd-numbered register. Assume the latter
878 layout, since we can't tell, and it's much more common. Which bits are
879 the "high" bits depends on endianness. */
880 for (ireg = 0; ireg < 32; ireg++)
881 if ((gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
882 trad_frame_set_reg_addr (this_cache,
884 gdbarch_num_regs (current_gdbarch),
885 sigcontext_base + SIGCONTEXT_FPREGS + 4
886 + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
888 trad_frame_set_reg_addr (this_cache,
890 + gdbarch_num_regs (current_gdbarch),
891 sigcontext_base + SIGCONTEXT_FPREGS
892 + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
894 trad_frame_set_reg_addr (this_cache,
895 regs->pc + gdbarch_num_regs (current_gdbarch),
896 regs_base + SIGCONTEXT_PC);
898 trad_frame_set_reg_addr (this_cache,
899 regs->fp_control_status
900 + gdbarch_num_regs (current_gdbarch),
901 sigcontext_base + SIGCONTEXT_FPCSR);
902 trad_frame_set_reg_addr (this_cache,
903 regs->hi + gdbarch_num_regs (current_gdbarch),
904 regs_base + SIGCONTEXT_HI);
905 trad_frame_set_reg_addr (this_cache,
906 regs->lo + gdbarch_num_regs (current_gdbarch),
907 regs_base + SIGCONTEXT_LO);
908 trad_frame_set_reg_addr (this_cache,
909 regs->cause + gdbarch_num_regs (current_gdbarch),
910 sigcontext_base + SIGCONTEXT_CAUSE);
911 trad_frame_set_reg_addr (this_cache,
912 regs->badvaddr + gdbarch_num_regs (current_gdbarch),
913 sigcontext_base + SIGCONTEXT_BADVADDR);
915 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
916 trad_frame_set_id (this_cache,
917 frame_id_build (func - SIGFRAME_CODE_OFFSET,
922 /* For N32/N64 things look different. There is no non-rt signal frame.
924 struct rt_sigframe_n32 {
925 u32 rs_ass[4]; [ argument save space for o32 ]
926 u32 rs_code[2]; [ signal trampoline ]
927 struct siginfo rs_info;
928 struct ucontextn32 rs_uc;
935 struct sigcontext uc_mcontext;
936 sigset_t uc_sigmask; [ mask last for extensibility ]
939 struct rt_sigframe_n32 {
940 u32 rs_ass[4]; [ argument save space for o32 ]
941 u32 rs_code[2]; [ signal trampoline ]
942 struct siginfo rs_info;
943 struct ucontext rs_uc;
947 unsigned long uc_flags;
948 struct ucontext *uc_link;
950 struct sigcontext uc_mcontext;
951 sigset_t uc_sigmask; [ mask last for extensibility ]
954 And the sigcontext is different (this is for both n32 and n64):
957 unsigned long long sc_regs[32];
958 unsigned long long sc_fpregs[32];
959 unsigned long long sc_mdhi;
960 unsigned long long sc_mdlo;
961 unsigned long long sc_pc;
962 unsigned int sc_status;
963 unsigned int sc_fpc_csr;
964 unsigned int sc_fpc_eir;
965 unsigned int sc_used_math;
966 unsigned int sc_cause;
967 unsigned int sc_badvaddr;
971 #define N32_STACK_T_SIZE STACK_T_SIZE
972 #define N64_STACK_T_SIZE (2 * 8 + 4)
973 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
974 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
975 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
976 + RTSIGFRAME_SIGINFO_SIZE \
977 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
978 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
979 + RTSIGFRAME_SIGINFO_SIZE \
980 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
982 #define N64_SIGCONTEXT_REGS (0 * 8)
983 #define N64_SIGCONTEXT_FPREGS (32 * 8)
984 #define N64_SIGCONTEXT_HI (64 * 8)
985 #define N64_SIGCONTEXT_LO (65 * 8)
986 #define N64_SIGCONTEXT_PC (66 * 8)
987 #define N64_SIGCONTEXT_FPCSR (67 * 8 + 1 * 4)
988 #define N64_SIGCONTEXT_FIR (67 * 8 + 2 * 4)
989 #define N64_SIGCONTEXT_CAUSE (67 * 8 + 4 * 4)
990 #define N64_SIGCONTEXT_BADVADDR (67 * 8 + 5 * 4)
992 #define N64_SIGCONTEXT_REG_SIZE 8
995 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
996 struct frame_info *next_frame,
997 struct trad_frame_cache *this_cache,
1000 int ireg, reg_position;
1001 CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
1002 const struct mips_regnum *regs = mips_regnum (current_gdbarch);
1004 if (self == &mips_linux_n32_rt_sigframe)
1005 sigcontext_base += N32_SIGFRAME_SIGCONTEXT_OFFSET;
1007 sigcontext_base += N64_SIGFRAME_SIGCONTEXT_OFFSET;
1009 if (mips_linux_restart_reg_p (current_gdbarch))
1010 trad_frame_set_reg_addr (this_cache,
1011 (MIPS_RESTART_REGNUM
1012 + gdbarch_num_regs (current_gdbarch)),
1013 sigcontext_base + N64_SIGCONTEXT_REGS);
1015 for (ireg = 1; ireg < 32; ireg++)
1016 trad_frame_set_reg_addr (this_cache,
1017 ireg + MIPS_ZERO_REGNUM
1018 + gdbarch_num_regs (current_gdbarch),
1019 sigcontext_base + N64_SIGCONTEXT_REGS
1020 + ireg * N64_SIGCONTEXT_REG_SIZE);
1022 for (ireg = 0; ireg < 32; ireg++)
1023 trad_frame_set_reg_addr (this_cache,
1025 + gdbarch_num_regs (current_gdbarch),
1026 sigcontext_base + N64_SIGCONTEXT_FPREGS
1027 + ireg * N64_SIGCONTEXT_REG_SIZE);
1029 trad_frame_set_reg_addr (this_cache,
1030 regs->pc + gdbarch_num_regs (current_gdbarch),
1031 sigcontext_base + N64_SIGCONTEXT_PC);
1033 trad_frame_set_reg_addr (this_cache,
1034 regs->fp_control_status
1035 + gdbarch_num_regs (current_gdbarch),
1036 sigcontext_base + N64_SIGCONTEXT_FPCSR);
1037 trad_frame_set_reg_addr (this_cache,
1038 regs->hi + gdbarch_num_regs (current_gdbarch),
1039 sigcontext_base + N64_SIGCONTEXT_HI);
1040 trad_frame_set_reg_addr (this_cache,
1041 regs->lo + gdbarch_num_regs (current_gdbarch),
1042 sigcontext_base + N64_SIGCONTEXT_LO);
1043 trad_frame_set_reg_addr (this_cache,
1044 regs->cause + gdbarch_num_regs (current_gdbarch),
1045 sigcontext_base + N64_SIGCONTEXT_CAUSE);
1046 trad_frame_set_reg_addr (this_cache,
1047 regs->badvaddr + gdbarch_num_regs (current_gdbarch),
1048 sigcontext_base + N64_SIGCONTEXT_BADVADDR);
1050 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1051 trad_frame_set_id (this_cache,
1052 frame_id_build (func - SIGFRAME_CODE_OFFSET,
1057 mips_linux_write_pc (CORE_ADDR pc, ptid_t ptid)
1059 write_register_pid (PC_REGNUM, pc, ptid);
1061 /* Clear the syscall restart flag. */
1062 if (mips_linux_restart_reg_p (current_gdbarch))
1063 write_register_pid (MIPS_RESTART_REGNUM, 0, ptid);
1066 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1069 mips_linux_restart_reg_p (struct gdbarch *gdbarch)
1071 /* If we do not have a target description with registers, then
1072 MIPS_RESTART_REGNUM will not be included in the register set. */
1073 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1076 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1077 either be GPR-sized or missing. */
1078 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0;
1081 /* Initialize one of the GNU/Linux OS ABIs. */
1084 mips_linux_init_abi (struct gdbarch_info info,
1085 struct gdbarch *gdbarch)
1087 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1088 enum mips_abi abi = mips_abi (gdbarch);
1089 struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info;
1094 set_gdbarch_get_longjmp_target (gdbarch,
1095 mips_linux_get_longjmp_target);
1096 set_solib_svr4_fetch_link_map_offsets
1097 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1098 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1099 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
1102 set_gdbarch_get_longjmp_target (gdbarch,
1103 mips_linux_get_longjmp_target);
1104 set_solib_svr4_fetch_link_map_offsets
1105 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1106 set_gdbarch_long_double_bit (gdbarch, 128);
1107 /* These floatformats should probably be renamed. MIPS uses
1108 the same 128-bit IEEE floating point format that IA-64 uses,
1109 except that the quiet/signalling NaN bit is reversed (GDB
1110 does not distinguish between quiet and signalling NaNs). */
1111 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1112 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
1115 set_gdbarch_get_longjmp_target (gdbarch,
1116 mips64_linux_get_longjmp_target);
1117 set_solib_svr4_fetch_link_map_offsets
1118 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1119 set_gdbarch_long_double_bit (gdbarch, 128);
1120 /* These floatformats should probably be renamed. MIPS uses
1121 the same 128-bit IEEE floating point format that IA-64 uses,
1122 except that the quiet/signalling NaN bit is reversed (GDB
1123 does not distinguish between quiet and signalling NaNs). */
1124 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1125 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
1128 internal_error (__FILE__, __LINE__, _("can't handle ABI"));
1132 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
1133 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1135 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
1137 /* Enable TLS support. */
1138 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1139 svr4_fetch_objfile_link_map);
1141 /* Initialize this lazily, to avoid an initialization order
1142 dependency on solib-svr4.c's _initialize routine. */
1143 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL)
1145 mips_svr4_so_ops = svr4_so_ops;
1146 mips_svr4_so_ops.in_dynsym_resolve_code
1147 = mips_linux_in_dynsym_resolve_code;
1149 set_solib_ops (gdbarch, &mips_svr4_so_ops);
1151 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc);
1155 const struct tdesc_feature *feature;
1157 /* If we have target-described registers, then we can safely
1158 reserve a number for MIPS_RESTART_REGNUM (whether it is
1159 described or not). */
1160 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM);
1161 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1163 /* If it's present, then assign it to the reserved number. */
1164 feature = tdesc_find_feature (info.target_desc,
1165 "org.gnu.gdb.mips.linux");
1166 if (feature != NULL)
1167 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM,
1173 _initialize_mips_linux_tdep (void)
1175 const struct bfd_arch_info *arch_info;
1177 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1179 arch_info = arch_info->next)
1181 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1183 mips_linux_init_abi);
1186 deprecated_add_core_fns (®set_core_fns);