1 /* Target-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2013 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "solib-svr4.h"
25 #include "mips-tdep.h"
26 #include "gdb_string.h"
27 #include "gdb_assert.h"
30 #include "trad-frame.h"
31 #include "tramp-frame.h"
35 #include "solib-svr4.h"
38 #include "target-descriptions.h"
40 #include "mips-linux-tdep.h"
41 #include "glibc-tdep.h"
42 #include "linux-tdep.h"
43 #include "xml-syscall.h"
44 #include "gdb_signals.h"
46 static struct target_so_ops mips_svr4_so_ops;
48 /* Figure out where the longjmp will land.
49 We expect the first arg to be a pointer to the jmp_buf structure
50 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
51 at. The pc is copied into PC. This routine returns 1 on
54 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
55 #define MIPS_LINUX_JB_PC 0
58 mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
61 struct gdbarch *gdbarch = get_frame_arch (frame);
62 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
63 gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
65 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
67 if (target_read_memory ((jb_addr
68 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE),
69 buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
72 *pc = extract_unsigned_integer (buf,
73 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
79 /* Transform the bits comprising a 32-bit register to the right size
80 for regcache_raw_supply(). This is needed when mips_isa_regsize()
84 supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
86 struct gdbarch *gdbarch = get_regcache_arch (regcache);
87 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
88 gdb_byte buf[MAX_REGISTER_SIZE];
89 store_signed_integer (buf, register_size (gdbarch, regnum), byte_order,
90 extract_signed_integer (addr, 4, byte_order));
91 regcache_raw_supply (regcache, regnum, buf);
94 /* Unpack an elf_gregset_t into GDB's register cache. */
97 mips_supply_gregset (struct regcache *regcache,
98 const mips_elf_gregset_t *gregsetp)
101 const mips_elf_greg_t *regp = *gregsetp;
102 char zerobuf[MAX_REGISTER_SIZE];
103 struct gdbarch *gdbarch = get_regcache_arch (regcache);
105 memset (zerobuf, 0, MAX_REGISTER_SIZE);
107 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
108 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
110 if (mips_linux_restart_reg_p (gdbarch))
111 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0);
113 supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO);
114 supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI);
116 supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc,
118 supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
119 regp + EF_CP0_BADVADDR);
120 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
121 supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause,
122 regp + EF_CP0_CAUSE);
124 /* Fill the inaccessible zero register with zero. */
125 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
129 mips_supply_gregset_wrapper (const struct regset *regset,
130 struct regcache *regcache,
131 int regnum, const void *gregs, size_t len)
133 gdb_assert (len == sizeof (mips_elf_gregset_t));
135 mips_supply_gregset (regcache, (const mips_elf_gregset_t *)gregs);
138 /* Pack our registers (or one register) into an elf_gregset_t. */
141 mips_fill_gregset (const struct regcache *regcache,
142 mips_elf_gregset_t *gregsetp, int regno)
144 struct gdbarch *gdbarch = get_regcache_arch (regcache);
146 mips_elf_greg_t *regp = *gregsetp;
151 memset (regp, 0, sizeof (mips_elf_gregset_t));
152 for (regi = 1; regi < 32; regi++)
153 mips_fill_gregset (regcache, gregsetp, regi);
154 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
155 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
156 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
157 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
158 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
159 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
160 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
164 if (regno > 0 && regno < 32)
166 dst = regp + regno + EF_REG0;
167 regcache_raw_collect (regcache, regno, dst);
171 if (regno == mips_regnum (gdbarch)->lo)
173 else if (regno == mips_regnum (gdbarch)->hi)
175 else if (regno == mips_regnum (gdbarch)->pc)
176 regaddr = EF_CP0_EPC;
177 else if (regno == mips_regnum (gdbarch)->badvaddr)
178 regaddr = EF_CP0_BADVADDR;
179 else if (regno == MIPS_PS_REGNUM)
180 regaddr = EF_CP0_STATUS;
181 else if (regno == mips_regnum (gdbarch)->cause)
182 regaddr = EF_CP0_CAUSE;
183 else if (mips_linux_restart_reg_p (gdbarch)
184 && regno == MIPS_RESTART_REGNUM)
191 dst = regp + regaddr;
192 regcache_raw_collect (regcache, regno, dst);
197 mips_fill_gregset_wrapper (const struct regset *regset,
198 const struct regcache *regcache,
199 int regnum, void *gregs, size_t len)
201 gdb_assert (len == sizeof (mips_elf_gregset_t));
203 mips_fill_gregset (regcache, (mips_elf_gregset_t *)gregs, regnum);
206 /* Likewise, unpack an elf_fpregset_t. */
209 mips_supply_fpregset (struct regcache *regcache,
210 const mips_elf_fpregset_t *fpregsetp)
212 struct gdbarch *gdbarch = get_regcache_arch (regcache);
214 char zerobuf[MAX_REGISTER_SIZE];
216 memset (zerobuf, 0, MAX_REGISTER_SIZE);
218 for (regi = 0; regi < 32; regi++)
219 regcache_raw_supply (regcache,
220 gdbarch_fp0_regnum (gdbarch) + regi,
223 regcache_raw_supply (regcache,
224 mips_regnum (gdbarch)->fp_control_status,
227 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
228 regcache_raw_supply (regcache,
229 mips_regnum (gdbarch)->fp_implementation_revision,
234 mips_supply_fpregset_wrapper (const struct regset *regset,
235 struct regcache *regcache,
236 int regnum, const void *gregs, size_t len)
238 gdb_assert (len == sizeof (mips_elf_fpregset_t));
240 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *)gregs);
243 /* Likewise, pack one or all floating point registers into an
247 mips_fill_fpregset (const struct regcache *regcache,
248 mips_elf_fpregset_t *fpregsetp, int regno)
250 struct gdbarch *gdbarch = get_regcache_arch (regcache);
253 if ((regno >= gdbarch_fp0_regnum (gdbarch))
254 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
256 to = (char *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch));
257 regcache_raw_collect (regcache, regno, to);
259 else if (regno == mips_regnum (gdbarch)->fp_control_status)
261 to = (char *) (*fpregsetp + 32);
262 regcache_raw_collect (regcache, regno, to);
264 else if (regno == -1)
268 for (regi = 0; regi < 32; regi++)
269 mips_fill_fpregset (regcache, fpregsetp,
270 gdbarch_fp0_regnum (gdbarch) + regi);
271 mips_fill_fpregset (regcache, fpregsetp,
272 mips_regnum (gdbarch)->fp_control_status);
277 mips_fill_fpregset_wrapper (const struct regset *regset,
278 const struct regcache *regcache,
279 int regnum, void *gregs, size_t len)
281 gdb_assert (len == sizeof (mips_elf_fpregset_t));
283 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *)gregs, regnum);
286 /* Support for 64-bit ABIs. */
288 /* Figure out where the longjmp will land.
289 We expect the first arg to be a pointer to the jmp_buf structure
290 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
291 at. The pc is copied into PC. This routine returns 1 on
294 /* Details about jmp_buf. */
296 #define MIPS64_LINUX_JB_PC 0
299 mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
302 struct gdbarch *gdbarch = get_frame_arch (frame);
303 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
304 void *buf = alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
305 int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8;
307 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
309 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
311 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
314 *pc = extract_unsigned_integer (buf,
315 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
321 /* Register set support functions. These operate on standard 64-bit
322 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
323 target will still use the 64-bit format for PTRACE_GETREGS. */
325 /* Supply a 64-bit register. */
328 supply_64bit_reg (struct regcache *regcache, int regnum,
331 struct gdbarch *gdbarch = get_regcache_arch (regcache);
332 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
333 && register_size (gdbarch, regnum) == 4)
334 regcache_raw_supply (regcache, regnum, buf + 4);
336 regcache_raw_supply (regcache, regnum, buf);
339 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
342 mips64_supply_gregset (struct regcache *regcache,
343 const mips64_elf_gregset_t *gregsetp)
346 const mips64_elf_greg_t *regp = *gregsetp;
347 gdb_byte zerobuf[MAX_REGISTER_SIZE];
348 struct gdbarch *gdbarch = get_regcache_arch (regcache);
350 memset (zerobuf, 0, MAX_REGISTER_SIZE);
352 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
353 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
354 (const gdb_byte *) (regp + regi));
356 if (mips_linux_restart_reg_p (gdbarch))
357 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM,
358 (const gdb_byte *) (regp + MIPS64_EF_REG0));
360 supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo,
361 (const gdb_byte *) (regp + MIPS64_EF_LO));
362 supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi,
363 (const gdb_byte *) (regp + MIPS64_EF_HI));
365 supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc,
366 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
367 supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
368 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
369 supply_64bit_reg (regcache, MIPS_PS_REGNUM,
370 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
371 supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause,
372 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
374 /* Fill the inaccessible zero register with zero. */
375 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
379 mips64_supply_gregset_wrapper (const struct regset *regset,
380 struct regcache *regcache,
381 int regnum, const void *gregs, size_t len)
383 gdb_assert (len == sizeof (mips64_elf_gregset_t));
385 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *)gregs);
388 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
391 mips64_fill_gregset (const struct regcache *regcache,
392 mips64_elf_gregset_t *gregsetp, int regno)
394 struct gdbarch *gdbarch = get_regcache_arch (regcache);
395 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
397 mips64_elf_greg_t *regp = *gregsetp;
402 memset (regp, 0, sizeof (mips64_elf_gregset_t));
403 for (regi = 1; regi < 32; regi++)
404 mips64_fill_gregset (regcache, gregsetp, regi);
405 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
406 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
407 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
408 mips64_fill_gregset (regcache, gregsetp,
409 mips_regnum (gdbarch)->badvaddr);
410 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
411 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
412 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
416 if (regno > 0 && regno < 32)
417 regaddr = regno + MIPS64_EF_REG0;
418 else if (regno == mips_regnum (gdbarch)->lo)
419 regaddr = MIPS64_EF_LO;
420 else if (regno == mips_regnum (gdbarch)->hi)
421 regaddr = MIPS64_EF_HI;
422 else if (regno == mips_regnum (gdbarch)->pc)
423 regaddr = MIPS64_EF_CP0_EPC;
424 else if (regno == mips_regnum (gdbarch)->badvaddr)
425 regaddr = MIPS64_EF_CP0_BADVADDR;
426 else if (regno == MIPS_PS_REGNUM)
427 regaddr = MIPS64_EF_CP0_STATUS;
428 else if (regno == mips_regnum (gdbarch)->cause)
429 regaddr = MIPS64_EF_CP0_CAUSE;
430 else if (mips_linux_restart_reg_p (gdbarch)
431 && regno == MIPS_RESTART_REGNUM)
432 regaddr = MIPS64_EF_REG0;
438 gdb_byte buf[MAX_REGISTER_SIZE];
441 regcache_raw_collect (regcache, regno, buf);
442 val = extract_signed_integer (buf, register_size (gdbarch, regno),
444 dst = regp + regaddr;
445 store_signed_integer (dst, 8, byte_order, val);
450 mips64_fill_gregset_wrapper (const struct regset *regset,
451 const struct regcache *regcache,
452 int regnum, void *gregs, size_t len)
454 gdb_assert (len == sizeof (mips64_elf_gregset_t));
456 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *)gregs, regnum);
459 /* Likewise, unpack an elf_fpregset_t. */
462 mips64_supply_fpregset (struct regcache *regcache,
463 const mips64_elf_fpregset_t *fpregsetp)
465 struct gdbarch *gdbarch = get_regcache_arch (regcache);
468 /* See mips_linux_o32_sigframe_init for a description of the
469 peculiar FP register layout. */
470 if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4)
471 for (regi = 0; regi < 32; regi++)
473 const gdb_byte *reg_ptr
474 = (const gdb_byte *) (*fpregsetp + (regi & ~1));
475 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
477 regcache_raw_supply (regcache,
478 gdbarch_fp0_regnum (gdbarch) + regi,
482 for (regi = 0; regi < 32; regi++)
483 regcache_raw_supply (regcache,
484 gdbarch_fp0_regnum (gdbarch) + regi,
485 (const char *) (*fpregsetp + regi));
487 supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status,
488 (const gdb_byte *) (*fpregsetp + 32));
490 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
491 include it - but the result of PTRACE_GETFPREGS does. The best we
492 can do is to assume that its value is present. */
493 supply_32bit_reg (regcache,
494 mips_regnum (gdbarch)->fp_implementation_revision,
495 (const gdb_byte *) (*fpregsetp + 32) + 4);
499 mips64_supply_fpregset_wrapper (const struct regset *regset,
500 struct regcache *regcache,
501 int regnum, const void *gregs, size_t len)
503 gdb_assert (len == sizeof (mips64_elf_fpregset_t));
505 mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *)gregs);
508 /* Likewise, pack one or all floating point registers into an
512 mips64_fill_fpregset (const struct regcache *regcache,
513 mips64_elf_fpregset_t *fpregsetp, int regno)
515 struct gdbarch *gdbarch = get_regcache_arch (regcache);
516 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
519 if ((regno >= gdbarch_fp0_regnum (gdbarch))
520 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
522 /* See mips_linux_o32_sigframe_init for a description of the
523 peculiar FP register layout. */
524 if (register_size (gdbarch, regno) == 4)
526 int regi = regno - gdbarch_fp0_regnum (gdbarch);
528 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
529 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
531 regcache_raw_collect (regcache, regno, to);
535 to = (gdb_byte *) (*fpregsetp + regno
536 - gdbarch_fp0_regnum (gdbarch));
537 regcache_raw_collect (regcache, regno, to);
540 else if (regno == mips_regnum (gdbarch)->fp_control_status)
542 gdb_byte buf[MAX_REGISTER_SIZE];
545 regcache_raw_collect (regcache, regno, buf);
546 val = extract_signed_integer (buf, register_size (gdbarch, regno),
548 to = (gdb_byte *) (*fpregsetp + 32);
549 store_signed_integer (to, 4, byte_order, val);
551 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
553 gdb_byte buf[MAX_REGISTER_SIZE];
556 regcache_raw_collect (regcache, regno, buf);
557 val = extract_signed_integer (buf, register_size (gdbarch, regno),
559 to = (gdb_byte *) (*fpregsetp + 32) + 4;
560 store_signed_integer (to, 4, byte_order, val);
562 else if (regno == -1)
566 for (regi = 0; regi < 32; regi++)
567 mips64_fill_fpregset (regcache, fpregsetp,
568 gdbarch_fp0_regnum (gdbarch) + regi);
569 mips64_fill_fpregset (regcache, fpregsetp,
570 mips_regnum (gdbarch)->fp_control_status);
571 mips64_fill_fpregset (regcache, fpregsetp,
572 mips_regnum (gdbarch)->fp_implementation_revision);
577 mips64_fill_fpregset_wrapper (const struct regset *regset,
578 const struct regcache *regcache,
579 int regnum, void *gregs, size_t len)
581 gdb_assert (len == sizeof (mips64_elf_fpregset_t));
583 mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *)gregs, regnum);
586 static const struct regset *
587 mips_linux_regset_from_core_section (struct gdbarch *gdbarch,
588 const char *sect_name, size_t sect_size)
590 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
591 mips_elf_gregset_t gregset;
592 mips_elf_fpregset_t fpregset;
593 mips64_elf_gregset_t gregset64;
594 mips64_elf_fpregset_t fpregset64;
596 if (strcmp (sect_name, ".reg") == 0)
598 if (sect_size == sizeof (gregset))
600 if (tdep->gregset == NULL)
601 tdep->gregset = regset_alloc (gdbarch,
602 mips_supply_gregset_wrapper,
603 mips_fill_gregset_wrapper);
604 return tdep->gregset;
606 else if (sect_size == sizeof (gregset64))
608 if (tdep->gregset64 == NULL)
609 tdep->gregset64 = regset_alloc (gdbarch,
610 mips64_supply_gregset_wrapper,
611 mips64_fill_gregset_wrapper);
612 return tdep->gregset64;
616 warning (_("wrong size gregset struct in core file"));
619 else if (strcmp (sect_name, ".reg2") == 0)
621 if (sect_size == sizeof (fpregset))
623 if (tdep->fpregset == NULL)
624 tdep->fpregset = regset_alloc (gdbarch,
625 mips_supply_fpregset_wrapper,
626 mips_fill_fpregset_wrapper);
627 return tdep->fpregset;
629 else if (sect_size == sizeof (fpregset64))
631 if (tdep->fpregset64 == NULL)
632 tdep->fpregset64 = regset_alloc (gdbarch,
633 mips64_supply_fpregset_wrapper,
634 mips64_fill_fpregset_wrapper);
635 return tdep->fpregset64;
639 warning (_("wrong size fpregset struct in core file"));
646 static const struct target_desc *
647 mips_linux_core_read_description (struct gdbarch *gdbarch,
648 struct target_ops *target,
651 asection *section = bfd_get_section_by_name (abfd, ".reg");
655 switch (bfd_section_size (abfd, section))
657 case sizeof (mips_elf_gregset_t):
658 return mips_tdesc_gp32;
660 case sizeof (mips64_elf_gregset_t):
661 return mips_tdesc_gp64;
669 /* Check the code at PC for a dynamic linker lazy resolution stub.
670 GNU ld for MIPS has put lazy resolution stubs into a ".MIPS.stubs"
671 section uniformly since version 2.15. If the pc is in that section,
672 then we are in such a stub. Before that ".stub" was used in 32-bit
673 ELF binaries, however we do not bother checking for that since we
674 have never had and that case should be extremely rare these days.
675 Instead we pattern-match on the code generated by GNU ld. They look
683 (with the appropriate doubleword instructions for N64). As any lazy
684 resolution stubs in microMIPS binaries will always be in a
685 ".MIPS.stubs" section we only ever verify standard MIPS patterns. */
688 mips_linux_in_dynsym_stub (CORE_ADDR pc)
690 gdb_byte buf[28], *p;
691 ULONGEST insn, insn1;
692 int n64 = (mips_abi (target_gdbarch ()) == MIPS_ABI_N64);
693 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
695 if (in_mips_stubs_section (pc))
698 read_memory (pc - 12, buf, 28);
702 /* ld t9,0x8010(gp) */
707 /* lw t9,0x8010(gp) */
714 insn = extract_unsigned_integer (p, 4, byte_order);
722 insn = extract_unsigned_integer (p + 4, 4, byte_order);
726 if (insn != 0x03e0782d)
732 if (insn != 0x03e07821)
736 insn = extract_unsigned_integer (p + 8, 4, byte_order);
738 if (insn != 0x0320f809)
741 insn = extract_unsigned_integer (p + 12, 4, byte_order);
744 /* daddiu t8,zero,0 */
745 if ((insn & 0xffff0000) != 0x64180000)
750 /* addiu t8,zero,0 */
751 if ((insn & 0xffff0000) != 0x24180000)
758 /* Return non-zero iff PC belongs to the dynamic linker resolution
759 code, a PLT entry, or a lazy binding stub. */
762 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
764 /* Check whether PC is in the dynamic linker. This also checks
765 whether it is in the .plt section, used by non-PIC executables. */
766 if (svr4_in_dynsym_resolve_code (pc))
769 /* Likewise for the stubs. They live in the .MIPS.stubs section these
770 days, so we check if the PC is within, than fall back to a pattern
772 if (mips_linux_in_dynsym_stub (pc))
778 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
779 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
780 implementation of this triggers at "fixup" from the same objfile as
781 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
782 "__dl_runtime_resolve" directly. An unresolved lazy binding
783 stub will point to _dl_runtime_resolve, which will first call
784 __dl_runtime_resolve, and then pass control to the resolved
788 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
790 struct minimal_symbol *resolver;
792 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
794 if (resolver && SYMBOL_VALUE_ADDRESS (resolver) == pc)
795 return frame_unwind_caller_pc (get_current_frame ());
797 return glibc_skip_solib_resolver (gdbarch, pc);
800 /* Signal trampoline support. There are four supported layouts for a
801 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
802 n64 rt_sigframe. We handle them all independently; not the most
803 efficient way, but simplest. First, declare all the unwinders. */
805 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
806 struct frame_info *this_frame,
807 struct trad_frame_cache *this_cache,
810 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
811 struct frame_info *this_frame,
812 struct trad_frame_cache *this_cache,
815 #define MIPS_NR_LINUX 4000
816 #define MIPS_NR_N64_LINUX 5000
817 #define MIPS_NR_N32_LINUX 6000
819 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
820 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
821 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
822 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
824 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
825 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
826 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
827 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
828 #define MIPS_INST_SYSCALL 0x0000000c
830 static const struct tramp_frame mips_linux_o32_sigframe = {
834 { MIPS_INST_LI_V0_SIGRETURN, -1 },
835 { MIPS_INST_SYSCALL, -1 },
836 { TRAMP_SENTINEL_INSN, -1 }
838 mips_linux_o32_sigframe_init
841 static const struct tramp_frame mips_linux_o32_rt_sigframe = {
845 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
846 { MIPS_INST_SYSCALL, -1 },
847 { TRAMP_SENTINEL_INSN, -1 } },
848 mips_linux_o32_sigframe_init
851 static const struct tramp_frame mips_linux_n32_rt_sigframe = {
855 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
856 { MIPS_INST_SYSCALL, -1 },
857 { TRAMP_SENTINEL_INSN, -1 }
859 mips_linux_n32n64_sigframe_init
862 static const struct tramp_frame mips_linux_n64_rt_sigframe = {
866 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
867 { MIPS_INST_SYSCALL, -1 },
868 { TRAMP_SENTINEL_INSN, -1 }
870 mips_linux_n32n64_sigframe_init
874 /* The unwinder for o32 signal frames. The legacy structures look
878 u32 sf_ass[4]; [argument save space for o32]
879 u32 sf_code[2]; [signal trampoline or fill]
880 struct sigcontext sf_sc;
884 Pre-2.6.12 sigcontext:
887 unsigned int sc_regmask; [Unused]
888 unsigned int sc_status;
889 unsigned long long sc_pc;
890 unsigned long long sc_regs[32];
891 unsigned long long sc_fpregs[32];
892 unsigned int sc_ownedfp;
893 unsigned int sc_fpc_csr;
894 unsigned int sc_fpc_eir; [Unused]
895 unsigned int sc_used_math;
896 unsigned int sc_ssflags; [Unused]
897 [Alignment hole of four bytes]
898 unsigned long long sc_mdhi;
899 unsigned long long sc_mdlo;
901 unsigned int sc_cause; [Unused]
902 unsigned int sc_badvaddr; [Unused]
904 unsigned long sc_sigset[4]; [kernel's sigset_t]
907 Post-2.6.12 sigcontext (SmartMIPS/DSP support added):
910 unsigned int sc_regmask; [Unused]
911 unsigned int sc_status; [Unused]
912 unsigned long long sc_pc;
913 unsigned long long sc_regs[32];
914 unsigned long long sc_fpregs[32];
916 unsigned int sc_fpc_csr;
917 unsigned int sc_fpc_eir; [Unused]
918 unsigned int sc_used_math;
920 [Alignment hole of four bytes]
921 unsigned long long sc_mdhi;
922 unsigned long long sc_mdlo;
923 unsigned long sc_hi1;
924 unsigned long sc_lo1;
925 unsigned long sc_hi2;
926 unsigned long sc_lo2;
927 unsigned long sc_hi3;
928 unsigned long sc_lo3;
931 The RT signal frames look like this:
934 u32 rs_ass[4]; [argument save space for o32]
935 u32 rs_code[2] [signal trampoline or fill]
936 struct siginfo rs_info;
937 struct ucontext rs_uc;
941 unsigned long uc_flags;
942 struct ucontext *uc_link;
944 [Alignment hole of four bytes]
945 struct sigcontext uc_mcontext;
950 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
952 #define RTSIGFRAME_SIGINFO_SIZE 128
953 #define STACK_T_SIZE (3 * 4)
954 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
955 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
956 + RTSIGFRAME_SIGINFO_SIZE \
957 + UCONTEXT_SIGCONTEXT_OFFSET)
959 #define SIGCONTEXT_PC (1 * 8)
960 #define SIGCONTEXT_REGS (2 * 8)
961 #define SIGCONTEXT_FPREGS (34 * 8)
962 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
963 #define SIGCONTEXT_DSPCTL (68 * 8 + 0)
964 #define SIGCONTEXT_HI (69 * 8)
965 #define SIGCONTEXT_LO (70 * 8)
966 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
967 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
968 #define SIGCONTEXT_HI1 (71 * 8 + 0)
969 #define SIGCONTEXT_LO1 (71 * 8 + 4)
970 #define SIGCONTEXT_HI2 (72 * 8 + 0)
971 #define SIGCONTEXT_LO2 (72 * 8 + 4)
972 #define SIGCONTEXT_HI3 (73 * 8 + 0)
973 #define SIGCONTEXT_LO3 (73 * 8 + 4)
975 #define SIGCONTEXT_REG_SIZE 8
978 mips_linux_o32_sigframe_init (const struct tramp_frame *self,
979 struct frame_info *this_frame,
980 struct trad_frame_cache *this_cache,
983 struct gdbarch *gdbarch = get_frame_arch (this_frame);
985 CORE_ADDR frame_sp = get_frame_sp (this_frame);
986 CORE_ADDR sigcontext_base;
987 const struct mips_regnum *regs = mips_regnum (gdbarch);
990 if (self == &mips_linux_o32_sigframe)
991 sigcontext_base = frame_sp + SIGFRAME_SIGCONTEXT_OFFSET;
993 sigcontext_base = frame_sp + RTSIGFRAME_SIGCONTEXT_OFFSET;
995 /* I'm not proud of this hack. Eventually we will have the
996 infrastructure to indicate the size of saved registers on a
997 per-frame basis, but right now we don't; the kernel saves eight
998 bytes but we only want four. Use regs_base to access any
1000 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1001 regs_base = sigcontext_base + 4;
1003 regs_base = sigcontext_base;
1005 if (mips_linux_restart_reg_p (gdbarch))
1006 trad_frame_set_reg_addr (this_cache,
1007 (MIPS_RESTART_REGNUM
1008 + gdbarch_num_regs (gdbarch)),
1009 regs_base + SIGCONTEXT_REGS);
1011 for (ireg = 1; ireg < 32; ireg++)
1012 trad_frame_set_reg_addr (this_cache,
1013 (ireg + MIPS_ZERO_REGNUM
1014 + gdbarch_num_regs (gdbarch)),
1015 (regs_base + SIGCONTEXT_REGS
1016 + ireg * SIGCONTEXT_REG_SIZE));
1018 /* The way that floating point registers are saved, unfortunately,
1019 depends on the architecture the kernel is built for. For the r3000 and
1020 tx39, four bytes of each register are at the beginning of each of the
1021 32 eight byte slots. For everything else, the registers are saved
1022 using double precision; only the even-numbered slots are initialized,
1023 and the high bits are the odd-numbered register. Assume the latter
1024 layout, since we can't tell, and it's much more common. Which bits are
1025 the "high" bits depends on endianness. */
1026 for (ireg = 0; ireg < 32; ireg++)
1027 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
1028 trad_frame_set_reg_addr (this_cache,
1029 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1030 (sigcontext_base + SIGCONTEXT_FPREGS + 4
1031 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1033 trad_frame_set_reg_addr (this_cache,
1034 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1035 (sigcontext_base + SIGCONTEXT_FPREGS
1036 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1038 trad_frame_set_reg_addr (this_cache,
1039 regs->pc + gdbarch_num_regs (gdbarch),
1040 regs_base + SIGCONTEXT_PC);
1042 trad_frame_set_reg_addr (this_cache,
1043 (regs->fp_control_status
1044 + gdbarch_num_regs (gdbarch)),
1045 sigcontext_base + SIGCONTEXT_FPCSR);
1047 if (regs->dspctl != -1)
1048 trad_frame_set_reg_addr (this_cache,
1049 regs->dspctl + gdbarch_num_regs (gdbarch),
1050 sigcontext_base + SIGCONTEXT_DSPCTL);
1052 trad_frame_set_reg_addr (this_cache,
1053 regs->hi + gdbarch_num_regs (gdbarch),
1054 regs_base + SIGCONTEXT_HI);
1055 trad_frame_set_reg_addr (this_cache,
1056 regs->lo + gdbarch_num_regs (gdbarch),
1057 regs_base + SIGCONTEXT_LO);
1059 if (regs->dspacc != -1)
1061 trad_frame_set_reg_addr (this_cache,
1062 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1063 sigcontext_base + SIGCONTEXT_HI1);
1064 trad_frame_set_reg_addr (this_cache,
1065 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1066 sigcontext_base + SIGCONTEXT_LO1);
1067 trad_frame_set_reg_addr (this_cache,
1068 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1069 sigcontext_base + SIGCONTEXT_HI2);
1070 trad_frame_set_reg_addr (this_cache,
1071 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1072 sigcontext_base + SIGCONTEXT_LO2);
1073 trad_frame_set_reg_addr (this_cache,
1074 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1075 sigcontext_base + SIGCONTEXT_HI3);
1076 trad_frame_set_reg_addr (this_cache,
1077 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1078 sigcontext_base + SIGCONTEXT_LO3);
1082 trad_frame_set_reg_addr (this_cache,
1083 regs->cause + gdbarch_num_regs (gdbarch),
1084 sigcontext_base + SIGCONTEXT_CAUSE);
1085 trad_frame_set_reg_addr (this_cache,
1086 regs->badvaddr + gdbarch_num_regs (gdbarch),
1087 sigcontext_base + SIGCONTEXT_BADVADDR);
1090 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1091 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1095 /* For N32/N64 things look different. There is no non-rt signal frame.
1097 struct rt_sigframe_n32 {
1098 u32 rs_ass[4]; [ argument save space for o32 ]
1099 u32 rs_code[2]; [ signal trampoline or fill ]
1100 struct siginfo rs_info;
1101 struct ucontextn32 rs_uc;
1104 struct ucontextn32 {
1108 struct sigcontext uc_mcontext;
1109 sigset_t uc_sigmask; [ mask last for extensibility ]
1112 struct rt_sigframe {
1113 u32 rs_ass[4]; [ argument save space for o32 ]
1114 u32 rs_code[2]; [ signal trampoline ]
1115 struct siginfo rs_info;
1116 struct ucontext rs_uc;
1120 unsigned long uc_flags;
1121 struct ucontext *uc_link;
1123 struct sigcontext uc_mcontext;
1124 sigset_t uc_sigmask; [ mask last for extensibility ]
1127 And the sigcontext is different (this is for both n32 and n64):
1130 unsigned long long sc_regs[32];
1131 unsigned long long sc_fpregs[32];
1132 unsigned long long sc_mdhi;
1133 unsigned long long sc_hi1;
1134 unsigned long long sc_hi2;
1135 unsigned long long sc_hi3;
1136 unsigned long long sc_mdlo;
1137 unsigned long long sc_lo1;
1138 unsigned long long sc_lo2;
1139 unsigned long long sc_lo3;
1140 unsigned long long sc_pc;
1141 unsigned int sc_fpc_csr;
1142 unsigned int sc_used_math;
1143 unsigned int sc_dsp;
1144 unsigned int sc_reserved;
1147 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1148 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1152 #define N32_STACK_T_SIZE STACK_T_SIZE
1153 #define N64_STACK_T_SIZE (2 * 8 + 4)
1154 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1155 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1156 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1157 + RTSIGFRAME_SIGINFO_SIZE \
1158 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1159 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1160 + RTSIGFRAME_SIGINFO_SIZE \
1161 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1163 #define N64_SIGCONTEXT_REGS (0 * 8)
1164 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1165 #define N64_SIGCONTEXT_HI (64 * 8)
1166 #define N64_SIGCONTEXT_HI1 (65 * 8)
1167 #define N64_SIGCONTEXT_HI2 (66 * 8)
1168 #define N64_SIGCONTEXT_HI3 (67 * 8)
1169 #define N64_SIGCONTEXT_LO (68 * 8)
1170 #define N64_SIGCONTEXT_LO1 (69 * 8)
1171 #define N64_SIGCONTEXT_LO2 (70 * 8)
1172 #define N64_SIGCONTEXT_LO3 (71 * 8)
1173 #define N64_SIGCONTEXT_PC (72 * 8)
1174 #define N64_SIGCONTEXT_FPCSR (73 * 8 + 0)
1175 #define N64_SIGCONTEXT_DSPCTL (74 * 8 + 0)
1177 #define N64_SIGCONTEXT_REG_SIZE 8
1180 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
1181 struct frame_info *this_frame,
1182 struct trad_frame_cache *this_cache,
1185 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1187 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1188 CORE_ADDR sigcontext_base;
1189 const struct mips_regnum *regs = mips_regnum (gdbarch);
1191 if (self == &mips_linux_n32_rt_sigframe)
1192 sigcontext_base = frame_sp + N32_SIGFRAME_SIGCONTEXT_OFFSET;
1194 sigcontext_base = frame_sp + N64_SIGFRAME_SIGCONTEXT_OFFSET;
1196 if (mips_linux_restart_reg_p (gdbarch))
1197 trad_frame_set_reg_addr (this_cache,
1198 (MIPS_RESTART_REGNUM
1199 + gdbarch_num_regs (gdbarch)),
1200 sigcontext_base + N64_SIGCONTEXT_REGS);
1202 for (ireg = 1; ireg < 32; ireg++)
1203 trad_frame_set_reg_addr (this_cache,
1204 (ireg + MIPS_ZERO_REGNUM
1205 + gdbarch_num_regs (gdbarch)),
1206 (sigcontext_base + N64_SIGCONTEXT_REGS
1207 + ireg * N64_SIGCONTEXT_REG_SIZE));
1209 for (ireg = 0; ireg < 32; ireg++)
1210 trad_frame_set_reg_addr (this_cache,
1211 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1212 (sigcontext_base + N64_SIGCONTEXT_FPREGS
1213 + ireg * N64_SIGCONTEXT_REG_SIZE));
1215 trad_frame_set_reg_addr (this_cache,
1216 regs->pc + gdbarch_num_regs (gdbarch),
1217 sigcontext_base + N64_SIGCONTEXT_PC);
1219 trad_frame_set_reg_addr (this_cache,
1220 (regs->fp_control_status
1221 + gdbarch_num_regs (gdbarch)),
1222 sigcontext_base + N64_SIGCONTEXT_FPCSR);
1224 trad_frame_set_reg_addr (this_cache,
1225 regs->hi + gdbarch_num_regs (gdbarch),
1226 sigcontext_base + N64_SIGCONTEXT_HI);
1227 trad_frame_set_reg_addr (this_cache,
1228 regs->lo + gdbarch_num_regs (gdbarch),
1229 sigcontext_base + N64_SIGCONTEXT_LO);
1231 if (regs->dspacc != -1)
1233 trad_frame_set_reg_addr (this_cache,
1234 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1235 sigcontext_base + N64_SIGCONTEXT_HI1);
1236 trad_frame_set_reg_addr (this_cache,
1237 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1238 sigcontext_base + N64_SIGCONTEXT_LO1);
1239 trad_frame_set_reg_addr (this_cache,
1240 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1241 sigcontext_base + N64_SIGCONTEXT_HI2);
1242 trad_frame_set_reg_addr (this_cache,
1243 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1244 sigcontext_base + N64_SIGCONTEXT_LO2);
1245 trad_frame_set_reg_addr (this_cache,
1246 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1247 sigcontext_base + N64_SIGCONTEXT_HI3);
1248 trad_frame_set_reg_addr (this_cache,
1249 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1250 sigcontext_base + N64_SIGCONTEXT_LO3);
1252 if (regs->dspctl != -1)
1253 trad_frame_set_reg_addr (this_cache,
1254 regs->dspctl + gdbarch_num_regs (gdbarch),
1255 sigcontext_base + N64_SIGCONTEXT_DSPCTL);
1257 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1258 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1261 /* Implement the "write_pc" gdbarch method. */
1264 mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1266 struct gdbarch *gdbarch = get_regcache_arch (regcache);
1268 mips_write_pc (regcache, pc);
1270 /* Clear the syscall restart flag. */
1271 if (mips_linux_restart_reg_p (gdbarch))
1272 regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0);
1275 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1278 mips_linux_restart_reg_p (struct gdbarch *gdbarch)
1280 /* If we do not have a target description with registers, then
1281 MIPS_RESTART_REGNUM will not be included in the register set. */
1282 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1285 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1286 either be GPR-sized or missing. */
1287 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0;
1290 /* When FRAME is at a syscall instruction, return the PC of the next
1291 instruction to be executed. */
1294 mips_linux_syscall_next_pc (struct frame_info *frame)
1296 CORE_ADDR pc = get_frame_pc (frame);
1297 ULONGEST v0 = get_frame_register_unsigned (frame, MIPS_V0_REGNUM);
1299 /* If we are about to make a sigreturn syscall, use the unwinder to
1300 decode the signal frame. */
1301 if (v0 == MIPS_NR_sigreturn
1302 || v0 == MIPS_NR_rt_sigreturn
1303 || v0 == MIPS_NR_N64_rt_sigreturn
1304 || v0 == MIPS_NR_N32_rt_sigreturn)
1305 return frame_unwind_caller_pc (get_current_frame ());
1310 /* Return the current system call's number present in the
1311 v0 register. When the function fails, it returns -1. */
1314 mips_linux_get_syscall_number (struct gdbarch *gdbarch,
1317 struct regcache *regcache = get_thread_regcache (ptid);
1318 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1319 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1320 int regsize = register_size (gdbarch, MIPS_V0_REGNUM);
1321 /* The content of a register */
1326 /* Make sure we're in a known ABI */
1327 gdb_assert (tdep->mips_abi == MIPS_ABI_O32
1328 || tdep->mips_abi == MIPS_ABI_N32
1329 || tdep->mips_abi == MIPS_ABI_N64);
1331 gdb_assert (regsize <= sizeof (buf));
1333 /* Getting the system call number from the register.
1334 syscall number is in v0 or $2. */
1335 regcache_cooked_read (regcache, MIPS_V0_REGNUM, buf);
1337 ret = extract_signed_integer (buf, regsize, byte_order);
1342 /* Translate signals based on MIPS signal values.
1343 Adapted from gdb/common/signals.c. */
1345 static enum gdb_signal
1346 mips_gdb_signal_from_target (struct gdbarch *gdbarch, int signo)
1351 return GDB_SIGNAL_0;
1353 return GDB_SIGNAL_HUP;
1355 return GDB_SIGNAL_INT;
1357 return GDB_SIGNAL_QUIT;
1359 return GDB_SIGNAL_ILL;
1361 return GDB_SIGNAL_TRAP;
1363 return GDB_SIGNAL_ABRT;
1365 return GDB_SIGNAL_EMT;
1367 return GDB_SIGNAL_FPE;
1369 return GDB_SIGNAL_KILL;
1371 return GDB_SIGNAL_BUS;
1373 return GDB_SIGNAL_SEGV;
1375 return GDB_SIGNAL_SYS;
1377 return GDB_SIGNAL_PIPE;
1379 return GDB_SIGNAL_ALRM;
1381 return GDB_SIGNAL_TERM;
1383 return GDB_SIGNAL_USR1;
1385 return GDB_SIGNAL_USR2;
1387 return GDB_SIGNAL_CHLD;
1389 return GDB_SIGNAL_PWR;
1391 return GDB_SIGNAL_WINCH;
1393 return GDB_SIGNAL_URG;
1395 return GDB_SIGNAL_POLL;
1397 return GDB_SIGNAL_STOP;
1399 return GDB_SIGNAL_TSTP;
1401 return GDB_SIGNAL_CONT;
1403 return GDB_SIGNAL_TTIN;
1405 return GDB_SIGNAL_TTOU;
1406 case MIPS_SIGVTALRM:
1407 return GDB_SIGNAL_VTALRM;
1409 return GDB_SIGNAL_PROF;
1411 return GDB_SIGNAL_XCPU;
1413 return GDB_SIGNAL_XFSZ;
1416 if (signo >= MIPS_SIGRTMIN && signo <= MIPS_SIGRTMAX)
1418 /* GDB_SIGNAL_REALTIME values are not contiguous, map parts of
1419 the MIPS block to the respective GDB_SIGNAL_REALTIME blocks. */
1420 signo -= MIPS_SIGRTMIN;
1422 return GDB_SIGNAL_REALTIME_32;
1423 else if (signo < 32)
1424 return ((enum gdb_signal) (signo - 1 + (int) GDB_SIGNAL_REALTIME_33));
1426 return ((enum gdb_signal) (signo - 32 + (int) GDB_SIGNAL_REALTIME_64));
1429 return GDB_SIGNAL_UNKNOWN;
1432 /* Initialize one of the GNU/Linux OS ABIs. */
1435 mips_linux_init_abi (struct gdbarch_info info,
1436 struct gdbarch *gdbarch)
1438 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1439 enum mips_abi abi = mips_abi (gdbarch);
1440 struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info;
1442 linux_init_abi (info, gdbarch);
1444 /* Get the syscall number from the arch's register. */
1445 set_gdbarch_get_syscall_number (gdbarch, mips_linux_get_syscall_number);
1450 set_gdbarch_get_longjmp_target (gdbarch,
1451 mips_linux_get_longjmp_target);
1452 set_solib_svr4_fetch_link_map_offsets
1453 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1454 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1455 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
1456 set_xml_syscall_file_name ("syscalls/mips-o32-linux.xml");
1459 set_gdbarch_get_longjmp_target (gdbarch,
1460 mips_linux_get_longjmp_target);
1461 set_solib_svr4_fetch_link_map_offsets
1462 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1463 set_gdbarch_long_double_bit (gdbarch, 128);
1464 /* These floatformats should probably be renamed. MIPS uses
1465 the same 128-bit IEEE floating point format that IA-64 uses,
1466 except that the quiet/signalling NaN bit is reversed (GDB
1467 does not distinguish between quiet and signalling NaNs). */
1468 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1469 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
1470 set_xml_syscall_file_name ("syscalls/mips-n32-linux.xml");
1473 set_gdbarch_get_longjmp_target (gdbarch,
1474 mips64_linux_get_longjmp_target);
1475 set_solib_svr4_fetch_link_map_offsets
1476 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1477 set_gdbarch_long_double_bit (gdbarch, 128);
1478 /* These floatformats should probably be renamed. MIPS uses
1479 the same 128-bit IEEE floating point format that IA-64 uses,
1480 except that the quiet/signalling NaN bit is reversed (GDB
1481 does not distinguish between quiet and signalling NaNs). */
1482 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1483 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
1484 set_xml_syscall_file_name ("syscalls/mips-n64-linux.xml");
1490 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1492 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
1494 /* Enable TLS support. */
1495 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1496 svr4_fetch_objfile_link_map);
1498 /* Initialize this lazily, to avoid an initialization order
1499 dependency on solib-svr4.c's _initialize routine. */
1500 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL)
1502 mips_svr4_so_ops = svr4_so_ops;
1503 mips_svr4_so_ops.in_dynsym_resolve_code
1504 = mips_linux_in_dynsym_resolve_code;
1506 set_solib_ops (gdbarch, &mips_svr4_so_ops);
1508 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc);
1510 set_gdbarch_core_read_description (gdbarch,
1511 mips_linux_core_read_description);
1513 set_gdbarch_regset_from_core_section (gdbarch,
1514 mips_linux_regset_from_core_section);
1516 set_gdbarch_gdb_signal_from_target (gdbarch,
1517 mips_gdb_signal_from_target);
1519 tdep->syscall_next_pc = mips_linux_syscall_next_pc;
1523 const struct tdesc_feature *feature;
1525 /* If we have target-described registers, then we can safely
1526 reserve a number for MIPS_RESTART_REGNUM (whether it is
1527 described or not). */
1528 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM);
1529 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1530 set_gdbarch_num_pseudo_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1532 /* If it's present, then assign it to the reserved number. */
1533 feature = tdesc_find_feature (info.target_desc,
1534 "org.gnu.gdb.mips.linux");
1535 if (feature != NULL)
1536 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM,
1541 /* Provide a prototype to silence -Wmissing-prototypes. */
1542 extern initialize_file_ftype _initialize_mips_linux_tdep;
1545 _initialize_mips_linux_tdep (void)
1547 const struct bfd_arch_info *arch_info;
1549 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1551 arch_info = arch_info->next)
1553 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1555 mips_linux_init_abi);