1 /* Target-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2014 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "solib-svr4.h"
25 #include "mips-tdep.h"
27 #include "gdb_assert.h"
30 #include "trad-frame.h"
31 #include "tramp-frame.h"
37 #include "target-descriptions.h"
39 #include "mips-linux-tdep.h"
40 #include "glibc-tdep.h"
41 #include "linux-tdep.h"
42 #include "xml-syscall.h"
43 #include "gdb_signals.h"
45 static struct target_so_ops mips_svr4_so_ops;
47 /* This enum represents the signals' numbers on the MIPS
48 architecture. It just contains the signal definitions which are
49 different from the generic implementation.
51 It is derived from the file <arch/mips/include/uapi/asm/signal.h>,
52 from the Linux kernel tree. */
56 MIPS_LINUX_SIGEMT = 7,
57 MIPS_LINUX_SIGBUS = 10,
58 MIPS_LINUX_SIGSYS = 12,
59 MIPS_LINUX_SIGUSR1 = 16,
60 MIPS_LINUX_SIGUSR2 = 17,
61 MIPS_LINUX_SIGCHLD = 18,
62 MIPS_LINUX_SIGCLD = MIPS_LINUX_SIGCHLD,
63 MIPS_LINUX_SIGPWR = 19,
64 MIPS_LINUX_SIGWINCH = 20,
65 MIPS_LINUX_SIGURG = 21,
66 MIPS_LINUX_SIGIO = 22,
67 MIPS_LINUX_SIGPOLL = MIPS_LINUX_SIGIO,
68 MIPS_LINUX_SIGSTOP = 23,
69 MIPS_LINUX_SIGTSTP = 24,
70 MIPS_LINUX_SIGCONT = 25,
71 MIPS_LINUX_SIGTTIN = 26,
72 MIPS_LINUX_SIGTTOU = 27,
73 MIPS_LINUX_SIGVTALRM = 28,
74 MIPS_LINUX_SIGPROF = 29,
75 MIPS_LINUX_SIGXCPU = 30,
76 MIPS_LINUX_SIGXFSZ = 31,
78 MIPS_LINUX_SIGRTMIN = 32,
79 MIPS_LINUX_SIGRT64 = 64,
80 MIPS_LINUX_SIGRTMAX = 127,
83 /* Figure out where the longjmp will land.
84 We expect the first arg to be a pointer to the jmp_buf structure
85 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
86 at. The pc is copied into PC. This routine returns 1 on
89 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
90 #define MIPS_LINUX_JB_PC 0
93 mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
96 struct gdbarch *gdbarch = get_frame_arch (frame);
97 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
98 gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
100 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
102 if (target_read_memory ((jb_addr
103 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE),
104 buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
107 *pc = extract_unsigned_integer (buf,
108 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
114 /* Transform the bits comprising a 32-bit register to the right size
115 for regcache_raw_supply(). This is needed when mips_isa_regsize()
119 supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
121 struct gdbarch *gdbarch = get_regcache_arch (regcache);
122 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
123 gdb_byte buf[MAX_REGISTER_SIZE];
124 store_signed_integer (buf, register_size (gdbarch, regnum), byte_order,
125 extract_signed_integer (addr, 4, byte_order));
126 regcache_raw_supply (regcache, regnum, buf);
129 /* Unpack an elf_gregset_t into GDB's register cache. */
132 mips_supply_gregset (struct regcache *regcache,
133 const mips_elf_gregset_t *gregsetp)
136 const mips_elf_greg_t *regp = *gregsetp;
137 char zerobuf[MAX_REGISTER_SIZE];
138 struct gdbarch *gdbarch = get_regcache_arch (regcache);
140 memset (zerobuf, 0, MAX_REGISTER_SIZE);
142 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
143 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
145 if (mips_linux_restart_reg_p (gdbarch))
146 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0);
148 supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO);
149 supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI);
151 supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc,
153 supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
154 regp + EF_CP0_BADVADDR);
155 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
156 supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause,
157 regp + EF_CP0_CAUSE);
159 /* Fill the inaccessible zero register with zero. */
160 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
164 mips_supply_gregset_wrapper (const struct regset *regset,
165 struct regcache *regcache,
166 int regnum, const void *gregs, size_t len)
168 gdb_assert (len == sizeof (mips_elf_gregset_t));
170 mips_supply_gregset (regcache, (const mips_elf_gregset_t *)gregs);
173 /* Pack our registers (or one register) into an elf_gregset_t. */
176 mips_fill_gregset (const struct regcache *regcache,
177 mips_elf_gregset_t *gregsetp, int regno)
179 struct gdbarch *gdbarch = get_regcache_arch (regcache);
181 mips_elf_greg_t *regp = *gregsetp;
186 memset (regp, 0, sizeof (mips_elf_gregset_t));
187 for (regi = 1; regi < 32; regi++)
188 mips_fill_gregset (regcache, gregsetp, regi);
189 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
190 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
191 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
192 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
193 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
194 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
195 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
199 if (regno > 0 && regno < 32)
201 dst = regp + regno + EF_REG0;
202 regcache_raw_collect (regcache, regno, dst);
206 if (regno == mips_regnum (gdbarch)->lo)
208 else if (regno == mips_regnum (gdbarch)->hi)
210 else if (regno == mips_regnum (gdbarch)->pc)
211 regaddr = EF_CP0_EPC;
212 else if (regno == mips_regnum (gdbarch)->badvaddr)
213 regaddr = EF_CP0_BADVADDR;
214 else if (regno == MIPS_PS_REGNUM)
215 regaddr = EF_CP0_STATUS;
216 else if (regno == mips_regnum (gdbarch)->cause)
217 regaddr = EF_CP0_CAUSE;
218 else if (mips_linux_restart_reg_p (gdbarch)
219 && regno == MIPS_RESTART_REGNUM)
226 dst = regp + regaddr;
227 regcache_raw_collect (regcache, regno, dst);
232 mips_fill_gregset_wrapper (const struct regset *regset,
233 const struct regcache *regcache,
234 int regnum, void *gregs, size_t len)
236 gdb_assert (len == sizeof (mips_elf_gregset_t));
238 mips_fill_gregset (regcache, (mips_elf_gregset_t *)gregs, regnum);
241 /* Likewise, unpack an elf_fpregset_t. */
244 mips_supply_fpregset (struct regcache *regcache,
245 const mips_elf_fpregset_t *fpregsetp)
247 struct gdbarch *gdbarch = get_regcache_arch (regcache);
249 char zerobuf[MAX_REGISTER_SIZE];
251 memset (zerobuf, 0, MAX_REGISTER_SIZE);
253 for (regi = 0; regi < 32; regi++)
254 regcache_raw_supply (regcache,
255 gdbarch_fp0_regnum (gdbarch) + regi,
258 regcache_raw_supply (regcache,
259 mips_regnum (gdbarch)->fp_control_status,
262 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
263 regcache_raw_supply (regcache,
264 mips_regnum (gdbarch)->fp_implementation_revision,
269 mips_supply_fpregset_wrapper (const struct regset *regset,
270 struct regcache *regcache,
271 int regnum, const void *gregs, size_t len)
273 gdb_assert (len == sizeof (mips_elf_fpregset_t));
275 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *)gregs);
278 /* Likewise, pack one or all floating point registers into an
282 mips_fill_fpregset (const struct regcache *regcache,
283 mips_elf_fpregset_t *fpregsetp, int regno)
285 struct gdbarch *gdbarch = get_regcache_arch (regcache);
288 if ((regno >= gdbarch_fp0_regnum (gdbarch))
289 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
291 to = (char *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch));
292 regcache_raw_collect (regcache, regno, to);
294 else if (regno == mips_regnum (gdbarch)->fp_control_status)
296 to = (char *) (*fpregsetp + 32);
297 regcache_raw_collect (regcache, regno, to);
299 else if (regno == -1)
303 for (regi = 0; regi < 32; regi++)
304 mips_fill_fpregset (regcache, fpregsetp,
305 gdbarch_fp0_regnum (gdbarch) + regi);
306 mips_fill_fpregset (regcache, fpregsetp,
307 mips_regnum (gdbarch)->fp_control_status);
312 mips_fill_fpregset_wrapper (const struct regset *regset,
313 const struct regcache *regcache,
314 int regnum, void *gregs, size_t len)
316 gdb_assert (len == sizeof (mips_elf_fpregset_t));
318 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *)gregs, regnum);
321 /* Support for 64-bit ABIs. */
323 /* Figure out where the longjmp will land.
324 We expect the first arg to be a pointer to the jmp_buf structure
325 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
326 at. The pc is copied into PC. This routine returns 1 on
329 /* Details about jmp_buf. */
331 #define MIPS64_LINUX_JB_PC 0
334 mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
337 struct gdbarch *gdbarch = get_frame_arch (frame);
338 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
339 void *buf = alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
340 int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8;
342 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
344 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
346 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
349 *pc = extract_unsigned_integer (buf,
350 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
356 /* Register set support functions. These operate on standard 64-bit
357 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
358 target will still use the 64-bit format for PTRACE_GETREGS. */
360 /* Supply a 64-bit register. */
363 supply_64bit_reg (struct regcache *regcache, int regnum,
366 struct gdbarch *gdbarch = get_regcache_arch (regcache);
367 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
368 && register_size (gdbarch, regnum) == 4)
369 regcache_raw_supply (regcache, regnum, buf + 4);
371 regcache_raw_supply (regcache, regnum, buf);
374 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
377 mips64_supply_gregset (struct regcache *regcache,
378 const mips64_elf_gregset_t *gregsetp)
381 const mips64_elf_greg_t *regp = *gregsetp;
382 gdb_byte zerobuf[MAX_REGISTER_SIZE];
383 struct gdbarch *gdbarch = get_regcache_arch (regcache);
385 memset (zerobuf, 0, MAX_REGISTER_SIZE);
387 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
388 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
389 (const gdb_byte *) (regp + regi));
391 if (mips_linux_restart_reg_p (gdbarch))
392 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM,
393 (const gdb_byte *) (regp + MIPS64_EF_REG0));
395 supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo,
396 (const gdb_byte *) (regp + MIPS64_EF_LO));
397 supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi,
398 (const gdb_byte *) (regp + MIPS64_EF_HI));
400 supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc,
401 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
402 supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
403 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
404 supply_64bit_reg (regcache, MIPS_PS_REGNUM,
405 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
406 supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause,
407 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
409 /* Fill the inaccessible zero register with zero. */
410 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
414 mips64_supply_gregset_wrapper (const struct regset *regset,
415 struct regcache *regcache,
416 int regnum, const void *gregs, size_t len)
418 gdb_assert (len == sizeof (mips64_elf_gregset_t));
420 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *)gregs);
423 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
426 mips64_fill_gregset (const struct regcache *regcache,
427 mips64_elf_gregset_t *gregsetp, int regno)
429 struct gdbarch *gdbarch = get_regcache_arch (regcache);
430 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
432 mips64_elf_greg_t *regp = *gregsetp;
437 memset (regp, 0, sizeof (mips64_elf_gregset_t));
438 for (regi = 1; regi < 32; regi++)
439 mips64_fill_gregset (regcache, gregsetp, regi);
440 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
441 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
442 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
443 mips64_fill_gregset (regcache, gregsetp,
444 mips_regnum (gdbarch)->badvaddr);
445 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
446 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
447 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
451 if (regno > 0 && regno < 32)
452 regaddr = regno + MIPS64_EF_REG0;
453 else if (regno == mips_regnum (gdbarch)->lo)
454 regaddr = MIPS64_EF_LO;
455 else if (regno == mips_regnum (gdbarch)->hi)
456 regaddr = MIPS64_EF_HI;
457 else if (regno == mips_regnum (gdbarch)->pc)
458 regaddr = MIPS64_EF_CP0_EPC;
459 else if (regno == mips_regnum (gdbarch)->badvaddr)
460 regaddr = MIPS64_EF_CP0_BADVADDR;
461 else if (regno == MIPS_PS_REGNUM)
462 regaddr = MIPS64_EF_CP0_STATUS;
463 else if (regno == mips_regnum (gdbarch)->cause)
464 regaddr = MIPS64_EF_CP0_CAUSE;
465 else if (mips_linux_restart_reg_p (gdbarch)
466 && regno == MIPS_RESTART_REGNUM)
467 regaddr = MIPS64_EF_REG0;
473 gdb_byte buf[MAX_REGISTER_SIZE];
476 regcache_raw_collect (regcache, regno, buf);
477 val = extract_signed_integer (buf, register_size (gdbarch, regno),
479 dst = regp + regaddr;
480 store_signed_integer (dst, 8, byte_order, val);
485 mips64_fill_gregset_wrapper (const struct regset *regset,
486 const struct regcache *regcache,
487 int regnum, void *gregs, size_t len)
489 gdb_assert (len == sizeof (mips64_elf_gregset_t));
491 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *)gregs, regnum);
494 /* Likewise, unpack an elf_fpregset_t. */
497 mips64_supply_fpregset (struct regcache *regcache,
498 const mips64_elf_fpregset_t *fpregsetp)
500 struct gdbarch *gdbarch = get_regcache_arch (regcache);
503 /* See mips_linux_o32_sigframe_init for a description of the
504 peculiar FP register layout. */
505 if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4)
506 for (regi = 0; regi < 32; regi++)
508 const gdb_byte *reg_ptr
509 = (const gdb_byte *) (*fpregsetp + (regi & ~1));
510 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
512 regcache_raw_supply (regcache,
513 gdbarch_fp0_regnum (gdbarch) + regi,
517 for (regi = 0; regi < 32; regi++)
518 regcache_raw_supply (regcache,
519 gdbarch_fp0_regnum (gdbarch) + regi,
520 (const char *) (*fpregsetp + regi));
522 supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status,
523 (const gdb_byte *) (*fpregsetp + 32));
525 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
526 include it - but the result of PTRACE_GETFPREGS does. The best we
527 can do is to assume that its value is present. */
528 supply_32bit_reg (regcache,
529 mips_regnum (gdbarch)->fp_implementation_revision,
530 (const gdb_byte *) (*fpregsetp + 32) + 4);
534 mips64_supply_fpregset_wrapper (const struct regset *regset,
535 struct regcache *regcache,
536 int regnum, const void *gregs, size_t len)
538 gdb_assert (len == sizeof (mips64_elf_fpregset_t));
540 mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *)gregs);
543 /* Likewise, pack one or all floating point registers into an
547 mips64_fill_fpregset (const struct regcache *regcache,
548 mips64_elf_fpregset_t *fpregsetp, int regno)
550 struct gdbarch *gdbarch = get_regcache_arch (regcache);
551 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
554 if ((regno >= gdbarch_fp0_regnum (gdbarch))
555 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
557 /* See mips_linux_o32_sigframe_init for a description of the
558 peculiar FP register layout. */
559 if (register_size (gdbarch, regno) == 4)
561 int regi = regno - gdbarch_fp0_regnum (gdbarch);
563 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
564 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
566 regcache_raw_collect (regcache, regno, to);
570 to = (gdb_byte *) (*fpregsetp + regno
571 - gdbarch_fp0_regnum (gdbarch));
572 regcache_raw_collect (regcache, regno, to);
575 else if (regno == mips_regnum (gdbarch)->fp_control_status)
577 gdb_byte buf[MAX_REGISTER_SIZE];
580 regcache_raw_collect (regcache, regno, buf);
581 val = extract_signed_integer (buf, register_size (gdbarch, regno),
583 to = (gdb_byte *) (*fpregsetp + 32);
584 store_signed_integer (to, 4, byte_order, val);
586 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
588 gdb_byte buf[MAX_REGISTER_SIZE];
591 regcache_raw_collect (regcache, regno, buf);
592 val = extract_signed_integer (buf, register_size (gdbarch, regno),
594 to = (gdb_byte *) (*fpregsetp + 32) + 4;
595 store_signed_integer (to, 4, byte_order, val);
597 else if (regno == -1)
601 for (regi = 0; regi < 32; regi++)
602 mips64_fill_fpregset (regcache, fpregsetp,
603 gdbarch_fp0_regnum (gdbarch) + regi);
604 mips64_fill_fpregset (regcache, fpregsetp,
605 mips_regnum (gdbarch)->fp_control_status);
606 mips64_fill_fpregset (regcache, fpregsetp,
607 mips_regnum (gdbarch)->fp_implementation_revision);
612 mips64_fill_fpregset_wrapper (const struct regset *regset,
613 const struct regcache *regcache,
614 int regnum, void *gregs, size_t len)
616 gdb_assert (len == sizeof (mips64_elf_fpregset_t));
618 mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *)gregs, regnum);
621 static const struct regset *
622 mips_linux_regset_from_core_section (struct gdbarch *gdbarch,
623 const char *sect_name, size_t sect_size)
625 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
626 mips_elf_gregset_t gregset;
627 mips_elf_fpregset_t fpregset;
628 mips64_elf_gregset_t gregset64;
629 mips64_elf_fpregset_t fpregset64;
631 if (strcmp (sect_name, ".reg") == 0)
633 if (sect_size == sizeof (gregset))
635 if (tdep->gregset == NULL)
636 tdep->gregset = regset_alloc (gdbarch,
637 mips_supply_gregset_wrapper,
638 mips_fill_gregset_wrapper);
639 return tdep->gregset;
641 else if (sect_size == sizeof (gregset64))
643 if (tdep->gregset64 == NULL)
644 tdep->gregset64 = regset_alloc (gdbarch,
645 mips64_supply_gregset_wrapper,
646 mips64_fill_gregset_wrapper);
647 return tdep->gregset64;
651 warning (_("wrong size gregset struct in core file"));
654 else if (strcmp (sect_name, ".reg2") == 0)
656 if (sect_size == sizeof (fpregset))
658 if (tdep->fpregset == NULL)
659 tdep->fpregset = regset_alloc (gdbarch,
660 mips_supply_fpregset_wrapper,
661 mips_fill_fpregset_wrapper);
662 return tdep->fpregset;
664 else if (sect_size == sizeof (fpregset64))
666 if (tdep->fpregset64 == NULL)
667 tdep->fpregset64 = regset_alloc (gdbarch,
668 mips64_supply_fpregset_wrapper,
669 mips64_fill_fpregset_wrapper);
670 return tdep->fpregset64;
674 warning (_("wrong size fpregset struct in core file"));
681 static const struct target_desc *
682 mips_linux_core_read_description (struct gdbarch *gdbarch,
683 struct target_ops *target,
686 asection *section = bfd_get_section_by_name (abfd, ".reg");
690 switch (bfd_section_size (abfd, section))
692 case sizeof (mips_elf_gregset_t):
693 return mips_tdesc_gp32;
695 case sizeof (mips64_elf_gregset_t):
696 return mips_tdesc_gp64;
704 /* Check the code at PC for a dynamic linker lazy resolution stub.
705 GNU ld for MIPS has put lazy resolution stubs into a ".MIPS.stubs"
706 section uniformly since version 2.15. If the pc is in that section,
707 then we are in such a stub. Before that ".stub" was used in 32-bit
708 ELF binaries, however we do not bother checking for that since we
709 have never had and that case should be extremely rare these days.
710 Instead we pattern-match on the code generated by GNU ld. They look
718 (with the appropriate doubleword instructions for N64). As any lazy
719 resolution stubs in microMIPS binaries will always be in a
720 ".MIPS.stubs" section we only ever verify standard MIPS patterns. */
723 mips_linux_in_dynsym_stub (CORE_ADDR pc)
725 gdb_byte buf[28], *p;
726 ULONGEST insn, insn1;
727 int n64 = (mips_abi (target_gdbarch ()) == MIPS_ABI_N64);
728 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
730 if (in_mips_stubs_section (pc))
733 read_memory (pc - 12, buf, 28);
737 /* ld t9,0x8010(gp) */
742 /* lw t9,0x8010(gp) */
749 insn = extract_unsigned_integer (p, 4, byte_order);
757 insn = extract_unsigned_integer (p + 4, 4, byte_order);
761 if (insn != 0x03e0782d)
767 if (insn != 0x03e07821)
771 insn = extract_unsigned_integer (p + 8, 4, byte_order);
773 if (insn != 0x0320f809)
776 insn = extract_unsigned_integer (p + 12, 4, byte_order);
779 /* daddiu t8,zero,0 */
780 if ((insn & 0xffff0000) != 0x64180000)
785 /* addiu t8,zero,0 */
786 if ((insn & 0xffff0000) != 0x24180000)
793 /* Return non-zero iff PC belongs to the dynamic linker resolution
794 code, a PLT entry, or a lazy binding stub. */
797 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
799 /* Check whether PC is in the dynamic linker. This also checks
800 whether it is in the .plt section, used by non-PIC executables. */
801 if (svr4_in_dynsym_resolve_code (pc))
804 /* Likewise for the stubs. They live in the .MIPS.stubs section these
805 days, so we check if the PC is within, than fall back to a pattern
807 if (mips_linux_in_dynsym_stub (pc))
813 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
814 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
815 implementation of this triggers at "fixup" from the same objfile as
816 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
817 "__dl_runtime_resolve" directly. An unresolved lazy binding
818 stub will point to _dl_runtime_resolve, which will first call
819 __dl_runtime_resolve, and then pass control to the resolved
823 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
825 struct bound_minimal_symbol resolver;
827 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
829 if (resolver.minsym && BMSYMBOL_VALUE_ADDRESS (resolver) == pc)
830 return frame_unwind_caller_pc (get_current_frame ());
832 return glibc_skip_solib_resolver (gdbarch, pc);
835 /* Signal trampoline support. There are four supported layouts for a
836 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
837 n64 rt_sigframe. We handle them all independently; not the most
838 efficient way, but simplest. First, declare all the unwinders. */
840 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
841 struct frame_info *this_frame,
842 struct trad_frame_cache *this_cache,
845 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
846 struct frame_info *this_frame,
847 struct trad_frame_cache *this_cache,
850 #define MIPS_NR_LINUX 4000
851 #define MIPS_NR_N64_LINUX 5000
852 #define MIPS_NR_N32_LINUX 6000
854 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
855 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
856 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
857 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
859 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
860 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
861 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
862 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
863 #define MIPS_INST_SYSCALL 0x0000000c
865 static const struct tramp_frame mips_linux_o32_sigframe = {
869 { MIPS_INST_LI_V0_SIGRETURN, -1 },
870 { MIPS_INST_SYSCALL, -1 },
871 { TRAMP_SENTINEL_INSN, -1 }
873 mips_linux_o32_sigframe_init
876 static const struct tramp_frame mips_linux_o32_rt_sigframe = {
880 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
881 { MIPS_INST_SYSCALL, -1 },
882 { TRAMP_SENTINEL_INSN, -1 } },
883 mips_linux_o32_sigframe_init
886 static const struct tramp_frame mips_linux_n32_rt_sigframe = {
890 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
891 { MIPS_INST_SYSCALL, -1 },
892 { TRAMP_SENTINEL_INSN, -1 }
894 mips_linux_n32n64_sigframe_init
897 static const struct tramp_frame mips_linux_n64_rt_sigframe = {
901 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
902 { MIPS_INST_SYSCALL, -1 },
903 { TRAMP_SENTINEL_INSN, -1 }
905 mips_linux_n32n64_sigframe_init
909 /* The unwinder for o32 signal frames. The legacy structures look
913 u32 sf_ass[4]; [argument save space for o32]
914 u32 sf_code[2]; [signal trampoline or fill]
915 struct sigcontext sf_sc;
919 Pre-2.6.12 sigcontext:
922 unsigned int sc_regmask; [Unused]
923 unsigned int sc_status;
924 unsigned long long sc_pc;
925 unsigned long long sc_regs[32];
926 unsigned long long sc_fpregs[32];
927 unsigned int sc_ownedfp;
928 unsigned int sc_fpc_csr;
929 unsigned int sc_fpc_eir; [Unused]
930 unsigned int sc_used_math;
931 unsigned int sc_ssflags; [Unused]
932 [Alignment hole of four bytes]
933 unsigned long long sc_mdhi;
934 unsigned long long sc_mdlo;
936 unsigned int sc_cause; [Unused]
937 unsigned int sc_badvaddr; [Unused]
939 unsigned long sc_sigset[4]; [kernel's sigset_t]
942 Post-2.6.12 sigcontext (SmartMIPS/DSP support added):
945 unsigned int sc_regmask; [Unused]
946 unsigned int sc_status; [Unused]
947 unsigned long long sc_pc;
948 unsigned long long sc_regs[32];
949 unsigned long long sc_fpregs[32];
951 unsigned int sc_fpc_csr;
952 unsigned int sc_fpc_eir; [Unused]
953 unsigned int sc_used_math;
955 [Alignment hole of four bytes]
956 unsigned long long sc_mdhi;
957 unsigned long long sc_mdlo;
958 unsigned long sc_hi1;
959 unsigned long sc_lo1;
960 unsigned long sc_hi2;
961 unsigned long sc_lo2;
962 unsigned long sc_hi3;
963 unsigned long sc_lo3;
966 The RT signal frames look like this:
969 u32 rs_ass[4]; [argument save space for o32]
970 u32 rs_code[2] [signal trampoline or fill]
971 struct siginfo rs_info;
972 struct ucontext rs_uc;
976 unsigned long uc_flags;
977 struct ucontext *uc_link;
979 [Alignment hole of four bytes]
980 struct sigcontext uc_mcontext;
985 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
987 #define RTSIGFRAME_SIGINFO_SIZE 128
988 #define STACK_T_SIZE (3 * 4)
989 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
990 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
991 + RTSIGFRAME_SIGINFO_SIZE \
992 + UCONTEXT_SIGCONTEXT_OFFSET)
994 #define SIGCONTEXT_PC (1 * 8)
995 #define SIGCONTEXT_REGS (2 * 8)
996 #define SIGCONTEXT_FPREGS (34 * 8)
997 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
998 #define SIGCONTEXT_DSPCTL (68 * 8 + 0)
999 #define SIGCONTEXT_HI (69 * 8)
1000 #define SIGCONTEXT_LO (70 * 8)
1001 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
1002 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
1003 #define SIGCONTEXT_HI1 (71 * 8 + 0)
1004 #define SIGCONTEXT_LO1 (71 * 8 + 4)
1005 #define SIGCONTEXT_HI2 (72 * 8 + 0)
1006 #define SIGCONTEXT_LO2 (72 * 8 + 4)
1007 #define SIGCONTEXT_HI3 (73 * 8 + 0)
1008 #define SIGCONTEXT_LO3 (73 * 8 + 4)
1010 #define SIGCONTEXT_REG_SIZE 8
1013 mips_linux_o32_sigframe_init (const struct tramp_frame *self,
1014 struct frame_info *this_frame,
1015 struct trad_frame_cache *this_cache,
1018 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1020 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1021 CORE_ADDR sigcontext_base;
1022 const struct mips_regnum *regs = mips_regnum (gdbarch);
1023 CORE_ADDR regs_base;
1025 if (self == &mips_linux_o32_sigframe)
1026 sigcontext_base = frame_sp + SIGFRAME_SIGCONTEXT_OFFSET;
1028 sigcontext_base = frame_sp + RTSIGFRAME_SIGCONTEXT_OFFSET;
1030 /* I'm not proud of this hack. Eventually we will have the
1031 infrastructure to indicate the size of saved registers on a
1032 per-frame basis, but right now we don't; the kernel saves eight
1033 bytes but we only want four. Use regs_base to access any
1035 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1036 regs_base = sigcontext_base + 4;
1038 regs_base = sigcontext_base;
1040 if (mips_linux_restart_reg_p (gdbarch))
1041 trad_frame_set_reg_addr (this_cache,
1042 (MIPS_RESTART_REGNUM
1043 + gdbarch_num_regs (gdbarch)),
1044 regs_base + SIGCONTEXT_REGS);
1046 for (ireg = 1; ireg < 32; ireg++)
1047 trad_frame_set_reg_addr (this_cache,
1048 (ireg + MIPS_ZERO_REGNUM
1049 + gdbarch_num_regs (gdbarch)),
1050 (regs_base + SIGCONTEXT_REGS
1051 + ireg * SIGCONTEXT_REG_SIZE));
1053 /* The way that floating point registers are saved, unfortunately,
1054 depends on the architecture the kernel is built for. For the r3000 and
1055 tx39, four bytes of each register are at the beginning of each of the
1056 32 eight byte slots. For everything else, the registers are saved
1057 using double precision; only the even-numbered slots are initialized,
1058 and the high bits are the odd-numbered register. Assume the latter
1059 layout, since we can't tell, and it's much more common. Which bits are
1060 the "high" bits depends on endianness. */
1061 for (ireg = 0; ireg < 32; ireg++)
1062 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
1063 trad_frame_set_reg_addr (this_cache,
1064 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1065 (sigcontext_base + SIGCONTEXT_FPREGS + 4
1066 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1068 trad_frame_set_reg_addr (this_cache,
1069 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1070 (sigcontext_base + SIGCONTEXT_FPREGS
1071 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1073 trad_frame_set_reg_addr (this_cache,
1074 regs->pc + gdbarch_num_regs (gdbarch),
1075 regs_base + SIGCONTEXT_PC);
1077 trad_frame_set_reg_addr (this_cache,
1078 (regs->fp_control_status
1079 + gdbarch_num_regs (gdbarch)),
1080 sigcontext_base + SIGCONTEXT_FPCSR);
1082 if (regs->dspctl != -1)
1083 trad_frame_set_reg_addr (this_cache,
1084 regs->dspctl + gdbarch_num_regs (gdbarch),
1085 sigcontext_base + SIGCONTEXT_DSPCTL);
1087 trad_frame_set_reg_addr (this_cache,
1088 regs->hi + gdbarch_num_regs (gdbarch),
1089 regs_base + SIGCONTEXT_HI);
1090 trad_frame_set_reg_addr (this_cache,
1091 regs->lo + gdbarch_num_regs (gdbarch),
1092 regs_base + SIGCONTEXT_LO);
1094 if (regs->dspacc != -1)
1096 trad_frame_set_reg_addr (this_cache,
1097 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1098 sigcontext_base + SIGCONTEXT_HI1);
1099 trad_frame_set_reg_addr (this_cache,
1100 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1101 sigcontext_base + SIGCONTEXT_LO1);
1102 trad_frame_set_reg_addr (this_cache,
1103 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1104 sigcontext_base + SIGCONTEXT_HI2);
1105 trad_frame_set_reg_addr (this_cache,
1106 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1107 sigcontext_base + SIGCONTEXT_LO2);
1108 trad_frame_set_reg_addr (this_cache,
1109 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1110 sigcontext_base + SIGCONTEXT_HI3);
1111 trad_frame_set_reg_addr (this_cache,
1112 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1113 sigcontext_base + SIGCONTEXT_LO3);
1117 trad_frame_set_reg_addr (this_cache,
1118 regs->cause + gdbarch_num_regs (gdbarch),
1119 sigcontext_base + SIGCONTEXT_CAUSE);
1120 trad_frame_set_reg_addr (this_cache,
1121 regs->badvaddr + gdbarch_num_regs (gdbarch),
1122 sigcontext_base + SIGCONTEXT_BADVADDR);
1125 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1126 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1130 /* For N32/N64 things look different. There is no non-rt signal frame.
1132 struct rt_sigframe_n32 {
1133 u32 rs_ass[4]; [ argument save space for o32 ]
1134 u32 rs_code[2]; [ signal trampoline or fill ]
1135 struct siginfo rs_info;
1136 struct ucontextn32 rs_uc;
1139 struct ucontextn32 {
1143 struct sigcontext uc_mcontext;
1144 sigset_t uc_sigmask; [ mask last for extensibility ]
1147 struct rt_sigframe {
1148 u32 rs_ass[4]; [ argument save space for o32 ]
1149 u32 rs_code[2]; [ signal trampoline ]
1150 struct siginfo rs_info;
1151 struct ucontext rs_uc;
1155 unsigned long uc_flags;
1156 struct ucontext *uc_link;
1158 struct sigcontext uc_mcontext;
1159 sigset_t uc_sigmask; [ mask last for extensibility ]
1162 And the sigcontext is different (this is for both n32 and n64):
1165 unsigned long long sc_regs[32];
1166 unsigned long long sc_fpregs[32];
1167 unsigned long long sc_mdhi;
1168 unsigned long long sc_hi1;
1169 unsigned long long sc_hi2;
1170 unsigned long long sc_hi3;
1171 unsigned long long sc_mdlo;
1172 unsigned long long sc_lo1;
1173 unsigned long long sc_lo2;
1174 unsigned long long sc_lo3;
1175 unsigned long long sc_pc;
1176 unsigned int sc_fpc_csr;
1177 unsigned int sc_used_math;
1178 unsigned int sc_dsp;
1179 unsigned int sc_reserved;
1182 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1183 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1187 #define N32_STACK_T_SIZE STACK_T_SIZE
1188 #define N64_STACK_T_SIZE (2 * 8 + 4)
1189 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1190 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1191 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1192 + RTSIGFRAME_SIGINFO_SIZE \
1193 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1194 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1195 + RTSIGFRAME_SIGINFO_SIZE \
1196 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1198 #define N64_SIGCONTEXT_REGS (0 * 8)
1199 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1200 #define N64_SIGCONTEXT_HI (64 * 8)
1201 #define N64_SIGCONTEXT_HI1 (65 * 8)
1202 #define N64_SIGCONTEXT_HI2 (66 * 8)
1203 #define N64_SIGCONTEXT_HI3 (67 * 8)
1204 #define N64_SIGCONTEXT_LO (68 * 8)
1205 #define N64_SIGCONTEXT_LO1 (69 * 8)
1206 #define N64_SIGCONTEXT_LO2 (70 * 8)
1207 #define N64_SIGCONTEXT_LO3 (71 * 8)
1208 #define N64_SIGCONTEXT_PC (72 * 8)
1209 #define N64_SIGCONTEXT_FPCSR (73 * 8 + 0)
1210 #define N64_SIGCONTEXT_DSPCTL (74 * 8 + 0)
1212 #define N64_SIGCONTEXT_REG_SIZE 8
1215 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
1216 struct frame_info *this_frame,
1217 struct trad_frame_cache *this_cache,
1220 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1222 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1223 CORE_ADDR sigcontext_base;
1224 const struct mips_regnum *regs = mips_regnum (gdbarch);
1226 if (self == &mips_linux_n32_rt_sigframe)
1227 sigcontext_base = frame_sp + N32_SIGFRAME_SIGCONTEXT_OFFSET;
1229 sigcontext_base = frame_sp + N64_SIGFRAME_SIGCONTEXT_OFFSET;
1231 if (mips_linux_restart_reg_p (gdbarch))
1232 trad_frame_set_reg_addr (this_cache,
1233 (MIPS_RESTART_REGNUM
1234 + gdbarch_num_regs (gdbarch)),
1235 sigcontext_base + N64_SIGCONTEXT_REGS);
1237 for (ireg = 1; ireg < 32; ireg++)
1238 trad_frame_set_reg_addr (this_cache,
1239 (ireg + MIPS_ZERO_REGNUM
1240 + gdbarch_num_regs (gdbarch)),
1241 (sigcontext_base + N64_SIGCONTEXT_REGS
1242 + ireg * N64_SIGCONTEXT_REG_SIZE));
1244 for (ireg = 0; ireg < 32; ireg++)
1245 trad_frame_set_reg_addr (this_cache,
1246 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1247 (sigcontext_base + N64_SIGCONTEXT_FPREGS
1248 + ireg * N64_SIGCONTEXT_REG_SIZE));
1250 trad_frame_set_reg_addr (this_cache,
1251 regs->pc + gdbarch_num_regs (gdbarch),
1252 sigcontext_base + N64_SIGCONTEXT_PC);
1254 trad_frame_set_reg_addr (this_cache,
1255 (regs->fp_control_status
1256 + gdbarch_num_regs (gdbarch)),
1257 sigcontext_base + N64_SIGCONTEXT_FPCSR);
1259 trad_frame_set_reg_addr (this_cache,
1260 regs->hi + gdbarch_num_regs (gdbarch),
1261 sigcontext_base + N64_SIGCONTEXT_HI);
1262 trad_frame_set_reg_addr (this_cache,
1263 regs->lo + gdbarch_num_regs (gdbarch),
1264 sigcontext_base + N64_SIGCONTEXT_LO);
1266 if (regs->dspacc != -1)
1268 trad_frame_set_reg_addr (this_cache,
1269 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1270 sigcontext_base + N64_SIGCONTEXT_HI1);
1271 trad_frame_set_reg_addr (this_cache,
1272 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1273 sigcontext_base + N64_SIGCONTEXT_LO1);
1274 trad_frame_set_reg_addr (this_cache,
1275 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1276 sigcontext_base + N64_SIGCONTEXT_HI2);
1277 trad_frame_set_reg_addr (this_cache,
1278 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1279 sigcontext_base + N64_SIGCONTEXT_LO2);
1280 trad_frame_set_reg_addr (this_cache,
1281 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1282 sigcontext_base + N64_SIGCONTEXT_HI3);
1283 trad_frame_set_reg_addr (this_cache,
1284 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1285 sigcontext_base + N64_SIGCONTEXT_LO3);
1287 if (regs->dspctl != -1)
1288 trad_frame_set_reg_addr (this_cache,
1289 regs->dspctl + gdbarch_num_regs (gdbarch),
1290 sigcontext_base + N64_SIGCONTEXT_DSPCTL);
1292 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1293 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1296 /* Implement the "write_pc" gdbarch method. */
1299 mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1301 struct gdbarch *gdbarch = get_regcache_arch (regcache);
1303 mips_write_pc (regcache, pc);
1305 /* Clear the syscall restart flag. */
1306 if (mips_linux_restart_reg_p (gdbarch))
1307 regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0);
1310 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1313 mips_linux_restart_reg_p (struct gdbarch *gdbarch)
1315 /* If we do not have a target description with registers, then
1316 MIPS_RESTART_REGNUM will not be included in the register set. */
1317 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1320 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1321 either be GPR-sized or missing. */
1322 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0;
1325 /* When FRAME is at a syscall instruction, return the PC of the next
1326 instruction to be executed. */
1329 mips_linux_syscall_next_pc (struct frame_info *frame)
1331 CORE_ADDR pc = get_frame_pc (frame);
1332 ULONGEST v0 = get_frame_register_unsigned (frame, MIPS_V0_REGNUM);
1334 /* If we are about to make a sigreturn syscall, use the unwinder to
1335 decode the signal frame. */
1336 if (v0 == MIPS_NR_sigreturn
1337 || v0 == MIPS_NR_rt_sigreturn
1338 || v0 == MIPS_NR_N64_rt_sigreturn
1339 || v0 == MIPS_NR_N32_rt_sigreturn)
1340 return frame_unwind_caller_pc (get_current_frame ());
1345 /* Return the current system call's number present in the
1346 v0 register. When the function fails, it returns -1. */
1349 mips_linux_get_syscall_number (struct gdbarch *gdbarch,
1352 struct regcache *regcache = get_thread_regcache (ptid);
1353 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1354 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1355 int regsize = register_size (gdbarch, MIPS_V0_REGNUM);
1356 /* The content of a register */
1361 /* Make sure we're in a known ABI */
1362 gdb_assert (tdep->mips_abi == MIPS_ABI_O32
1363 || tdep->mips_abi == MIPS_ABI_N32
1364 || tdep->mips_abi == MIPS_ABI_N64);
1366 gdb_assert (regsize <= sizeof (buf));
1368 /* Getting the system call number from the register.
1369 syscall number is in v0 or $2. */
1370 regcache_cooked_read (regcache, MIPS_V0_REGNUM, buf);
1372 ret = extract_signed_integer (buf, regsize, byte_order);
1377 /* Implementation of `gdbarch_gdb_signal_to_target', as defined in
1381 mips_gdb_signal_to_target (struct gdbarch *gdbarch,
1382 enum gdb_signal signal)
1386 case GDB_SIGNAL_EMT:
1387 return MIPS_LINUX_SIGEMT;
1389 case GDB_SIGNAL_BUS:
1390 return MIPS_LINUX_SIGBUS;
1392 case GDB_SIGNAL_SYS:
1393 return MIPS_LINUX_SIGSYS;
1395 case GDB_SIGNAL_USR1:
1396 return MIPS_LINUX_SIGUSR1;
1398 case GDB_SIGNAL_USR2:
1399 return MIPS_LINUX_SIGUSR2;
1401 case GDB_SIGNAL_CHLD:
1402 return MIPS_LINUX_SIGCHLD;
1404 case GDB_SIGNAL_PWR:
1405 return MIPS_LINUX_SIGPWR;
1407 case GDB_SIGNAL_WINCH:
1408 return MIPS_LINUX_SIGWINCH;
1410 case GDB_SIGNAL_URG:
1411 return MIPS_LINUX_SIGURG;
1414 return MIPS_LINUX_SIGIO;
1416 case GDB_SIGNAL_POLL:
1417 return MIPS_LINUX_SIGPOLL;
1419 case GDB_SIGNAL_STOP:
1420 return MIPS_LINUX_SIGSTOP;
1422 case GDB_SIGNAL_TSTP:
1423 return MIPS_LINUX_SIGTSTP;
1425 case GDB_SIGNAL_CONT:
1426 return MIPS_LINUX_SIGCONT;
1428 case GDB_SIGNAL_TTIN:
1429 return MIPS_LINUX_SIGTTIN;
1431 case GDB_SIGNAL_TTOU:
1432 return MIPS_LINUX_SIGTTOU;
1434 case GDB_SIGNAL_VTALRM:
1435 return MIPS_LINUX_SIGVTALRM;
1437 case GDB_SIGNAL_PROF:
1438 return MIPS_LINUX_SIGPROF;
1440 case GDB_SIGNAL_XCPU:
1441 return MIPS_LINUX_SIGXCPU;
1443 case GDB_SIGNAL_XFSZ:
1444 return MIPS_LINUX_SIGXFSZ;
1446 /* GDB_SIGNAL_REALTIME_32 is not continuous in <gdb/signals.def>,
1447 therefore we have to handle it here. */
1448 case GDB_SIGNAL_REALTIME_32:
1449 return MIPS_LINUX_SIGRTMIN;
1452 if (signal >= GDB_SIGNAL_REALTIME_33
1453 && signal <= GDB_SIGNAL_REALTIME_63)
1455 int offset = signal - GDB_SIGNAL_REALTIME_33;
1457 return MIPS_LINUX_SIGRTMIN + 1 + offset;
1459 else if (signal >= GDB_SIGNAL_REALTIME_64
1460 && signal <= GDB_SIGNAL_REALTIME_127)
1462 int offset = signal - GDB_SIGNAL_REALTIME_64;
1464 return MIPS_LINUX_SIGRT64 + offset;
1467 return linux_gdb_signal_to_target (gdbarch, signal);
1470 /* Translate signals based on MIPS signal values.
1471 Adapted from gdb/common/signals.c. */
1473 static enum gdb_signal
1474 mips_gdb_signal_from_target (struct gdbarch *gdbarch, int signal)
1478 case MIPS_LINUX_SIGEMT:
1479 return GDB_SIGNAL_EMT;
1481 case MIPS_LINUX_SIGBUS:
1482 return GDB_SIGNAL_BUS;
1484 case MIPS_LINUX_SIGSYS:
1485 return GDB_SIGNAL_SYS;
1487 case MIPS_LINUX_SIGUSR1:
1488 return GDB_SIGNAL_USR1;
1490 case MIPS_LINUX_SIGUSR2:
1491 return GDB_SIGNAL_USR2;
1493 case MIPS_LINUX_SIGCHLD:
1494 return GDB_SIGNAL_CHLD;
1496 case MIPS_LINUX_SIGPWR:
1497 return GDB_SIGNAL_PWR;
1499 case MIPS_LINUX_SIGWINCH:
1500 return GDB_SIGNAL_WINCH;
1502 case MIPS_LINUX_SIGURG:
1503 return GDB_SIGNAL_URG;
1505 /* No way to differentiate between SIGIO and SIGPOLL.
1506 Therefore, we just handle the first one. */
1507 case MIPS_LINUX_SIGIO:
1508 return GDB_SIGNAL_IO;
1510 case MIPS_LINUX_SIGSTOP:
1511 return GDB_SIGNAL_STOP;
1513 case MIPS_LINUX_SIGTSTP:
1514 return GDB_SIGNAL_TSTP;
1516 case MIPS_LINUX_SIGCONT:
1517 return GDB_SIGNAL_CONT;
1519 case MIPS_LINUX_SIGTTIN:
1520 return GDB_SIGNAL_TTIN;
1522 case MIPS_LINUX_SIGTTOU:
1523 return GDB_SIGNAL_TTOU;
1525 case MIPS_LINUX_SIGVTALRM:
1526 return GDB_SIGNAL_VTALRM;
1528 case MIPS_LINUX_SIGPROF:
1529 return GDB_SIGNAL_PROF;
1531 case MIPS_LINUX_SIGXCPU:
1532 return GDB_SIGNAL_XCPU;
1534 case MIPS_LINUX_SIGXFSZ:
1535 return GDB_SIGNAL_XFSZ;
1538 if (signal >= MIPS_LINUX_SIGRTMIN && signal <= MIPS_LINUX_SIGRTMAX)
1540 /* GDB_SIGNAL_REALTIME values are not contiguous, map parts of
1541 the MIPS block to the respective GDB_SIGNAL_REALTIME blocks. */
1542 int offset = signal - MIPS_LINUX_SIGRTMIN;
1545 return GDB_SIGNAL_REALTIME_32;
1546 else if (offset < 32)
1547 return (enum gdb_signal) (offset - 1
1548 + (int) GDB_SIGNAL_REALTIME_33);
1550 return (enum gdb_signal) (offset - 32
1551 + (int) GDB_SIGNAL_REALTIME_64);
1554 return linux_gdb_signal_from_target (gdbarch, signal);
1557 /* Initialize one of the GNU/Linux OS ABIs. */
1560 mips_linux_init_abi (struct gdbarch_info info,
1561 struct gdbarch *gdbarch)
1563 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1564 enum mips_abi abi = mips_abi (gdbarch);
1565 struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info;
1567 linux_init_abi (info, gdbarch);
1569 /* Get the syscall number from the arch's register. */
1570 set_gdbarch_get_syscall_number (gdbarch, mips_linux_get_syscall_number);
1575 set_gdbarch_get_longjmp_target (gdbarch,
1576 mips_linux_get_longjmp_target);
1577 set_solib_svr4_fetch_link_map_offsets
1578 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1579 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1580 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
1581 set_xml_syscall_file_name ("syscalls/mips-o32-linux.xml");
1584 set_gdbarch_get_longjmp_target (gdbarch,
1585 mips_linux_get_longjmp_target);
1586 set_solib_svr4_fetch_link_map_offsets
1587 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1588 set_gdbarch_long_double_bit (gdbarch, 128);
1589 /* These floatformats should probably be renamed. MIPS uses
1590 the same 128-bit IEEE floating point format that IA-64 uses,
1591 except that the quiet/signalling NaN bit is reversed (GDB
1592 does not distinguish between quiet and signalling NaNs). */
1593 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1594 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
1595 set_xml_syscall_file_name ("syscalls/mips-n32-linux.xml");
1598 set_gdbarch_get_longjmp_target (gdbarch,
1599 mips64_linux_get_longjmp_target);
1600 set_solib_svr4_fetch_link_map_offsets
1601 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1602 set_gdbarch_long_double_bit (gdbarch, 128);
1603 /* These floatformats should probably be renamed. MIPS uses
1604 the same 128-bit IEEE floating point format that IA-64 uses,
1605 except that the quiet/signalling NaN bit is reversed (GDB
1606 does not distinguish between quiet and signalling NaNs). */
1607 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1608 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
1609 set_xml_syscall_file_name ("syscalls/mips-n64-linux.xml");
1615 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1617 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
1619 /* Enable TLS support. */
1620 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1621 svr4_fetch_objfile_link_map);
1623 /* Initialize this lazily, to avoid an initialization order
1624 dependency on solib-svr4.c's _initialize routine. */
1625 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL)
1627 mips_svr4_so_ops = svr4_so_ops;
1628 mips_svr4_so_ops.in_dynsym_resolve_code
1629 = mips_linux_in_dynsym_resolve_code;
1631 set_solib_ops (gdbarch, &mips_svr4_so_ops);
1633 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc);
1635 set_gdbarch_core_read_description (gdbarch,
1636 mips_linux_core_read_description);
1638 set_gdbarch_regset_from_core_section (gdbarch,
1639 mips_linux_regset_from_core_section);
1641 set_gdbarch_gdb_signal_from_target (gdbarch,
1642 mips_gdb_signal_from_target);
1644 set_gdbarch_gdb_signal_to_target (gdbarch,
1645 mips_gdb_signal_to_target);
1647 tdep->syscall_next_pc = mips_linux_syscall_next_pc;
1651 const struct tdesc_feature *feature;
1653 /* If we have target-described registers, then we can safely
1654 reserve a number for MIPS_RESTART_REGNUM (whether it is
1655 described or not). */
1656 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM);
1657 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1658 set_gdbarch_num_pseudo_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1660 /* If it's present, then assign it to the reserved number. */
1661 feature = tdesc_find_feature (info.target_desc,
1662 "org.gnu.gdb.mips.linux");
1663 if (feature != NULL)
1664 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM,
1669 /* Provide a prototype to silence -Wmissing-prototypes. */
1670 extern initialize_file_ftype _initialize_mips_linux_tdep;
1673 _initialize_mips_linux_tdep (void)
1675 const struct bfd_arch_info *arch_info;
1677 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1679 arch_info = arch_info->next)
1681 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1683 mips_linux_init_abi);