1 /* Native-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2014 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "mips-tdep.h"
27 #include "linux-nat.h"
28 #include "mips-linux-tdep.h"
29 #include "target-descriptions.h"
31 #include "gdb_proc_service.h"
35 #include <sys/ptrace.h>
36 #include <asm/ptrace.h>
38 #include "nat/mips-linux-watch.h"
40 #include "features/mips-linux.c"
41 #include "features/mips-dsp-linux.c"
42 #include "features/mips64-linux.c"
43 #include "features/mips64-dsp-linux.c"
45 #ifndef PTRACE_GET_THREAD_AREA
46 #define PTRACE_GET_THREAD_AREA 25
49 /* Assume that we have PTRACE_GETREGS et al. support. If we do not,
50 we'll clear this and use PTRACE_PEEKUSER instead. */
51 static int have_ptrace_regsets = 1;
53 /* Whether or not to print the mirrored debug registers. */
55 static int maint_show_dr;
57 /* Saved function pointers to fetch and store a single register using
58 PTRACE_PEEKUSER and PTRACE_POKEUSER. */
60 static void (*super_fetch_registers) (struct target_ops *,
61 struct regcache *, int);
62 static void (*super_store_registers) (struct target_ops *,
63 struct regcache *, int);
65 static void (*super_close) (struct target_ops *);
67 /* Map gdb internal register number to ptrace ``address''.
68 These ``addresses'' are normally defined in <asm/ptrace.h>.
70 ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
71 and there's no point in reading or setting MIPS_ZERO_REGNUM.
72 We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */
75 mips_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
79 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
80 error (_("Bogon register number %d."), regno);
82 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
84 else if ((regno >= mips_regnum (gdbarch)->fp0)
85 && (regno < mips_regnum (gdbarch)->fp0 + 32))
86 regaddr = FPR_BASE + (regno - mips_regnum (gdbarch)->fp0);
87 else if (regno == mips_regnum (gdbarch)->pc)
89 else if (regno == mips_regnum (gdbarch)->cause)
90 regaddr = store? (CORE_ADDR) -1 : CAUSE;
91 else if (regno == mips_regnum (gdbarch)->badvaddr)
92 regaddr = store? (CORE_ADDR) -1 : BADVADDR;
93 else if (regno == mips_regnum (gdbarch)->lo)
95 else if (regno == mips_regnum (gdbarch)->hi)
97 else if (regno == mips_regnum (gdbarch)->fp_control_status)
99 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
100 regaddr = store? (CORE_ADDR) -1 : FPC_EIR;
101 else if (mips_regnum (gdbarch)->dspacc != -1
102 && regno >= mips_regnum (gdbarch)->dspacc
103 && regno < mips_regnum (gdbarch)->dspacc + 6)
104 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
105 else if (regno == mips_regnum (gdbarch)->dspctl)
106 regaddr = DSP_CONTROL;
107 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
110 regaddr = (CORE_ADDR) -1;
116 mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
120 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
121 error (_("Bogon register number %d."), regno);
123 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
125 else if ((regno >= mips_regnum (gdbarch)->fp0)
126 && (regno < mips_regnum (gdbarch)->fp0 + 32))
127 regaddr = MIPS64_FPR_BASE + (regno - gdbarch_fp0_regnum (gdbarch));
128 else if (regno == mips_regnum (gdbarch)->pc)
130 else if (regno == mips_regnum (gdbarch)->cause)
131 regaddr = store? (CORE_ADDR) -1 : MIPS64_CAUSE;
132 else if (regno == mips_regnum (gdbarch)->badvaddr)
133 regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR;
134 else if (regno == mips_regnum (gdbarch)->lo)
135 regaddr = MIPS64_MMLO;
136 else if (regno == mips_regnum (gdbarch)->hi)
137 regaddr = MIPS64_MMHI;
138 else if (regno == mips_regnum (gdbarch)->fp_control_status)
139 regaddr = MIPS64_FPC_CSR;
140 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
141 regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR;
142 else if (mips_regnum (gdbarch)->dspacc != -1
143 && regno >= mips_regnum (gdbarch)->dspacc
144 && regno < mips_regnum (gdbarch)->dspacc + 6)
145 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
146 else if (regno == mips_regnum (gdbarch)->dspctl)
147 regaddr = DSP_CONTROL;
148 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
151 regaddr = (CORE_ADDR) -1;
156 /* Fetch the thread-local storage pointer for libthread_db. */
159 ps_get_thread_area (const struct ps_prochandle *ph,
160 lwpid_t lwpid, int idx, void **base)
162 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
165 /* IDX is the bias from the thread pointer to the beginning of the
166 thread descriptor. It has to be subtracted due to implementation
167 quirks in libthread_db. */
168 *base = (void *) ((char *)*base - idx);
173 /* Wrapper functions. These are only used by libthread_db. */
176 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
178 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
179 mips_supply_gregset (regcache, (const mips_elf_gregset_t *) gregsetp);
181 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *) gregsetp);
185 fill_gregset (const struct regcache *regcache,
186 gdb_gregset_t *gregsetp, int regno)
188 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
189 mips_fill_gregset (regcache, (mips_elf_gregset_t *) gregsetp, regno);
191 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *) gregsetp, regno);
195 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
197 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
198 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *) fpregsetp);
200 mips64_supply_fpregset (regcache,
201 (const mips64_elf_fpregset_t *) fpregsetp);
205 fill_fpregset (const struct regcache *regcache,
206 gdb_fpregset_t *fpregsetp, int regno)
208 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
209 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *) fpregsetp, regno);
211 mips64_fill_fpregset (regcache,
212 (mips64_elf_fpregset_t *) fpregsetp, regno);
216 /* Fetch REGNO (or all registers if REGNO == -1) from the target
217 using PTRACE_GETREGS et al. */
220 mips64_linux_regsets_fetch_registers (struct target_ops *ops,
221 struct regcache *regcache, int regno)
223 struct gdbarch *gdbarch = get_regcache_arch (regcache);
229 if (regno >= mips_regnum (gdbarch)->fp0
230 && regno <= mips_regnum (gdbarch)->fp0 + 32)
232 else if (regno == mips_regnum (gdbarch)->fp_control_status)
234 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
239 /* DSP registers are optional and not a part of any set. */
240 have_dsp = mips_regnum (gdbarch)->dspctl != -1;
243 else if (regno >= mips_regnum (gdbarch)->dspacc
244 && regno < mips_regnum (gdbarch)->dspacc + 6)
246 else if (regno == mips_regnum (gdbarch)->dspctl)
251 tid = ptid_get_lwp (inferior_ptid);
253 tid = ptid_get_pid (inferior_ptid);
255 if (regno == -1 || (!is_fp && !is_dsp))
257 mips64_elf_gregset_t regs;
259 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
263 have_ptrace_regsets = 0;
266 perror_with_name (_("Couldn't get registers"));
269 mips64_supply_gregset (regcache,
270 (const mips64_elf_gregset_t *) ®s);
273 if (regno == -1 || is_fp)
275 mips64_elf_fpregset_t fp_regs;
277 if (ptrace (PTRACE_GETFPREGS, tid, 0L,
278 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
282 have_ptrace_regsets = 0;
285 perror_with_name (_("Couldn't get FP registers"));
288 mips64_supply_fpregset (regcache,
289 (const mips64_elf_fpregset_t *) &fp_regs);
293 super_fetch_registers (ops, regcache, regno);
294 else if (regno == -1 && have_dsp)
296 for (regi = mips_regnum (gdbarch)->dspacc;
297 regi < mips_regnum (gdbarch)->dspacc + 6;
299 super_fetch_registers (ops, regcache, regi);
300 super_fetch_registers (ops, regcache, mips_regnum (gdbarch)->dspctl);
304 /* Store REGNO (or all registers if REGNO == -1) to the target
305 using PTRACE_SETREGS et al. */
308 mips64_linux_regsets_store_registers (struct target_ops *ops,
309 struct regcache *regcache, int regno)
311 struct gdbarch *gdbarch = get_regcache_arch (regcache);
317 if (regno >= mips_regnum (gdbarch)->fp0
318 && regno <= mips_regnum (gdbarch)->fp0 + 32)
320 else if (regno == mips_regnum (gdbarch)->fp_control_status)
322 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
327 /* DSP registers are optional and not a part of any set. */
328 have_dsp = mips_regnum (gdbarch)->dspctl != -1;
331 else if (regno >= mips_regnum (gdbarch)->dspacc
332 && regno < mips_regnum (gdbarch)->dspacc + 6)
334 else if (regno == mips_regnum (gdbarch)->dspctl)
339 tid = ptid_get_lwp (inferior_ptid);
341 tid = ptid_get_pid (inferior_ptid);
343 if (regno == -1 || (!is_fp && !is_dsp))
345 mips64_elf_gregset_t regs;
347 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
348 perror_with_name (_("Couldn't get registers"));
350 mips64_fill_gregset (regcache, ®s, regno);
352 if (ptrace (PTRACE_SETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
353 perror_with_name (_("Couldn't set registers"));
356 if (regno == -1 || is_fp)
358 mips64_elf_fpregset_t fp_regs;
360 if (ptrace (PTRACE_GETFPREGS, tid, 0L,
361 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
362 perror_with_name (_("Couldn't get FP registers"));
364 mips64_fill_fpregset (regcache, &fp_regs, regno);
366 if (ptrace (PTRACE_SETFPREGS, tid, 0L,
367 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
368 perror_with_name (_("Couldn't set FP registers"));
372 super_store_registers (ops, regcache, regno);
373 else if (regno == -1 && have_dsp)
375 for (regi = mips_regnum (gdbarch)->dspacc;
376 regi < mips_regnum (gdbarch)->dspacc + 6;
378 super_store_registers (ops, regcache, regi);
379 super_store_registers (ops, regcache, mips_regnum (gdbarch)->dspctl);
383 /* Fetch REGNO (or all registers if REGNO == -1) from the target
384 using any working method. */
387 mips64_linux_fetch_registers (struct target_ops *ops,
388 struct regcache *regcache, int regnum)
390 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
391 if (have_ptrace_regsets)
392 mips64_linux_regsets_fetch_registers (ops, regcache, regnum);
394 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
395 back to PTRACE_PEEKUSER. */
396 if (!have_ptrace_regsets)
397 super_fetch_registers (ops, regcache, regnum);
400 /* Store REGNO (or all registers if REGNO == -1) to the target
401 using any working method. */
404 mips64_linux_store_registers (struct target_ops *ops,
405 struct regcache *regcache, int regnum)
407 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
408 if (have_ptrace_regsets)
409 mips64_linux_regsets_store_registers (ops, regcache, regnum);
411 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
412 back to PTRACE_PEEKUSER. */
413 if (!have_ptrace_regsets)
414 super_store_registers (ops, regcache, regnum);
417 /* Return the address in the core dump or inferior of register
421 mips_linux_register_u_offset (struct gdbarch *gdbarch, int regno, int store_p)
423 if (mips_abi_regsize (gdbarch) == 8)
424 return mips64_linux_register_addr (gdbarch, regno, store_p);
426 return mips_linux_register_addr (gdbarch, regno, store_p);
429 static const struct target_desc *
430 mips_linux_read_description (struct target_ops *ops)
432 static int have_dsp = -1;
438 tid = ptid_get_lwp (inferior_ptid);
440 tid = ptid_get_pid (inferior_ptid);
442 ptrace (PTRACE_PEEKUSER, tid, DSP_CONTROL, 0);
452 perror_with_name (_("Couldn't check DSP support"));
457 /* Report that target registers are a size we know for sure
458 that we can get from ptrace. */
459 if (_MIPS_SIM == _ABIO32)
460 return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
462 return have_dsp ? tdesc_mips64_dsp_linux : tdesc_mips64_linux;
465 /* -1 if the kernel and/or CPU do not support watch registers.
466 1 if watch_readback is valid and we can read style, num_valid
468 0 if we need to read the watch_readback. */
470 static int watch_readback_valid;
472 /* Cached watch register read values. */
474 static struct pt_watch_regs watch_readback;
476 static struct mips_watchpoint *current_watches;
478 /* The current set of watch register values for writing the
481 static struct pt_watch_regs watch_mirror;
484 mips_show_dr (const char *func, CORE_ADDR addr,
485 int len, enum target_hw_bp_type type)
489 puts_unfiltered (func);
491 printf_unfiltered (" (addr=%s, len=%d, type=%s)",
492 paddress (target_gdbarch (), addr), len,
493 type == hw_write ? "data-write"
494 : (type == hw_read ? "data-read"
495 : (type == hw_access ? "data-read/write"
496 : (type == hw_execute ? "instruction-execute"
498 puts_unfiltered (":\n");
500 for (i = 0; i < MAX_DEBUG_REGISTER; i++)
501 printf_unfiltered ("\tDR%d: lo=%s, hi=%s\n", i,
502 paddress (target_gdbarch (),
503 mips_linux_watch_get_watchlo (&watch_mirror,
505 paddress (target_gdbarch (),
506 mips_linux_watch_get_watchhi (&watch_mirror,
510 /* Target to_can_use_hw_breakpoint implementation. Return 1 if we can
511 handle the specified watch type. */
514 mips_linux_can_use_hw_breakpoint (struct target_ops *self,
515 int type, int cnt, int ot)
518 uint32_t wanted_mask, irw_mask;
520 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
522 &watch_readback_valid, 0))
527 case bp_hardware_watchpoint:
528 wanted_mask = W_MASK;
530 case bp_read_watchpoint:
531 wanted_mask = R_MASK;
533 case bp_access_watchpoint:
534 wanted_mask = R_MASK | W_MASK;
541 i < mips_linux_watch_get_num_valid (&watch_readback) && cnt;
544 irw_mask = mips_linux_watch_get_irw_mask (&watch_readback, i);
545 if ((irw_mask & wanted_mask) == wanted_mask)
548 return (cnt == 0) ? 1 : 0;
551 /* Target to_stopped_by_watchpoint implementation. Return 1 if
552 stopped by watchpoint. The watchhi R and W bits indicate the watch
553 register triggered. */
556 mips_linux_stopped_by_watchpoint (struct target_ops *ops)
561 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
563 &watch_readback_valid, 1))
566 num_valid = mips_linux_watch_get_num_valid (&watch_readback);
568 for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
569 if (mips_linux_watch_get_watchhi (&watch_readback, n) & (R_MASK | W_MASK))
575 /* Target to_stopped_data_address implementation. Set the address
576 where the watch triggered (if known). Return 1 if the address was
580 mips_linux_stopped_data_address (struct target_ops *t, CORE_ADDR *paddr)
582 /* On mips we don't know the low order 3 bits of the data address,
583 so we must return false. */
587 /* Target to_region_ok_for_hw_watchpoint implementation. Return 1 if
588 the specified region can be covered by the watch registers. */
591 mips_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
592 CORE_ADDR addr, int len)
594 struct pt_watch_regs dummy_regs;
597 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
599 &watch_readback_valid, 0))
602 dummy_regs = watch_readback;
603 /* Clear them out. */
604 for (i = 0; i < mips_linux_watch_get_num_valid (&dummy_regs); i++)
605 mips_linux_watch_set_watchlo (&dummy_regs, i, 0);
606 return mips_linux_watch_try_one_watch (&dummy_regs, addr, len, 0);
609 /* Write the mirrored watch register values for each thread. */
612 write_watchpoint_regs (void)
619 tid = ptid_get_lwp (lp->ptid);
620 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror) == -1)
621 perror_with_name (_("Couldn't write debug register"));
626 /* linux_nat new_thread implementation. Write the mirrored watch
627 register values for the new thread. */
630 mips_linux_new_thread (struct lwp_info *lp)
634 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
636 &watch_readback_valid, 0))
639 tid = ptid_get_lwp (lp->ptid);
640 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror) == -1)
641 perror_with_name (_("Couldn't write debug register"));
644 /* Target to_insert_watchpoint implementation. Try to insert a new
645 watch. Return zero on success. */
648 mips_linux_insert_watchpoint (struct target_ops *self,
649 CORE_ADDR addr, int len, int type,
650 struct expression *cond)
652 struct pt_watch_regs regs;
653 struct mips_watchpoint *new_watch;
654 struct mips_watchpoint **pw;
659 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
661 &watch_readback_valid, 0))
667 regs = watch_readback;
668 /* Add the current watches. */
669 mips_linux_watch_populate_regs (current_watches, ®s);
671 /* Now try to add the new watch. */
672 if (!mips_linux_watch_try_one_watch (®s, addr, len,
673 mips_linux_watch_type_to_irw (type)))
676 /* It fit. Stick it on the end of the list. */
677 new_watch = (struct mips_watchpoint *)
678 xmalloc (sizeof (struct mips_watchpoint));
679 new_watch->addr = addr;
680 new_watch->len = len;
681 new_watch->type = type;
682 new_watch->next = NULL;
684 pw = ¤t_watches;
690 retval = write_watchpoint_regs ();
693 mips_show_dr ("insert_watchpoint", addr, len, type);
698 /* Target to_remove_watchpoint implementation. Try to remove a watch.
699 Return zero on success. */
702 mips_linux_remove_watchpoint (struct target_ops *self,
703 CORE_ADDR addr, int len, int type,
704 struct expression *cond)
709 struct mips_watchpoint **pw;
710 struct mips_watchpoint *w;
712 /* Search for a known watch that matches. Then unlink and free
715 pw = ¤t_watches;
718 if (w->addr == addr && w->len == len && w->type == type)
729 return -1; /* We don't know about it, fail doing nothing. */
731 /* At this point watch_readback is known to be valid because we
732 could not have added the watch without reading it. */
733 gdb_assert (watch_readback_valid == 1);
735 watch_mirror = watch_readback;
736 mips_linux_watch_populate_regs (current_watches, &watch_mirror);
738 retval = write_watchpoint_regs ();
741 mips_show_dr ("remove_watchpoint", addr, len, type);
746 /* Target to_close implementation. Free any watches and call the
747 super implementation. */
750 mips_linux_close (struct target_ops *self)
752 struct mips_watchpoint *w;
753 struct mips_watchpoint *nw;
755 /* Clean out the current_watches list. */
763 current_watches = NULL;
769 void _initialize_mips_linux_nat (void);
772 _initialize_mips_linux_nat (void)
774 struct target_ops *t;
776 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
778 Set whether to show variables that mirror the mips debug registers."), _("\
779 Show whether to show variables that mirror the mips debug registers."), _("\
780 Use \"on\" to enable, \"off\" to disable.\n\
781 If enabled, the debug registers values are shown when GDB inserts\n\
782 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
783 triggers a breakpoint or watchpoint."),
786 &maintenance_set_cmdlist,
787 &maintenance_show_cmdlist);
789 t = linux_trad_target (mips_linux_register_u_offset);
791 super_close = t->to_close;
792 t->to_close = mips_linux_close;
794 super_fetch_registers = t->to_fetch_registers;
795 super_store_registers = t->to_store_registers;
797 t->to_fetch_registers = mips64_linux_fetch_registers;
798 t->to_store_registers = mips64_linux_store_registers;
800 t->to_can_use_hw_breakpoint = mips_linux_can_use_hw_breakpoint;
801 t->to_remove_watchpoint = mips_linux_remove_watchpoint;
802 t->to_insert_watchpoint = mips_linux_insert_watchpoint;
803 t->to_stopped_by_watchpoint = mips_linux_stopped_by_watchpoint;
804 t->to_stopped_data_address = mips_linux_stopped_data_address;
805 t->to_region_ok_for_hw_watchpoint = mips_linux_region_ok_for_hw_watchpoint;
807 t->to_read_description = mips_linux_read_description;
809 linux_nat_add_target (t);
810 linux_nat_set_new_thread (t, mips_linux_new_thread);
812 /* Initialize the standard target descriptions. */
813 initialize_tdesc_mips_linux ();
814 initialize_tdesc_mips_dsp_linux ();
815 initialize_tdesc_mips64_linux ();
816 initialize_tdesc_mips64_dsp_linux ();