1 /* Native-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2017 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "mips-tdep.h"
27 #include "linux-nat.h"
28 #include "mips-linux-tdep.h"
29 #include "target-descriptions.h"
31 #include "gdb_proc_service.h"
35 #include "nat/gdb_ptrace.h"
36 #include <asm/ptrace.h>
37 #include "inf-ptrace.h"
39 #include "nat/mips-linux-watch.h"
41 #include "features/mips-linux.c"
42 #include "features/mips-dsp-linux.c"
43 #include "features/mips64-linux.c"
44 #include "features/mips64-dsp-linux.c"
46 #ifndef PTRACE_GET_THREAD_AREA
47 #define PTRACE_GET_THREAD_AREA 25
50 /* Assume that we have PTRACE_GETREGS et al. support. If we do not,
51 we'll clear this and use PTRACE_PEEKUSER instead. */
52 static int have_ptrace_regsets = 1;
54 /* Saved function pointers to fetch and store a single register using
55 PTRACE_PEEKUSER and PTRACE_POKEUSER. */
57 static void (*super_fetch_registers) (struct target_ops *,
58 struct regcache *, int);
59 static void (*super_store_registers) (struct target_ops *,
60 struct regcache *, int);
62 static void (*super_close) (struct target_ops *);
64 /* Map gdb internal register number to ptrace ``address''.
65 These ``addresses'' are normally defined in <asm/ptrace.h>.
67 ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
68 and there's no point in reading or setting MIPS_ZERO_REGNUM.
69 We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */
72 mips_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
76 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
77 error (_("Bogon register number %d."), regno);
79 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
81 else if ((regno >= mips_regnum (gdbarch)->fp0)
82 && (regno < mips_regnum (gdbarch)->fp0 + 32))
83 regaddr = FPR_BASE + (regno - mips_regnum (gdbarch)->fp0);
84 else if (regno == mips_regnum (gdbarch)->pc)
86 else if (regno == mips_regnum (gdbarch)->cause)
87 regaddr = store? (CORE_ADDR) -1 : CAUSE;
88 else if (regno == mips_regnum (gdbarch)->badvaddr)
89 regaddr = store? (CORE_ADDR) -1 : BADVADDR;
90 else if (regno == mips_regnum (gdbarch)->lo)
92 else if (regno == mips_regnum (gdbarch)->hi)
94 else if (regno == mips_regnum (gdbarch)->fp_control_status)
96 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
97 regaddr = store? (CORE_ADDR) -1 : FPC_EIR;
98 else if (mips_regnum (gdbarch)->dspacc != -1
99 && regno >= mips_regnum (gdbarch)->dspacc
100 && regno < mips_regnum (gdbarch)->dspacc + 6)
101 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
102 else if (regno == mips_regnum (gdbarch)->dspctl)
103 regaddr = DSP_CONTROL;
104 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
107 regaddr = (CORE_ADDR) -1;
113 mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
117 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
118 error (_("Bogon register number %d."), regno);
120 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
122 else if ((regno >= mips_regnum (gdbarch)->fp0)
123 && (regno < mips_regnum (gdbarch)->fp0 + 32))
124 regaddr = MIPS64_FPR_BASE + (regno - gdbarch_fp0_regnum (gdbarch));
125 else if (regno == mips_regnum (gdbarch)->pc)
127 else if (regno == mips_regnum (gdbarch)->cause)
128 regaddr = store? (CORE_ADDR) -1 : MIPS64_CAUSE;
129 else if (regno == mips_regnum (gdbarch)->badvaddr)
130 regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR;
131 else if (regno == mips_regnum (gdbarch)->lo)
132 regaddr = MIPS64_MMLO;
133 else if (regno == mips_regnum (gdbarch)->hi)
134 regaddr = MIPS64_MMHI;
135 else if (regno == mips_regnum (gdbarch)->fp_control_status)
136 regaddr = MIPS64_FPC_CSR;
137 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
138 regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR;
139 else if (mips_regnum (gdbarch)->dspacc != -1
140 && regno >= mips_regnum (gdbarch)->dspacc
141 && regno < mips_regnum (gdbarch)->dspacc + 6)
142 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
143 else if (regno == mips_regnum (gdbarch)->dspctl)
144 regaddr = DSP_CONTROL;
145 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
148 regaddr = (CORE_ADDR) -1;
153 /* Fetch the thread-local storage pointer for libthread_db. */
156 ps_get_thread_area (struct ps_prochandle *ph,
157 lwpid_t lwpid, int idx, void **base)
159 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
162 /* IDX is the bias from the thread pointer to the beginning of the
163 thread descriptor. It has to be subtracted due to implementation
164 quirks in libthread_db. */
165 *base = (void *) ((char *)*base - idx);
170 /* Wrapper functions. These are only used by libthread_db. */
173 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
175 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
176 mips_supply_gregset (regcache, (const mips_elf_gregset_t *) gregsetp);
178 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *) gregsetp);
182 fill_gregset (const struct regcache *regcache,
183 gdb_gregset_t *gregsetp, int regno)
185 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
186 mips_fill_gregset (regcache, (mips_elf_gregset_t *) gregsetp, regno);
188 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *) gregsetp, regno);
192 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
194 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
195 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *) fpregsetp);
197 mips64_supply_fpregset (regcache,
198 (const mips64_elf_fpregset_t *) fpregsetp);
202 fill_fpregset (const struct regcache *regcache,
203 gdb_fpregset_t *fpregsetp, int regno)
205 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
206 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *) fpregsetp, regno);
208 mips64_fill_fpregset (regcache,
209 (mips64_elf_fpregset_t *) fpregsetp, regno);
213 /* Fetch REGNO (or all registers if REGNO == -1) from the target
214 using PTRACE_GETREGS et al. */
217 mips64_linux_regsets_fetch_registers (struct target_ops *ops,
218 struct regcache *regcache, int regno)
220 struct gdbarch *gdbarch = get_regcache_arch (regcache);
226 if (regno >= mips_regnum (gdbarch)->fp0
227 && regno <= mips_regnum (gdbarch)->fp0 + 32)
229 else if (regno == mips_regnum (gdbarch)->fp_control_status)
231 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
236 /* DSP registers are optional and not a part of any set. */
237 have_dsp = mips_regnum (gdbarch)->dspctl != -1;
240 else if (regno >= mips_regnum (gdbarch)->dspacc
241 && regno < mips_regnum (gdbarch)->dspacc + 6)
243 else if (regno == mips_regnum (gdbarch)->dspctl)
248 tid = get_ptrace_pid (regcache_get_ptid (regcache));
250 if (regno == -1 || (!is_fp && !is_dsp))
252 mips64_elf_gregset_t regs;
254 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
258 have_ptrace_regsets = 0;
261 perror_with_name (_("Couldn't get registers"));
264 mips64_supply_gregset (regcache,
265 (const mips64_elf_gregset_t *) ®s);
268 if (regno == -1 || is_fp)
270 mips64_elf_fpregset_t fp_regs;
272 if (ptrace (PTRACE_GETFPREGS, tid, 0L,
273 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
277 have_ptrace_regsets = 0;
280 perror_with_name (_("Couldn't get FP registers"));
283 mips64_supply_fpregset (regcache,
284 (const mips64_elf_fpregset_t *) &fp_regs);
288 super_fetch_registers (ops, regcache, regno);
289 else if (regno == -1 && have_dsp)
291 for (regi = mips_regnum (gdbarch)->dspacc;
292 regi < mips_regnum (gdbarch)->dspacc + 6;
294 super_fetch_registers (ops, regcache, regi);
295 super_fetch_registers (ops, regcache, mips_regnum (gdbarch)->dspctl);
299 /* Store REGNO (or all registers if REGNO == -1) to the target
300 using PTRACE_SETREGS et al. */
303 mips64_linux_regsets_store_registers (struct target_ops *ops,
304 struct regcache *regcache, int regno)
306 struct gdbarch *gdbarch = get_regcache_arch (regcache);
312 if (regno >= mips_regnum (gdbarch)->fp0
313 && regno <= mips_regnum (gdbarch)->fp0 + 32)
315 else if (regno == mips_regnum (gdbarch)->fp_control_status)
317 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
322 /* DSP registers are optional and not a part of any set. */
323 have_dsp = mips_regnum (gdbarch)->dspctl != -1;
326 else if (regno >= mips_regnum (gdbarch)->dspacc
327 && regno < mips_regnum (gdbarch)->dspacc + 6)
329 else if (regno == mips_regnum (gdbarch)->dspctl)
334 tid = get_ptrace_pid (regcache_get_ptid (regcache));
336 if (regno == -1 || (!is_fp && !is_dsp))
338 mips64_elf_gregset_t regs;
340 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
341 perror_with_name (_("Couldn't get registers"));
343 mips64_fill_gregset (regcache, ®s, regno);
345 if (ptrace (PTRACE_SETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
346 perror_with_name (_("Couldn't set registers"));
349 if (regno == -1 || is_fp)
351 mips64_elf_fpregset_t fp_regs;
353 if (ptrace (PTRACE_GETFPREGS, tid, 0L,
354 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
355 perror_with_name (_("Couldn't get FP registers"));
357 mips64_fill_fpregset (regcache, &fp_regs, regno);
359 if (ptrace (PTRACE_SETFPREGS, tid, 0L,
360 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
361 perror_with_name (_("Couldn't set FP registers"));
365 super_store_registers (ops, regcache, regno);
366 else if (regno == -1 && have_dsp)
368 for (regi = mips_regnum (gdbarch)->dspacc;
369 regi < mips_regnum (gdbarch)->dspacc + 6;
371 super_store_registers (ops, regcache, regi);
372 super_store_registers (ops, regcache, mips_regnum (gdbarch)->dspctl);
376 /* Fetch REGNO (or all registers if REGNO == -1) from the target
377 using any working method. */
380 mips64_linux_fetch_registers (struct target_ops *ops,
381 struct regcache *regcache, int regnum)
383 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
384 if (have_ptrace_regsets)
385 mips64_linux_regsets_fetch_registers (ops, regcache, regnum);
387 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
388 back to PTRACE_PEEKUSER. */
389 if (!have_ptrace_regsets)
390 super_fetch_registers (ops, regcache, regnum);
393 /* Store REGNO (or all registers if REGNO == -1) to the target
394 using any working method. */
397 mips64_linux_store_registers (struct target_ops *ops,
398 struct regcache *regcache, int regnum)
400 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
401 if (have_ptrace_regsets)
402 mips64_linux_regsets_store_registers (ops, regcache, regnum);
404 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
405 back to PTRACE_PEEKUSER. */
406 if (!have_ptrace_regsets)
407 super_store_registers (ops, regcache, regnum);
410 /* Return the address in the core dump or inferior of register
414 mips_linux_register_u_offset (struct gdbarch *gdbarch, int regno, int store_p)
416 if (mips_abi_regsize (gdbarch) == 8)
417 return mips64_linux_register_addr (gdbarch, regno, store_p);
419 return mips_linux_register_addr (gdbarch, regno, store_p);
422 static const struct target_desc *
423 mips_linux_read_description (struct target_ops *ops)
425 static int have_dsp = -1;
431 tid = ptid_get_lwp (inferior_ptid);
433 tid = ptid_get_pid (inferior_ptid);
436 ptrace (PTRACE_PEEKUSER, tid, DSP_CONTROL, 0);
446 perror_with_name (_("Couldn't check DSP support"));
451 /* Report that target registers are a size we know for sure
452 that we can get from ptrace. */
453 if (_MIPS_SIM == _ABIO32)
454 return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
456 return have_dsp ? tdesc_mips64_dsp_linux : tdesc_mips64_linux;
459 /* -1 if the kernel and/or CPU do not support watch registers.
460 1 if watch_readback is valid and we can read style, num_valid
462 0 if we need to read the watch_readback. */
464 static int watch_readback_valid;
466 /* Cached watch register read values. */
468 static struct pt_watch_regs watch_readback;
470 static struct mips_watchpoint *current_watches;
472 /* The current set of watch register values for writing the
475 static struct pt_watch_regs watch_mirror;
478 mips_show_dr (const char *func, CORE_ADDR addr,
479 int len, enum target_hw_bp_type type)
483 puts_unfiltered (func);
485 printf_unfiltered (" (addr=%s, len=%d, type=%s)",
486 paddress (target_gdbarch (), addr), len,
487 type == hw_write ? "data-write"
488 : (type == hw_read ? "data-read"
489 : (type == hw_access ? "data-read/write"
490 : (type == hw_execute ? "instruction-execute"
492 puts_unfiltered (":\n");
494 for (i = 0; i < MAX_DEBUG_REGISTER; i++)
495 printf_unfiltered ("\tDR%d: lo=%s, hi=%s\n", i,
496 paddress (target_gdbarch (),
497 mips_linux_watch_get_watchlo (&watch_mirror,
499 paddress (target_gdbarch (),
500 mips_linux_watch_get_watchhi (&watch_mirror,
504 /* Target to_can_use_hw_breakpoint implementation. Return 1 if we can
505 handle the specified watch type. */
508 mips_linux_can_use_hw_breakpoint (struct target_ops *self,
513 uint32_t wanted_mask, irw_mask;
515 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
517 &watch_readback_valid, 0))
522 case bp_hardware_watchpoint:
523 wanted_mask = W_MASK;
525 case bp_read_watchpoint:
526 wanted_mask = R_MASK;
528 case bp_access_watchpoint:
529 wanted_mask = R_MASK | W_MASK;
536 i < mips_linux_watch_get_num_valid (&watch_readback) && cnt;
539 irw_mask = mips_linux_watch_get_irw_mask (&watch_readback, i);
540 if ((irw_mask & wanted_mask) == wanted_mask)
543 return (cnt == 0) ? 1 : 0;
546 /* Target to_stopped_by_watchpoint implementation. Return 1 if
547 stopped by watchpoint. The watchhi R and W bits indicate the watch
548 register triggered. */
551 mips_linux_stopped_by_watchpoint (struct target_ops *ops)
556 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
558 &watch_readback_valid, 1))
561 num_valid = mips_linux_watch_get_num_valid (&watch_readback);
563 for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
564 if (mips_linux_watch_get_watchhi (&watch_readback, n) & (R_MASK | W_MASK))
570 /* Target to_stopped_data_address implementation. Set the address
571 where the watch triggered (if known). Return 1 if the address was
575 mips_linux_stopped_data_address (struct target_ops *t, CORE_ADDR *paddr)
577 /* On mips we don't know the low order 3 bits of the data address,
578 so we must return false. */
582 /* Target to_region_ok_for_hw_watchpoint implementation. Return 1 if
583 the specified region can be covered by the watch registers. */
586 mips_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
587 CORE_ADDR addr, int len)
589 struct pt_watch_regs dummy_regs;
592 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
594 &watch_readback_valid, 0))
597 dummy_regs = watch_readback;
598 /* Clear them out. */
599 for (i = 0; i < mips_linux_watch_get_num_valid (&dummy_regs); i++)
600 mips_linux_watch_set_watchlo (&dummy_regs, i, 0);
601 return mips_linux_watch_try_one_watch (&dummy_regs, addr, len, 0);
604 /* Write the mirrored watch register values for each thread. */
607 write_watchpoint_regs (void)
614 tid = ptid_get_lwp (lp->ptid);
615 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1)
616 perror_with_name (_("Couldn't write debug register"));
621 /* linux_nat new_thread implementation. Write the mirrored watch
622 register values for the new thread. */
625 mips_linux_new_thread (struct lwp_info *lp)
629 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
631 &watch_readback_valid, 0))
634 tid = ptid_get_lwp (lp->ptid);
635 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1)
636 perror_with_name (_("Couldn't write debug register"));
639 /* Target to_insert_watchpoint implementation. Try to insert a new
640 watch. Return zero on success. */
643 mips_linux_insert_watchpoint (struct target_ops *self,
644 CORE_ADDR addr, int len,
645 enum target_hw_bp_type type,
646 struct expression *cond)
648 struct pt_watch_regs regs;
649 struct mips_watchpoint *new_watch;
650 struct mips_watchpoint **pw;
655 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
657 &watch_readback_valid, 0))
663 regs = watch_readback;
664 /* Add the current watches. */
665 mips_linux_watch_populate_regs (current_watches, ®s);
667 /* Now try to add the new watch. */
668 if (!mips_linux_watch_try_one_watch (®s, addr, len,
669 mips_linux_watch_type_to_irw (type)))
672 /* It fit. Stick it on the end of the list. */
673 new_watch = XNEW (struct mips_watchpoint);
674 new_watch->addr = addr;
675 new_watch->len = len;
676 new_watch->type = type;
677 new_watch->next = NULL;
679 pw = ¤t_watches;
685 retval = write_watchpoint_regs ();
688 mips_show_dr ("insert_watchpoint", addr, len, type);
693 /* Target to_remove_watchpoint implementation. Try to remove a watch.
694 Return zero on success. */
697 mips_linux_remove_watchpoint (struct target_ops *self,
698 CORE_ADDR addr, int len,
699 enum target_hw_bp_type type,
700 struct expression *cond)
705 struct mips_watchpoint **pw;
706 struct mips_watchpoint *w;
708 /* Search for a known watch that matches. Then unlink and free
711 pw = ¤t_watches;
714 if (w->addr == addr && w->len == len && w->type == type)
725 return -1; /* We don't know about it, fail doing nothing. */
727 /* At this point watch_readback is known to be valid because we
728 could not have added the watch without reading it. */
729 gdb_assert (watch_readback_valid == 1);
731 watch_mirror = watch_readback;
732 mips_linux_watch_populate_regs (current_watches, &watch_mirror);
734 retval = write_watchpoint_regs ();
737 mips_show_dr ("remove_watchpoint", addr, len, type);
742 /* Target to_close implementation. Free any watches and call the
743 super implementation. */
746 mips_linux_close (struct target_ops *self)
748 struct mips_watchpoint *w;
749 struct mips_watchpoint *nw;
751 /* Clean out the current_watches list. */
759 current_watches = NULL;
765 void _initialize_mips_linux_nat (void);
768 _initialize_mips_linux_nat (void)
770 struct target_ops *t;
772 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
773 &show_debug_regs, _("\
774 Set whether to show variables that mirror the mips debug registers."), _("\
775 Show whether to show variables that mirror the mips debug registers."), _("\
776 Use \"on\" to enable, \"off\" to disable.\n\
777 If enabled, the debug registers values are shown when GDB inserts\n\
778 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
779 triggers a breakpoint or watchpoint."),
782 &maintenance_set_cmdlist,
783 &maintenance_show_cmdlist);
785 t = linux_trad_target (mips_linux_register_u_offset);
787 super_close = t->to_close;
788 t->to_close = mips_linux_close;
790 super_fetch_registers = t->to_fetch_registers;
791 super_store_registers = t->to_store_registers;
793 t->to_fetch_registers = mips64_linux_fetch_registers;
794 t->to_store_registers = mips64_linux_store_registers;
796 t->to_can_use_hw_breakpoint = mips_linux_can_use_hw_breakpoint;
797 t->to_remove_watchpoint = mips_linux_remove_watchpoint;
798 t->to_insert_watchpoint = mips_linux_insert_watchpoint;
799 t->to_stopped_by_watchpoint = mips_linux_stopped_by_watchpoint;
800 t->to_stopped_data_address = mips_linux_stopped_data_address;
801 t->to_region_ok_for_hw_watchpoint = mips_linux_region_ok_for_hw_watchpoint;
803 t->to_read_description = mips_linux_read_description;
805 linux_nat_add_target (t);
806 linux_nat_set_new_thread (t, mips_linux_new_thread);
808 /* Initialize the standard target descriptions. */
809 initialize_tdesc_mips_linux ();
810 initialize_tdesc_mips_dsp_linux ();
811 initialize_tdesc_mips64_linux ();
812 initialize_tdesc_mips64_dsp_linux ();