1 /* Native-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2015 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "mips-tdep.h"
27 #include "linux-nat.h"
28 #include "mips-linux-tdep.h"
29 #include "target-descriptions.h"
31 #include "gdb_proc_service.h"
35 #include "nat/gdb_ptrace.h"
36 #include <asm/ptrace.h>
38 #include "nat/mips-linux-watch.h"
40 #include "features/mips-linux.c"
41 #include "features/mips-dsp-linux.c"
42 #include "features/mips64-linux.c"
43 #include "features/mips64-dsp-linux.c"
45 #ifndef PTRACE_GET_THREAD_AREA
46 #define PTRACE_GET_THREAD_AREA 25
49 /* Assume that we have PTRACE_GETREGS et al. support. If we do not,
50 we'll clear this and use PTRACE_PEEKUSER instead. */
51 static int have_ptrace_regsets = 1;
53 /* Saved function pointers to fetch and store a single register using
54 PTRACE_PEEKUSER and PTRACE_POKEUSER. */
56 static void (*super_fetch_registers) (struct target_ops *,
57 struct regcache *, int);
58 static void (*super_store_registers) (struct target_ops *,
59 struct regcache *, int);
61 static void (*super_close) (struct target_ops *);
63 /* Map gdb internal register number to ptrace ``address''.
64 These ``addresses'' are normally defined in <asm/ptrace.h>.
66 ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
67 and there's no point in reading or setting MIPS_ZERO_REGNUM.
68 We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */
71 mips_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
75 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
76 error (_("Bogon register number %d."), regno);
78 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
80 else if ((regno >= mips_regnum (gdbarch)->fp0)
81 && (regno < mips_regnum (gdbarch)->fp0 + 32))
82 regaddr = FPR_BASE + (regno - mips_regnum (gdbarch)->fp0);
83 else if (regno == mips_regnum (gdbarch)->pc)
85 else if (regno == mips_regnum (gdbarch)->cause)
86 regaddr = store? (CORE_ADDR) -1 : CAUSE;
87 else if (regno == mips_regnum (gdbarch)->badvaddr)
88 regaddr = store? (CORE_ADDR) -1 : BADVADDR;
89 else if (regno == mips_regnum (gdbarch)->lo)
91 else if (regno == mips_regnum (gdbarch)->hi)
93 else if (regno == mips_regnum (gdbarch)->fp_control_status)
95 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
96 regaddr = store? (CORE_ADDR) -1 : FPC_EIR;
97 else if (mips_regnum (gdbarch)->dspacc != -1
98 && regno >= mips_regnum (gdbarch)->dspacc
99 && regno < mips_regnum (gdbarch)->dspacc + 6)
100 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
101 else if (regno == mips_regnum (gdbarch)->dspctl)
102 regaddr = DSP_CONTROL;
103 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
106 regaddr = (CORE_ADDR) -1;
112 mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
116 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
117 error (_("Bogon register number %d."), regno);
119 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
121 else if ((regno >= mips_regnum (gdbarch)->fp0)
122 && (regno < mips_regnum (gdbarch)->fp0 + 32))
123 regaddr = MIPS64_FPR_BASE + (regno - gdbarch_fp0_regnum (gdbarch));
124 else if (regno == mips_regnum (gdbarch)->pc)
126 else if (regno == mips_regnum (gdbarch)->cause)
127 regaddr = store? (CORE_ADDR) -1 : MIPS64_CAUSE;
128 else if (regno == mips_regnum (gdbarch)->badvaddr)
129 regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR;
130 else if (regno == mips_regnum (gdbarch)->lo)
131 regaddr = MIPS64_MMLO;
132 else if (regno == mips_regnum (gdbarch)->hi)
133 regaddr = MIPS64_MMHI;
134 else if (regno == mips_regnum (gdbarch)->fp_control_status)
135 regaddr = MIPS64_FPC_CSR;
136 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
137 regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR;
138 else if (mips_regnum (gdbarch)->dspacc != -1
139 && regno >= mips_regnum (gdbarch)->dspacc
140 && regno < mips_regnum (gdbarch)->dspacc + 6)
141 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
142 else if (regno == mips_regnum (gdbarch)->dspctl)
143 regaddr = DSP_CONTROL;
144 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
147 regaddr = (CORE_ADDR) -1;
152 /* Fetch the thread-local storage pointer for libthread_db. */
155 ps_get_thread_area (const struct ps_prochandle *ph,
156 lwpid_t lwpid, int idx, void **base)
158 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
161 /* IDX is the bias from the thread pointer to the beginning of the
162 thread descriptor. It has to be subtracted due to implementation
163 quirks in libthread_db. */
164 *base = (void *) ((char *)*base - idx);
169 /* Wrapper functions. These are only used by libthread_db. */
172 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
174 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
175 mips_supply_gregset (regcache, (const mips_elf_gregset_t *) gregsetp);
177 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *) gregsetp);
181 fill_gregset (const struct regcache *regcache,
182 gdb_gregset_t *gregsetp, int regno)
184 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
185 mips_fill_gregset (regcache, (mips_elf_gregset_t *) gregsetp, regno);
187 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *) gregsetp, regno);
191 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
193 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
194 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *) fpregsetp);
196 mips64_supply_fpregset (regcache,
197 (const mips64_elf_fpregset_t *) fpregsetp);
201 fill_fpregset (const struct regcache *regcache,
202 gdb_fpregset_t *fpregsetp, int regno)
204 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
205 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *) fpregsetp, regno);
207 mips64_fill_fpregset (regcache,
208 (mips64_elf_fpregset_t *) fpregsetp, regno);
212 /* Fetch REGNO (or all registers if REGNO == -1) from the target
213 using PTRACE_GETREGS et al. */
216 mips64_linux_regsets_fetch_registers (struct target_ops *ops,
217 struct regcache *regcache, int regno)
219 struct gdbarch *gdbarch = get_regcache_arch (regcache);
225 if (regno >= mips_regnum (gdbarch)->fp0
226 && regno <= mips_regnum (gdbarch)->fp0 + 32)
228 else if (regno == mips_regnum (gdbarch)->fp_control_status)
230 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
235 /* DSP registers are optional and not a part of any set. */
236 have_dsp = mips_regnum (gdbarch)->dspctl != -1;
239 else if (regno >= mips_regnum (gdbarch)->dspacc
240 && regno < mips_regnum (gdbarch)->dspacc + 6)
242 else if (regno == mips_regnum (gdbarch)->dspctl)
247 tid = ptid_get_lwp (inferior_ptid);
249 tid = ptid_get_pid (inferior_ptid);
251 if (regno == -1 || (!is_fp && !is_dsp))
253 mips64_elf_gregset_t regs;
255 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
259 have_ptrace_regsets = 0;
262 perror_with_name (_("Couldn't get registers"));
265 mips64_supply_gregset (regcache,
266 (const mips64_elf_gregset_t *) ®s);
269 if (regno == -1 || is_fp)
271 mips64_elf_fpregset_t fp_regs;
273 if (ptrace (PTRACE_GETFPREGS, tid, 0L,
274 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
278 have_ptrace_regsets = 0;
281 perror_with_name (_("Couldn't get FP registers"));
284 mips64_supply_fpregset (regcache,
285 (const mips64_elf_fpregset_t *) &fp_regs);
289 super_fetch_registers (ops, regcache, regno);
290 else if (regno == -1 && have_dsp)
292 for (regi = mips_regnum (gdbarch)->dspacc;
293 regi < mips_regnum (gdbarch)->dspacc + 6;
295 super_fetch_registers (ops, regcache, regi);
296 super_fetch_registers (ops, regcache, mips_regnum (gdbarch)->dspctl);
300 /* Store REGNO (or all registers if REGNO == -1) to the target
301 using PTRACE_SETREGS et al. */
304 mips64_linux_regsets_store_registers (struct target_ops *ops,
305 struct regcache *regcache, int regno)
307 struct gdbarch *gdbarch = get_regcache_arch (regcache);
313 if (regno >= mips_regnum (gdbarch)->fp0
314 && regno <= mips_regnum (gdbarch)->fp0 + 32)
316 else if (regno == mips_regnum (gdbarch)->fp_control_status)
318 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
323 /* DSP registers are optional and not a part of any set. */
324 have_dsp = mips_regnum (gdbarch)->dspctl != -1;
327 else if (regno >= mips_regnum (gdbarch)->dspacc
328 && regno < mips_regnum (gdbarch)->dspacc + 6)
330 else if (regno == mips_regnum (gdbarch)->dspctl)
335 tid = ptid_get_lwp (inferior_ptid);
337 tid = ptid_get_pid (inferior_ptid);
339 if (regno == -1 || (!is_fp && !is_dsp))
341 mips64_elf_gregset_t regs;
343 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
344 perror_with_name (_("Couldn't get registers"));
346 mips64_fill_gregset (regcache, ®s, regno);
348 if (ptrace (PTRACE_SETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
349 perror_with_name (_("Couldn't set registers"));
352 if (regno == -1 || is_fp)
354 mips64_elf_fpregset_t fp_regs;
356 if (ptrace (PTRACE_GETFPREGS, tid, 0L,
357 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
358 perror_with_name (_("Couldn't get FP registers"));
360 mips64_fill_fpregset (regcache, &fp_regs, regno);
362 if (ptrace (PTRACE_SETFPREGS, tid, 0L,
363 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
364 perror_with_name (_("Couldn't set FP registers"));
368 super_store_registers (ops, regcache, regno);
369 else if (regno == -1 && have_dsp)
371 for (regi = mips_regnum (gdbarch)->dspacc;
372 regi < mips_regnum (gdbarch)->dspacc + 6;
374 super_store_registers (ops, regcache, regi);
375 super_store_registers (ops, regcache, mips_regnum (gdbarch)->dspctl);
379 /* Fetch REGNO (or all registers if REGNO == -1) from the target
380 using any working method. */
383 mips64_linux_fetch_registers (struct target_ops *ops,
384 struct regcache *regcache, int regnum)
386 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
387 if (have_ptrace_regsets)
388 mips64_linux_regsets_fetch_registers (ops, regcache, regnum);
390 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
391 back to PTRACE_PEEKUSER. */
392 if (!have_ptrace_regsets)
393 super_fetch_registers (ops, regcache, regnum);
396 /* Store REGNO (or all registers if REGNO == -1) to the target
397 using any working method. */
400 mips64_linux_store_registers (struct target_ops *ops,
401 struct regcache *regcache, int regnum)
403 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
404 if (have_ptrace_regsets)
405 mips64_linux_regsets_store_registers (ops, regcache, regnum);
407 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
408 back to PTRACE_PEEKUSER. */
409 if (!have_ptrace_regsets)
410 super_store_registers (ops, regcache, regnum);
413 /* Return the address in the core dump or inferior of register
417 mips_linux_register_u_offset (struct gdbarch *gdbarch, int regno, int store_p)
419 if (mips_abi_regsize (gdbarch) == 8)
420 return mips64_linux_register_addr (gdbarch, regno, store_p);
422 return mips_linux_register_addr (gdbarch, regno, store_p);
425 static const struct target_desc *
426 mips_linux_read_description (struct target_ops *ops)
428 static int have_dsp = -1;
434 tid = ptid_get_lwp (inferior_ptid);
436 tid = ptid_get_pid (inferior_ptid);
439 ptrace (PTRACE_PEEKUSER, tid, DSP_CONTROL, 0);
449 perror_with_name (_("Couldn't check DSP support"));
454 /* Report that target registers are a size we know for sure
455 that we can get from ptrace. */
456 if (_MIPS_SIM == _ABIO32)
457 return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
459 return have_dsp ? tdesc_mips64_dsp_linux : tdesc_mips64_linux;
462 /* -1 if the kernel and/or CPU do not support watch registers.
463 1 if watch_readback is valid and we can read style, num_valid
465 0 if we need to read the watch_readback. */
467 static int watch_readback_valid;
469 /* Cached watch register read values. */
471 static struct pt_watch_regs watch_readback;
473 static struct mips_watchpoint *current_watches;
475 /* The current set of watch register values for writing the
478 static struct pt_watch_regs watch_mirror;
481 mips_show_dr (const char *func, CORE_ADDR addr,
482 int len, enum target_hw_bp_type type)
486 puts_unfiltered (func);
488 printf_unfiltered (" (addr=%s, len=%d, type=%s)",
489 paddress (target_gdbarch (), addr), len,
490 type == hw_write ? "data-write"
491 : (type == hw_read ? "data-read"
492 : (type == hw_access ? "data-read/write"
493 : (type == hw_execute ? "instruction-execute"
495 puts_unfiltered (":\n");
497 for (i = 0; i < MAX_DEBUG_REGISTER; i++)
498 printf_unfiltered ("\tDR%d: lo=%s, hi=%s\n", i,
499 paddress (target_gdbarch (),
500 mips_linux_watch_get_watchlo (&watch_mirror,
502 paddress (target_gdbarch (),
503 mips_linux_watch_get_watchhi (&watch_mirror,
507 /* Target to_can_use_hw_breakpoint implementation. Return 1 if we can
508 handle the specified watch type. */
511 mips_linux_can_use_hw_breakpoint (struct target_ops *self,
512 int type, int cnt, int ot)
515 uint32_t wanted_mask, irw_mask;
517 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
519 &watch_readback_valid, 0))
524 case bp_hardware_watchpoint:
525 wanted_mask = W_MASK;
527 case bp_read_watchpoint:
528 wanted_mask = R_MASK;
530 case bp_access_watchpoint:
531 wanted_mask = R_MASK | W_MASK;
538 i < mips_linux_watch_get_num_valid (&watch_readback) && cnt;
541 irw_mask = mips_linux_watch_get_irw_mask (&watch_readback, i);
542 if ((irw_mask & wanted_mask) == wanted_mask)
545 return (cnt == 0) ? 1 : 0;
548 /* Target to_stopped_by_watchpoint implementation. Return 1 if
549 stopped by watchpoint. The watchhi R and W bits indicate the watch
550 register triggered. */
553 mips_linux_stopped_by_watchpoint (struct target_ops *ops)
558 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
560 &watch_readback_valid, 1))
563 num_valid = mips_linux_watch_get_num_valid (&watch_readback);
565 for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
566 if (mips_linux_watch_get_watchhi (&watch_readback, n) & (R_MASK | W_MASK))
572 /* Target to_stopped_data_address implementation. Set the address
573 where the watch triggered (if known). Return 1 if the address was
577 mips_linux_stopped_data_address (struct target_ops *t, CORE_ADDR *paddr)
579 /* On mips we don't know the low order 3 bits of the data address,
580 so we must return false. */
584 /* Target to_region_ok_for_hw_watchpoint implementation. Return 1 if
585 the specified region can be covered by the watch registers. */
588 mips_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
589 CORE_ADDR addr, int len)
591 struct pt_watch_regs dummy_regs;
594 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
596 &watch_readback_valid, 0))
599 dummy_regs = watch_readback;
600 /* Clear them out. */
601 for (i = 0; i < mips_linux_watch_get_num_valid (&dummy_regs); i++)
602 mips_linux_watch_set_watchlo (&dummy_regs, i, 0);
603 return mips_linux_watch_try_one_watch (&dummy_regs, addr, len, 0);
606 /* Write the mirrored watch register values for each thread. */
609 write_watchpoint_regs (void)
616 tid = ptid_get_lwp (lp->ptid);
617 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1)
618 perror_with_name (_("Couldn't write debug register"));
623 /* linux_nat new_thread implementation. Write the mirrored watch
624 register values for the new thread. */
627 mips_linux_new_thread (struct lwp_info *lp)
631 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
633 &watch_readback_valid, 0))
636 tid = ptid_get_lwp (lp->ptid);
637 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1)
638 perror_with_name (_("Couldn't write debug register"));
641 /* Target to_insert_watchpoint implementation. Try to insert a new
642 watch. Return zero on success. */
645 mips_linux_insert_watchpoint (struct target_ops *self,
646 CORE_ADDR addr, int len, int type,
647 struct expression *cond)
649 struct pt_watch_regs regs;
650 struct mips_watchpoint *new_watch;
651 struct mips_watchpoint **pw;
656 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
658 &watch_readback_valid, 0))
664 regs = watch_readback;
665 /* Add the current watches. */
666 mips_linux_watch_populate_regs (current_watches, ®s);
668 /* Now try to add the new watch. */
669 if (!mips_linux_watch_try_one_watch (®s, addr, len,
670 mips_linux_watch_type_to_irw (type)))
673 /* It fit. Stick it on the end of the list. */
674 new_watch = (struct mips_watchpoint *)
675 xmalloc (sizeof (struct mips_watchpoint));
676 new_watch->addr = addr;
677 new_watch->len = len;
678 new_watch->type = type;
679 new_watch->next = NULL;
681 pw = ¤t_watches;
687 retval = write_watchpoint_regs ();
690 mips_show_dr ("insert_watchpoint", addr, len, type);
695 /* Target to_remove_watchpoint implementation. Try to remove a watch.
696 Return zero on success. */
699 mips_linux_remove_watchpoint (struct target_ops *self,
700 CORE_ADDR addr, int len, int type,
701 struct expression *cond)
706 struct mips_watchpoint **pw;
707 struct mips_watchpoint *w;
709 /* Search for a known watch that matches. Then unlink and free
712 pw = ¤t_watches;
715 if (w->addr == addr && w->len == len && w->type == type)
726 return -1; /* We don't know about it, fail doing nothing. */
728 /* At this point watch_readback is known to be valid because we
729 could not have added the watch without reading it. */
730 gdb_assert (watch_readback_valid == 1);
732 watch_mirror = watch_readback;
733 mips_linux_watch_populate_regs (current_watches, &watch_mirror);
735 retval = write_watchpoint_regs ();
738 mips_show_dr ("remove_watchpoint", addr, len, type);
743 /* Target to_close implementation. Free any watches and call the
744 super implementation. */
747 mips_linux_close (struct target_ops *self)
749 struct mips_watchpoint *w;
750 struct mips_watchpoint *nw;
752 /* Clean out the current_watches list. */
760 current_watches = NULL;
766 void _initialize_mips_linux_nat (void);
769 _initialize_mips_linux_nat (void)
771 struct target_ops *t;
773 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
774 &show_debug_regs, _("\
775 Set whether to show variables that mirror the mips debug registers."), _("\
776 Show whether to show variables that mirror the mips debug registers."), _("\
777 Use \"on\" to enable, \"off\" to disable.\n\
778 If enabled, the debug registers values are shown when GDB inserts\n\
779 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
780 triggers a breakpoint or watchpoint."),
783 &maintenance_set_cmdlist,
784 &maintenance_show_cmdlist);
786 t = linux_trad_target (mips_linux_register_u_offset);
788 super_close = t->to_close;
789 t->to_close = mips_linux_close;
791 super_fetch_registers = t->to_fetch_registers;
792 super_store_registers = t->to_store_registers;
794 t->to_fetch_registers = mips64_linux_fetch_registers;
795 t->to_store_registers = mips64_linux_store_registers;
797 t->to_can_use_hw_breakpoint = mips_linux_can_use_hw_breakpoint;
798 t->to_remove_watchpoint = mips_linux_remove_watchpoint;
799 t->to_insert_watchpoint = mips_linux_insert_watchpoint;
800 t->to_stopped_by_watchpoint = mips_linux_stopped_by_watchpoint;
801 t->to_stopped_data_address = mips_linux_stopped_data_address;
802 t->to_region_ok_for_hw_watchpoint = mips_linux_region_ok_for_hw_watchpoint;
804 t->to_read_description = mips_linux_read_description;
806 linux_nat_add_target (t);
807 linux_nat_set_new_thread (t, mips_linux_new_thread);
809 /* Initialize the standard target descriptions. */
810 initialize_tdesc_mips_linux ();
811 initialize_tdesc_mips_dsp_linux ();
812 initialize_tdesc_mips64_linux ();
813 initialize_tdesc_mips64_dsp_linux ();