1 /* Native-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2018 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "mips-tdep.h"
27 #include "linux-nat-trad.h"
28 #include "mips-linux-tdep.h"
29 #include "target-descriptions.h"
31 #include "gdb_proc_service.h"
35 #include "nat/gdb_ptrace.h"
36 #include <asm/ptrace.h>
37 #include "inf-ptrace.h"
39 #include "nat/mips-linux-watch.h"
41 #ifndef PTRACE_GET_THREAD_AREA
42 #define PTRACE_GET_THREAD_AREA 25
45 class mips_linux_nat_target final : public linux_nat_trad_target
48 /* Add our register access methods. */
49 void fetch_registers (struct regcache *, int) override;
50 void store_registers (struct regcache *, int) override;
52 void close () override;
54 int can_use_hw_breakpoint (enum bptype, int, int) override;
56 int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
57 struct expression *) override;
59 int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
60 struct expression *) override;
62 bool stopped_by_watchpoint () override;
64 bool stopped_data_address (CORE_ADDR *) override;
66 int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
68 const struct target_desc *read_description () override;
71 /* Override linux_nat_trad_target methods. */
72 CORE_ADDR register_u_offset (struct gdbarch *gdbarch,
73 int regno, int store_p) override;
76 /* Helpers. See definitions. */
77 void mips64_regsets_store_registers (struct regcache *regcache,
79 void mips64_regsets_fetch_registers (struct regcache *regcache,
83 static mips_linux_nat_target the_mips_linux_nat_target;
85 /* Assume that we have PTRACE_GETREGS et al. support. If we do not,
86 we'll clear this and use PTRACE_PEEKUSER instead. */
87 static int have_ptrace_regsets = 1;
89 /* Map gdb internal register number to ptrace ``address''.
90 These ``addresses'' are normally defined in <asm/ptrace.h>.
92 ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
93 and there's no point in reading or setting MIPS_ZERO_REGNUM.
94 We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */
97 mips_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
101 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
102 error (_("Bogon register number %d."), regno);
104 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
106 else if ((regno >= mips_regnum (gdbarch)->fp0)
107 && (regno < mips_regnum (gdbarch)->fp0 + 32))
108 regaddr = FPR_BASE + (regno - mips_regnum (gdbarch)->fp0);
109 else if (regno == mips_regnum (gdbarch)->pc)
111 else if (regno == mips_regnum (gdbarch)->cause)
112 regaddr = store? (CORE_ADDR) -1 : CAUSE;
113 else if (regno == mips_regnum (gdbarch)->badvaddr)
114 regaddr = store? (CORE_ADDR) -1 : BADVADDR;
115 else if (regno == mips_regnum (gdbarch)->lo)
117 else if (regno == mips_regnum (gdbarch)->hi)
119 else if (regno == mips_regnum (gdbarch)->fp_control_status)
121 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
122 regaddr = store? (CORE_ADDR) -1 : FPC_EIR;
123 else if (mips_regnum (gdbarch)->dspacc != -1
124 && regno >= mips_regnum (gdbarch)->dspacc
125 && regno < mips_regnum (gdbarch)->dspacc + 6)
126 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
127 else if (regno == mips_regnum (gdbarch)->dspctl)
128 regaddr = DSP_CONTROL;
129 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
132 regaddr = (CORE_ADDR) -1;
138 mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
142 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
143 error (_("Bogon register number %d."), regno);
145 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
147 else if ((regno >= mips_regnum (gdbarch)->fp0)
148 && (regno < mips_regnum (gdbarch)->fp0 + 32))
149 regaddr = MIPS64_FPR_BASE + (regno - gdbarch_fp0_regnum (gdbarch));
150 else if (regno == mips_regnum (gdbarch)->pc)
152 else if (regno == mips_regnum (gdbarch)->cause)
153 regaddr = store? (CORE_ADDR) -1 : MIPS64_CAUSE;
154 else if (regno == mips_regnum (gdbarch)->badvaddr)
155 regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR;
156 else if (regno == mips_regnum (gdbarch)->lo)
157 regaddr = MIPS64_MMLO;
158 else if (regno == mips_regnum (gdbarch)->hi)
159 regaddr = MIPS64_MMHI;
160 else if (regno == mips_regnum (gdbarch)->fp_control_status)
161 regaddr = MIPS64_FPC_CSR;
162 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
163 regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR;
164 else if (mips_regnum (gdbarch)->dspacc != -1
165 && regno >= mips_regnum (gdbarch)->dspacc
166 && regno < mips_regnum (gdbarch)->dspacc + 6)
167 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
168 else if (regno == mips_regnum (gdbarch)->dspctl)
169 regaddr = DSP_CONTROL;
170 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
173 regaddr = (CORE_ADDR) -1;
178 /* Fetch the thread-local storage pointer for libthread_db. */
181 ps_get_thread_area (struct ps_prochandle *ph,
182 lwpid_t lwpid, int idx, void **base)
184 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
187 /* IDX is the bias from the thread pointer to the beginning of the
188 thread descriptor. It has to be subtracted due to implementation
189 quirks in libthread_db. */
190 *base = (void *) ((char *)*base - idx);
195 /* Wrapper functions. These are only used by libthread_db. */
198 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
200 if (mips_isa_regsize (regcache->arch ()) == 4)
201 mips_supply_gregset (regcache, (const mips_elf_gregset_t *) gregsetp);
203 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *) gregsetp);
207 fill_gregset (const struct regcache *regcache,
208 gdb_gregset_t *gregsetp, int regno)
210 if (mips_isa_regsize (regcache->arch ()) == 4)
211 mips_fill_gregset (regcache, (mips_elf_gregset_t *) gregsetp, regno);
213 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *) gregsetp, regno);
217 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
219 if (mips_isa_regsize (regcache->arch ()) == 4)
220 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *) fpregsetp);
222 mips64_supply_fpregset (regcache,
223 (const mips64_elf_fpregset_t *) fpregsetp);
227 fill_fpregset (const struct regcache *regcache,
228 gdb_fpregset_t *fpregsetp, int regno)
230 if (mips_isa_regsize (regcache->arch ()) == 4)
231 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *) fpregsetp, regno);
233 mips64_fill_fpregset (regcache,
234 (mips64_elf_fpregset_t *) fpregsetp, regno);
238 /* Fetch REGNO (or all registers if REGNO == -1) from the target
239 using PTRACE_GETREGS et al. */
242 mips_linux_nat_target::mips64_regsets_fetch_registers
243 (struct regcache *regcache, int regno)
245 struct gdbarch *gdbarch = regcache->arch ();
251 if (regno >= mips_regnum (gdbarch)->fp0
252 && regno <= mips_regnum (gdbarch)->fp0 + 32)
254 else if (regno == mips_regnum (gdbarch)->fp_control_status)
256 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
261 /* DSP registers are optional and not a part of any set. */
262 have_dsp = mips_regnum (gdbarch)->dspctl != -1;
265 else if (regno >= mips_regnum (gdbarch)->dspacc
266 && regno < mips_regnum (gdbarch)->dspacc + 6)
268 else if (regno == mips_regnum (gdbarch)->dspctl)
273 tid = get_ptrace_pid (regcache_get_ptid (regcache));
275 if (regno == -1 || (!is_fp && !is_dsp))
277 mips64_elf_gregset_t regs;
279 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
283 have_ptrace_regsets = 0;
286 perror_with_name (_("Couldn't get registers"));
289 mips64_supply_gregset (regcache,
290 (const mips64_elf_gregset_t *) ®s);
293 if (regno == -1 || is_fp)
295 mips64_elf_fpregset_t fp_regs;
297 if (ptrace (PTRACE_GETFPREGS, tid, 0L,
298 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
302 have_ptrace_regsets = 0;
305 perror_with_name (_("Couldn't get FP registers"));
308 mips64_supply_fpregset (regcache,
309 (const mips64_elf_fpregset_t *) &fp_regs);
313 linux_nat_trad_target::fetch_registers (regcache, regno);
314 else if (regno == -1 && have_dsp)
316 for (regi = mips_regnum (gdbarch)->dspacc;
317 regi < mips_regnum (gdbarch)->dspacc + 6;
319 linux_nat_trad_target::fetch_registers (regcache, regi);
320 linux_nat_trad_target::fetch_registers (regcache,
321 mips_regnum (gdbarch)->dspctl);
325 /* Store REGNO (or all registers if REGNO == -1) to the target
326 using PTRACE_SETREGS et al. */
329 mips_linux_nat_target::mips64_regsets_store_registers
330 (struct regcache *regcache, int regno)
332 struct gdbarch *gdbarch = regcache->arch ();
338 if (regno >= mips_regnum (gdbarch)->fp0
339 && regno <= mips_regnum (gdbarch)->fp0 + 32)
341 else if (regno == mips_regnum (gdbarch)->fp_control_status)
343 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
348 /* DSP registers are optional and not a part of any set. */
349 have_dsp = mips_regnum (gdbarch)->dspctl != -1;
352 else if (regno >= mips_regnum (gdbarch)->dspacc
353 && regno < mips_regnum (gdbarch)->dspacc + 6)
355 else if (regno == mips_regnum (gdbarch)->dspctl)
360 tid = get_ptrace_pid (regcache_get_ptid (regcache));
362 if (regno == -1 || (!is_fp && !is_dsp))
364 mips64_elf_gregset_t regs;
366 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
367 perror_with_name (_("Couldn't get registers"));
369 mips64_fill_gregset (regcache, ®s, regno);
371 if (ptrace (PTRACE_SETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
372 perror_with_name (_("Couldn't set registers"));
375 if (regno == -1 || is_fp)
377 mips64_elf_fpregset_t fp_regs;
379 if (ptrace (PTRACE_GETFPREGS, tid, 0L,
380 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
381 perror_with_name (_("Couldn't get FP registers"));
383 mips64_fill_fpregset (regcache, &fp_regs, regno);
385 if (ptrace (PTRACE_SETFPREGS, tid, 0L,
386 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
387 perror_with_name (_("Couldn't set FP registers"));
391 linux_nat_trad_target::store_registers (regcache, regno);
392 else if (regno == -1 && have_dsp)
394 for (regi = mips_regnum (gdbarch)->dspacc;
395 regi < mips_regnum (gdbarch)->dspacc + 6;
397 linux_nat_trad_target::store_registers (regcache, regi);
398 linux_nat_trad_target::store_registers (regcache,
399 mips_regnum (gdbarch)->dspctl);
403 /* Fetch REGNO (or all registers if REGNO == -1) from the target
404 using any working method. */
407 mips_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum)
409 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
410 if (have_ptrace_regsets)
411 mips64_regsets_fetch_registers (regcache, regnum);
413 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
414 back to PTRACE_PEEKUSER. */
415 if (!have_ptrace_regsets)
416 linux_nat_trad_target::fetch_registers (regcache, regnum);
419 /* Store REGNO (or all registers if REGNO == -1) to the target
420 using any working method. */
423 mips_linux_nat_target::store_registers (struct regcache *regcache, int regnum)
425 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
426 if (have_ptrace_regsets)
427 mips64_regsets_store_registers (regcache, regnum);
429 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
430 back to PTRACE_PEEKUSER. */
431 if (!have_ptrace_regsets)
432 linux_nat_trad_target::store_registers (regcache, regnum);
435 /* Return the address in the core dump or inferior of register
439 mips_linux_nat_target::register_u_offset (struct gdbarch *gdbarch,
440 int regno, int store_p)
442 if (mips_abi_regsize (gdbarch) == 8)
443 return mips64_linux_register_addr (gdbarch, regno, store_p);
445 return mips_linux_register_addr (gdbarch, regno, store_p);
448 const struct target_desc *
449 mips_linux_nat_target::read_description ()
451 static int have_dsp = -1;
457 tid = ptid_get_lwp (inferior_ptid);
459 tid = ptid_get_pid (inferior_ptid);
462 ptrace (PTRACE_PEEKUSER, tid, DSP_CONTROL, 0);
472 perror_with_name (_("Couldn't check DSP support"));
477 /* Report that target registers are a size we know for sure
478 that we can get from ptrace. */
479 if (_MIPS_SIM == _ABIO32)
480 return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
482 return have_dsp ? tdesc_mips64_dsp_linux : tdesc_mips64_linux;
485 /* -1 if the kernel and/or CPU do not support watch registers.
486 1 if watch_readback is valid and we can read style, num_valid
488 0 if we need to read the watch_readback. */
490 static int watch_readback_valid;
492 /* Cached watch register read values. */
494 static struct pt_watch_regs watch_readback;
496 static struct mips_watchpoint *current_watches;
498 /* The current set of watch register values for writing the
501 static struct pt_watch_regs watch_mirror;
504 mips_show_dr (const char *func, CORE_ADDR addr,
505 int len, enum target_hw_bp_type type)
509 puts_unfiltered (func);
511 printf_unfiltered (" (addr=%s, len=%d, type=%s)",
512 paddress (target_gdbarch (), addr), len,
513 type == hw_write ? "data-write"
514 : (type == hw_read ? "data-read"
515 : (type == hw_access ? "data-read/write"
516 : (type == hw_execute ? "instruction-execute"
518 puts_unfiltered (":\n");
520 for (i = 0; i < MAX_DEBUG_REGISTER; i++)
521 printf_unfiltered ("\tDR%d: lo=%s, hi=%s\n", i,
522 paddress (target_gdbarch (),
523 mips_linux_watch_get_watchlo (&watch_mirror,
525 paddress (target_gdbarch (),
526 mips_linux_watch_get_watchhi (&watch_mirror,
530 /* Target to_can_use_hw_breakpoint implementation. Return 1 if we can
531 handle the specified watch type. */
534 mips_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
538 uint32_t wanted_mask, irw_mask;
540 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
542 &watch_readback_valid, 0))
547 case bp_hardware_watchpoint:
548 wanted_mask = W_MASK;
550 case bp_read_watchpoint:
551 wanted_mask = R_MASK;
553 case bp_access_watchpoint:
554 wanted_mask = R_MASK | W_MASK;
561 i < mips_linux_watch_get_num_valid (&watch_readback) && cnt;
564 irw_mask = mips_linux_watch_get_irw_mask (&watch_readback, i);
565 if ((irw_mask & wanted_mask) == wanted_mask)
568 return (cnt == 0) ? 1 : 0;
571 /* Target to_stopped_by_watchpoint implementation. Return 1 if
572 stopped by watchpoint. The watchhi R and W bits indicate the watch
573 register triggered. */
576 mips_linux_nat_target::stopped_by_watchpoint ()
581 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
583 &watch_readback_valid, 1))
586 num_valid = mips_linux_watch_get_num_valid (&watch_readback);
588 for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
589 if (mips_linux_watch_get_watchhi (&watch_readback, n) & (R_MASK | W_MASK))
595 /* Target to_stopped_data_address implementation. Set the address
596 where the watch triggered (if known). Return 1 if the address was
600 mips_linux_nat_target::stopped_data_address (CORE_ADDR *paddr)
602 /* On mips we don't know the low order 3 bits of the data address,
603 so we must return false. */
607 /* Target to_region_ok_for_hw_watchpoint implementation. Return 1 if
608 the specified region can be covered by the watch registers. */
611 mips_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
613 struct pt_watch_regs dummy_regs;
616 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
618 &watch_readback_valid, 0))
621 dummy_regs = watch_readback;
622 /* Clear them out. */
623 for (i = 0; i < mips_linux_watch_get_num_valid (&dummy_regs); i++)
624 mips_linux_watch_set_watchlo (&dummy_regs, i, 0);
625 return mips_linux_watch_try_one_watch (&dummy_regs, addr, len, 0);
628 /* Write the mirrored watch register values for each thread. */
631 write_watchpoint_regs (void)
638 tid = ptid_get_lwp (lp->ptid);
639 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1)
640 perror_with_name (_("Couldn't write debug register"));
645 /* linux_nat new_thread implementation. Write the mirrored watch
646 register values for the new thread. */
649 mips_linux_new_thread (struct lwp_info *lp)
651 long tid = lp->ptid.lwp ();
653 if (!mips_linux_read_watch_registers (tid,
655 &watch_readback_valid, 0))
658 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1)
659 perror_with_name (_("Couldn't write debug register"));
662 /* Target to_insert_watchpoint implementation. Try to insert a new
663 watch. Return zero on success. */
666 mips_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
667 enum target_hw_bp_type type,
668 struct expression *cond)
670 struct pt_watch_regs regs;
671 struct mips_watchpoint *new_watch;
672 struct mips_watchpoint **pw;
677 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
679 &watch_readback_valid, 0))
685 regs = watch_readback;
686 /* Add the current watches. */
687 mips_linux_watch_populate_regs (current_watches, ®s);
689 /* Now try to add the new watch. */
690 if (!mips_linux_watch_try_one_watch (®s, addr, len,
691 mips_linux_watch_type_to_irw (type)))
694 /* It fit. Stick it on the end of the list. */
695 new_watch = XNEW (struct mips_watchpoint);
696 new_watch->addr = addr;
697 new_watch->len = len;
698 new_watch->type = type;
699 new_watch->next = NULL;
701 pw = ¤t_watches;
707 retval = write_watchpoint_regs ();
710 mips_show_dr ("insert_watchpoint", addr, len, type);
715 /* Target to_remove_watchpoint implementation. Try to remove a watch.
716 Return zero on success. */
719 mips_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
720 enum target_hw_bp_type type,
721 struct expression *cond)
726 struct mips_watchpoint **pw;
727 struct mips_watchpoint *w;
729 /* Search for a known watch that matches. Then unlink and free
732 pw = ¤t_watches;
735 if (w->addr == addr && w->len == len && w->type == type)
746 return -1; /* We don't know about it, fail doing nothing. */
748 /* At this point watch_readback is known to be valid because we
749 could not have added the watch without reading it. */
750 gdb_assert (watch_readback_valid == 1);
752 watch_mirror = watch_readback;
753 mips_linux_watch_populate_regs (current_watches, &watch_mirror);
755 retval = write_watchpoint_regs ();
758 mips_show_dr ("remove_watchpoint", addr, len, type);
763 /* Target to_close implementation. Free any watches and call the
764 super implementation. */
767 mips_linux_nat_target::close ()
769 struct mips_watchpoint *w;
770 struct mips_watchpoint *nw;
772 /* Clean out the current_watches list. */
780 current_watches = NULL;
782 linux_nat_trad_target::close ();
786 _initialize_mips_linux_nat (void)
788 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
789 &show_debug_regs, _("\
790 Set whether to show variables that mirror the mips debug registers."), _("\
791 Show whether to show variables that mirror the mips debug registers."), _("\
792 Use \"on\" to enable, \"off\" to disable.\n\
793 If enabled, the debug registers values are shown when GDB inserts\n\
794 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
795 triggers a breakpoint or watchpoint."),
798 &maintenance_set_cmdlist,
799 &maintenance_show_cmdlist);
801 linux_target = &the_mips_linux_nat_target;
802 add_target (&the_mips_linux_nat_target);
803 linux_nat_set_new_thread (&the_mips_linux_nat_target,
804 mips_linux_new_thread);