1 /* Native-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2018 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "mips-tdep.h"
27 #include "linux-nat-trad.h"
28 #include "mips-linux-tdep.h"
29 #include "target-descriptions.h"
31 #include "gdb_proc_service.h"
35 #include "nat/gdb_ptrace.h"
36 #include <asm/ptrace.h>
37 #include "inf-ptrace.h"
39 #include "nat/mips-linux-watch.h"
41 #ifndef PTRACE_GET_THREAD_AREA
42 #define PTRACE_GET_THREAD_AREA 25
45 class mips_linux_nat_target final : public linux_nat_trad_target
48 /* Add our register access methods. */
49 void fetch_registers (struct regcache *, int) override;
50 void store_registers (struct regcache *, int) override;
52 void close () override;
54 int can_use_hw_breakpoint (enum bptype, int, int) override;
56 int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
57 struct expression *) override;
59 int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
60 struct expression *) override;
62 bool stopped_by_watchpoint () override;
64 bool stopped_data_address (CORE_ADDR *) override;
66 int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
68 const struct target_desc *read_description () override;
71 /* Override linux_nat_trad_target methods. */
72 CORE_ADDR register_u_offset (struct gdbarch *gdbarch,
73 int regno, int store_p) override;
75 /* Override linux_nat_target low methods. */
76 void low_new_thread (struct lwp_info *lp) override;
79 /* Helpers. See definitions. */
80 void mips64_regsets_store_registers (struct regcache *regcache,
82 void mips64_regsets_fetch_registers (struct regcache *regcache,
86 static mips_linux_nat_target the_mips_linux_nat_target;
88 /* Assume that we have PTRACE_GETREGS et al. support. If we do not,
89 we'll clear this and use PTRACE_PEEKUSER instead. */
90 static int have_ptrace_regsets = 1;
92 /* Map gdb internal register number to ptrace ``address''.
93 These ``addresses'' are normally defined in <asm/ptrace.h>.
95 ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
96 and there's no point in reading or setting MIPS_ZERO_REGNUM.
97 We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */
100 mips_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
104 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
105 error (_("Bogon register number %d."), regno);
107 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
109 else if ((regno >= mips_regnum (gdbarch)->fp0)
110 && (regno < mips_regnum (gdbarch)->fp0 + 32))
111 regaddr = FPR_BASE + (regno - mips_regnum (gdbarch)->fp0);
112 else if (regno == mips_regnum (gdbarch)->pc)
114 else if (regno == mips_regnum (gdbarch)->cause)
115 regaddr = store? (CORE_ADDR) -1 : CAUSE;
116 else if (regno == mips_regnum (gdbarch)->badvaddr)
117 regaddr = store? (CORE_ADDR) -1 : BADVADDR;
118 else if (regno == mips_regnum (gdbarch)->lo)
120 else if (regno == mips_regnum (gdbarch)->hi)
122 else if (regno == mips_regnum (gdbarch)->fp_control_status)
124 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
125 regaddr = store? (CORE_ADDR) -1 : FPC_EIR;
126 else if (mips_regnum (gdbarch)->dspacc != -1
127 && regno >= mips_regnum (gdbarch)->dspacc
128 && regno < mips_regnum (gdbarch)->dspacc + 6)
129 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
130 else if (regno == mips_regnum (gdbarch)->dspctl)
131 regaddr = DSP_CONTROL;
132 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
135 regaddr = (CORE_ADDR) -1;
141 mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
145 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
146 error (_("Bogon register number %d."), regno);
148 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
150 else if ((regno >= mips_regnum (gdbarch)->fp0)
151 && (regno < mips_regnum (gdbarch)->fp0 + 32))
152 regaddr = MIPS64_FPR_BASE + (regno - gdbarch_fp0_regnum (gdbarch));
153 else if (regno == mips_regnum (gdbarch)->pc)
155 else if (regno == mips_regnum (gdbarch)->cause)
156 regaddr = store? (CORE_ADDR) -1 : MIPS64_CAUSE;
157 else if (regno == mips_regnum (gdbarch)->badvaddr)
158 regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR;
159 else if (regno == mips_regnum (gdbarch)->lo)
160 regaddr = MIPS64_MMLO;
161 else if (regno == mips_regnum (gdbarch)->hi)
162 regaddr = MIPS64_MMHI;
163 else if (regno == mips_regnum (gdbarch)->fp_control_status)
164 regaddr = MIPS64_FPC_CSR;
165 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
166 regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR;
167 else if (mips_regnum (gdbarch)->dspacc != -1
168 && regno >= mips_regnum (gdbarch)->dspacc
169 && regno < mips_regnum (gdbarch)->dspacc + 6)
170 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
171 else if (regno == mips_regnum (gdbarch)->dspctl)
172 regaddr = DSP_CONTROL;
173 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
176 regaddr = (CORE_ADDR) -1;
181 /* Fetch the thread-local storage pointer for libthread_db. */
184 ps_get_thread_area (struct ps_prochandle *ph,
185 lwpid_t lwpid, int idx, void **base)
187 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
190 /* IDX is the bias from the thread pointer to the beginning of the
191 thread descriptor. It has to be subtracted due to implementation
192 quirks in libthread_db. */
193 *base = (void *) ((char *)*base - idx);
198 /* Wrapper functions. These are only used by libthread_db. */
201 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
203 if (mips_isa_regsize (regcache->arch ()) == 4)
204 mips_supply_gregset (regcache, (const mips_elf_gregset_t *) gregsetp);
206 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *) gregsetp);
210 fill_gregset (const struct regcache *regcache,
211 gdb_gregset_t *gregsetp, int regno)
213 if (mips_isa_regsize (regcache->arch ()) == 4)
214 mips_fill_gregset (regcache, (mips_elf_gregset_t *) gregsetp, regno);
216 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *) gregsetp, regno);
220 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
222 if (mips_isa_regsize (regcache->arch ()) == 4)
223 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *) fpregsetp);
225 mips64_supply_fpregset (regcache,
226 (const mips64_elf_fpregset_t *) fpregsetp);
230 fill_fpregset (const struct regcache *regcache,
231 gdb_fpregset_t *fpregsetp, int regno)
233 if (mips_isa_regsize (regcache->arch ()) == 4)
234 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *) fpregsetp, regno);
236 mips64_fill_fpregset (regcache,
237 (mips64_elf_fpregset_t *) fpregsetp, regno);
241 /* Fetch REGNO (or all registers if REGNO == -1) from the target
242 using PTRACE_GETREGS et al. */
245 mips_linux_nat_target::mips64_regsets_fetch_registers
246 (struct regcache *regcache, int regno)
248 struct gdbarch *gdbarch = regcache->arch ();
254 if (regno >= mips_regnum (gdbarch)->fp0
255 && regno <= mips_regnum (gdbarch)->fp0 + 32)
257 else if (regno == mips_regnum (gdbarch)->fp_control_status)
259 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
264 /* DSP registers are optional and not a part of any set. */
265 have_dsp = mips_regnum (gdbarch)->dspctl != -1;
268 else if (regno >= mips_regnum (gdbarch)->dspacc
269 && regno < mips_regnum (gdbarch)->dspacc + 6)
271 else if (regno == mips_regnum (gdbarch)->dspctl)
276 tid = get_ptrace_pid (regcache_get_ptid (regcache));
278 if (regno == -1 || (!is_fp && !is_dsp))
280 mips64_elf_gregset_t regs;
282 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
286 have_ptrace_regsets = 0;
289 perror_with_name (_("Couldn't get registers"));
292 mips64_supply_gregset (regcache,
293 (const mips64_elf_gregset_t *) ®s);
296 if (regno == -1 || is_fp)
298 mips64_elf_fpregset_t fp_regs;
300 if (ptrace (PTRACE_GETFPREGS, tid, 0L,
301 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
305 have_ptrace_regsets = 0;
308 perror_with_name (_("Couldn't get FP registers"));
311 mips64_supply_fpregset (regcache,
312 (const mips64_elf_fpregset_t *) &fp_regs);
316 linux_nat_trad_target::fetch_registers (regcache, regno);
317 else if (regno == -1 && have_dsp)
319 for (regi = mips_regnum (gdbarch)->dspacc;
320 regi < mips_regnum (gdbarch)->dspacc + 6;
322 linux_nat_trad_target::fetch_registers (regcache, regi);
323 linux_nat_trad_target::fetch_registers (regcache,
324 mips_regnum (gdbarch)->dspctl);
328 /* Store REGNO (or all registers if REGNO == -1) to the target
329 using PTRACE_SETREGS et al. */
332 mips_linux_nat_target::mips64_regsets_store_registers
333 (struct regcache *regcache, int regno)
335 struct gdbarch *gdbarch = regcache->arch ();
341 if (regno >= mips_regnum (gdbarch)->fp0
342 && regno <= mips_regnum (gdbarch)->fp0 + 32)
344 else if (regno == mips_regnum (gdbarch)->fp_control_status)
346 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
351 /* DSP registers are optional and not a part of any set. */
352 have_dsp = mips_regnum (gdbarch)->dspctl != -1;
355 else if (regno >= mips_regnum (gdbarch)->dspacc
356 && regno < mips_regnum (gdbarch)->dspacc + 6)
358 else if (regno == mips_regnum (gdbarch)->dspctl)
363 tid = get_ptrace_pid (regcache_get_ptid (regcache));
365 if (regno == -1 || (!is_fp && !is_dsp))
367 mips64_elf_gregset_t regs;
369 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
370 perror_with_name (_("Couldn't get registers"));
372 mips64_fill_gregset (regcache, ®s, regno);
374 if (ptrace (PTRACE_SETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
375 perror_with_name (_("Couldn't set registers"));
378 if (regno == -1 || is_fp)
380 mips64_elf_fpregset_t fp_regs;
382 if (ptrace (PTRACE_GETFPREGS, tid, 0L,
383 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
384 perror_with_name (_("Couldn't get FP registers"));
386 mips64_fill_fpregset (regcache, &fp_regs, regno);
388 if (ptrace (PTRACE_SETFPREGS, tid, 0L,
389 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
390 perror_with_name (_("Couldn't set FP registers"));
394 linux_nat_trad_target::store_registers (regcache, regno);
395 else if (regno == -1 && have_dsp)
397 for (regi = mips_regnum (gdbarch)->dspacc;
398 regi < mips_regnum (gdbarch)->dspacc + 6;
400 linux_nat_trad_target::store_registers (regcache, regi);
401 linux_nat_trad_target::store_registers (regcache,
402 mips_regnum (gdbarch)->dspctl);
406 /* Fetch REGNO (or all registers if REGNO == -1) from the target
407 using any working method. */
410 mips_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum)
412 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
413 if (have_ptrace_regsets)
414 mips64_regsets_fetch_registers (regcache, regnum);
416 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
417 back to PTRACE_PEEKUSER. */
418 if (!have_ptrace_regsets)
420 linux_nat_trad_target::fetch_registers (regcache, regnum);
422 /* Fill the inaccessible zero register with zero. */
423 if (regnum == MIPS_ZERO_REGNUM || regnum == -1)
424 regcache->raw_supply_zeroed (MIPS_ZERO_REGNUM);
428 /* Store REGNO (or all registers if REGNO == -1) to the target
429 using any working method. */
432 mips_linux_nat_target::store_registers (struct regcache *regcache, int regnum)
434 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
435 if (have_ptrace_regsets)
436 mips64_regsets_store_registers (regcache, regnum);
438 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
439 back to PTRACE_PEEKUSER. */
440 if (!have_ptrace_regsets)
441 linux_nat_trad_target::store_registers (regcache, regnum);
444 /* Return the address in the core dump or inferior of register
448 mips_linux_nat_target::register_u_offset (struct gdbarch *gdbarch,
449 int regno, int store_p)
451 if (mips_abi_regsize (gdbarch) == 8)
452 return mips64_linux_register_addr (gdbarch, regno, store_p);
454 return mips_linux_register_addr (gdbarch, regno, store_p);
457 const struct target_desc *
458 mips_linux_nat_target::read_description ()
460 static int have_dsp = -1;
466 tid = ptid_get_lwp (inferior_ptid);
468 tid = ptid_get_pid (inferior_ptid);
471 ptrace (PTRACE_PEEKUSER, tid, DSP_CONTROL, 0);
481 perror_with_name (_("Couldn't check DSP support"));
486 /* Report that target registers are a size we know for sure
487 that we can get from ptrace. */
488 if (_MIPS_SIM == _ABIO32)
489 return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
491 return have_dsp ? tdesc_mips64_dsp_linux : tdesc_mips64_linux;
494 /* -1 if the kernel and/or CPU do not support watch registers.
495 1 if watch_readback is valid and we can read style, num_valid
497 0 if we need to read the watch_readback. */
499 static int watch_readback_valid;
501 /* Cached watch register read values. */
503 static struct pt_watch_regs watch_readback;
505 static struct mips_watchpoint *current_watches;
507 /* The current set of watch register values for writing the
510 static struct pt_watch_regs watch_mirror;
513 mips_show_dr (const char *func, CORE_ADDR addr,
514 int len, enum target_hw_bp_type type)
518 puts_unfiltered (func);
520 printf_unfiltered (" (addr=%s, len=%d, type=%s)",
521 paddress (target_gdbarch (), addr), len,
522 type == hw_write ? "data-write"
523 : (type == hw_read ? "data-read"
524 : (type == hw_access ? "data-read/write"
525 : (type == hw_execute ? "instruction-execute"
527 puts_unfiltered (":\n");
529 for (i = 0; i < MAX_DEBUG_REGISTER; i++)
530 printf_unfiltered ("\tDR%d: lo=%s, hi=%s\n", i,
531 paddress (target_gdbarch (),
532 mips_linux_watch_get_watchlo (&watch_mirror,
534 paddress (target_gdbarch (),
535 mips_linux_watch_get_watchhi (&watch_mirror,
539 /* Target to_can_use_hw_breakpoint implementation. Return 1 if we can
540 handle the specified watch type. */
543 mips_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
547 uint32_t wanted_mask, irw_mask;
549 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
551 &watch_readback_valid, 0))
556 case bp_hardware_watchpoint:
557 wanted_mask = W_MASK;
559 case bp_read_watchpoint:
560 wanted_mask = R_MASK;
562 case bp_access_watchpoint:
563 wanted_mask = R_MASK | W_MASK;
570 i < mips_linux_watch_get_num_valid (&watch_readback) && cnt;
573 irw_mask = mips_linux_watch_get_irw_mask (&watch_readback, i);
574 if ((irw_mask & wanted_mask) == wanted_mask)
577 return (cnt == 0) ? 1 : 0;
580 /* Target to_stopped_by_watchpoint implementation. Return 1 if
581 stopped by watchpoint. The watchhi R and W bits indicate the watch
582 register triggered. */
585 mips_linux_nat_target::stopped_by_watchpoint ()
590 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
592 &watch_readback_valid, 1))
595 num_valid = mips_linux_watch_get_num_valid (&watch_readback);
597 for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
598 if (mips_linux_watch_get_watchhi (&watch_readback, n) & (R_MASK | W_MASK))
604 /* Target to_stopped_data_address implementation. Set the address
605 where the watch triggered (if known). Return 1 if the address was
609 mips_linux_nat_target::stopped_data_address (CORE_ADDR *paddr)
611 /* On mips we don't know the low order 3 bits of the data address,
612 so we must return false. */
616 /* Target to_region_ok_for_hw_watchpoint implementation. Return 1 if
617 the specified region can be covered by the watch registers. */
620 mips_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
622 struct pt_watch_regs dummy_regs;
625 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
627 &watch_readback_valid, 0))
630 dummy_regs = watch_readback;
631 /* Clear them out. */
632 for (i = 0; i < mips_linux_watch_get_num_valid (&dummy_regs); i++)
633 mips_linux_watch_set_watchlo (&dummy_regs, i, 0);
634 return mips_linux_watch_try_one_watch (&dummy_regs, addr, len, 0);
637 /* Write the mirrored watch register values for each thread. */
640 write_watchpoint_regs (void)
647 tid = ptid_get_lwp (lp->ptid);
648 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1)
649 perror_with_name (_("Couldn't write debug register"));
654 /* linux_nat_target::low_new_thread implementation. Write the
655 mirrored watch register values for the new thread. */
658 mips_linux_nat_target::low_new_thread (struct lwp_info *lp)
660 long tid = lp->ptid.lwp ();
662 if (!mips_linux_read_watch_registers (tid,
664 &watch_readback_valid, 0))
667 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1)
668 perror_with_name (_("Couldn't write debug register"));
671 /* Target to_insert_watchpoint implementation. Try to insert a new
672 watch. Return zero on success. */
675 mips_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
676 enum target_hw_bp_type type,
677 struct expression *cond)
679 struct pt_watch_regs regs;
680 struct mips_watchpoint *new_watch;
681 struct mips_watchpoint **pw;
686 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
688 &watch_readback_valid, 0))
694 regs = watch_readback;
695 /* Add the current watches. */
696 mips_linux_watch_populate_regs (current_watches, ®s);
698 /* Now try to add the new watch. */
699 if (!mips_linux_watch_try_one_watch (®s, addr, len,
700 mips_linux_watch_type_to_irw (type)))
703 /* It fit. Stick it on the end of the list. */
704 new_watch = XNEW (struct mips_watchpoint);
705 new_watch->addr = addr;
706 new_watch->len = len;
707 new_watch->type = type;
708 new_watch->next = NULL;
710 pw = ¤t_watches;
716 retval = write_watchpoint_regs ();
719 mips_show_dr ("insert_watchpoint", addr, len, type);
724 /* Target to_remove_watchpoint implementation. Try to remove a watch.
725 Return zero on success. */
728 mips_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
729 enum target_hw_bp_type type,
730 struct expression *cond)
735 struct mips_watchpoint **pw;
736 struct mips_watchpoint *w;
738 /* Search for a known watch that matches. Then unlink and free
741 pw = ¤t_watches;
744 if (w->addr == addr && w->len == len && w->type == type)
755 return -1; /* We don't know about it, fail doing nothing. */
757 /* At this point watch_readback is known to be valid because we
758 could not have added the watch without reading it. */
759 gdb_assert (watch_readback_valid == 1);
761 watch_mirror = watch_readback;
762 mips_linux_watch_populate_regs (current_watches, &watch_mirror);
764 retval = write_watchpoint_regs ();
767 mips_show_dr ("remove_watchpoint", addr, len, type);
772 /* Target to_close implementation. Free any watches and call the
773 super implementation. */
776 mips_linux_nat_target::close ()
778 struct mips_watchpoint *w;
779 struct mips_watchpoint *nw;
781 /* Clean out the current_watches list. */
789 current_watches = NULL;
791 linux_nat_trad_target::close ();
795 _initialize_mips_linux_nat (void)
797 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
798 &show_debug_regs, _("\
799 Set whether to show variables that mirror the mips debug registers."), _("\
800 Show whether to show variables that mirror the mips debug registers."), _("\
801 Use \"on\" to enable, \"off\" to disable.\n\
802 If enabled, the debug registers values are shown when GDB inserts\n\
803 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
804 triggers a breakpoint or watchpoint."),
807 &maintenance_set_cmdlist,
808 &maintenance_show_cmdlist);
810 linux_target = &the_mips_linux_nat_target;
811 add_inf_child_target (&the_mips_linux_nat_target);