1 /* Native-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2013 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "gdb_assert.h"
25 #include "mips-tdep.h"
28 #include "linux-nat.h"
29 #include "mips-linux-tdep.h"
30 #include "target-descriptions.h"
32 #include "gdb_proc_service.h"
36 #include <sys/ptrace.h>
37 #include <asm/ptrace.h>
39 #include "mips-linux-watch.h"
41 #include "features/mips-linux.c"
42 #include "features/mips-dsp-linux.c"
43 #include "features/mips64-linux.c"
44 #include "features/mips64-dsp-linux.c"
46 #ifndef PTRACE_GET_THREAD_AREA
47 #define PTRACE_GET_THREAD_AREA 25
50 /* Assume that we have PTRACE_GETREGS et al. support. If we do not,
51 we'll clear this and use PTRACE_PEEKUSER instead. */
52 static int have_ptrace_regsets = 1;
54 /* Whether or not to print the mirrored debug registers. */
56 static int maint_show_dr;
58 /* Saved function pointers to fetch and store a single register using
59 PTRACE_PEEKUSER and PTRACE_POKEUSER. */
61 static void (*super_fetch_registers) (struct target_ops *,
62 struct regcache *, int);
63 static void (*super_store_registers) (struct target_ops *,
64 struct regcache *, int);
66 static void (*super_close) (void);
68 /* Map gdb internal register number to ptrace ``address''.
69 These ``addresses'' are normally defined in <asm/ptrace.h>.
71 ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
72 and there's no point in reading or setting MIPS_ZERO_REGNUM.
73 We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */
76 mips_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
80 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
81 error (_("Bogon register number %d."), regno);
83 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
85 else if ((regno >= mips_regnum (gdbarch)->fp0)
86 && (regno < mips_regnum (gdbarch)->fp0 + 32))
87 regaddr = FPR_BASE + (regno - mips_regnum (gdbarch)->fp0);
88 else if (regno == mips_regnum (gdbarch)->pc)
90 else if (regno == mips_regnum (gdbarch)->cause)
91 regaddr = store? (CORE_ADDR) -1 : CAUSE;
92 else if (regno == mips_regnum (gdbarch)->badvaddr)
93 regaddr = store? (CORE_ADDR) -1 : BADVADDR;
94 else if (regno == mips_regnum (gdbarch)->lo)
96 else if (regno == mips_regnum (gdbarch)->hi)
98 else if (regno == mips_regnum (gdbarch)->fp_control_status)
100 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
101 regaddr = store? (CORE_ADDR) -1 : FPC_EIR;
102 else if (mips_regnum (gdbarch)->dspacc != -1
103 && regno >= mips_regnum (gdbarch)->dspacc
104 && regno < mips_regnum (gdbarch)->dspacc + 6)
105 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
106 else if (regno == mips_regnum (gdbarch)->dspctl)
107 regaddr = DSP_CONTROL;
108 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
111 regaddr = (CORE_ADDR) -1;
117 mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
121 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
122 error (_("Bogon register number %d."), regno);
124 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
126 else if ((regno >= mips_regnum (gdbarch)->fp0)
127 && (regno < mips_regnum (gdbarch)->fp0 + 32))
128 regaddr = MIPS64_FPR_BASE + (regno - gdbarch_fp0_regnum (gdbarch));
129 else if (regno == mips_regnum (gdbarch)->pc)
131 else if (regno == mips_regnum (gdbarch)->cause)
132 regaddr = store? (CORE_ADDR) -1 : MIPS64_CAUSE;
133 else if (regno == mips_regnum (gdbarch)->badvaddr)
134 regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR;
135 else if (regno == mips_regnum (gdbarch)->lo)
136 regaddr = MIPS64_MMLO;
137 else if (regno == mips_regnum (gdbarch)->hi)
138 regaddr = MIPS64_MMHI;
139 else if (regno == mips_regnum (gdbarch)->fp_control_status)
140 regaddr = MIPS64_FPC_CSR;
141 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
142 regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR;
143 else if (mips_regnum (gdbarch)->dspacc != -1
144 && regno >= mips_regnum (gdbarch)->dspacc
145 && regno < mips_regnum (gdbarch)->dspacc + 6)
146 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
147 else if (regno == mips_regnum (gdbarch)->dspctl)
148 regaddr = DSP_CONTROL;
149 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
152 regaddr = (CORE_ADDR) -1;
157 /* Fetch the thread-local storage pointer for libthread_db. */
160 ps_get_thread_area (const struct ps_prochandle *ph,
161 lwpid_t lwpid, int idx, void **base)
163 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
166 /* IDX is the bias from the thread pointer to the beginning of the
167 thread descriptor. It has to be subtracted due to implementation
168 quirks in libthread_db. */
169 *base = (void *) ((char *)*base - idx);
174 /* Wrapper functions. These are only used by libthread_db. */
177 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
179 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
180 mips_supply_gregset (regcache, (const mips_elf_gregset_t *) gregsetp);
182 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *) gregsetp);
186 fill_gregset (const struct regcache *regcache,
187 gdb_gregset_t *gregsetp, int regno)
189 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
190 mips_fill_gregset (regcache, (mips_elf_gregset_t *) gregsetp, regno);
192 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *) gregsetp, regno);
196 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
198 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
199 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *) fpregsetp);
201 mips64_supply_fpregset (regcache,
202 (const mips64_elf_fpregset_t *) fpregsetp);
206 fill_fpregset (const struct regcache *regcache,
207 gdb_fpregset_t *fpregsetp, int regno)
209 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
210 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *) fpregsetp, regno);
212 mips64_fill_fpregset (regcache,
213 (mips64_elf_fpregset_t *) fpregsetp, regno);
217 /* Fetch REGNO (or all registers if REGNO == -1) from the target
218 using PTRACE_GETREGS et al. */
221 mips64_linux_regsets_fetch_registers (struct target_ops *ops,
222 struct regcache *regcache, int regno)
224 struct gdbarch *gdbarch = get_regcache_arch (regcache);
230 if (regno >= mips_regnum (gdbarch)->fp0
231 && regno <= mips_regnum (gdbarch)->fp0 + 32)
233 else if (regno == mips_regnum (gdbarch)->fp_control_status)
235 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
240 /* DSP registers are optional and not a part of any set. */
241 have_dsp = mips_regnum (gdbarch)->dspctl != -1;
244 else if (regno >= mips_regnum (gdbarch)->dspacc
245 && regno < mips_regnum (gdbarch)->dspacc + 6)
247 else if (regno == mips_regnum (gdbarch)->dspctl)
252 tid = ptid_get_lwp (inferior_ptid);
254 tid = ptid_get_pid (inferior_ptid);
256 if (regno == -1 || (!is_fp && !is_dsp))
258 mips64_elf_gregset_t regs;
260 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
264 have_ptrace_regsets = 0;
267 perror_with_name (_("Couldn't get registers"));
270 mips64_supply_gregset (regcache,
271 (const mips64_elf_gregset_t *) ®s);
274 if (regno == -1 || is_fp)
276 mips64_elf_fpregset_t fp_regs;
278 if (ptrace (PTRACE_GETFPREGS, tid, 0L,
279 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
283 have_ptrace_regsets = 0;
286 perror_with_name (_("Couldn't get FP registers"));
289 mips64_supply_fpregset (regcache,
290 (const mips64_elf_fpregset_t *) &fp_regs);
294 super_fetch_registers (ops, regcache, regno);
295 else if (regno == -1 && have_dsp)
297 for (regi = mips_regnum (gdbarch)->dspacc;
298 regi < mips_regnum (gdbarch)->dspacc + 6;
300 super_fetch_registers (ops, regcache, regi);
301 super_fetch_registers (ops, regcache, mips_regnum (gdbarch)->dspctl);
305 /* Store REGNO (or all registers if REGNO == -1) to the target
306 using PTRACE_SETREGS et al. */
309 mips64_linux_regsets_store_registers (struct target_ops *ops,
310 struct regcache *regcache, int regno)
312 struct gdbarch *gdbarch = get_regcache_arch (regcache);
318 if (regno >= mips_regnum (gdbarch)->fp0
319 && regno <= mips_regnum (gdbarch)->fp0 + 32)
321 else if (regno == mips_regnum (gdbarch)->fp_control_status)
323 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
328 /* DSP registers are optional and not a part of any set. */
329 have_dsp = mips_regnum (gdbarch)->dspctl != -1;
332 else if (regno >= mips_regnum (gdbarch)->dspacc
333 && regno < mips_regnum (gdbarch)->dspacc + 6)
335 else if (regno == mips_regnum (gdbarch)->dspctl)
340 tid = ptid_get_lwp (inferior_ptid);
342 tid = ptid_get_pid (inferior_ptid);
344 if (regno == -1 || (!is_fp && !is_dsp))
346 mips64_elf_gregset_t regs;
348 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
349 perror_with_name (_("Couldn't get registers"));
351 mips64_fill_gregset (regcache, ®s, regno);
353 if (ptrace (PTRACE_SETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
354 perror_with_name (_("Couldn't set registers"));
357 if (regno == -1 || is_fp)
359 mips64_elf_fpregset_t fp_regs;
361 if (ptrace (PTRACE_GETFPREGS, tid, 0L,
362 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
363 perror_with_name (_("Couldn't get FP registers"));
365 mips64_fill_fpregset (regcache, &fp_regs, regno);
367 if (ptrace (PTRACE_SETFPREGS, tid, 0L,
368 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
369 perror_with_name (_("Couldn't set FP registers"));
373 super_store_registers (ops, regcache, regno);
374 else if (regno == -1 && have_dsp)
376 for (regi = mips_regnum (gdbarch)->dspacc;
377 regi < mips_regnum (gdbarch)->dspacc + 6;
379 super_store_registers (ops, regcache, regi);
380 super_store_registers (ops, regcache, mips_regnum (gdbarch)->dspctl);
384 /* Fetch REGNO (or all registers if REGNO == -1) from the target
385 using any working method. */
388 mips64_linux_fetch_registers (struct target_ops *ops,
389 struct regcache *regcache, int regnum)
391 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
392 if (have_ptrace_regsets)
393 mips64_linux_regsets_fetch_registers (ops, regcache, regnum);
395 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
396 back to PTRACE_PEEKUSER. */
397 if (!have_ptrace_regsets)
398 super_fetch_registers (ops, regcache, regnum);
401 /* Store REGNO (or all registers if REGNO == -1) to the target
402 using any working method. */
405 mips64_linux_store_registers (struct target_ops *ops,
406 struct regcache *regcache, int regnum)
408 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
409 if (have_ptrace_regsets)
410 mips64_linux_regsets_store_registers (ops, regcache, regnum);
412 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
413 back to PTRACE_PEEKUSER. */
414 if (!have_ptrace_regsets)
415 super_store_registers (ops, regcache, regnum);
418 /* Return the address in the core dump or inferior of register
422 mips_linux_register_u_offset (struct gdbarch *gdbarch, int regno, int store_p)
424 if (mips_abi_regsize (gdbarch) == 8)
425 return mips64_linux_register_addr (gdbarch, regno, store_p);
427 return mips_linux_register_addr (gdbarch, regno, store_p);
430 static const struct target_desc *
431 mips_linux_read_description (struct target_ops *ops)
433 static int have_dsp = -1;
439 tid = ptid_get_lwp (inferior_ptid);
441 tid = ptid_get_pid (inferior_ptid);
443 ptrace (PTRACE_PEEKUSER, tid, DSP_CONTROL, 0);
453 perror_with_name (_("Couldn't check DSP support"));
458 /* Report that target registers are a size we know for sure
459 that we can get from ptrace. */
460 if (_MIPS_SIM == _ABIO32)
461 return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
463 return have_dsp ? tdesc_mips64_dsp_linux : tdesc_mips64_linux;
466 /* -1 if the kernel and/or CPU do not support watch registers.
467 1 if watch_readback is valid and we can read style, num_valid
469 0 if we need to read the watch_readback. */
471 static int watch_readback_valid;
473 /* Cached watch register read values. */
475 static struct pt_watch_regs watch_readback;
477 static struct mips_watchpoint *current_watches;
479 /* The current set of watch register values for writing the
482 static struct pt_watch_regs watch_mirror;
485 mips_show_dr (const char *func, CORE_ADDR addr,
486 int len, enum target_hw_bp_type type)
490 puts_unfiltered (func);
492 printf_unfiltered (" (addr=%s, len=%d, type=%s)",
493 paddress (target_gdbarch (), addr), len,
494 type == hw_write ? "data-write"
495 : (type == hw_read ? "data-read"
496 : (type == hw_access ? "data-read/write"
497 : (type == hw_execute ? "instruction-execute"
499 puts_unfiltered (":\n");
501 for (i = 0; i < MAX_DEBUG_REGISTER; i++)
502 printf_unfiltered ("\tDR%d: lo=%s, hi=%s\n", i,
503 paddress (target_gdbarch (),
504 mips_linux_watch_get_watchlo (&watch_mirror,
506 paddress (target_gdbarch (),
507 mips_linux_watch_get_watchhi (&watch_mirror,
511 /* Target to_can_use_hw_breakpoint implementation. Return 1 if we can
512 handle the specified watch type. */
515 mips_linux_can_use_hw_breakpoint (int type, int cnt, int ot)
518 uint32_t wanted_mask, irw_mask;
520 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
522 &watch_readback_valid, 0))
527 case bp_hardware_watchpoint:
528 wanted_mask = W_MASK;
530 case bp_read_watchpoint:
531 wanted_mask = R_MASK;
533 case bp_access_watchpoint:
534 wanted_mask = R_MASK | W_MASK;
541 i < mips_linux_watch_get_num_valid (&watch_readback) && cnt;
544 irw_mask = mips_linux_watch_get_irw_mask (&watch_readback, i);
545 if ((irw_mask & wanted_mask) == wanted_mask)
548 return (cnt == 0) ? 1 : 0;
551 /* Target to_stopped_by_watchpoint implementation. Return 1 if
552 stopped by watchpoint. The watchhi R and W bits indicate the watch
553 register triggered. */
556 mips_linux_stopped_by_watchpoint (void)
561 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
563 &watch_readback_valid, 1))
566 num_valid = mips_linux_watch_get_num_valid (&watch_readback);
568 for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
569 if (mips_linux_watch_get_watchhi (&watch_readback, n) & (R_MASK | W_MASK))
575 /* Target to_stopped_data_address implementation. Set the address
576 where the watch triggered (if known). Return 1 if the address was
580 mips_linux_stopped_data_address (struct target_ops *t, CORE_ADDR *paddr)
582 /* On mips we don't know the low order 3 bits of the data address,
583 so we must return false. */
587 /* Target to_region_ok_for_hw_watchpoint implementation. Return 1 if
588 the specified region can be covered by the watch registers. */
591 mips_linux_region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
593 struct pt_watch_regs dummy_regs;
596 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
598 &watch_readback_valid, 0))
601 dummy_regs = watch_readback;
602 /* Clear them out. */
603 for (i = 0; i < mips_linux_watch_get_num_valid (&dummy_regs); i++)
604 mips_linux_watch_set_watchlo (&dummy_regs, i, 0);
605 return mips_linux_watch_try_one_watch (&dummy_regs, addr, len, 0);
608 /* Write the mirrored watch register values for each thread. */
611 write_watchpoint_regs (void)
618 tid = ptid_get_lwp (lp->ptid);
619 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror) == -1)
620 perror_with_name (_("Couldn't write debug register"));
625 /* linux_nat new_thread implementation. Write the mirrored watch
626 register values for the new thread. */
629 mips_linux_new_thread (struct lwp_info *lp)
633 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
635 &watch_readback_valid, 0))
638 tid = ptid_get_lwp (lp->ptid);
639 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror) == -1)
640 perror_with_name (_("Couldn't write debug register"));
643 /* Target to_insert_watchpoint implementation. Try to insert a new
644 watch. Return zero on success. */
647 mips_linux_insert_watchpoint (CORE_ADDR addr, int len, int type,
648 struct expression *cond)
650 struct pt_watch_regs regs;
651 struct mips_watchpoint *new_watch;
652 struct mips_watchpoint **pw;
657 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
659 &watch_readback_valid, 0))
665 regs = watch_readback;
666 /* Add the current watches. */
667 mips_linux_watch_populate_regs (current_watches, ®s);
669 /* Now try to add the new watch. */
670 if (!mips_linux_watch_try_one_watch (®s, addr, len,
671 mips_linux_watch_type_to_irw (type)))
674 /* It fit. Stick it on the end of the list. */
675 new_watch = (struct mips_watchpoint *)
676 xmalloc (sizeof (struct mips_watchpoint));
677 new_watch->addr = addr;
678 new_watch->len = len;
679 new_watch->type = type;
680 new_watch->next = NULL;
682 pw = ¤t_watches;
688 retval = write_watchpoint_regs ();
691 mips_show_dr ("insert_watchpoint", addr, len, type);
696 /* Target to_remove_watchpoint implementation. Try to remove a watch.
697 Return zero on success. */
700 mips_linux_remove_watchpoint (CORE_ADDR addr, int len, int type,
701 struct expression *cond)
706 struct mips_watchpoint **pw;
707 struct mips_watchpoint *w;
709 /* Search for a known watch that matches. Then unlink and free
712 pw = ¤t_watches;
715 if (w->addr == addr && w->len == len && w->type == type)
726 return -1; /* We don't know about it, fail doing nothing. */
728 /* At this point watch_readback is known to be valid because we
729 could not have added the watch without reading it. */
730 gdb_assert (watch_readback_valid == 1);
732 watch_mirror = watch_readback;
733 mips_linux_watch_populate_regs (current_watches, &watch_mirror);
735 retval = write_watchpoint_regs ();
738 mips_show_dr ("remove_watchpoint", addr, len, type);
743 /* Target to_close implementation. Free any watches and call the
744 super implementation. */
747 mips_linux_close (void)
749 struct mips_watchpoint *w;
750 struct mips_watchpoint *nw;
752 /* Clean out the current_watches list. */
760 current_watches = NULL;
766 void _initialize_mips_linux_nat (void);
769 _initialize_mips_linux_nat (void)
771 struct target_ops *t;
773 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
775 Set whether to show variables that mirror the mips debug registers."), _("\
776 Show whether to show variables that mirror the mips debug registers."), _("\
777 Use \"on\" to enable, \"off\" to disable.\n\
778 If enabled, the debug registers values are shown when GDB inserts\n\
779 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
780 triggers a breakpoint or watchpoint."),
783 &maintenance_set_cmdlist,
784 &maintenance_show_cmdlist);
786 t = linux_trad_target (mips_linux_register_u_offset);
788 super_close = t->to_close;
789 t->to_close = mips_linux_close;
791 super_fetch_registers = t->to_fetch_registers;
792 super_store_registers = t->to_store_registers;
794 t->to_fetch_registers = mips64_linux_fetch_registers;
795 t->to_store_registers = mips64_linux_store_registers;
797 t->to_can_use_hw_breakpoint = mips_linux_can_use_hw_breakpoint;
798 t->to_remove_watchpoint = mips_linux_remove_watchpoint;
799 t->to_insert_watchpoint = mips_linux_insert_watchpoint;
800 t->to_stopped_by_watchpoint = mips_linux_stopped_by_watchpoint;
801 t->to_stopped_data_address = mips_linux_stopped_data_address;
802 t->to_region_ok_for_hw_watchpoint = mips_linux_region_ok_for_hw_watchpoint;
804 t->to_read_description = mips_linux_read_description;
806 linux_nat_add_target (t);
807 linux_nat_set_new_thread (t, mips_linux_new_thread);
809 /* Initialize the standard target descriptions. */
810 initialize_tdesc_mips_linux ();
811 initialize_tdesc_mips_dsp_linux ();
812 initialize_tdesc_mips64_linux ();
813 initialize_tdesc_mips64_dsp_linux ();