1 /* Target-dependent code for the Motorola 88000 series.
3 Copyright (C) 2004-2017 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "arch-utils.h"
24 #include "frame-base.h"
25 #include "frame-unwind.h"
31 #include "trad-frame.h"
35 #include "m88k-tdep.h"
37 /* Fetch the instruction at PC. */
40 m88k_fetch_instruction (CORE_ADDR pc, enum bfd_endian byte_order)
42 return read_memory_unsigned_integer (pc, 4, byte_order);
45 /* Register information. */
47 /* Return the name of register REGNUM. */
50 m88k_register_name (struct gdbarch *gdbarch, int regnum)
52 static const char *register_names[] =
54 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
55 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
56 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
57 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
58 "epsr", "fpsr", "fpcr", "sxip", "snip", "sfip"
61 if (regnum >= 0 && regnum < ARRAY_SIZE (register_names))
62 return register_names[regnum];
67 /* Return the GDB type object for the "standard" data type of data in
71 m88k_register_type (struct gdbarch *gdbarch, int regnum)
73 /* SXIP, SNIP, SFIP and R1 contain code addresses. */
74 if ((regnum >= M88K_SXIP_REGNUM && regnum <= M88K_SFIP_REGNUM)
75 || regnum == M88K_R1_REGNUM)
76 return builtin_type (gdbarch)->builtin_func_ptr;
78 /* R30 and R31 typically contains data addresses. */
79 if (regnum == M88K_R30_REGNUM || regnum == M88K_R31_REGNUM)
80 return builtin_type (gdbarch)->builtin_data_ptr;
82 return builtin_type (gdbarch)->builtin_int32;
87 m88k_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
89 /* All instructures are 4-byte aligned. The lower 2 bits of SXIP,
90 SNIP and SFIP are used for special purposes: bit 0 is the
91 exception bit and bit 1 is the valid bit. */
95 /* Use the program counter to determine the contents and size of a
96 breakpoint instruction. Return a pointer to a string of bytes that
97 encode a breakpoint instruction, store the length of the string in
98 *LEN and optionally adjust *PC to point to the correct memory
99 location for inserting the breakpoint. */
102 constexpr gdb_byte m88k_break_insn[] = { 0xf0, 0x00, 0xd1, 0xff };
104 typedef BP_MANIPULATION (m88k_break_insn) m88k_breakpoint;
107 m88k_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
111 pc = frame_unwind_register_unsigned (next_frame, M88K_SXIP_REGNUM);
112 return m88k_addr_bits_remove (gdbarch, pc);
116 m88k_write_pc (struct regcache *regcache, CORE_ADDR pc)
118 /* According to the MC88100 RISC Microprocessor User's Manual,
121 "... can be made to return to a particular instruction by placing
122 a valid instruction address in the SNIP and the next sequential
123 instruction address in the SFIP (with V bits set and E bits
124 clear). The rte resumes execution at the instruction pointed to
125 by the SNIP, then the SFIP."
127 The E bit is the least significant bit (bit 0). The V (valid)
128 bit is bit 1. This is why we logical or 2 into the values we are
129 writing below. It turns out that SXIP plays no role when
130 returning from an exception so nothing special has to be done
131 with it. We could even (presumably) give it a totally bogus
134 regcache_cooked_write_unsigned (regcache, M88K_SXIP_REGNUM, pc);
135 regcache_cooked_write_unsigned (regcache, M88K_SNIP_REGNUM, pc | 2);
136 regcache_cooked_write_unsigned (regcache, M88K_SFIP_REGNUM, (pc + 4) | 2);
140 /* The functions on this page are intended to be used to classify
141 function arguments. */
143 /* Check whether TYPE is "Integral or Pointer". */
146 m88k_integral_or_pointer_p (const struct type *type)
148 switch (TYPE_CODE (type))
154 case TYPE_CODE_RANGE:
156 /* We have byte, half-word, word and extended-word/doubleword
158 int len = TYPE_LENGTH (type);
159 return (len == 1 || len == 2 || len == 4 || len == 8);
164 case TYPE_CODE_RVALUE_REF:
166 /* Allow only 32-bit pointers. */
167 return (TYPE_LENGTH (type) == 4);
177 /* Check whether TYPE is "Floating". */
180 m88k_floating_p (const struct type *type)
182 switch (TYPE_CODE (type))
186 int len = TYPE_LENGTH (type);
187 return (len == 4 || len == 8);
196 /* Check whether TYPE is "Structure or Union". */
199 m88k_structure_or_union_p (const struct type *type)
201 switch (TYPE_CODE (type))
203 case TYPE_CODE_STRUCT:
204 case TYPE_CODE_UNION:
213 /* Check whether TYPE has 8-byte alignment. */
216 m88k_8_byte_align_p (struct type *type)
218 if (m88k_structure_or_union_p (type))
222 for (i = 0; i < TYPE_NFIELDS (type); i++)
224 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
226 if (m88k_8_byte_align_p (subtype))
231 if (m88k_integral_or_pointer_p (type) || m88k_floating_p (type))
232 return (TYPE_LENGTH (type) == 8);
237 /* Check whether TYPE can be passed in a register. */
240 m88k_in_register_p (struct type *type)
242 if (m88k_integral_or_pointer_p (type) || m88k_floating_p (type))
245 if (m88k_structure_or_union_p (type) && TYPE_LENGTH (type) == 4)
252 m88k_store_arguments (struct regcache *regcache, int nargs,
253 struct value **args, CORE_ADDR sp)
255 struct gdbarch *gdbarch = regcache->arch ();
256 int num_register_words = 0;
257 int num_stack_words = 0;
260 for (i = 0; i < nargs; i++)
262 struct type *type = value_type (args[i]);
263 int len = TYPE_LENGTH (type);
265 if (m88k_integral_or_pointer_p (type) && len < 4)
267 args[i] = value_cast (builtin_type (gdbarch)->builtin_int32,
269 type = value_type (args[i]);
270 len = TYPE_LENGTH (type);
273 if (m88k_in_register_p (type))
277 if (num_register_words % 2 == 1 && m88k_8_byte_align_p (type))
280 num_words += ((len + 3) / 4);
281 if (num_register_words + num_words <= 8)
283 num_register_words += num_words;
287 /* We've run out of available registers. Pass the argument
291 if (num_stack_words % 2 == 1 && m88k_8_byte_align_p (type))
294 num_stack_words += ((len + 3) / 4);
297 /* Allocate stack space. */
298 sp = align_down (sp - 32 - num_stack_words * 4, 16);
299 num_stack_words = num_register_words = 0;
301 for (i = 0; i < nargs; i++)
303 const bfd_byte *valbuf = value_contents (args[i]);
304 struct type *type = value_type (args[i]);
305 int len = TYPE_LENGTH (type);
306 int stack_word = num_stack_words;
308 if (m88k_in_register_p (type))
310 int register_word = num_register_words;
312 if (register_word % 2 == 1 && m88k_8_byte_align_p (type))
315 gdb_assert (len == 4 || len == 8);
317 if (register_word + len / 8 < 8)
319 int regnum = M88K_R2_REGNUM + register_word;
321 regcache_raw_write (regcache, regnum, valbuf);
323 regcache_raw_write (regcache, regnum + 1, valbuf + 4);
325 num_register_words = (register_word + len / 4);
330 if (stack_word % 2 == -1 && m88k_8_byte_align_p (type))
333 write_memory (sp + stack_word * 4, valbuf, len);
334 num_stack_words = (stack_word + (len + 3) / 4);
341 m88k_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
342 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
343 struct value **args, CORE_ADDR sp, int struct_return,
344 CORE_ADDR struct_addr)
346 /* Set up the function arguments. */
347 sp = m88k_store_arguments (regcache, nargs, args, sp);
348 gdb_assert (sp % 16 == 0);
350 /* Store return value address. */
352 regcache_raw_write_unsigned (regcache, M88K_R12_REGNUM, struct_addr);
354 /* Store the stack pointer and return address in the appropriate
356 regcache_raw_write_unsigned (regcache, M88K_R31_REGNUM, sp);
357 regcache_raw_write_unsigned (regcache, M88K_R1_REGNUM, bp_addr);
359 /* Return the stack pointer. */
363 static struct frame_id
364 m88k_dummy_id (struct gdbarch *arch, struct frame_info *this_frame)
368 sp = get_frame_register_unsigned (this_frame, M88K_R31_REGNUM);
369 return frame_id_build (sp, get_frame_pc (this_frame));
373 /* Determine, for architecture GDBARCH, how a return value of TYPE
374 should be returned. If it is supposed to be returned in registers,
375 and READBUF is non-zero, read the appropriate value from REGCACHE,
376 and copy it into READBUF. If WRITEBUF is non-zero, write the value
377 from WRITEBUF into REGCACHE. */
379 static enum return_value_convention
380 m88k_return_value (struct gdbarch *gdbarch, struct value *function,
381 struct type *type, struct regcache *regcache,
382 gdb_byte *readbuf, const gdb_byte *writebuf)
384 int len = TYPE_LENGTH (type);
387 if (!m88k_integral_or_pointer_p (type) && !m88k_floating_p (type))
388 return RETURN_VALUE_STRUCT_CONVENTION;
392 /* Read the contents of R2 and (if necessary) R3. */
393 regcache_cooked_read (regcache, M88K_R2_REGNUM, buf);
396 regcache_cooked_read (regcache, M88K_R3_REGNUM, buf + 4);
397 gdb_assert (len == 8);
398 memcpy (readbuf, buf, len);
402 /* Just stripping off any unused bytes should preserve the
403 signed-ness just fine. */
404 memcpy (readbuf, buf + 4 - len, len);
410 /* Read the contents to R2 and (if necessary) R3. */
413 gdb_assert (len == 8);
414 memcpy (buf, writebuf, 8);
415 regcache_cooked_write (regcache, M88K_R3_REGNUM, buf + 4);
419 /* ??? Do we need to do any sign-extension here? */
420 memcpy (buf + 4 - len, writebuf, len);
422 regcache_cooked_write (regcache, M88K_R2_REGNUM, buf);
425 return RETURN_VALUE_REGISTER_CONVENTION;
428 /* Default frame unwinder. */
430 struct m88k_frame_cache
439 /* Table of saved registers. */
440 struct trad_frame_saved_reg *saved_regs;
443 /* Prologue analysis. */
445 /* Macros for extracting fields from instructions. */
447 #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
448 #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
449 #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
450 #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
451 #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
452 #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
454 /* Possible actions to be taken by the prologue analyzer for the
455 instructions it encounters. */
457 enum m88k_prologue_insn_action
459 M88K_PIA_SKIP, /* Ignore. */
460 M88K_PIA_NOTE_ST, /* Note register store. */
461 M88K_PIA_NOTE_STD, /* Note register pair store. */
462 M88K_PIA_NOTE_SP_ADJUSTMENT, /* Note stack pointer adjustment. */
463 M88K_PIA_NOTE_FP_ASSIGNMENT, /* Note frame pointer assignment. */
464 M88K_PIA_NOTE_BRANCH, /* Note branch. */
465 M88K_PIA_NOTE_PROLOGUE_END /* Note end of prologue. */
468 /* Table of instructions that may comprise a function prologue. */
470 struct m88k_prologue_insn
474 enum m88k_prologue_insn_action action;
477 struct m88k_prologue_insn m88k_prologue_insn_table[] =
479 /* Various register move instructions. */
480 { 0x58000000, 0xf800ffff, M88K_PIA_SKIP }, /* or/or.u with immed of 0 */
481 { 0xf4005800, 0xfc1fffe0, M88K_PIA_SKIP }, /* or rd,r0,rs */
482 { 0xf4005800, 0xfc00ffff, M88K_PIA_SKIP }, /* or rd,rs,r0 */
484 /* Various other instructions. */
485 { 0x58000000, 0xf8000000, M88K_PIA_SKIP }, /* or/or.u */
487 /* Stack pointer setup: "subu sp,sp,n" where n is a multiple of 8. */
488 { 0x67ff0000, 0xffff0007, M88K_PIA_NOTE_SP_ADJUSTMENT },
490 /* Frame pointer assignment: "addu r30,r31,n". */
491 { 0x63df0000, 0xffff0000, M88K_PIA_NOTE_FP_ASSIGNMENT },
493 /* Store to stack instructions; either "st rx,sp,n" or "st.d rx,sp,n". */
494 { 0x241f0000, 0xfc1f0000, M88K_PIA_NOTE_ST }, /* st rx,sp,n */
495 { 0x201f0000, 0xfc1f0000, M88K_PIA_NOTE_STD }, /* st.d rs,sp,n */
497 /* Instructions needed for setting up r25 for pic code. */
498 { 0x5f200000, 0xffff0000, M88K_PIA_SKIP }, /* or.u r25,r0,offset_high */
499 { 0xcc000002, 0xffffffff, M88K_PIA_SKIP }, /* bsr.n Lab */
500 { 0x5b390000, 0xffff0000, M88K_PIA_SKIP }, /* or r25,r25,offset_low */
501 { 0xf7396001, 0xffffffff, M88K_PIA_SKIP }, /* Lab: addu r25,r25,r1 */
503 /* Various branch or jump instructions which have a delay slot --
504 these do not form part of the prologue, but the instruction in
505 the delay slot might be a store instruction which should be
507 { 0xc4000000, 0xe4000000, M88K_PIA_NOTE_BRANCH },
508 /* br.n, bsr.n, bb0.n, or bb1.n */
509 { 0xec000000, 0xfc000000, M88K_PIA_NOTE_BRANCH }, /* bcnd.n */
510 { 0xf400c400, 0xfffff7e0, M88K_PIA_NOTE_BRANCH }, /* jmp.n or jsr.n */
512 /* Catch all. Ends prologue analysis. */
513 { 0x00000000, 0x00000000, M88K_PIA_NOTE_PROLOGUE_END }
516 /* Do a full analysis of the function prologue at PC and update CACHE
517 accordingly. Bail out early if LIMIT is reached. Return the
518 address where the analysis stopped. If LIMIT points beyond the
519 function prologue, the return address should be the end of the
523 m88k_analyze_prologue (struct gdbarch *gdbarch,
524 CORE_ADDR pc, CORE_ADDR limit,
525 struct m88k_frame_cache *cache)
527 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
528 CORE_ADDR end = limit;
530 /* Provide a dummy cache if necessary. */
533 cache = XALLOCA (struct m88k_frame_cache);
535 XALLOCAVEC (struct trad_frame_saved_reg, M88K_R31_REGNUM + 1);
537 /* We only initialize the members we care about. */
538 cache->saved_regs[M88K_R1_REGNUM].addr = -1;
539 cache->fp_offset = -1;
544 struct m88k_prologue_insn *pi = m88k_prologue_insn_table;
545 unsigned long insn = m88k_fetch_instruction (pc, byte_order);
547 while ((insn & pi->mask) != pi->insn)
553 /* If we have a frame pointer, and R1 has been saved,
554 consider this instruction as not being part of the
556 if (cache->fp_offset != -1
557 && cache->saved_regs[M88K_R1_REGNUM].addr != -1)
558 return std::min (pc, end);
561 case M88K_PIA_NOTE_ST:
562 case M88K_PIA_NOTE_STD:
563 /* If no frame has been allocated, the stores aren't part of
565 if (cache->sp_offset == 0)
566 return std::min (pc, end);
568 /* Record location of saved registers. */
570 int regnum = ST_SRC (insn) + M88K_R0_REGNUM;
571 ULONGEST offset = ST_OFFSET (insn);
573 cache->saved_regs[regnum].addr = offset;
574 if (pi->action == M88K_PIA_NOTE_STD && regnum < M88K_R31_REGNUM)
575 cache->saved_regs[regnum + 1].addr = offset + 4;
579 case M88K_PIA_NOTE_SP_ADJUSTMENT:
580 /* A second stack pointer adjustment isn't part of the
582 if (cache->sp_offset != 0)
583 return std::min (pc, end);
585 /* Store stack pointer adjustment. */
586 cache->sp_offset = -SUBU_OFFSET (insn);
589 case M88K_PIA_NOTE_FP_ASSIGNMENT:
590 /* A second frame pointer assignment isn't part of the
592 if (cache->fp_offset != -1)
593 return std::min (pc, end);
595 /* Record frame pointer assignment. */
596 cache->fp_offset = ADDU_OFFSET (insn);
599 case M88K_PIA_NOTE_BRANCH:
600 /* The branch instruction isn't part of the prologue, but
601 the instruction in the delay slot might be. Limit the
602 prologue analysis to the delay slot and record the branch
603 instruction as the end of the prologue. */
604 limit = std::min (limit, pc + 2 * M88K_INSN_SIZE);
608 case M88K_PIA_NOTE_PROLOGUE_END:
609 return std::min (pc, end);
612 pc += M88K_INSN_SIZE;
618 /* An upper limit to the size of the prologue. */
619 const int m88k_max_prologue_size = 128 * M88K_INSN_SIZE;
621 /* Return the address of first real instruction of the function
625 m88k_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
627 struct symtab_and_line sal;
628 CORE_ADDR func_start, func_end;
630 /* This is the preferred method, find the end of the prologue by
631 using the debugging information. */
632 if (find_pc_partial_function (pc, NULL, &func_start, &func_end))
634 sal = find_pc_line (func_start, 0);
636 if (sal.end < func_end && pc <= sal.end)
640 return m88k_analyze_prologue (gdbarch, pc, pc + m88k_max_prologue_size,
644 static struct m88k_frame_cache *
645 m88k_frame_cache (struct frame_info *this_frame, void **this_cache)
647 struct gdbarch *gdbarch = get_frame_arch (this_frame);
648 struct m88k_frame_cache *cache;
652 return (struct m88k_frame_cache *) *this_cache;
654 cache = FRAME_OBSTACK_ZALLOC (struct m88k_frame_cache);
655 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
656 cache->fp_offset = -1;
658 cache->pc = get_frame_func (this_frame);
660 m88k_analyze_prologue (gdbarch, cache->pc, get_frame_pc (this_frame),
663 /* Calculate the stack pointer used in the prologue. */
664 if (cache->fp_offset != -1)
668 fp = get_frame_register_unsigned (this_frame, M88K_R30_REGNUM);
669 frame_sp = fp - cache->fp_offset;
673 /* If we know where the return address is saved, we can take a
674 solid guess at what the frame pointer should be. */
675 if (cache->saved_regs[M88K_R1_REGNUM].addr != -1)
676 cache->fp_offset = cache->saved_regs[M88K_R1_REGNUM].addr - 4;
677 frame_sp = get_frame_register_unsigned (this_frame, M88K_R31_REGNUM);
680 /* Now that we know the stack pointer, adjust the location of the
685 for (regnum = M88K_R0_REGNUM; regnum < M88K_R31_REGNUM; regnum ++)
686 if (cache->saved_regs[regnum].addr != -1)
687 cache->saved_regs[regnum].addr += frame_sp;
690 /* Calculate the frame's base. */
691 cache->base = frame_sp - cache->sp_offset;
692 trad_frame_set_value (cache->saved_regs, M88K_R31_REGNUM, cache->base);
694 /* Identify SXIP with the return address in R1. */
695 cache->saved_regs[M88K_SXIP_REGNUM] = cache->saved_regs[M88K_R1_REGNUM];
702 m88k_frame_this_id (struct frame_info *this_frame, void **this_cache,
703 struct frame_id *this_id)
705 struct m88k_frame_cache *cache = m88k_frame_cache (this_frame, this_cache);
707 /* This marks the outermost frame. */
708 if (cache->base == 0)
711 (*this_id) = frame_id_build (cache->base, cache->pc);
714 static struct value *
715 m88k_frame_prev_register (struct frame_info *this_frame,
716 void **this_cache, int regnum)
718 struct m88k_frame_cache *cache = m88k_frame_cache (this_frame, this_cache);
720 if (regnum == M88K_SNIP_REGNUM || regnum == M88K_SFIP_REGNUM)
725 value = trad_frame_get_prev_register (this_frame, cache->saved_regs,
727 pc = value_as_long (value);
728 release_value (value);
731 if (regnum == M88K_SFIP_REGNUM)
734 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
737 return trad_frame_get_prev_register (this_frame, cache->saved_regs, regnum);
740 static const struct frame_unwind m88k_frame_unwind =
743 default_frame_unwind_stop_reason,
745 m88k_frame_prev_register,
747 default_frame_sniffer
752 m88k_frame_base_address (struct frame_info *this_frame, void **this_cache)
754 struct m88k_frame_cache *cache = m88k_frame_cache (this_frame, this_cache);
756 if (cache->fp_offset != -1)
757 return cache->base + cache->sp_offset + cache->fp_offset;
762 static const struct frame_base m88k_frame_base =
765 m88k_frame_base_address,
766 m88k_frame_base_address,
767 m88k_frame_base_address
771 /* Core file support. */
773 /* Supply register REGNUM from the buffer specified by GREGS and LEN
774 in the general-purpose register set REGSET to register cache
775 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
778 m88k_supply_gregset (const struct regset *regset,
779 struct regcache *regcache,
780 int regnum, const void *gregs, size_t len)
782 const gdb_byte *regs = (const gdb_byte *) gregs;
785 for (i = 0; i < M88K_NUM_REGS; i++)
787 if (regnum == i || regnum == -1)
788 regcache_raw_supply (regcache, i, regs + i * 4);
792 /* Motorola 88000 register set. */
794 static const struct regset m88k_gregset =
800 /* Iterate over supported core file register note sections. */
803 m88k_iterate_over_regset_sections (struct gdbarch *gdbarch,
804 iterate_over_regset_sections_cb *cb,
806 const struct regcache *regcache)
808 cb (".reg", M88K_NUM_REGS * 4, &m88k_gregset, NULL, cb_data);
812 static struct gdbarch *
813 m88k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
815 struct gdbarch *gdbarch;
817 /* If there is already a candidate, use it. */
818 arches = gdbarch_list_lookup_by_info (arches, &info);
820 return arches->gdbarch;
822 /* Allocate space for the new architecture. */
823 gdbarch = gdbarch_alloc (&info, NULL);
825 /* There is no real `long double'. */
826 set_gdbarch_long_double_bit (gdbarch, 64);
827 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
829 set_gdbarch_num_regs (gdbarch, M88K_NUM_REGS);
830 set_gdbarch_register_name (gdbarch, m88k_register_name);
831 set_gdbarch_register_type (gdbarch, m88k_register_type);
833 /* Register numbers of various important registers. */
834 set_gdbarch_sp_regnum (gdbarch, M88K_R31_REGNUM);
835 set_gdbarch_pc_regnum (gdbarch, M88K_SXIP_REGNUM);
837 /* Core file support. */
838 set_gdbarch_iterate_over_regset_sections
839 (gdbarch, m88k_iterate_over_regset_sections);
841 set_gdbarch_skip_prologue (gdbarch, m88k_skip_prologue);
843 /* Stack grows downward. */
844 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
846 /* Call dummy code. */
847 set_gdbarch_push_dummy_call (gdbarch, m88k_push_dummy_call);
848 set_gdbarch_dummy_id (gdbarch, m88k_dummy_id);
850 /* Return value info. */
851 set_gdbarch_return_value (gdbarch, m88k_return_value);
853 set_gdbarch_addr_bits_remove (gdbarch, m88k_addr_bits_remove);
854 set_gdbarch_breakpoint_kind_from_pc (gdbarch, m88k_breakpoint::kind_from_pc);
855 set_gdbarch_sw_breakpoint_from_kind (gdbarch, m88k_breakpoint::bp_from_kind);
856 set_gdbarch_unwind_pc (gdbarch, m88k_unwind_pc);
857 set_gdbarch_write_pc (gdbarch, m88k_write_pc);
859 frame_base_set_default (gdbarch, &m88k_frame_base);
860 frame_unwind_append_unwinder (gdbarch, &m88k_frame_unwind);
866 _initialize_m88k_tdep (void)
868 gdbarch_register (bfd_arch_m88k, m88k_gdbarch_init, NULL);