1 /* Target-dependent code for the Motorola 88000 series.
3 Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street, Fifth Floor,
20 Boston, MA 02110-1301, USA. */
23 #include "arch-utils.h"
26 #include "frame-base.h"
27 #include "frame-unwind.h"
33 #include "trad-frame.h"
36 #include "gdb_assert.h"
37 #include "gdb_string.h"
39 #include "m88k-tdep.h"
41 /* Fetch the instruction at PC. */
44 m88k_fetch_instruction (CORE_ADDR pc)
46 return read_memory_unsigned_integer (pc, 4);
49 /* Register information. */
51 /* Return the name of register REGNUM. */
54 m88k_register_name (int regnum)
56 static char *register_names[] =
58 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
59 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
60 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
61 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
62 "epsr", "fpsr", "fpcr", "sxip", "snip", "sfip"
65 if (regnum >= 0 && regnum < ARRAY_SIZE (register_names))
66 return register_names[regnum];
71 /* Return the GDB type object for the "standard" data type of data in
75 m88k_register_type (struct gdbarch *gdbarch, int regnum)
77 /* SXIP, SNIP, SFIP and R1 contain code addresses. */
78 if ((regnum >= M88K_SXIP_REGNUM && regnum <= M88K_SFIP_REGNUM)
79 || regnum == M88K_R1_REGNUM)
80 return builtin_type_void_func_ptr;
82 /* R30 and R31 typically contains data addresses. */
83 if (regnum == M88K_R30_REGNUM || regnum == M88K_R31_REGNUM)
84 return builtin_type_void_data_ptr;
86 return builtin_type_int32;
91 m88k_addr_bits_remove (CORE_ADDR addr)
93 /* All instructures are 4-byte aligned. The lower 2 bits of SXIP,
94 SNIP and SFIP are used for special purposes: bit 0 is the
95 exception bit and bit 1 is the valid bit. */
99 /* Use the program counter to determine the contents and size of a
100 breakpoint instruction. Return a pointer to a string of bytes that
101 encode a breakpoint instruction, store the length of the string in
102 *LEN and optionally adjust *PC to point to the correct memory
103 location for inserting the breakpoint. */
105 static const gdb_byte *
106 m88k_breakpoint_from_pc (CORE_ADDR *pc, int *len)
109 static gdb_byte break_insn[] = { 0xf0, 0x00, 0xd1, 0xff };
111 *len = sizeof (break_insn);
116 m88k_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
120 pc = frame_unwind_register_unsigned (next_frame, M88K_SXIP_REGNUM);
121 return m88k_addr_bits_remove (pc);
125 m88k_write_pc (CORE_ADDR pc, ptid_t ptid)
127 /* According to the MC88100 RISC Microprocessor User's Manual,
130 "... can be made to return to a particular instruction by placing
131 a valid instruction address in the SNIP and the next sequential
132 instruction address in the SFIP (with V bits set and E bits
133 clear). The rte resumes execution at the instruction pointed to
134 by the SNIP, then the SFIP."
136 The E bit is the least significant bit (bit 0). The V (valid)
137 bit is bit 1. This is why we logical or 2 into the values we are
138 writing below. It turns out that SXIP plays no role when
139 returning from an exception so nothing special has to be done
140 with it. We could even (presumably) give it a totally bogus
143 write_register_pid (M88K_SXIP_REGNUM, pc, ptid);
144 write_register_pid (M88K_SNIP_REGNUM, pc | 2, ptid);
145 write_register_pid (M88K_SFIP_REGNUM, (pc + 4) | 2, ptid);
149 /* The functions on this page are intended to be used to classify
150 function arguments. */
152 /* Check whether TYPE is "Integral or Pointer". */
155 m88k_integral_or_pointer_p (const struct type *type)
157 switch (TYPE_CODE (type))
163 case TYPE_CODE_RANGE:
165 /* We have byte, half-word, word and extended-word/doubleword
167 int len = TYPE_LENGTH (type);
168 return (len == 1 || len == 2 || len == 4 || len == 8);
174 /* Allow only 32-bit pointers. */
175 return (TYPE_LENGTH (type) == 4);
185 /* Check whether TYPE is "Floating". */
188 m88k_floating_p (const struct type *type)
190 switch (TYPE_CODE (type))
194 int len = TYPE_LENGTH (type);
195 return (len == 4 || len == 8);
204 /* Check whether TYPE is "Structure or Union". */
207 m88k_structure_or_union_p (const struct type *type)
209 switch (TYPE_CODE (type))
211 case TYPE_CODE_STRUCT:
212 case TYPE_CODE_UNION:
221 /* Check whether TYPE has 8-byte alignment. */
224 m88k_8_byte_align_p (struct type *type)
226 if (m88k_structure_or_union_p (type))
230 for (i = 0; i < TYPE_NFIELDS (type); i++)
232 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
234 if (m88k_8_byte_align_p (subtype))
239 if (m88k_integral_or_pointer_p (type) || m88k_floating_p (type))
240 return (TYPE_LENGTH (type) == 8);
245 /* Check whether TYPE can be passed in a register. */
248 m88k_in_register_p (struct type *type)
250 if (m88k_integral_or_pointer_p (type) || m88k_floating_p (type))
253 if (m88k_structure_or_union_p (type) && TYPE_LENGTH (type) == 4)
260 m88k_store_arguments (struct regcache *regcache, int nargs,
261 struct value **args, CORE_ADDR sp)
263 int num_register_words = 0;
264 int num_stack_words = 0;
267 for (i = 0; i < nargs; i++)
269 struct type *type = value_type (args[i]);
270 int len = TYPE_LENGTH (type);
272 if (m88k_integral_or_pointer_p (type) && len < 4)
274 args[i] = value_cast (builtin_type_int32, args[i]);
275 type = value_type (args[i]);
276 len = TYPE_LENGTH (type);
279 if (m88k_in_register_p (type))
283 if (num_register_words % 2 == 1 && m88k_8_byte_align_p (type))
286 num_words += ((len + 3) / 4);
287 if (num_register_words + num_words <= 8)
289 num_register_words += num_words;
293 /* We've run out of available registers. Pass the argument
297 if (num_stack_words % 2 == 1 && m88k_8_byte_align_p (type))
300 num_stack_words += ((len + 3) / 4);
303 /* Allocate stack space. */
304 sp = align_down (sp - 32 - num_stack_words * 4, 16);
305 num_stack_words = num_register_words = 0;
307 for (i = 0; i < nargs; i++)
309 const bfd_byte *valbuf = value_contents (args[i]);
310 struct type *type = value_type (args[i]);
311 int len = TYPE_LENGTH (type);
312 int stack_word = num_stack_words;
314 if (m88k_in_register_p (type))
316 int register_word = num_register_words;
318 if (register_word % 2 == 1 && m88k_8_byte_align_p (type))
321 gdb_assert (len == 4 || len == 8);
323 if (register_word + len / 8 < 8)
325 int regnum = M88K_R2_REGNUM + register_word;
327 regcache_raw_write (regcache, regnum, valbuf);
329 regcache_raw_write (regcache, regnum + 1, valbuf + 4);
331 num_register_words = (register_word + len / 4);
336 if (stack_word % 2 == -1 && m88k_8_byte_align_p (type))
339 write_memory (sp + stack_word * 4, valbuf, len);
340 num_stack_words = (stack_word + (len + 3) / 4);
347 m88k_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
348 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
349 struct value **args, CORE_ADDR sp, int struct_return,
350 CORE_ADDR struct_addr)
352 /* Set up the function arguments. */
353 sp = m88k_store_arguments (regcache, nargs, args, sp);
354 gdb_assert (sp % 16 == 0);
356 /* Store return value address. */
358 regcache_raw_write_unsigned (regcache, M88K_R12_REGNUM, struct_addr);
360 /* Store the stack pointer and return address in the appropriate
362 regcache_raw_write_unsigned (regcache, M88K_R31_REGNUM, sp);
363 regcache_raw_write_unsigned (regcache, M88K_R1_REGNUM, bp_addr);
365 /* Return the stack pointer. */
369 static struct frame_id
370 m88k_unwind_dummy_id (struct gdbarch *arch, struct frame_info *next_frame)
374 sp = frame_unwind_register_unsigned (next_frame, M88K_R31_REGNUM);
375 return frame_id_build (sp, frame_pc_unwind (next_frame));
379 /* Determine, for architecture GDBARCH, how a return value of TYPE
380 should be returned. If it is supposed to be returned in registers,
381 and READBUF is non-zero, read the appropriate value from REGCACHE,
382 and copy it into READBUF. If WRITEBUF is non-zero, write the value
383 from WRITEBUF into REGCACHE. */
385 static enum return_value_convention
386 m88k_return_value (struct gdbarch *gdbarch, struct type *type,
387 struct regcache *regcache, gdb_byte *readbuf,
388 const gdb_byte *writebuf)
390 int len = TYPE_LENGTH (type);
393 if (!m88k_integral_or_pointer_p (type) && !m88k_floating_p (type))
394 return RETURN_VALUE_STRUCT_CONVENTION;
398 /* Read the contents of R2 and (if necessary) R3. */
399 regcache_cooked_read (regcache, M88K_R2_REGNUM, buf);
402 regcache_cooked_read (regcache, M88K_R3_REGNUM, buf + 4);
403 gdb_assert (len == 8);
404 memcpy (readbuf, buf, len);
408 /* Just stripping off any unused bytes should preserve the
409 signed-ness just fine. */
410 memcpy (readbuf, buf + 4 - len, len);
416 /* Read the contents to R2 and (if necessary) R3. */
419 gdb_assert (len == 8);
420 memcpy (buf, writebuf, 8);
421 regcache_cooked_write (regcache, M88K_R3_REGNUM, buf + 4);
425 /* ??? Do we need to do any sign-extension here? */
426 memcpy (buf + 4 - len, writebuf, len);
428 regcache_cooked_write (regcache, M88K_R2_REGNUM, buf);
431 return RETURN_VALUE_REGISTER_CONVENTION;
434 /* Default frame unwinder. */
436 struct m88k_frame_cache
445 /* Table of saved registers. */
446 struct trad_frame_saved_reg *saved_regs;
449 /* Prologue analysis. */
451 /* Macros for extracting fields from instructions. */
453 #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
454 #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
455 #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
456 #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
457 #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
458 #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
460 /* Possible actions to be taken by the prologue analyzer for the
461 instructions it encounters. */
463 enum m88k_prologue_insn_action
465 M88K_PIA_SKIP, /* Ignore. */
466 M88K_PIA_NOTE_ST, /* Note register store. */
467 M88K_PIA_NOTE_STD, /* Note register pair store. */
468 M88K_PIA_NOTE_SP_ADJUSTMENT, /* Note stack pointer adjustment. */
469 M88K_PIA_NOTE_FP_ASSIGNMENT, /* Note frame pointer assignment. */
470 M88K_PIA_NOTE_BRANCH, /* Note branch. */
471 M88K_PIA_NOTE_PROLOGUE_END /* Note end of prologue. */
474 /* Table of instructions that may comprise a function prologue. */
476 struct m88k_prologue_insn
480 enum m88k_prologue_insn_action action;
483 struct m88k_prologue_insn m88k_prologue_insn_table[] =
485 /* Various register move instructions. */
486 { 0x58000000, 0xf800ffff, M88K_PIA_SKIP }, /* or/or.u with immed of 0 */
487 { 0xf4005800, 0xfc1fffe0, M88K_PIA_SKIP }, /* or rd,r0,rs */
488 { 0xf4005800, 0xfc00ffff, M88K_PIA_SKIP }, /* or rd,rs,r0 */
490 /* Various other instructions. */
491 { 0x58000000, 0xf8000000, M88K_PIA_SKIP }, /* or/or.u */
493 /* Stack pointer setup: "subu sp,sp,n" where n is a multiple of 8. */
494 { 0x67ff0000, 0xffff0007, M88K_PIA_NOTE_SP_ADJUSTMENT },
496 /* Frame pointer assignment: "addu r30,r31,n". */
497 { 0x63df0000, 0xffff0000, M88K_PIA_NOTE_FP_ASSIGNMENT },
499 /* Store to stack instructions; either "st rx,sp,n" or "st.d rx,sp,n". */
500 { 0x241f0000, 0xfc1f0000, M88K_PIA_NOTE_ST }, /* st rx,sp,n */
501 { 0x201f0000, 0xfc1f0000, M88K_PIA_NOTE_STD }, /* st.d rs,sp,n */
503 /* Instructions needed for setting up r25 for pic code. */
504 { 0x5f200000, 0xffff0000, M88K_PIA_SKIP }, /* or.u r25,r0,offset_high */
505 { 0xcc000002, 0xffffffff, M88K_PIA_SKIP }, /* bsr.n Lab */
506 { 0x5b390000, 0xffff0000, M88K_PIA_SKIP }, /* or r25,r25,offset_low */
507 { 0xf7396001, 0xffffffff, M88K_PIA_SKIP }, /* Lab: addu r25,r25,r1 */
509 /* Various branch or jump instructions which have a delay slot --
510 these do not form part of the prologue, but the instruction in
511 the delay slot might be a store instruction which should be
513 { 0xc4000000, 0xe4000000, M88K_PIA_NOTE_BRANCH },
514 /* br.n, bsr.n, bb0.n, or bb1.n */
515 { 0xec000000, 0xfc000000, M88K_PIA_NOTE_BRANCH }, /* bcnd.n */
516 { 0xf400c400, 0xfffff7e0, M88K_PIA_NOTE_BRANCH }, /* jmp.n or jsr.n */
518 /* Catch all. Ends prologue analysis. */
519 { 0x00000000, 0x00000000, M88K_PIA_NOTE_PROLOGUE_END }
522 /* Do a full analysis of the function prologue at PC and update CACHE
523 accordingly. Bail out early if LIMIT is reached. Return the
524 address where the analysis stopped. If LIMIT points beyond the
525 function prologue, the return address should be the end of the
529 m88k_analyze_prologue (CORE_ADDR pc, CORE_ADDR limit,
530 struct m88k_frame_cache *cache)
532 CORE_ADDR end = limit;
534 /* Provide a dummy cache if necessary. */
537 size_t sizeof_saved_regs =
538 (M88K_R31_REGNUM + 1) * sizeof (struct trad_frame_saved_reg);
540 cache = alloca (sizeof (struct m88k_frame_cache));
541 cache->saved_regs = alloca (sizeof_saved_regs);
543 /* We only initialize the members we care about. */
544 cache->saved_regs[M88K_R1_REGNUM].addr = -1;
545 cache->fp_offset = -1;
550 struct m88k_prologue_insn *pi = m88k_prologue_insn_table;
551 unsigned long insn = m88k_fetch_instruction (pc);
553 while ((insn & pi->mask) != pi->insn)
559 /* If we have a frame pointer, and R1 has been saved,
560 consider this instruction as not being part of the
562 if (cache->fp_offset != -1
563 && cache->saved_regs[M88K_R1_REGNUM].addr != -1)
564 return min (pc, end);
567 case M88K_PIA_NOTE_ST:
568 case M88K_PIA_NOTE_STD:
569 /* If no frame has been allocated, the stores aren't part of
571 if (cache->sp_offset == 0)
572 return min (pc, end);
574 /* Record location of saved registers. */
576 int regnum = ST_SRC (insn) + M88K_R0_REGNUM;
577 ULONGEST offset = ST_OFFSET (insn);
579 cache->saved_regs[regnum].addr = offset;
580 if (pi->action == M88K_PIA_NOTE_STD && regnum < M88K_R31_REGNUM)
581 cache->saved_regs[regnum + 1].addr = offset + 4;
585 case M88K_PIA_NOTE_SP_ADJUSTMENT:
586 /* A second stack pointer adjustment isn't part of the
588 if (cache->sp_offset != 0)
589 return min (pc, end);
591 /* Store stack pointer adjustment. */
592 cache->sp_offset = -SUBU_OFFSET (insn);
595 case M88K_PIA_NOTE_FP_ASSIGNMENT:
596 /* A second frame pointer assignment isn't part of the
598 if (cache->fp_offset != -1)
599 return min (pc, end);
601 /* Record frame pointer assignment. */
602 cache->fp_offset = ADDU_OFFSET (insn);
605 case M88K_PIA_NOTE_BRANCH:
606 /* The branch instruction isn't part of the prologue, but
607 the instruction in the delay slot might be. Limit the
608 prologue analysis to the delay slot and record the branch
609 instruction as the end of the prologue. */
610 limit = min (limit, pc + 2 * M88K_INSN_SIZE);
614 case M88K_PIA_NOTE_PROLOGUE_END:
615 return min (pc, end);
618 pc += M88K_INSN_SIZE;
624 /* An upper limit to the size of the prologue. */
625 const int m88k_max_prologue_size = 128 * M88K_INSN_SIZE;
627 /* Return the address of first real instruction of the function
631 m88k_skip_prologue (CORE_ADDR pc)
633 struct symtab_and_line sal;
634 CORE_ADDR func_start, func_end;
636 /* This is the preferred method, find the end of the prologue by
637 using the debugging information. */
638 if (find_pc_partial_function (pc, NULL, &func_start, &func_end))
640 sal = find_pc_line (func_start, 0);
642 if (sal.end < func_end && pc <= sal.end)
646 return m88k_analyze_prologue (pc, pc + m88k_max_prologue_size, NULL);
649 struct m88k_frame_cache *
650 m88k_frame_cache (struct frame_info *next_frame, void **this_cache)
652 struct m88k_frame_cache *cache;
658 cache = FRAME_OBSTACK_ZALLOC (struct m88k_frame_cache);
659 cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
660 cache->fp_offset = -1;
662 cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
664 m88k_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache);
666 /* Calculate the stack pointer used in the prologue. */
667 if (cache->fp_offset != -1)
671 fp = frame_unwind_register_unsigned (next_frame, M88K_R30_REGNUM);
672 frame_sp = fp - cache->fp_offset;
676 /* If we know where the return address is saved, we can take a
677 solid guess at what the frame pointer should be. */
678 if (cache->saved_regs[M88K_R1_REGNUM].addr != -1)
679 cache->fp_offset = cache->saved_regs[M88K_R1_REGNUM].addr - 4;
680 frame_sp = frame_unwind_register_unsigned (next_frame, M88K_R31_REGNUM);
683 /* Now that we know the stack pointer, adjust the location of the
688 for (regnum = M88K_R0_REGNUM; regnum < M88K_R31_REGNUM; regnum ++)
689 if (cache->saved_regs[regnum].addr != -1)
690 cache->saved_regs[regnum].addr += frame_sp;
693 /* Calculate the frame's base. */
694 cache->base = frame_sp - cache->sp_offset;
695 trad_frame_set_value (cache->saved_regs, M88K_R31_REGNUM, cache->base);
697 /* Identify SXIP with the return address in R1. */
698 cache->saved_regs[M88K_SXIP_REGNUM] = cache->saved_regs[M88K_R1_REGNUM];
705 m88k_frame_this_id (struct frame_info *next_frame, void **this_cache,
706 struct frame_id *this_id)
708 struct m88k_frame_cache *cache = m88k_frame_cache (next_frame, this_cache);
710 /* This marks the outermost frame. */
711 if (cache->base == 0)
714 (*this_id) = frame_id_build (cache->base, cache->pc);
718 m88k_frame_prev_register (struct frame_info *next_frame, void **this_cache,
719 int regnum, int *optimizedp,
720 enum lval_type *lvalp, CORE_ADDR *addrp,
721 int *realnump, gdb_byte *valuep)
723 struct m88k_frame_cache *cache = m88k_frame_cache (next_frame, this_cache);
725 if (regnum == M88K_SNIP_REGNUM || regnum == M88K_SFIP_REGNUM)
731 trad_frame_get_prev_register (next_frame, cache->saved_regs,
732 M88K_SXIP_REGNUM, optimizedp,
733 lvalp, addrp, realnump, valuep);
735 pc = extract_unsigned_integer (valuep, 4);
736 if (regnum == M88K_SFIP_REGNUM)
738 store_unsigned_integer (valuep, 4, pc + 4);
741 /* It's a computed value. */
749 trad_frame_get_prev_register (next_frame, cache->saved_regs, regnum,
750 optimizedp, lvalp, addrp, realnump, valuep);
753 static const struct frame_unwind m88k_frame_unwind =
757 m88k_frame_prev_register
760 static const struct frame_unwind *
761 m88k_frame_sniffer (struct frame_info *next_frame)
763 return &m88k_frame_unwind;
768 m88k_frame_base_address (struct frame_info *next_frame, void **this_cache)
770 struct m88k_frame_cache *cache = m88k_frame_cache (next_frame, this_cache);
772 if (cache->fp_offset != -1)
773 return cache->base + cache->sp_offset + cache->fp_offset;
778 static const struct frame_base m88k_frame_base =
781 m88k_frame_base_address,
782 m88k_frame_base_address,
783 m88k_frame_base_address
787 /* Core file support. */
789 /* Supply register REGNUM from the buffer specified by GREGS and LEN
790 in the general-purpose register set REGSET to register cache
791 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
794 m88k_supply_gregset (const struct regset *regset,
795 struct regcache *regcache,
796 int regnum, const void *gregs, size_t len)
798 const gdb_byte *regs = gregs;
801 for (i = 0; i < M88K_NUM_REGS; i++)
803 if (regnum == i || regnum == -1)
804 regcache_raw_supply (regcache, i, regs + i * 4);
808 /* Motorola 88000 register set. */
810 static struct regset m88k_gregset =
816 /* Return the appropriate register set for the core section identified
817 by SECT_NAME and SECT_SIZE. */
819 static const struct regset *
820 m88k_regset_from_core_section (struct gdbarch *gdbarch,
821 const char *sect_name, size_t sect_size)
823 if (strcmp (sect_name, ".reg") == 0 && sect_size >= M88K_NUM_REGS * 4)
824 return &m88k_gregset;
830 static struct gdbarch *
831 m88k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
833 struct gdbarch *gdbarch;
835 /* If there is already a candidate, use it. */
836 arches = gdbarch_list_lookup_by_info (arches, &info);
838 return arches->gdbarch;
840 /* Allocate space for the new architecture. */
841 gdbarch = gdbarch_alloc (&info, NULL);
843 /* There is no real `long double'. */
844 set_gdbarch_long_double_bit (gdbarch, 64);
845 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
847 set_gdbarch_num_regs (gdbarch, M88K_NUM_REGS);
848 set_gdbarch_register_name (gdbarch, m88k_register_name);
849 set_gdbarch_register_type (gdbarch, m88k_register_type);
851 /* Register numbers of various important registers. */
852 set_gdbarch_sp_regnum (gdbarch, M88K_R31_REGNUM);
853 set_gdbarch_pc_regnum (gdbarch, M88K_SXIP_REGNUM);
855 /* Core file support. */
856 set_gdbarch_regset_from_core_section
857 (gdbarch, m88k_regset_from_core_section);
859 set_gdbarch_print_insn (gdbarch, print_insn_m88k);
861 set_gdbarch_skip_prologue (gdbarch, m88k_skip_prologue);
863 /* Stack grows downward. */
864 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
866 /* Call dummy code. */
867 set_gdbarch_push_dummy_call (gdbarch, m88k_push_dummy_call);
868 set_gdbarch_unwind_dummy_id (gdbarch, m88k_unwind_dummy_id);
870 /* Return value info */
871 set_gdbarch_return_value (gdbarch, m88k_return_value);
873 set_gdbarch_addr_bits_remove (gdbarch, m88k_addr_bits_remove);
874 set_gdbarch_breakpoint_from_pc (gdbarch, m88k_breakpoint_from_pc);
875 set_gdbarch_unwind_pc (gdbarch, m88k_unwind_pc);
876 set_gdbarch_write_pc (gdbarch, m88k_write_pc);
878 frame_base_set_default (gdbarch, &m88k_frame_base);
879 frame_unwind_append_sniffer (gdbarch, m88k_frame_sniffer);
885 /* Provide a prototype to silence -Wmissing-prototypes. */
886 void _initialize_m88k_tdep (void);
889 _initialize_m88k_tdep (void)
891 gdbarch_register (bfd_arch_m88k, m88k_gdbarch_init, NULL);