1 /* Target-dependent code for Motorola 68HC11 & 68HC12
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
3 Contributed by Stephane Carrez, stcarrez@worldnet.fr
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
29 #include "gdb_string.h"
35 #include "arch-utils.h"
38 #include "opcode/m68hc11.h"
40 /* Register numbers of various important registers.
41 Note that some of these values are "real" register numbers,
42 and correspond to the general registers of the machine,
43 and some are "phony" register numbers which are too large
44 to be actual register numbers as far as the user is concerned
45 but do serve to get the desired values when passed to read_register. */
47 #define HARD_X_REGNUM 0
48 #define HARD_D_REGNUM 1
49 #define HARD_Y_REGNUM 2
50 #define HARD_SP_REGNUM 3
51 #define HARD_PC_REGNUM 4
53 #define HARD_A_REGNUM 5
54 #define HARD_B_REGNUM 6
55 #define HARD_CCR_REGNUM 7
56 #define M68HC11_LAST_HARD_REG (HARD_CCR_REGNUM)
58 /* Z is replaced by X or Y by gcc during machine reorg.
59 ??? There is no way to get it and even know whether
60 it's in X or Y or in ZS. */
61 #define SOFT_Z_REGNUM 8
63 /* Soft registers. These registers are special. There are treated
64 like normal hard registers by gcc and gdb (ie, within dwarf2 info).
65 They are physically located in memory. */
66 #define SOFT_FP_REGNUM 9
67 #define SOFT_TMP_REGNUM 10
68 #define SOFT_ZS_REGNUM 11
69 #define SOFT_XY_REGNUM 12
70 #define SOFT_UNUSED_REGNUM 13
71 #define SOFT_D1_REGNUM 14
72 #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
73 #define M68HC11_MAX_SOFT_REGS 32
75 #define M68HC11_NUM_REGS (8)
76 #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
77 #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
79 #define M68HC11_REG_SIZE (2)
84 /* Stack pointer correction value. For 68hc11, the stack pointer points
85 to the next push location. An offset of 1 must be applied to obtain
86 the address where the last value is saved. For 68hc12, the stack
87 pointer points to the last value pushed. No offset is necessary. */
90 /* Description of instructions in the prologue. */
91 struct insn_sequence *prologue;
94 #define M6811_TDEP gdbarch_tdep (current_gdbarch)
95 #define STACK_CORRECTION (M6811_TDEP->stack_correction)
97 struct frame_extra_info
106 /* Table of registers for 68HC11. This includes the hard registers
107 and the soft registers used by GCC. */
109 m68hc11_register_names[] =
111 "x", "d", "y", "sp", "pc", "a", "b",
112 "ccr", "z", "frame","tmp", "zs", "xy", 0,
113 "d1", "d2", "d3", "d4", "d5", "d6", "d7",
114 "d8", "d9", "d10", "d11", "d12", "d13", "d14",
115 "d15", "d16", "d17", "d18", "d19", "d20", "d21",
116 "d22", "d23", "d24", "d25", "d26", "d27", "d28",
117 "d29", "d30", "d31", "d32"
120 struct m68hc11_soft_reg
126 static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS];
128 #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
130 static int soft_min_addr;
131 static int soft_max_addr;
132 static int soft_reg_initialized = 0;
134 /* Look in the symbol table for the address of a pseudo register
135 in memory. If we don't find it, pretend the register is not used
136 and not available. */
138 m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
140 struct minimal_symbol *msymbol;
142 msymbol = lookup_minimal_symbol (name, NULL, NULL);
145 reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
146 reg->name = xstrdup (name);
148 /* Keep track of the address range for soft registers. */
149 if (reg->addr < (CORE_ADDR) soft_min_addr)
150 soft_min_addr = reg->addr;
151 if (reg->addr > (CORE_ADDR) soft_max_addr)
152 soft_max_addr = reg->addr;
161 /* Initialize the table of soft register addresses according
162 to the symbol table. */
164 m68hc11_initialize_register_info (void)
168 if (soft_reg_initialized)
171 soft_min_addr = INT_MAX;
173 for (i = 0; i < M68HC11_ALL_REGS; i++)
175 soft_regs[i].name = 0;
178 m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame");
179 m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp");
180 m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z");
181 soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM];
182 m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy");
184 for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++)
188 sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1);
189 m68hc11_get_register_info (&soft_regs[i], buf);
192 if (soft_regs[SOFT_FP_REGNUM].name == 0)
194 warning ("No frame soft register found in the symbol table.\n");
195 warning ("Stack backtrace will not work.\n");
197 soft_reg_initialized = 1;
200 /* Given an address in memory, return the soft register number if
201 that address corresponds to a soft register. Returns -1 if not. */
203 m68hc11_which_soft_register (CORE_ADDR addr)
207 if (addr < soft_min_addr || addr > soft_max_addr)
210 for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++)
212 if (soft_regs[i].name && soft_regs[i].addr == addr)
218 /* Fetch a pseudo register. The 68hc11 soft registers are treated like
219 pseudo registers. They are located in memory. Translate the register
220 fetch into a memory read. */
222 m68hc11_fetch_pseudo_register (int regno)
224 char buf[MAX_REGISTER_RAW_SIZE];
226 m68hc11_initialize_register_info ();
228 /* Fetch a soft register: translate into a memory read. */
229 if (soft_regs[regno].name)
231 target_read_memory (soft_regs[regno].addr, buf, 2);
237 supply_register (regno, buf);
240 /* Store a pseudo register. Translate the register store
241 into a memory write. */
243 m68hc11_store_pseudo_register (int regno)
245 m68hc11_initialize_register_info ();
247 /* Store a soft register: translate into a memory write. */
248 if (soft_regs[regno].name)
250 char buf[MAX_REGISTER_RAW_SIZE];
252 read_register_gen (regno, buf);
253 target_write_memory (soft_regs[regno].addr, buf, 2);
258 m68hc11_register_name (int reg_nr)
262 if (reg_nr >= M68HC11_ALL_REGS)
265 /* If we don't know the address of a soft register, pretend it
267 if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0)
269 return m68hc11_register_names[reg_nr];
272 static unsigned char *
273 m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
275 static unsigned char breakpoint[] = {0x0};
277 *lenptr = sizeof (breakpoint);
281 /* Immediately after a function call, return the saved pc before the frame
285 m68hc11_saved_pc_after_call (struct frame_info *frame)
289 addr = read_register (HARD_SP_REGNUM) + STACK_CORRECTION;
291 return read_memory_integer (addr, 2) & 0x0FFFF;
295 m68hc11_frame_saved_pc (struct frame_info *frame)
297 return frame->extra_info->return_pc;
301 m68hc11_frame_args_address (struct frame_info *frame)
303 return frame->frame + frame->extra_info->size + STACK_CORRECTION + 2;
307 m68hc11_frame_locals_address (struct frame_info *frame)
312 /* Discard from the stack the innermost frame, restoring all saved
316 m68hc11_pop_frame (void)
318 register struct frame_info *frame = get_current_frame ();
319 register CORE_ADDR fp, sp;
322 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
323 generic_pop_dummy_frame ();
326 fp = FRAME_FP (frame);
327 FRAME_INIT_SAVED_REGS (frame);
329 /* Copy regs from where they were saved in the frame. */
330 for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++)
331 if (frame->saved_regs[regnum])
332 write_register (regnum,
333 read_memory_integer (frame->saved_regs[regnum], 2));
335 write_register (HARD_PC_REGNUM, frame->extra_info->return_pc);
336 sp = fp + frame->extra_info->size;
337 write_register (HARD_SP_REGNUM, sp);
339 flush_cached_frames ();
343 /* 68HC11 & 68HC12 prologue analysis.
348 /* 68HC11 opcodes. */
349 #undef M6811_OP_PAGE2
350 #define M6811_OP_PAGE2 (0x18)
351 #define M6811_OP_LDX (0xde)
352 #define M6811_OP_PSHX (0x3c)
353 #define M6811_OP_STS (0x9f)
354 #define M6811_OP_TSX (0x30)
355 #define M6811_OP_XGDX (0x8f)
356 #define M6811_OP_ADDD (0xc3)
357 #define M6811_OP_TXS (0x35)
358 #define M6811_OP_DES (0x34)
360 /* 68HC12 opcodes. */
361 #define M6812_OP_PAGE2 (0x18)
362 #define M6812_OP_MOVW (0x01)
363 #define M6812_PB_PSHW (0xae)
364 #define M6812_OP_STS (0x7f)
365 #define M6812_OP_LEAS (0x1b)
367 /* Operand extraction. */
368 #define OP_DIRECT (0x100) /* 8-byte direct addressing. */
369 #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
370 #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
371 #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
373 /* Identification of the sequence. */
377 P_SAVE_REG, /* Save a register on the stack. */
378 P_SET_FRAME, /* Setup the frame pointer. */
379 P_LOCAL_1, /* Allocate 1 byte for locals. */
380 P_LOCAL_2, /* Allocate 2 bytes for locals. */
381 P_LOCAL_N /* Allocate N bytes for locals. */
384 struct insn_sequence {
385 enum m6811_seq_type type;
387 unsigned short code[MAX_CODES];
390 /* Sequence of instructions in the 68HC11 function prologue. */
391 static struct insn_sequence m6811_prologue[] = {
392 /* Sequences to save a soft-register. */
393 { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT,
395 { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT,
396 M6811_OP_PAGE2, M6811_OP_PSHX } },
398 /* Sequences to allocate local variables. */
399 { P_LOCAL_N, 7, { M6811_OP_TSX,
401 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
404 { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX,
405 M6811_OP_PAGE2, M6811_OP_XGDX,
406 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
407 M6811_OP_PAGE2, M6811_OP_XGDX,
408 M6811_OP_PAGE2, M6811_OP_TXS } },
409 { P_LOCAL_1, 1, { M6811_OP_DES } },
410 { P_LOCAL_2, 1, { M6811_OP_PSHX } },
411 { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } },
413 /* Initialize the frame pointer. */
414 { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } },
419 /* Sequence of instructions in the 68HC12 function prologue. */
420 static struct insn_sequence m6812_prologue[] = {
421 { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW,
422 OP_IMM_HIGH, OP_IMM_LOW } },
423 { P_SET_FRAME, 3, { M6812_OP_STS, OP_IMM_HIGH, OP_IMM_LOW } },
424 { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } },
429 /* Analyze the sequence of instructions starting at the given address.
430 Returns a pointer to the sequence when it is recognized and
431 the optional value (constant/address) associated with it.
432 Advance the pc for the next sequence. */
433 static struct insn_sequence *
434 m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR *pc,
437 unsigned char buffer[MAX_CODES];
444 for (; seq->type != P_LAST; seq++)
447 for (j = 0; j < seq->length; j++)
451 buffer[bufsize] = read_memory_unsigned_integer (*pc + bufsize,
455 /* Continue while we match the opcode. */
456 if (seq->code[j] == buffer[j])
459 if ((seq->code[j] & 0xf00) == 0)
462 /* Extract a sequence parameter (address or constant). */
463 switch (seq->code[j])
466 cur_val = (CORE_ADDR) buffer[j];
470 cur_val = cur_val & 0x0ff;
471 cur_val |= (buffer[j] << 8);
476 cur_val |= buffer[j];
480 if ((buffer[j] & 0xE0) == 0x80)
482 v = buffer[j] & 0x1f;
486 else if ((buffer[j] & 0xfe) == 0xf0)
488 v = read_memory_unsigned_integer (*pc + j + 1, 1);
492 else if (buffer[j] == 0xf2)
494 v = read_memory_unsigned_integer (*pc + j + 1, 2);
501 /* We have a full match. */
502 if (j == seq->length)
512 /* Analyze the function prologue to find some information
514 - the PC of the first line (for m68hc11_skip_prologue)
515 - the offset of the previous frame saved address (from current frame)
516 - the soft registers which are pushed. */
518 m68hc11_guess_from_prologue (CORE_ADDR pc, CORE_ADDR fp,
519 CORE_ADDR *first_line,
520 int *frame_offset, CORE_ADDR *pushed_regs)
525 int found_frame_point;
529 struct insn_sequence *seq_table;
531 first_pc = get_pc_function_start (pc);
534 m68hc11_initialize_register_info ();
542 seq_table = gdbarch_tdep (current_gdbarch)->prologue;
544 /* The 68hc11 stack is as follows:
560 +-----------+ <--- current frame
563 With most processors (like 68K) the previous frame can be computed
564 easily because it is always at a fixed offset (see link/unlink).
565 That is, locals are accessed with negative offsets, arguments are
566 accessed with positive ones. Since 68hc11 only supports offsets
567 in the range [0..255], the frame is defined at the bottom of
568 locals (see picture).
570 The purpose of the analysis made here is to find out the size
571 of locals in this function. An alternative to this is to use
572 DWARF2 info. This would be better but I don't know how to
573 access dwarf2 debug from this function.
575 Walk from the function entry point to the point where we save
576 the frame. While walking instructions, compute the size of bytes
577 which are pushed. This gives us the index to access the previous
580 We limit the search to 128 bytes so that the algorithm is bounded
581 in case of random and wrong code. We also stop and abort if
582 we find an instruction which is not supposed to appear in the
583 prologue (as generated by gcc 2.95, 2.96).
587 found_frame_point = 0;
590 while (!done && pc + 2 < func_end)
592 struct insn_sequence *seq;
595 seq = m68hc11_analyze_instruction (seq_table, &pc, &val);
599 if (seq->type == P_SAVE_REG)
601 if (found_frame_point)
603 saved_reg = m68hc11_which_soft_register (val);
609 pushed_regs[saved_reg] = save_addr;
616 else if (seq->type == P_SET_FRAME)
618 found_frame_point = 1;
619 *frame_offset = size;
621 else if (seq->type == P_LOCAL_1)
625 else if (seq->type == P_LOCAL_2)
629 else if (seq->type == P_LOCAL_N)
631 /* Stack pointer is decremented for the allocation. */
633 size -= (int) (val) | 0xffff0000;
642 m68hc11_skip_prologue (CORE_ADDR pc)
644 CORE_ADDR func_addr, func_end;
645 struct symtab_and_line sal;
648 /* If we have line debugging information, then the end of the
649 prologue should be the first assembly instruction of the
650 first source line. */
651 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
653 sal = find_pc_line (func_addr, 0);
654 if (sal.end && sal.end < func_end)
658 m68hc11_guess_from_prologue (pc, 0, &pc, &frame_offset, 0);
662 /* Given a GDB frame, determine the address of the calling function's frame.
663 This will be used to create a new GDB frame struct, and then
664 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
668 m68hc11_frame_chain (struct frame_info *frame)
672 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
673 return frame->frame; /* dummy frame same as caller's frame */
675 if (frame->extra_info->return_pc == 0
676 || inside_entry_file (frame->extra_info->return_pc))
677 return (CORE_ADDR) 0;
679 if (frame->frame == 0)
681 return (CORE_ADDR) 0;
684 addr = frame->frame + frame->extra_info->size + STACK_CORRECTION - 2;
685 addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF;
688 return (CORE_ADDR) 0;
694 /* Put here the code to store, into a struct frame_saved_regs, the
695 addresses of the saved registers of frame described by FRAME_INFO.
696 This includes special registers such as pc and fp saved in special
697 ways in the stack frame. sp is even more special: the address we
698 return for it IS the sp for the next frame. */
700 m68hc11_frame_init_saved_regs (struct frame_info *fi)
705 if (fi->saved_regs == NULL)
706 frame_saved_regs_zalloc (fi);
708 memset (fi->saved_regs, 0, sizeof (fi->saved_regs));
711 m68hc11_guess_from_prologue (pc, fi->frame, &pc, &fi->extra_info->size,
714 addr = fi->frame + fi->extra_info->size + STACK_CORRECTION;
715 if (soft_regs[SOFT_FP_REGNUM].name)
716 fi->saved_regs[SOFT_FP_REGNUM] = addr - 2;
717 fi->saved_regs[HARD_SP_REGNUM] = addr;
718 fi->saved_regs[HARD_PC_REGNUM] = fi->saved_regs[HARD_SP_REGNUM];
722 m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi)
726 fi->extra_info = (struct frame_extra_info *)
727 frame_obstack_alloc (sizeof (struct frame_extra_info));
730 fi->pc = FRAME_SAVED_PC (fi->next);
732 m68hc11_frame_init_saved_regs (fi);
736 fi->extra_info->return_pc = m68hc11_saved_pc_after_call (fi);
740 addr = fi->frame + fi->extra_info->size + STACK_CORRECTION;
741 addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff;
742 fi->extra_info->return_pc = addr;
744 printf ("Pc@0x%04x, FR 0x%04x, size %d, read ret @0x%04x -> 0x%04x\n",
753 /* Same as 'info reg' but prints the registers in a different way. */
755 show_regs (char *args, int from_tty)
757 int ccr = read_register (HARD_CCR_REGNUM);
761 printf_filtered ("PC=%04x SP=%04x FP=%04x CCR=%02x %c%c%c%c%c%c%c%c\n",
762 (int) read_register (HARD_PC_REGNUM),
763 (int) read_register (HARD_SP_REGNUM),
764 (int) read_register (SOFT_FP_REGNUM),
766 ccr & M6811_S_BIT ? 'S' : '-',
767 ccr & M6811_X_BIT ? 'X' : '-',
768 ccr & M6811_H_BIT ? 'H' : '-',
769 ccr & M6811_I_BIT ? 'I' : '-',
770 ccr & M6811_N_BIT ? 'N' : '-',
771 ccr & M6811_Z_BIT ? 'Z' : '-',
772 ccr & M6811_V_BIT ? 'V' : '-',
773 ccr & M6811_C_BIT ? 'C' : '-');
775 printf_filtered ("D=%04x IX=%04x IY=%04x\n",
776 (int) read_register (HARD_D_REGNUM),
777 (int) read_register (HARD_X_REGNUM),
778 (int) read_register (HARD_Y_REGNUM));
781 for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++)
783 /* Skip registers which are not defined in the symbol table. */
784 if (soft_regs[i].name == 0)
787 printf_filtered ("D%d=%04x",
788 i - SOFT_D1_REGNUM + 1,
789 (int) read_register (i));
792 printf_filtered ("\n");
794 printf_filtered (" ");
796 if (nr && (nr % 8) != 7)
797 printf_filtered ("\n");
801 m68hc11_stack_align (CORE_ADDR addr)
803 return ((addr + 1) & -2);
807 m68hc11_push_arguments (int nargs,
811 CORE_ADDR struct_addr)
815 int first_stack_argnum;
822 first_stack_argnum = 0;
825 /* The struct is allocated on the stack and gdb used the stack
826 pointer for the address of that struct. We must apply the
827 stack offset on the address. */
828 write_register (HARD_D_REGNUM, struct_addr + STACK_CORRECTION);
832 type = VALUE_TYPE (args[0]);
833 len = TYPE_LENGTH (type);
835 /* First argument is passed in D and X registers. */
838 LONGEST v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len);
839 first_stack_argnum = 1;
840 write_register (HARD_D_REGNUM, v);
844 write_register (HARD_X_REGNUM, v);
848 for (argnum = first_stack_argnum; argnum < nargs; argnum++)
850 type = VALUE_TYPE (args[argnum]);
851 stack_alloc += (TYPE_LENGTH (type) + 1) & -2;
855 stack_offset = STACK_CORRECTION;
856 for (argnum = first_stack_argnum; argnum < nargs; argnum++)
858 type = VALUE_TYPE (args[argnum]);
859 len = TYPE_LENGTH (type);
861 val = (char*) VALUE_CONTENTS (args[argnum]);
862 write_memory (sp + stack_offset, val, len);
866 static char zero = 0;
868 write_memory (sp + stack_offset, &zero, 1);
876 /* Return a location where we can set a breakpoint that will be hit
877 when an inferior function call returns. */
879 m68hc11_call_dummy_address (void)
881 return entry_point_address ();
885 m68hc11_register_virtual_type (int reg_nr)
887 return builtin_type_uint16;
891 m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
893 /* The struct address computed by gdb is on the stack.
894 It uses the stack pointer so we must apply the stack
895 correction offset. */
896 write_register (HARD_D_REGNUM, addr + STACK_CORRECTION);
900 m68hc11_store_return_value (struct type *type, char *valbuf)
904 len = TYPE_LENGTH (type);
906 /* First argument is passed in D and X registers. */
909 LONGEST v = extract_unsigned_integer (valbuf, len);
911 write_register (HARD_D_REGNUM, v);
915 write_register (HARD_X_REGNUM, v);
919 error ("return of value > 4 is not supported.");
923 /* Given a return value in `regbuf' with a type `type',
924 extract and copy its value into `valbuf'. */
927 m68hc11_extract_return_value (struct type *type,
931 int len = TYPE_LENGTH (type);
936 memcpy (valbuf, ®buf[HARD_D_REGNUM * 2 + 1], len);
940 memcpy (valbuf, ®buf[HARD_D_REGNUM * 2], len);
944 memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2 + 1], 1);
945 memcpy (&valbuf[1], ®buf[HARD_D_REGNUM * 2], 2);
949 memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2], 2);
950 memcpy (&valbuf[2], ®buf[HARD_D_REGNUM * 2], 2);
954 error ("bad size for return value");
958 /* Should call_function allocate stack space for a struct return? */
960 m68hc11_use_struct_convention (int gcc_p, struct type *type)
962 return (TYPE_CODE (type) == TYPE_CODE_STRUCT
963 || TYPE_CODE (type) == TYPE_CODE_UNION
964 || TYPE_LENGTH (type) > 4);
968 m68hc11_return_value_on_stack (struct type *type)
970 return TYPE_LENGTH (type) > 4;
973 /* Extract from an array REGBUF containing the (raw) register state
974 the address in which a function should return its structure value,
975 as a CORE_ADDR (or an expression that can be used as one). */
977 m68hc11_extract_struct_value_address (char *regbuf)
979 return extract_address (®buf[HARD_D_REGNUM * 2],
980 REGISTER_RAW_SIZE (HARD_D_REGNUM));
983 /* Function: push_return_address (pc)
984 Set up the return address for the inferior function call.
985 Needed for targets where we don't actually execute a JSR/BSR instruction */
988 m68hc11_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
992 pc = CALL_DUMMY_ADDRESS ();
994 store_unsigned_integer (valbuf, 2, pc);
995 write_memory (sp + STACK_CORRECTION, valbuf, 2);
999 /* Index within `registers' of the first byte of the space for
1002 m68hc11_register_byte (int reg_nr)
1004 return (reg_nr * M68HC11_REG_SIZE);
1008 m68hc11_register_raw_size (int reg_nr)
1010 return M68HC11_REG_SIZE;
1014 gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
1016 if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11)
1017 return print_insn_m68hc11 (memaddr, info);
1019 return print_insn_m68hc12 (memaddr, info);
1022 static struct gdbarch *
1023 m68hc11_gdbarch_init (struct gdbarch_info info,
1024 struct gdbarch_list *arches)
1026 static LONGEST m68hc11_call_dummy_words[] =
1028 struct gdbarch *gdbarch;
1029 struct gdbarch_tdep *tdep;
1031 soft_reg_initialized = 0;
1033 /* try to find a pre-existing architecture */
1034 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1036 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1038 return arches->gdbarch;
1041 /* Need a new architecture. Fill in a target specific vector. */
1042 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1043 gdbarch = gdbarch_alloc (&info, tdep);
1045 switch (info.bfd_arch_info->arch)
1047 case bfd_arch_m68hc11:
1048 tdep->stack_correction = 1;
1049 tdep->prologue = m6811_prologue;
1052 case bfd_arch_m68hc12:
1053 tdep->stack_correction = 0;
1054 tdep->prologue = m6812_prologue;
1061 /* Initially set everything according to the ABI. */
1062 set_gdbarch_short_bit (gdbarch, 16);
1063 set_gdbarch_int_bit (gdbarch, 32);
1064 set_gdbarch_float_bit (gdbarch, 32);
1065 set_gdbarch_double_bit (gdbarch, 64);
1066 set_gdbarch_long_double_bit (gdbarch, 64);
1067 set_gdbarch_long_bit (gdbarch, 32);
1068 set_gdbarch_ptr_bit (gdbarch, 16);
1069 set_gdbarch_long_long_bit (gdbarch, 64);
1071 /* Set register info. */
1072 set_gdbarch_fp0_regnum (gdbarch, -1);
1073 set_gdbarch_max_register_raw_size (gdbarch, 2);
1074 set_gdbarch_max_register_virtual_size (gdbarch, 2);
1075 set_gdbarch_register_raw_size (gdbarch, m68hc11_register_raw_size);
1076 set_gdbarch_register_virtual_size (gdbarch, m68hc11_register_raw_size);
1077 set_gdbarch_register_byte (gdbarch, m68hc11_register_byte);
1078 set_gdbarch_frame_init_saved_regs (gdbarch, m68hc11_frame_init_saved_regs);
1079 set_gdbarch_frame_args_skip (gdbarch, 0);
1081 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
1082 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
1083 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
1084 set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
1085 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
1086 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
1088 set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
1089 set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
1090 set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
1091 set_gdbarch_fp_regnum (gdbarch, SOFT_FP_REGNUM);
1092 set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
1093 set_gdbarch_register_name (gdbarch, m68hc11_register_name);
1094 set_gdbarch_register_size (gdbarch, 2);
1095 set_gdbarch_register_bytes (gdbarch, M68HC11_ALL_REGS * 2);
1096 set_gdbarch_register_virtual_type (gdbarch, m68hc11_register_virtual_type);
1097 set_gdbarch_fetch_pseudo_register (gdbarch, m68hc11_fetch_pseudo_register);
1098 set_gdbarch_store_pseudo_register (gdbarch, m68hc11_store_pseudo_register);
1100 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1101 set_gdbarch_call_dummy_length (gdbarch, 0);
1102 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1103 set_gdbarch_call_dummy_address (gdbarch, m68hc11_call_dummy_address);
1104 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
1105 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1106 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1107 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
1108 set_gdbarch_call_dummy_words (gdbarch, m68hc11_call_dummy_words);
1109 set_gdbarch_sizeof_call_dummy_words (gdbarch,
1110 sizeof (m68hc11_call_dummy_words));
1111 set_gdbarch_call_dummy_p (gdbarch, 1);
1112 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1113 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
1114 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1115 set_gdbarch_extract_return_value (gdbarch, m68hc11_extract_return_value);
1116 set_gdbarch_push_arguments (gdbarch, m68hc11_push_arguments);
1117 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1118 set_gdbarch_push_return_address (gdbarch, m68hc11_push_return_address);
1119 set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack);
1121 set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return);
1122 set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
1123 set_gdbarch_extract_struct_value_address (gdbarch,
1124 m68hc11_extract_struct_value_address);
1125 set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not);
1128 set_gdbarch_frame_chain (gdbarch, m68hc11_frame_chain);
1129 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
1130 set_gdbarch_frame_saved_pc (gdbarch, m68hc11_frame_saved_pc);
1131 set_gdbarch_frame_args_address (gdbarch, m68hc11_frame_args_address);
1132 set_gdbarch_frame_locals_address (gdbarch, m68hc11_frame_locals_address);
1133 set_gdbarch_saved_pc_after_call (gdbarch, m68hc11_saved_pc_after_call);
1134 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1136 set_gdbarch_frame_chain_valid (gdbarch, func_frame_chain_valid);
1137 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
1139 set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return);
1140 set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
1141 set_gdbarch_extract_struct_value_address
1142 (gdbarch, m68hc11_extract_struct_value_address);
1143 set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention);
1144 set_gdbarch_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info);
1145 set_gdbarch_pop_frame (gdbarch, m68hc11_pop_frame);
1146 set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
1147 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1148 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1149 set_gdbarch_function_start_offset (gdbarch, 0);
1150 set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
1151 set_gdbarch_stack_align (gdbarch, m68hc11_stack_align);
1153 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1154 set_gdbarch_ieee_float (gdbarch, 1);
1160 _initialize_m68hc11_tdep (void)
1162 register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init);
1163 register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init);
1164 if (!tm_print_insn) /* Someone may have already set it */
1165 tm_print_insn = gdb_print_insn_m68hc11;
1167 add_com ("regs", class_vars, show_regs, "Print all registers");