1 /* Target-dependent code for Motorola 68HC11 & 68HC12
3 Copyright (C) 1999-2005, 2007-2012 Free Software Foundation, Inc.
5 Contributed by Stephane Carrez, stcarrez@nerim.fr
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
25 #include "frame-unwind.h"
26 #include "frame-base.h"
27 #include "dwarf2-frame.h"
28 #include "trad-frame.h"
33 #include "gdb_string.h"
39 #include "arch-utils.h"
41 #include "reggroups.h"
44 #include "opcode/m68hc11.h"
45 #include "elf/m68hc11.h"
48 /* Macros for setting and testing a bit in a minimal symbol.
49 For 68HC11/68HC12 we have two flags that tell which return
50 type the function is using. This is used for prologue and frame
51 analysis to compute correct stack frame layout.
53 The MSB of the minimal symbol's "info" field is used for this purpose.
55 MSYMBOL_SET_RTC Actually sets the "RTC" bit.
56 MSYMBOL_SET_RTI Actually sets the "RTI" bit.
57 MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol.
58 MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol. */
60 #define MSYMBOL_SET_RTC(msym) \
61 MSYMBOL_TARGET_FLAG_1 (msym) = 1
63 #define MSYMBOL_SET_RTI(msym) \
64 MSYMBOL_TARGET_FLAG_2 (msym) = 1
66 #define MSYMBOL_IS_RTC(msym) \
67 MSYMBOL_TARGET_FLAG_1 (msym)
69 #define MSYMBOL_IS_RTI(msym) \
70 MSYMBOL_TARGET_FLAG_2 (msym)
72 enum insn_return_kind {
79 /* Register numbers of various important registers. */
81 #define HARD_X_REGNUM 0
82 #define HARD_D_REGNUM 1
83 #define HARD_Y_REGNUM 2
84 #define HARD_SP_REGNUM 3
85 #define HARD_PC_REGNUM 4
87 #define HARD_A_REGNUM 5
88 #define HARD_B_REGNUM 6
89 #define HARD_CCR_REGNUM 7
91 /* 68HC12 page number register.
92 Note: to keep a compatibility with gcc register naming, we must
93 not have to rename FP and other soft registers. The page register
94 is a real hard register and must therefore be counted by gdbarch_num_regs.
95 For this it has the same number as Z register (which is not used). */
96 #define HARD_PAGE_REGNUM 8
97 #define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
99 /* Z is replaced by X or Y by gcc during machine reorg.
100 ??? There is no way to get it and even know whether
101 it's in X or Y or in ZS. */
102 #define SOFT_Z_REGNUM 8
104 /* Soft registers. These registers are special. There are treated
105 like normal hard registers by gcc and gdb (ie, within dwarf2 info).
106 They are physically located in memory. */
107 #define SOFT_FP_REGNUM 9
108 #define SOFT_TMP_REGNUM 10
109 #define SOFT_ZS_REGNUM 11
110 #define SOFT_XY_REGNUM 12
111 #define SOFT_UNUSED_REGNUM 13
112 #define SOFT_D1_REGNUM 14
113 #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
114 #define M68HC11_MAX_SOFT_REGS 32
116 #define M68HC11_NUM_REGS (8)
117 #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
118 #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
120 #define M68HC11_REG_SIZE (2)
122 #define M68HC12_NUM_REGS (9)
123 #define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1)
124 #define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1)
126 struct insn_sequence;
129 /* Stack pointer correction value. For 68hc11, the stack pointer points
130 to the next push location. An offset of 1 must be applied to obtain
131 the address where the last value is saved. For 68hc12, the stack
132 pointer points to the last value pushed. No offset is necessary. */
133 int stack_correction;
135 /* Description of instructions in the prologue. */
136 struct insn_sequence *prologue;
138 /* True if the page memory bank register is available
140 int use_page_register;
142 /* ELF flags for ABI. */
146 #define STACK_CORRECTION(gdbarch) (gdbarch_tdep (gdbarch)->stack_correction)
147 #define USE_PAGE_REGISTER(gdbarch) (gdbarch_tdep (gdbarch)->use_page_register)
149 struct m68hc11_unwind_cache
151 /* The previous frame's inner most stack address. Used as this
152 frame ID's stack_addr. */
154 /* The frame's base, optionally used by the high-level debug info. */
162 enum insn_return_kind return_kind;
164 /* Table indicating the location of each and every register. */
165 struct trad_frame_saved_reg *saved_regs;
168 /* Table of registers for 68HC11. This includes the hard registers
169 and the soft registers used by GCC. */
171 m68hc11_register_names[] =
173 "x", "d", "y", "sp", "pc", "a", "b",
174 "ccr", "page", "frame","tmp", "zs", "xy", 0,
175 "d1", "d2", "d3", "d4", "d5", "d6", "d7",
176 "d8", "d9", "d10", "d11", "d12", "d13", "d14",
177 "d15", "d16", "d17", "d18", "d19", "d20", "d21",
178 "d22", "d23", "d24", "d25", "d26", "d27", "d28",
179 "d29", "d30", "d31", "d32"
182 struct m68hc11_soft_reg
188 static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS];
190 #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
192 static int soft_min_addr;
193 static int soft_max_addr;
194 static int soft_reg_initialized = 0;
196 /* Look in the symbol table for the address of a pseudo register
197 in memory. If we don't find it, pretend the register is not used
198 and not available. */
200 m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
202 struct minimal_symbol *msymbol;
204 msymbol = lookup_minimal_symbol (name, NULL, NULL);
207 reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
208 reg->name = xstrdup (name);
210 /* Keep track of the address range for soft registers. */
211 if (reg->addr < (CORE_ADDR) soft_min_addr)
212 soft_min_addr = reg->addr;
213 if (reg->addr > (CORE_ADDR) soft_max_addr)
214 soft_max_addr = reg->addr;
223 /* Initialize the table of soft register addresses according
224 to the symbol table. */
226 m68hc11_initialize_register_info (void)
230 if (soft_reg_initialized)
233 soft_min_addr = INT_MAX;
235 for (i = 0; i < M68HC11_ALL_REGS; i++)
237 soft_regs[i].name = 0;
240 m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame");
241 m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp");
242 m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z");
243 soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM];
244 m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy");
246 for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++)
250 sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1);
251 m68hc11_get_register_info (&soft_regs[i], buf);
254 if (soft_regs[SOFT_FP_REGNUM].name == 0)
255 warning (_("No frame soft register found in the symbol table.\n"
256 "Stack backtrace will not work."));
257 soft_reg_initialized = 1;
260 /* Given an address in memory, return the soft register number if
261 that address corresponds to a soft register. Returns -1 if not. */
263 m68hc11_which_soft_register (CORE_ADDR addr)
267 if (addr < soft_min_addr || addr > soft_max_addr)
270 for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++)
272 if (soft_regs[i].name && soft_regs[i].addr == addr)
278 /* Fetch a pseudo register. The 68hc11 soft registers are treated like
279 pseudo registers. They are located in memory. Translate the register
280 fetch into a memory read. */
281 static enum register_status
282 m68hc11_pseudo_register_read (struct gdbarch *gdbarch,
283 struct regcache *regcache,
284 int regno, gdb_byte *buf)
286 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
288 /* The PC is a pseudo reg only for 68HC12 with the memory bank
290 if (regno == M68HC12_HARD_PC_REGNUM)
293 const int regsize = 4;
294 enum register_status status;
296 status = regcache_cooked_read_unsigned (regcache, HARD_PC_REGNUM, &pc);
297 if (status != REG_VALID)
299 if (pc >= 0x8000 && pc < 0xc000)
303 regcache_cooked_read_unsigned (regcache, HARD_PAGE_REGNUM, &page);
308 store_unsigned_integer (buf, regsize, byte_order, pc);
312 m68hc11_initialize_register_info ();
314 /* Fetch a soft register: translate into a memory read. */
315 if (soft_regs[regno].name)
317 target_read_memory (soft_regs[regno].addr, buf, 2);
327 /* Store a pseudo register. Translate the register store
328 into a memory write. */
330 m68hc11_pseudo_register_write (struct gdbarch *gdbarch,
331 struct regcache *regcache,
332 int regno, const gdb_byte *buf)
334 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
336 /* The PC is a pseudo reg only for 68HC12 with the memory bank
338 if (regno == M68HC12_HARD_PC_REGNUM)
340 const int regsize = 4;
341 char *tmp = alloca (regsize);
344 memcpy (tmp, buf, regsize);
345 pc = extract_unsigned_integer (tmp, regsize, byte_order);
349 regcache_cooked_write_unsigned (regcache, HARD_PAGE_REGNUM,
352 regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM,
356 regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM, pc);
360 m68hc11_initialize_register_info ();
362 /* Store a soft register: translate into a memory write. */
363 if (soft_regs[regno].name)
365 const int regsize = 2;
366 char *tmp = alloca (regsize);
367 memcpy (tmp, buf, regsize);
368 target_write_memory (soft_regs[regno].addr, tmp, regsize);
373 m68hc11_register_name (struct gdbarch *gdbarch, int reg_nr)
375 if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER (gdbarch))
377 if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER (gdbarch))
382 if (reg_nr >= M68HC11_ALL_REGS)
385 m68hc11_initialize_register_info ();
387 /* If we don't know the address of a soft register, pretend it
389 if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0)
391 return m68hc11_register_names[reg_nr];
394 static const unsigned char *
395 m68hc11_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
398 static unsigned char breakpoint[] = {0x0};
400 *lenptr = sizeof (breakpoint);
405 /* 68HC11 & 68HC12 prologue analysis. */
409 /* 68HC11 opcodes. */
410 #undef M6811_OP_PAGE2
411 #define M6811_OP_PAGE2 (0x18)
412 #define M6811_OP_LDX (0xde)
413 #define M6811_OP_LDX_EXT (0xfe)
414 #define M6811_OP_PSHX (0x3c)
415 #define M6811_OP_STS (0x9f)
416 #define M6811_OP_STS_EXT (0xbf)
417 #define M6811_OP_TSX (0x30)
418 #define M6811_OP_XGDX (0x8f)
419 #define M6811_OP_ADDD (0xc3)
420 #define M6811_OP_TXS (0x35)
421 #define M6811_OP_DES (0x34)
423 /* 68HC12 opcodes. */
424 #define M6812_OP_PAGE2 (0x18)
425 #define M6812_OP_MOVW (0x01)
426 #define M6812_PB_PSHW (0xae)
427 #define M6812_OP_STS (0x5f)
428 #define M6812_OP_STS_EXT (0x7f)
429 #define M6812_OP_LEAS (0x1b)
430 #define M6812_OP_PSHX (0x34)
431 #define M6812_OP_PSHY (0x35)
433 /* Operand extraction. */
434 #define OP_DIRECT (0x100) /* 8-byte direct addressing. */
435 #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
436 #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
437 #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
439 /* Identification of the sequence. */
443 P_SAVE_REG, /* Save a register on the stack. */
444 P_SET_FRAME, /* Setup the frame pointer. */
445 P_LOCAL_1, /* Allocate 1 byte for locals. */
446 P_LOCAL_2, /* Allocate 2 bytes for locals. */
447 P_LOCAL_N /* Allocate N bytes for locals. */
450 struct insn_sequence {
451 enum m6811_seq_type type;
453 unsigned short code[MAX_CODES];
456 /* Sequence of instructions in the 68HC11 function prologue. */
457 static struct insn_sequence m6811_prologue[] = {
458 /* Sequences to save a soft-register. */
459 { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT,
461 { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT,
462 M6811_OP_PAGE2, M6811_OP_PSHX } },
463 { P_SAVE_REG, 4, { M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW,
465 { P_SAVE_REG, 6, { M6811_OP_PAGE2, M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW,
466 M6811_OP_PAGE2, M6811_OP_PSHX } },
468 /* Sequences to allocate local variables. */
469 { P_LOCAL_N, 7, { M6811_OP_TSX,
471 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
474 { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX,
475 M6811_OP_PAGE2, M6811_OP_XGDX,
476 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
477 M6811_OP_PAGE2, M6811_OP_XGDX,
478 M6811_OP_PAGE2, M6811_OP_TXS } },
479 { P_LOCAL_1, 1, { M6811_OP_DES } },
480 { P_LOCAL_2, 1, { M6811_OP_PSHX } },
481 { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } },
483 /* Initialize the frame pointer. */
484 { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } },
485 { P_SET_FRAME, 3, { M6811_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } },
490 /* Sequence of instructions in the 68HC12 function prologue. */
491 static struct insn_sequence m6812_prologue[] = {
492 { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW,
493 OP_IMM_HIGH, OP_IMM_LOW } },
494 { P_SET_FRAME, 2, { M6812_OP_STS, OP_DIRECT } },
495 { P_SET_FRAME, 3, { M6812_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } },
496 { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } },
497 { P_LOCAL_2, 1, { M6812_OP_PSHX } },
498 { P_LOCAL_2, 1, { M6812_OP_PSHY } },
503 /* Analyze the sequence of instructions starting at the given address.
504 Returns a pointer to the sequence when it is recognized and
505 the optional value (constant/address) associated with it. */
506 static struct insn_sequence *
507 m68hc11_analyze_instruction (struct gdbarch *gdbarch,
508 struct insn_sequence *seq, CORE_ADDR pc,
511 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
512 unsigned char buffer[MAX_CODES];
519 for (; seq->type != P_LAST; seq++)
522 for (j = 0; j < seq->length; j++)
526 buffer[bufsize] = read_memory_unsigned_integer (pc + bufsize,
530 /* Continue while we match the opcode. */
531 if (seq->code[j] == buffer[j])
534 if ((seq->code[j] & 0xf00) == 0)
537 /* Extract a sequence parameter (address or constant). */
538 switch (seq->code[j])
541 cur_val = (CORE_ADDR) buffer[j];
545 cur_val = cur_val & 0x0ff;
546 cur_val |= (buffer[j] << 8);
551 cur_val |= buffer[j];
555 if ((buffer[j] & 0xE0) == 0x80)
557 v = buffer[j] & 0x1f;
561 else if ((buffer[j] & 0xfe) == 0xf0)
563 v = read_memory_unsigned_integer (pc + j + 1, 1, byte_order);
567 else if (buffer[j] == 0xf2)
569 v = read_memory_unsigned_integer (pc + j + 1, 2, byte_order);
576 /* We have a full match. */
577 if (j == seq->length)
586 /* Return the instruction that the function at the PC is using. */
587 static enum insn_return_kind
588 m68hc11_get_return_insn (CORE_ADDR pc)
590 struct minimal_symbol *sym;
592 /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
593 function is stored by elfread.c in the high bit of the info field.
594 Use this to decide which instruction the function uses to return. */
595 sym = lookup_minimal_symbol_by_pc (pc);
599 if (MSYMBOL_IS_RTC (sym))
601 else if (MSYMBOL_IS_RTI (sym))
607 /* Analyze the function prologue to find some information
609 - the PC of the first line (for m68hc11_skip_prologue)
610 - the offset of the previous frame saved address (from current frame)
611 - the soft registers which are pushed. */
613 m68hc11_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc,
614 CORE_ADDR current_pc, struct m68hc11_unwind_cache *info)
619 int found_frame_point;
622 struct insn_sequence *seq_table;
626 if (pc >= current_pc)
631 m68hc11_initialize_register_info ();
638 seq_table = gdbarch_tdep (gdbarch)->prologue;
640 /* The 68hc11 stack is as follows:
656 +-----------+ <--- current frame
659 With most processors (like 68K) the previous frame can be computed
660 easily because it is always at a fixed offset (see link/unlink).
661 That is, locals are accessed with negative offsets, arguments are
662 accessed with positive ones. Since 68hc11 only supports offsets
663 in the range [0..255], the frame is defined at the bottom of
664 locals (see picture).
666 The purpose of the analysis made here is to find out the size
667 of locals in this function. An alternative to this is to use
668 DWARF2 info. This would be better but I don't know how to
669 access dwarf2 debug from this function.
671 Walk from the function entry point to the point where we save
672 the frame. While walking instructions, compute the size of bytes
673 which are pushed. This gives us the index to access the previous
676 We limit the search to 128 bytes so that the algorithm is bounded
677 in case of random and wrong code. We also stop and abort if
678 we find an instruction which is not supposed to appear in the
679 prologue (as generated by gcc 2.95, 2.96). */
682 found_frame_point = 0;
685 while (!done && pc + 2 < func_end)
687 struct insn_sequence *seq;
690 seq = m68hc11_analyze_instruction (gdbarch, seq_table, pc, &val);
694 /* If we are within the instruction group, we can't advance the
695 pc nor the stack offset. Otherwise the caller's stack computed
696 from the current stack can be wrong. */
697 if (pc + seq->length > current_pc)
700 pc = pc + seq->length;
701 if (seq->type == P_SAVE_REG)
703 if (found_frame_point)
705 saved_reg = m68hc11_which_soft_register (val);
710 if (info->saved_regs)
711 info->saved_regs[saved_reg].addr = save_addr;
718 else if (seq->type == P_SET_FRAME)
720 found_frame_point = 1;
723 else if (seq->type == P_LOCAL_1)
727 else if (seq->type == P_LOCAL_2)
731 else if (seq->type == P_LOCAL_N)
733 /* Stack pointer is decremented for the allocation. */
735 size -= (int) (val) | 0xffff0000;
740 if (found_frame_point == 0)
741 info->sp_offset = size;
743 info->sp_offset = -1;
748 m68hc11_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
750 CORE_ADDR func_addr, func_end;
751 struct symtab_and_line sal;
752 struct m68hc11_unwind_cache tmp_cache = { 0 };
754 /* If we have line debugging information, then the end of the
755 prologue should be the first assembly instruction of the
756 first source line. */
757 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
759 sal = find_pc_line (func_addr, 0);
760 if (sal.end && sal.end < func_end)
764 pc = m68hc11_scan_prologue (gdbarch, pc, (CORE_ADDR) -1, &tmp_cache);
769 m68hc11_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
773 pc = frame_unwind_register_unsigned (next_frame,
774 gdbarch_pc_regnum (gdbarch));
778 /* Put here the code to store, into fi->saved_regs, the addresses of
779 the saved registers of frame described by FRAME_INFO. This
780 includes special registers such as pc and fp saved in special ways
781 in the stack frame. sp is even more special: the address we return
782 for it IS the sp for the next frame. */
784 static struct m68hc11_unwind_cache *
785 m68hc11_frame_unwind_cache (struct frame_info *this_frame,
786 void **this_prologue_cache)
788 struct gdbarch *gdbarch = get_frame_arch (this_frame);
791 struct m68hc11_unwind_cache *info;
792 CORE_ADDR current_pc;
795 if ((*this_prologue_cache))
796 return (*this_prologue_cache);
798 info = FRAME_OBSTACK_ZALLOC (struct m68hc11_unwind_cache);
799 (*this_prologue_cache) = info;
800 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
802 info->pc = get_frame_func (this_frame);
805 info->return_kind = m68hc11_get_return_insn (info->pc);
807 /* The SP was moved to the FP. This indicates that a new frame
808 was created. Get THIS frame's FP value by unwinding it from
810 this_base = get_frame_register_unsigned (this_frame, SOFT_FP_REGNUM);
817 current_pc = get_frame_pc (this_frame);
819 m68hc11_scan_prologue (gdbarch, info->pc, current_pc, info);
821 info->saved_regs[HARD_PC_REGNUM].addr = info->size;
823 if (info->sp_offset != (CORE_ADDR) -1)
825 info->saved_regs[HARD_PC_REGNUM].addr = info->sp_offset;
826 this_base = get_frame_register_unsigned (this_frame, HARD_SP_REGNUM);
827 prev_sp = this_base + info->sp_offset + 2;
828 this_base += STACK_CORRECTION (gdbarch);
832 /* The FP points at the last saved register. Adjust the FP back
833 to before the first saved register giving the SP. */
834 prev_sp = this_base + info->size + 2;
836 this_base += STACK_CORRECTION (gdbarch);
837 if (soft_regs[SOFT_FP_REGNUM].name)
838 info->saved_regs[SOFT_FP_REGNUM].addr = info->size - 2;
841 if (info->return_kind == RETURN_RTC)
844 info->saved_regs[HARD_PAGE_REGNUM].addr = info->size;
845 info->saved_regs[HARD_PC_REGNUM].addr = info->size + 1;
847 else if (info->return_kind == RETURN_RTI)
850 info->saved_regs[HARD_CCR_REGNUM].addr = info->size;
851 info->saved_regs[HARD_D_REGNUM].addr = info->size + 1;
852 info->saved_regs[HARD_X_REGNUM].addr = info->size + 3;
853 info->saved_regs[HARD_Y_REGNUM].addr = info->size + 5;
854 info->saved_regs[HARD_PC_REGNUM].addr = info->size + 7;
857 /* Add 1 here to adjust for the post-decrement nature of the push
859 info->prev_sp = prev_sp;
861 info->base = this_base;
863 /* Adjust all the saved registers so that they contain addresses and not
866 i < gdbarch_num_regs (gdbarch)
867 + gdbarch_num_pseudo_regs (gdbarch) - 1;
869 if (trad_frame_addr_p (info->saved_regs, i))
871 info->saved_regs[i].addr += this_base;
874 /* The previous frame's SP needed to be computed. Save the computed
876 trad_frame_set_value (info->saved_regs, HARD_SP_REGNUM, info->prev_sp);
881 /* Given a GDB frame, determine the address of the calling function's
882 frame. This will be used to create a new GDB frame struct. */
885 m68hc11_frame_this_id (struct frame_info *this_frame,
886 void **this_prologue_cache,
887 struct frame_id *this_id)
889 struct m68hc11_unwind_cache *info
890 = m68hc11_frame_unwind_cache (this_frame, this_prologue_cache);
895 /* The FUNC is easy. */
896 func = get_frame_func (this_frame);
898 /* Hopefully the prologue analysis either correctly determined the
899 frame's base (which is the SP from the previous frame), or set
900 that base to "NULL". */
901 base = info->prev_sp;
905 id = frame_id_build (base, func);
909 static struct value *
910 m68hc11_frame_prev_register (struct frame_info *this_frame,
911 void **this_prologue_cache, int regnum)
914 struct m68hc11_unwind_cache *info
915 = m68hc11_frame_unwind_cache (this_frame, this_prologue_cache);
917 value = trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
919 /* Take into account the 68HC12 specific call (PC + page). */
920 if (regnum == HARD_PC_REGNUM
921 && info->return_kind == RETURN_RTC
922 && USE_PAGE_REGISTER (get_frame_arch (this_frame)))
924 CORE_ADDR pc = value_as_long (value);
925 if (pc >= 0x08000 && pc < 0x0c000)
929 release_value (value);
932 value = trad_frame_get_prev_register (this_frame, info->saved_regs,
934 page = value_as_long (value);
935 release_value (value);
939 pc += ((page & 0x0ff) << 14);
942 return frame_unwind_got_constant (this_frame, regnum, pc);
949 static const struct frame_unwind m68hc11_frame_unwind = {
951 default_frame_unwind_stop_reason,
952 m68hc11_frame_this_id,
953 m68hc11_frame_prev_register,
955 default_frame_sniffer
959 m68hc11_frame_base_address (struct frame_info *this_frame, void **this_cache)
961 struct m68hc11_unwind_cache *info
962 = m68hc11_frame_unwind_cache (this_frame, this_cache);
968 m68hc11_frame_args_address (struct frame_info *this_frame, void **this_cache)
971 struct m68hc11_unwind_cache *info
972 = m68hc11_frame_unwind_cache (this_frame, this_cache);
974 addr = info->base + info->size;
975 if (info->return_kind == RETURN_RTC)
977 else if (info->return_kind == RETURN_RTI)
983 static const struct frame_base m68hc11_frame_base = {
984 &m68hc11_frame_unwind,
985 m68hc11_frame_base_address,
986 m68hc11_frame_base_address,
987 m68hc11_frame_args_address
991 m68hc11_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
994 sp = frame_unwind_register_unsigned (next_frame, HARD_SP_REGNUM);
998 /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
999 frame. The frame ID's base needs to match the TOS value saved by
1000 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
1002 static struct frame_id
1003 m68hc11_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1006 CORE_ADDR pc = get_frame_pc (this_frame);
1008 tos = get_frame_register_unsigned (this_frame, SOFT_FP_REGNUM);
1010 return frame_id_build (tos, pc);
1014 /* Get and print the register from the given frame. */
1016 m68hc11_print_register (struct gdbarch *gdbarch, struct ui_file *file,
1017 struct frame_info *frame, int regno)
1021 if (regno == HARD_PC_REGNUM || regno == HARD_SP_REGNUM
1022 || regno == SOFT_FP_REGNUM || regno == M68HC12_HARD_PC_REGNUM)
1023 rval = get_frame_register_unsigned (frame, regno);
1025 rval = get_frame_register_signed (frame, regno);
1027 if (regno == HARD_A_REGNUM || regno == HARD_B_REGNUM
1028 || regno == HARD_CCR_REGNUM || regno == HARD_PAGE_REGNUM)
1030 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
1031 if (regno != HARD_CCR_REGNUM)
1032 print_longest (file, 'd', 1, rval);
1036 if (regno == HARD_PC_REGNUM && gdbarch_tdep (gdbarch)->use_page_register)
1040 page = get_frame_register_unsigned (frame, HARD_PAGE_REGNUM);
1041 fprintf_filtered (file, "0x%02x:%04x ", (unsigned) page,
1046 fprintf_filtered (file, "0x%04x ", (unsigned) rval);
1047 if (regno != HARD_PC_REGNUM && regno != HARD_SP_REGNUM
1048 && regno != SOFT_FP_REGNUM && regno != M68HC12_HARD_PC_REGNUM)
1049 print_longest (file, 'd', 1, rval);
1053 if (regno == HARD_CCR_REGNUM)
1057 unsigned char l = rval & 0xff;
1059 fprintf_filtered (file, "%c%c%c%c%c%c%c%c ",
1060 l & M6811_S_BIT ? 'S' : '-',
1061 l & M6811_X_BIT ? 'X' : '-',
1062 l & M6811_H_BIT ? 'H' : '-',
1063 l & M6811_I_BIT ? 'I' : '-',
1064 l & M6811_N_BIT ? 'N' : '-',
1065 l & M6811_Z_BIT ? 'Z' : '-',
1066 l & M6811_V_BIT ? 'V' : '-',
1067 l & M6811_C_BIT ? 'C' : '-');
1068 N = (l & M6811_N_BIT) != 0;
1069 Z = (l & M6811_Z_BIT) != 0;
1070 V = (l & M6811_V_BIT) != 0;
1071 C = (l & M6811_C_BIT) != 0;
1073 /* Print flags following the h8300. */
1075 fprintf_filtered (file, "u> ");
1076 else if ((C | Z) == 1)
1077 fprintf_filtered (file, "u<= ");
1079 fprintf_filtered (file, "u< ");
1082 fprintf_filtered (file, "!= ");
1084 fprintf_filtered (file, "== ");
1087 fprintf_filtered (file, ">= ");
1089 fprintf_filtered (file, "< ");
1091 if ((Z | (N ^ V)) == 0)
1092 fprintf_filtered (file, "> ");
1094 fprintf_filtered (file, "<= ");
1098 /* Same as 'info reg' but prints the registers in a different way. */
1100 m68hc11_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1101 struct frame_info *frame, int regno, int cpregs)
1105 const char *name = gdbarch_register_name (gdbarch, regno);
1107 if (!name || !*name)
1110 fprintf_filtered (file, "%-10s ", name);
1111 m68hc11_print_register (gdbarch, file, frame, regno);
1112 fprintf_filtered (file, "\n");
1118 fprintf_filtered (file, "PC=");
1119 m68hc11_print_register (gdbarch, file, frame, HARD_PC_REGNUM);
1121 fprintf_filtered (file, " SP=");
1122 m68hc11_print_register (gdbarch, file, frame, HARD_SP_REGNUM);
1124 fprintf_filtered (file, " FP=");
1125 m68hc11_print_register (gdbarch, file, frame, SOFT_FP_REGNUM);
1127 fprintf_filtered (file, "\nCCR=");
1128 m68hc11_print_register (gdbarch, file, frame, HARD_CCR_REGNUM);
1130 fprintf_filtered (file, "\nD=");
1131 m68hc11_print_register (gdbarch, file, frame, HARD_D_REGNUM);
1133 fprintf_filtered (file, " X=");
1134 m68hc11_print_register (gdbarch, file, frame, HARD_X_REGNUM);
1136 fprintf_filtered (file, " Y=");
1137 m68hc11_print_register (gdbarch, file, frame, HARD_Y_REGNUM);
1139 if (gdbarch_tdep (gdbarch)->use_page_register)
1141 fprintf_filtered (file, "\nPage=");
1142 m68hc11_print_register (gdbarch, file, frame, HARD_PAGE_REGNUM);
1144 fprintf_filtered (file, "\n");
1147 for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++)
1149 /* Skip registers which are not defined in the symbol table. */
1150 if (soft_regs[i].name == 0)
1153 fprintf_filtered (file, "D%d=", i - SOFT_D1_REGNUM + 1);
1154 m68hc11_print_register (gdbarch, file, frame, i);
1157 fprintf_filtered (file, "\n");
1159 fprintf_filtered (file, " ");
1161 if (nr && (nr % 8) != 7)
1162 fprintf_filtered (file, "\n");
1167 m68hc11_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1168 struct regcache *regcache, CORE_ADDR bp_addr,
1169 int nargs, struct value **args, CORE_ADDR sp,
1170 int struct_return, CORE_ADDR struct_addr)
1172 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1174 int first_stack_argnum;
1179 first_stack_argnum = 0;
1182 regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, struct_addr);
1186 type = value_type (args[0]);
1188 /* First argument is passed in D and X registers. */
1189 if (TYPE_LENGTH (type) <= 4)
1193 v = extract_unsigned_integer (value_contents (args[0]),
1194 TYPE_LENGTH (type), byte_order);
1195 first_stack_argnum = 1;
1197 regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, v);
1198 if (TYPE_LENGTH (type) > 2)
1201 regcache_cooked_write_unsigned (regcache, HARD_X_REGNUM, v);
1206 for (argnum = nargs - 1; argnum >= first_stack_argnum; argnum--)
1208 type = value_type (args[argnum]);
1210 if (TYPE_LENGTH (type) & 1)
1212 static char zero = 0;
1215 write_memory (sp, &zero, 1);
1217 val = (char*) value_contents (args[argnum]);
1218 sp -= TYPE_LENGTH (type);
1219 write_memory (sp, val, TYPE_LENGTH (type));
1222 /* Store return address. */
1224 store_unsigned_integer (buf, 2, byte_order, bp_addr);
1225 write_memory (sp, buf, 2);
1227 /* Finally, update the stack pointer... */
1228 sp -= STACK_CORRECTION (gdbarch);
1229 regcache_cooked_write_unsigned (regcache, HARD_SP_REGNUM, sp);
1231 /* ...and fake a frame pointer. */
1232 regcache_cooked_write_unsigned (regcache, SOFT_FP_REGNUM, sp);
1234 /* DWARF2/GCC uses the stack address *before* the function call as a
1240 /* Return the GDB type object for the "standard" data type
1241 of data in register N. */
1243 static struct type *
1244 m68hc11_register_type (struct gdbarch *gdbarch, int reg_nr)
1248 case HARD_PAGE_REGNUM:
1251 case HARD_CCR_REGNUM:
1252 return builtin_type (gdbarch)->builtin_uint8;
1254 case M68HC12_HARD_PC_REGNUM:
1255 return builtin_type (gdbarch)->builtin_uint32;
1258 return builtin_type (gdbarch)->builtin_uint16;
1263 m68hc11_store_return_value (struct type *type, struct regcache *regcache,
1268 len = TYPE_LENGTH (type);
1270 /* First argument is passed in D and X registers. */
1272 regcache_raw_write_part (regcache, HARD_D_REGNUM, 2 - len, len, valbuf);
1275 regcache_raw_write_part (regcache, HARD_X_REGNUM, 4 - len,
1277 regcache_raw_write (regcache, HARD_D_REGNUM, (char*) valbuf + (len - 2));
1280 error (_("return of value > 4 is not supported."));
1284 /* Given a return value in `regcache' with a type `type',
1285 extract and copy its value into `valbuf'. */
1288 m68hc11_extract_return_value (struct type *type, struct regcache *regcache,
1291 char buf[M68HC11_REG_SIZE];
1293 regcache_raw_read (regcache, HARD_D_REGNUM, buf);
1294 switch (TYPE_LENGTH (type))
1297 memcpy (valbuf, buf + 1, 1);
1301 memcpy (valbuf, buf, 2);
1305 memcpy ((char*) valbuf + 1, buf, 2);
1306 regcache_raw_read (regcache, HARD_X_REGNUM, buf);
1307 memcpy (valbuf, buf + 1, 1);
1311 memcpy ((char*) valbuf + 2, buf, 2);
1312 regcache_raw_read (regcache, HARD_X_REGNUM, buf);
1313 memcpy (valbuf, buf, 2);
1317 error (_("bad size for return value"));
1321 static enum return_value_convention
1322 m68hc11_return_value (struct gdbarch *gdbarch, struct value *function,
1323 struct type *valtype, struct regcache *regcache,
1324 gdb_byte *readbuf, const gdb_byte *writebuf)
1326 if (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
1327 || TYPE_CODE (valtype) == TYPE_CODE_UNION
1328 || TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1329 || TYPE_LENGTH (valtype) > 4)
1330 return RETURN_VALUE_STRUCT_CONVENTION;
1333 if (readbuf != NULL)
1334 m68hc11_extract_return_value (valtype, regcache, readbuf);
1335 if (writebuf != NULL)
1336 m68hc11_store_return_value (valtype, regcache, writebuf);
1337 return RETURN_VALUE_REGISTER_CONVENTION;
1341 /* Test whether the ELF symbol corresponds to a function using rtc or
1345 m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
1347 unsigned char flags;
1349 flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other;
1350 if (flags & STO_M68HC12_FAR)
1351 MSYMBOL_SET_RTC (msym);
1352 if (flags & STO_M68HC12_INTERRUPT)
1353 MSYMBOL_SET_RTI (msym);
1357 gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
1359 if (info->arch == bfd_arch_m68hc11)
1360 return print_insn_m68hc11 (memaddr, info);
1362 return print_insn_m68hc12 (memaddr, info);
1367 /* 68HC11/68HC12 register groups.
1368 Identify real hard registers and soft registers used by gcc. */
1370 static struct reggroup *m68hc11_soft_reggroup;
1371 static struct reggroup *m68hc11_hard_reggroup;
1374 m68hc11_init_reggroups (void)
1376 m68hc11_hard_reggroup = reggroup_new ("hard", USER_REGGROUP);
1377 m68hc11_soft_reggroup = reggroup_new ("soft", USER_REGGROUP);
1381 m68hc11_add_reggroups (struct gdbarch *gdbarch)
1383 reggroup_add (gdbarch, m68hc11_hard_reggroup);
1384 reggroup_add (gdbarch, m68hc11_soft_reggroup);
1385 reggroup_add (gdbarch, general_reggroup);
1386 reggroup_add (gdbarch, float_reggroup);
1387 reggroup_add (gdbarch, all_reggroup);
1388 reggroup_add (gdbarch, save_reggroup);
1389 reggroup_add (gdbarch, restore_reggroup);
1390 reggroup_add (gdbarch, vector_reggroup);
1391 reggroup_add (gdbarch, system_reggroup);
1395 m68hc11_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1396 struct reggroup *group)
1398 /* We must save the real hard register as well as gcc
1399 soft registers including the frame pointer. */
1400 if (group == save_reggroup || group == restore_reggroup)
1402 return (regnum <= gdbarch_num_regs (gdbarch)
1403 || ((regnum == SOFT_FP_REGNUM
1404 || regnum == SOFT_TMP_REGNUM
1405 || regnum == SOFT_ZS_REGNUM
1406 || regnum == SOFT_XY_REGNUM)
1407 && m68hc11_register_name (gdbarch, regnum)));
1410 /* Group to identify gcc soft registers (d1..dN). */
1411 if (group == m68hc11_soft_reggroup)
1413 return regnum >= SOFT_D1_REGNUM
1414 && m68hc11_register_name (gdbarch, regnum);
1417 if (group == m68hc11_hard_reggroup)
1419 return regnum == HARD_PC_REGNUM || regnum == HARD_SP_REGNUM
1420 || regnum == HARD_X_REGNUM || regnum == HARD_D_REGNUM
1421 || regnum == HARD_Y_REGNUM || regnum == HARD_CCR_REGNUM;
1423 return default_register_reggroup_p (gdbarch, regnum, group);
1426 static struct gdbarch *
1427 m68hc11_gdbarch_init (struct gdbarch_info info,
1428 struct gdbarch_list *arches)
1430 struct gdbarch *gdbarch;
1431 struct gdbarch_tdep *tdep;
1434 soft_reg_initialized = 0;
1436 /* Extract the elf_flags if available. */
1437 if (info.abfd != NULL
1438 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1439 elf_flags = elf_elfheader (info.abfd)->e_flags;
1443 /* Try to find a pre-existing architecture. */
1444 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1446 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1448 if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
1451 return arches->gdbarch;
1454 /* Need a new architecture. Fill in a target specific vector. */
1455 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1456 gdbarch = gdbarch_alloc (&info, tdep);
1457 tdep->elf_flags = elf_flags;
1459 switch (info.bfd_arch_info->arch)
1461 case bfd_arch_m68hc11:
1462 tdep->stack_correction = 1;
1463 tdep->use_page_register = 0;
1464 tdep->prologue = m6811_prologue;
1465 set_gdbarch_addr_bit (gdbarch, 16);
1466 set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
1467 set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
1468 set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
1471 case bfd_arch_m68hc12:
1472 tdep->stack_correction = 0;
1473 tdep->use_page_register = elf_flags & E_M68HC12_BANKS;
1474 tdep->prologue = m6812_prologue;
1475 set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16);
1476 set_gdbarch_num_pseudo_regs (gdbarch,
1477 elf_flags & E_M68HC12_BANKS
1478 ? M68HC12_NUM_PSEUDO_REGS
1479 : M68HC11_NUM_PSEUDO_REGS);
1480 set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS
1481 ? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM);
1482 set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS
1483 ? M68HC12_NUM_REGS : M68HC11_NUM_REGS);
1490 /* Initially set everything according to the ABI.
1491 Use 16-bit integers since it will be the case for most
1492 programs. The size of these types should normally be set
1493 according to the dwarf2 debug information. */
1494 set_gdbarch_short_bit (gdbarch, 16);
1495 set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16);
1496 set_gdbarch_float_bit (gdbarch, 32);
1497 if (elf_flags & E_M68HC11_F64)
1499 set_gdbarch_double_bit (gdbarch, 64);
1500 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
1504 set_gdbarch_double_bit (gdbarch, 32);
1505 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
1507 set_gdbarch_long_double_bit (gdbarch, 64);
1508 set_gdbarch_long_bit (gdbarch, 32);
1509 set_gdbarch_ptr_bit (gdbarch, 16);
1510 set_gdbarch_long_long_bit (gdbarch, 64);
1512 /* Characters are unsigned. */
1513 set_gdbarch_char_signed (gdbarch, 0);
1515 set_gdbarch_unwind_pc (gdbarch, m68hc11_unwind_pc);
1516 set_gdbarch_unwind_sp (gdbarch, m68hc11_unwind_sp);
1518 /* Set register info. */
1519 set_gdbarch_fp0_regnum (gdbarch, -1);
1521 set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
1522 set_gdbarch_register_name (gdbarch, m68hc11_register_name);
1523 set_gdbarch_register_type (gdbarch, m68hc11_register_type);
1524 set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read);
1525 set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write);
1527 set_gdbarch_push_dummy_call (gdbarch, m68hc11_push_dummy_call);
1529 set_gdbarch_return_value (gdbarch, m68hc11_return_value);
1530 set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
1531 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1532 set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
1533 set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11);
1535 m68hc11_add_reggroups (gdbarch);
1536 set_gdbarch_register_reggroup_p (gdbarch, m68hc11_register_reggroup_p);
1537 set_gdbarch_print_registers_info (gdbarch, m68hc11_print_registers_info);
1539 /* Hook in the DWARF CFI frame unwinder. */
1540 dwarf2_append_unwinders (gdbarch);
1542 frame_unwind_append_unwinder (gdbarch, &m68hc11_frame_unwind);
1543 frame_base_set_default (gdbarch, &m68hc11_frame_base);
1545 /* Methods for saving / extracting a dummy frame's ID. The ID's
1546 stack address must match the SP value returned by
1547 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
1548 set_gdbarch_dummy_id (gdbarch, m68hc11_dummy_id);
1550 /* Return the unwound PC value. */
1551 set_gdbarch_unwind_pc (gdbarch, m68hc11_unwind_pc);
1553 /* Minsymbol frobbing. */
1554 set_gdbarch_elf_make_msymbol_special (gdbarch,
1555 m68hc11_elf_make_msymbol_special);
1557 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1562 /* -Wmissing-prototypes */
1563 extern initialize_file_ftype _initialize_m68hc11_tdep;
1566 _initialize_m68hc11_tdep (void)
1568 register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init);
1569 register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init);
1570 m68hc11_init_reggroups ();