1 /* Target-dependent code for Motorola 68HC11 & 68HC12
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
4 Free Software Foundation, Inc.
6 Contributed by Stephane Carrez, stcarrez@nerim.fr
8 This file is part of GDB.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor,
23 Boston, MA 02110-1301, USA. */
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "dwarf2-frame.h"
31 #include "trad-frame.h"
36 #include "gdb_string.h"
42 #include "arch-utils.h"
44 #include "reggroups.h"
47 #include "opcode/m68hc11.h"
48 #include "elf/m68hc11.h"
51 /* Macros for setting and testing a bit in a minimal symbol.
52 For 68HC11/68HC12 we have two flags that tell which return
53 type the function is using. This is used for prologue and frame
54 analysis to compute correct stack frame layout.
56 The MSB of the minimal symbol's "info" field is used for this purpose.
58 MSYMBOL_SET_RTC Actually sets the "RTC" bit.
59 MSYMBOL_SET_RTI Actually sets the "RTI" bit.
60 MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol.
61 MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol. */
63 #define MSYMBOL_SET_RTC(msym) \
64 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
67 #define MSYMBOL_SET_RTI(msym) \
68 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
71 #define MSYMBOL_IS_RTC(msym) \
72 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
74 #define MSYMBOL_IS_RTI(msym) \
75 (((long) MSYMBOL_INFO (msym) & 0x40000000) != 0)
77 enum insn_return_kind {
84 /* Register numbers of various important registers. */
86 #define HARD_X_REGNUM 0
87 #define HARD_D_REGNUM 1
88 #define HARD_Y_REGNUM 2
89 #define HARD_SP_REGNUM 3
90 #define HARD_PC_REGNUM 4
92 #define HARD_A_REGNUM 5
93 #define HARD_B_REGNUM 6
94 #define HARD_CCR_REGNUM 7
96 /* 68HC12 page number register.
97 Note: to keep a compatibility with gcc register naming, we must
98 not have to rename FP and other soft registers. The page register
99 is a real hard register and must therefore be counted by NUM_REGS.
100 For this it has the same number as Z register (which is not used). */
101 #define HARD_PAGE_REGNUM 8
102 #define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
104 /* Z is replaced by X or Y by gcc during machine reorg.
105 ??? There is no way to get it and even know whether
106 it's in X or Y or in ZS. */
107 #define SOFT_Z_REGNUM 8
109 /* Soft registers. These registers are special. There are treated
110 like normal hard registers by gcc and gdb (ie, within dwarf2 info).
111 They are physically located in memory. */
112 #define SOFT_FP_REGNUM 9
113 #define SOFT_TMP_REGNUM 10
114 #define SOFT_ZS_REGNUM 11
115 #define SOFT_XY_REGNUM 12
116 #define SOFT_UNUSED_REGNUM 13
117 #define SOFT_D1_REGNUM 14
118 #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
119 #define M68HC11_MAX_SOFT_REGS 32
121 #define M68HC11_NUM_REGS (8)
122 #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
123 #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
125 #define M68HC11_REG_SIZE (2)
127 #define M68HC12_NUM_REGS (9)
128 #define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1)
129 #define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1)
131 struct insn_sequence;
134 /* Stack pointer correction value. For 68hc11, the stack pointer points
135 to the next push location. An offset of 1 must be applied to obtain
136 the address where the last value is saved. For 68hc12, the stack
137 pointer points to the last value pushed. No offset is necessary. */
138 int stack_correction;
140 /* Description of instructions in the prologue. */
141 struct insn_sequence *prologue;
143 /* True if the page memory bank register is available
145 int use_page_register;
147 /* ELF flags for ABI. */
151 #define M6811_TDEP gdbarch_tdep (current_gdbarch)
152 #define STACK_CORRECTION (M6811_TDEP->stack_correction)
153 #define USE_PAGE_REGISTER (M6811_TDEP->use_page_register)
155 struct m68hc11_unwind_cache
157 /* The previous frame's inner most stack address. Used as this
158 frame ID's stack_addr. */
160 /* The frame's base, optionally used by the high-level debug info. */
168 enum insn_return_kind return_kind;
170 /* Table indicating the location of each and every register. */
171 struct trad_frame_saved_reg *saved_regs;
174 /* Table of registers for 68HC11. This includes the hard registers
175 and the soft registers used by GCC. */
177 m68hc11_register_names[] =
179 "x", "d", "y", "sp", "pc", "a", "b",
180 "ccr", "page", "frame","tmp", "zs", "xy", 0,
181 "d1", "d2", "d3", "d4", "d5", "d6", "d7",
182 "d8", "d9", "d10", "d11", "d12", "d13", "d14",
183 "d15", "d16", "d17", "d18", "d19", "d20", "d21",
184 "d22", "d23", "d24", "d25", "d26", "d27", "d28",
185 "d29", "d30", "d31", "d32"
188 struct m68hc11_soft_reg
194 static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS];
196 #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
198 static int soft_min_addr;
199 static int soft_max_addr;
200 static int soft_reg_initialized = 0;
202 /* Look in the symbol table for the address of a pseudo register
203 in memory. If we don't find it, pretend the register is not used
204 and not available. */
206 m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
208 struct minimal_symbol *msymbol;
210 msymbol = lookup_minimal_symbol (name, NULL, NULL);
213 reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
214 reg->name = xstrdup (name);
216 /* Keep track of the address range for soft registers. */
217 if (reg->addr < (CORE_ADDR) soft_min_addr)
218 soft_min_addr = reg->addr;
219 if (reg->addr > (CORE_ADDR) soft_max_addr)
220 soft_max_addr = reg->addr;
229 /* Initialize the table of soft register addresses according
230 to the symbol table. */
232 m68hc11_initialize_register_info (void)
236 if (soft_reg_initialized)
239 soft_min_addr = INT_MAX;
241 for (i = 0; i < M68HC11_ALL_REGS; i++)
243 soft_regs[i].name = 0;
246 m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame");
247 m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp");
248 m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z");
249 soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM];
250 m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy");
252 for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++)
256 sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1);
257 m68hc11_get_register_info (&soft_regs[i], buf);
260 if (soft_regs[SOFT_FP_REGNUM].name == 0)
261 warning (_("No frame soft register found in the symbol table.\n"
262 "Stack backtrace will not work."));
263 soft_reg_initialized = 1;
266 /* Given an address in memory, return the soft register number if
267 that address corresponds to a soft register. Returns -1 if not. */
269 m68hc11_which_soft_register (CORE_ADDR addr)
273 if (addr < soft_min_addr || addr > soft_max_addr)
276 for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++)
278 if (soft_regs[i].name && soft_regs[i].addr == addr)
284 /* Fetch a pseudo register. The 68hc11 soft registers are treated like
285 pseudo registers. They are located in memory. Translate the register
286 fetch into a memory read. */
288 m68hc11_pseudo_register_read (struct gdbarch *gdbarch,
289 struct regcache *regcache,
290 int regno, gdb_byte *buf)
292 /* The PC is a pseudo reg only for 68HC12 with the memory bank
294 if (regno == M68HC12_HARD_PC_REGNUM)
297 const int regsize = TYPE_LENGTH (builtin_type_uint32);
299 regcache_cooked_read_unsigned (regcache, HARD_PC_REGNUM, &pc);
300 if (pc >= 0x8000 && pc < 0xc000)
304 regcache_cooked_read_unsigned (regcache, HARD_PAGE_REGNUM, &page);
309 store_unsigned_integer (buf, regsize, pc);
313 m68hc11_initialize_register_info ();
315 /* Fetch a soft register: translate into a memory read. */
316 if (soft_regs[regno].name)
318 target_read_memory (soft_regs[regno].addr, buf, 2);
326 /* Store a pseudo register. Translate the register store
327 into a memory write. */
329 m68hc11_pseudo_register_write (struct gdbarch *gdbarch,
330 struct regcache *regcache,
331 int regno, const gdb_byte *buf)
333 /* The PC is a pseudo reg only for 68HC12 with the memory bank
335 if (regno == M68HC12_HARD_PC_REGNUM)
337 const int regsize = TYPE_LENGTH (builtin_type_uint32);
338 char *tmp = alloca (regsize);
341 memcpy (tmp, buf, regsize);
342 pc = extract_unsigned_integer (tmp, regsize);
346 regcache_cooked_write_unsigned (regcache, HARD_PAGE_REGNUM,
349 regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM,
353 regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM, pc);
357 m68hc11_initialize_register_info ();
359 /* Store a soft register: translate into a memory write. */
360 if (soft_regs[regno].name)
362 const int regsize = 2;
363 char *tmp = alloca (regsize);
364 memcpy (tmp, buf, regsize);
365 target_write_memory (soft_regs[regno].addr, tmp, regsize);
370 m68hc11_register_name (int reg_nr)
372 if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER)
374 if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER)
379 if (reg_nr >= M68HC11_ALL_REGS)
382 m68hc11_initialize_register_info ();
384 /* If we don't know the address of a soft register, pretend it
386 if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0)
388 return m68hc11_register_names[reg_nr];
391 static const unsigned char *
392 m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
394 static unsigned char breakpoint[] = {0x0};
396 *lenptr = sizeof (breakpoint);
401 /* 68HC11 & 68HC12 prologue analysis.
406 /* 68HC11 opcodes. */
407 #undef M6811_OP_PAGE2
408 #define M6811_OP_PAGE2 (0x18)
409 #define M6811_OP_LDX (0xde)
410 #define M6811_OP_LDX_EXT (0xfe)
411 #define M6811_OP_PSHX (0x3c)
412 #define M6811_OP_STS (0x9f)
413 #define M6811_OP_STS_EXT (0xbf)
414 #define M6811_OP_TSX (0x30)
415 #define M6811_OP_XGDX (0x8f)
416 #define M6811_OP_ADDD (0xc3)
417 #define M6811_OP_TXS (0x35)
418 #define M6811_OP_DES (0x34)
420 /* 68HC12 opcodes. */
421 #define M6812_OP_PAGE2 (0x18)
422 #define M6812_OP_MOVW (0x01)
423 #define M6812_PB_PSHW (0xae)
424 #define M6812_OP_STS (0x5f)
425 #define M6812_OP_STS_EXT (0x7f)
426 #define M6812_OP_LEAS (0x1b)
427 #define M6812_OP_PSHX (0x34)
428 #define M6812_OP_PSHY (0x35)
430 /* Operand extraction. */
431 #define OP_DIRECT (0x100) /* 8-byte direct addressing. */
432 #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
433 #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
434 #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
436 /* Identification of the sequence. */
440 P_SAVE_REG, /* Save a register on the stack. */
441 P_SET_FRAME, /* Setup the frame pointer. */
442 P_LOCAL_1, /* Allocate 1 byte for locals. */
443 P_LOCAL_2, /* Allocate 2 bytes for locals. */
444 P_LOCAL_N /* Allocate N bytes for locals. */
447 struct insn_sequence {
448 enum m6811_seq_type type;
450 unsigned short code[MAX_CODES];
453 /* Sequence of instructions in the 68HC11 function prologue. */
454 static struct insn_sequence m6811_prologue[] = {
455 /* Sequences to save a soft-register. */
456 { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT,
458 { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT,
459 M6811_OP_PAGE2, M6811_OP_PSHX } },
460 { P_SAVE_REG, 4, { M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW,
462 { P_SAVE_REG, 6, { M6811_OP_PAGE2, M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW,
463 M6811_OP_PAGE2, M6811_OP_PSHX } },
465 /* Sequences to allocate local variables. */
466 { P_LOCAL_N, 7, { M6811_OP_TSX,
468 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
471 { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX,
472 M6811_OP_PAGE2, M6811_OP_XGDX,
473 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
474 M6811_OP_PAGE2, M6811_OP_XGDX,
475 M6811_OP_PAGE2, M6811_OP_TXS } },
476 { P_LOCAL_1, 1, { M6811_OP_DES } },
477 { P_LOCAL_2, 1, { M6811_OP_PSHX } },
478 { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } },
480 /* Initialize the frame pointer. */
481 { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } },
482 { P_SET_FRAME, 3, { M6811_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } },
487 /* Sequence of instructions in the 68HC12 function prologue. */
488 static struct insn_sequence m6812_prologue[] = {
489 { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW,
490 OP_IMM_HIGH, OP_IMM_LOW } },
491 { P_SET_FRAME, 2, { M6812_OP_STS, OP_DIRECT } },
492 { P_SET_FRAME, 3, { M6812_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } },
493 { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } },
494 { P_LOCAL_2, 1, { M6812_OP_PSHX } },
495 { P_LOCAL_2, 1, { M6812_OP_PSHY } },
500 /* Analyze the sequence of instructions starting at the given address.
501 Returns a pointer to the sequence when it is recognized and
502 the optional value (constant/address) associated with it. */
503 static struct insn_sequence *
504 m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR pc,
507 unsigned char buffer[MAX_CODES];
514 for (; seq->type != P_LAST; seq++)
517 for (j = 0; j < seq->length; j++)
521 buffer[bufsize] = read_memory_unsigned_integer (pc + bufsize,
525 /* Continue while we match the opcode. */
526 if (seq->code[j] == buffer[j])
529 if ((seq->code[j] & 0xf00) == 0)
532 /* Extract a sequence parameter (address or constant). */
533 switch (seq->code[j])
536 cur_val = (CORE_ADDR) buffer[j];
540 cur_val = cur_val & 0x0ff;
541 cur_val |= (buffer[j] << 8);
546 cur_val |= buffer[j];
550 if ((buffer[j] & 0xE0) == 0x80)
552 v = buffer[j] & 0x1f;
556 else if ((buffer[j] & 0xfe) == 0xf0)
558 v = read_memory_unsigned_integer (pc + j + 1, 1);
562 else if (buffer[j] == 0xf2)
564 v = read_memory_unsigned_integer (pc + j + 1, 2);
571 /* We have a full match. */
572 if (j == seq->length)
581 /* Return the instruction that the function at the PC is using. */
582 static enum insn_return_kind
583 m68hc11_get_return_insn (CORE_ADDR pc)
585 struct minimal_symbol *sym;
587 /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
588 function is stored by elfread.c in the high bit of the info field.
589 Use this to decide which instruction the function uses to return. */
590 sym = lookup_minimal_symbol_by_pc (pc);
594 if (MSYMBOL_IS_RTC (sym))
596 else if (MSYMBOL_IS_RTI (sym))
602 /* Analyze the function prologue to find some information
604 - the PC of the first line (for m68hc11_skip_prologue)
605 - the offset of the previous frame saved address (from current frame)
606 - the soft registers which are pushed. */
608 m68hc11_scan_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
609 struct m68hc11_unwind_cache *info)
614 int found_frame_point;
617 struct insn_sequence *seq_table;
621 if (pc >= current_pc)
626 m68hc11_initialize_register_info ();
633 seq_table = gdbarch_tdep (current_gdbarch)->prologue;
635 /* The 68hc11 stack is as follows:
651 +-----------+ <--- current frame
654 With most processors (like 68K) the previous frame can be computed
655 easily because it is always at a fixed offset (see link/unlink).
656 That is, locals are accessed with negative offsets, arguments are
657 accessed with positive ones. Since 68hc11 only supports offsets
658 in the range [0..255], the frame is defined at the bottom of
659 locals (see picture).
661 The purpose of the analysis made here is to find out the size
662 of locals in this function. An alternative to this is to use
663 DWARF2 info. This would be better but I don't know how to
664 access dwarf2 debug from this function.
666 Walk from the function entry point to the point where we save
667 the frame. While walking instructions, compute the size of bytes
668 which are pushed. This gives us the index to access the previous
671 We limit the search to 128 bytes so that the algorithm is bounded
672 in case of random and wrong code. We also stop and abort if
673 we find an instruction which is not supposed to appear in the
674 prologue (as generated by gcc 2.95, 2.96).
677 found_frame_point = 0;
680 while (!done && pc + 2 < func_end)
682 struct insn_sequence *seq;
685 seq = m68hc11_analyze_instruction (seq_table, pc, &val);
689 /* If we are within the instruction group, we can't advance the
690 pc nor the stack offset. Otherwise the caller's stack computed
691 from the current stack can be wrong. */
692 if (pc + seq->length > current_pc)
695 pc = pc + seq->length;
696 if (seq->type == P_SAVE_REG)
698 if (found_frame_point)
700 saved_reg = m68hc11_which_soft_register (val);
705 if (info->saved_regs)
706 info->saved_regs[saved_reg].addr = save_addr;
713 else if (seq->type == P_SET_FRAME)
715 found_frame_point = 1;
718 else if (seq->type == P_LOCAL_1)
722 else if (seq->type == P_LOCAL_2)
726 else if (seq->type == P_LOCAL_N)
728 /* Stack pointer is decremented for the allocation. */
730 size -= (int) (val) | 0xffff0000;
735 if (found_frame_point == 0)
736 info->sp_offset = size;
738 info->sp_offset = -1;
743 m68hc11_skip_prologue (CORE_ADDR pc)
745 CORE_ADDR func_addr, func_end;
746 struct symtab_and_line sal;
747 struct m68hc11_unwind_cache tmp_cache = { 0 };
749 /* If we have line debugging information, then the end of the
750 prologue should be the first assembly instruction of the
751 first source line. */
752 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
754 sal = find_pc_line (func_addr, 0);
755 if (sal.end && sal.end < func_end)
759 pc = m68hc11_scan_prologue (pc, (CORE_ADDR) -1, &tmp_cache);
764 m68hc11_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
768 frame_unwind_unsigned_register (next_frame, gdbarch_pc_regnum (gdbarch),
773 /* Put here the code to store, into fi->saved_regs, the addresses of
774 the saved registers of frame described by FRAME_INFO. This
775 includes special registers such as pc and fp saved in special ways
776 in the stack frame. sp is even more special: the address we return
777 for it IS the sp for the next frame. */
779 struct m68hc11_unwind_cache *
780 m68hc11_frame_unwind_cache (struct frame_info *next_frame,
781 void **this_prologue_cache)
785 struct m68hc11_unwind_cache *info;
786 CORE_ADDR current_pc;
789 if ((*this_prologue_cache))
790 return (*this_prologue_cache);
792 info = FRAME_OBSTACK_ZALLOC (struct m68hc11_unwind_cache);
793 (*this_prologue_cache) = info;
794 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
796 info->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
799 info->return_kind = m68hc11_get_return_insn (info->pc);
801 /* The SP was moved to the FP. This indicates that a new frame
802 was created. Get THIS frame's FP value by unwinding it from
804 frame_unwind_unsigned_register (next_frame, SOFT_FP_REGNUM, &this_base);
811 current_pc = frame_pc_unwind (next_frame);
813 m68hc11_scan_prologue (info->pc, current_pc, info);
815 info->saved_regs[HARD_PC_REGNUM].addr = info->size;
817 if (info->sp_offset != (CORE_ADDR) -1)
819 info->saved_regs[HARD_PC_REGNUM].addr = info->sp_offset;
820 frame_unwind_unsigned_register (next_frame, HARD_SP_REGNUM, &this_base);
821 prev_sp = this_base + info->sp_offset + 2;
822 this_base += STACK_CORRECTION;
826 /* The FP points at the last saved register. Adjust the FP back
827 to before the first saved register giving the SP. */
828 prev_sp = this_base + info->size + 2;
830 this_base += STACK_CORRECTION;
831 if (soft_regs[SOFT_FP_REGNUM].name)
832 info->saved_regs[SOFT_FP_REGNUM].addr = info->size - 2;
835 if (info->return_kind == RETURN_RTC)
838 info->saved_regs[HARD_PAGE_REGNUM].addr = info->size;
839 info->saved_regs[HARD_PC_REGNUM].addr = info->size + 1;
841 else if (info->return_kind == RETURN_RTI)
844 info->saved_regs[HARD_CCR_REGNUM].addr = info->size;
845 info->saved_regs[HARD_D_REGNUM].addr = info->size + 1;
846 info->saved_regs[HARD_X_REGNUM].addr = info->size + 3;
847 info->saved_regs[HARD_Y_REGNUM].addr = info->size + 5;
848 info->saved_regs[HARD_PC_REGNUM].addr = info->size + 7;
851 /* Add 1 here to adjust for the post-decrement nature of the push
853 info->prev_sp = prev_sp;
855 info->base = this_base;
857 /* Adjust all the saved registers so that they contain addresses and not
859 for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS - 1; i++)
860 if (trad_frame_addr_p (info->saved_regs, i))
862 info->saved_regs[i].addr += this_base;
865 /* The previous frame's SP needed to be computed. Save the computed
867 trad_frame_set_value (info->saved_regs, HARD_SP_REGNUM, info->prev_sp);
872 /* Given a GDB frame, determine the address of the calling function's
873 frame. This will be used to create a new GDB frame struct. */
876 m68hc11_frame_this_id (struct frame_info *next_frame,
877 void **this_prologue_cache,
878 struct frame_id *this_id)
880 struct m68hc11_unwind_cache *info
881 = m68hc11_frame_unwind_cache (next_frame, this_prologue_cache);
886 /* The FUNC is easy. */
887 func = frame_func_unwind (next_frame, NORMAL_FRAME);
889 /* Hopefully the prologue analysis either correctly determined the
890 frame's base (which is the SP from the previous frame), or set
891 that base to "NULL". */
892 base = info->prev_sp;
896 id = frame_id_build (base, func);
901 m68hc11_frame_prev_register (struct frame_info *next_frame,
902 void **this_prologue_cache,
903 int regnum, int *optimizedp,
904 enum lval_type *lvalp, CORE_ADDR *addrp,
905 int *realnump, gdb_byte *bufferp)
907 struct m68hc11_unwind_cache *info
908 = m68hc11_frame_unwind_cache (next_frame, this_prologue_cache);
910 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
911 optimizedp, lvalp, addrp, realnump, bufferp);
913 if (regnum == HARD_PC_REGNUM)
915 /* Take into account the 68HC12 specific call (PC + page). */
916 if (info->return_kind == RETURN_RTC
917 && *addrp >= 0x08000 && *addrp < 0x0c000
918 && USE_PAGE_REGISTER)
924 trad_frame_get_prev_register (next_frame, info->saved_regs,
925 HARD_PAGE_REGNUM, &page_optimized,
928 *addrp += ((page & 0x0ff) << 14);
934 static const struct frame_unwind m68hc11_frame_unwind = {
936 m68hc11_frame_this_id,
937 m68hc11_frame_prev_register
940 const struct frame_unwind *
941 m68hc11_frame_sniffer (struct frame_info *next_frame)
943 return &m68hc11_frame_unwind;
947 m68hc11_frame_base_address (struct frame_info *next_frame, void **this_cache)
949 struct m68hc11_unwind_cache *info
950 = m68hc11_frame_unwind_cache (next_frame, this_cache);
956 m68hc11_frame_args_address (struct frame_info *next_frame, void **this_cache)
959 struct m68hc11_unwind_cache *info
960 = m68hc11_frame_unwind_cache (next_frame, this_cache);
962 addr = info->base + info->size;
963 if (info->return_kind == RETURN_RTC)
965 else if (info->return_kind == RETURN_RTI)
971 static const struct frame_base m68hc11_frame_base = {
972 &m68hc11_frame_unwind,
973 m68hc11_frame_base_address,
974 m68hc11_frame_base_address,
975 m68hc11_frame_args_address
979 m68hc11_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
982 frame_unwind_unsigned_register (next_frame, HARD_SP_REGNUM, &sp);
986 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
987 dummy frame. The frame ID's base needs to match the TOS value
988 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
991 static struct frame_id
992 m68hc11_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
995 CORE_ADDR pc = frame_pc_unwind (next_frame);
997 frame_unwind_unsigned_register (next_frame, SOFT_FP_REGNUM, &tos);
999 return frame_id_build (tos, pc);
1003 /* Get and print the register from the given frame. */
1005 m68hc11_print_register (struct gdbarch *gdbarch, struct ui_file *file,
1006 struct frame_info *frame, int regno)
1010 if (regno == HARD_PC_REGNUM || regno == HARD_SP_REGNUM
1011 || regno == SOFT_FP_REGNUM || regno == M68HC12_HARD_PC_REGNUM)
1012 rval = get_frame_register_unsigned (frame, regno);
1014 rval = get_frame_register_signed (frame, regno);
1016 if (regno == HARD_A_REGNUM || regno == HARD_B_REGNUM
1017 || regno == HARD_CCR_REGNUM || regno == HARD_PAGE_REGNUM)
1019 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
1020 if (regno != HARD_CCR_REGNUM)
1021 print_longest (file, 'd', 1, rval);
1025 if (regno == HARD_PC_REGNUM && gdbarch_tdep (gdbarch)->use_page_register)
1029 page = get_frame_register_unsigned (frame, HARD_PAGE_REGNUM);
1030 fprintf_filtered (file, "0x%02x:%04x ", (unsigned) page,
1035 fprintf_filtered (file, "0x%04x ", (unsigned) rval);
1036 if (regno != HARD_PC_REGNUM && regno != HARD_SP_REGNUM
1037 && regno != SOFT_FP_REGNUM && regno != M68HC12_HARD_PC_REGNUM)
1038 print_longest (file, 'd', 1, rval);
1042 if (regno == HARD_CCR_REGNUM)
1046 unsigned char l = rval & 0xff;
1048 fprintf_filtered (file, "%c%c%c%c%c%c%c%c ",
1049 l & M6811_S_BIT ? 'S' : '-',
1050 l & M6811_X_BIT ? 'X' : '-',
1051 l & M6811_H_BIT ? 'H' : '-',
1052 l & M6811_I_BIT ? 'I' : '-',
1053 l & M6811_N_BIT ? 'N' : '-',
1054 l & M6811_Z_BIT ? 'Z' : '-',
1055 l & M6811_V_BIT ? 'V' : '-',
1056 l & M6811_C_BIT ? 'C' : '-');
1057 N = (l & M6811_N_BIT) != 0;
1058 Z = (l & M6811_Z_BIT) != 0;
1059 V = (l & M6811_V_BIT) != 0;
1060 C = (l & M6811_C_BIT) != 0;
1062 /* Print flags following the h8300 */
1064 fprintf_filtered (file, "u> ");
1065 else if ((C | Z) == 1)
1066 fprintf_filtered (file, "u<= ");
1068 fprintf_filtered (file, "u< ");
1071 fprintf_filtered (file, "!= ");
1073 fprintf_filtered (file, "== ");
1076 fprintf_filtered (file, ">= ");
1078 fprintf_filtered (file, "< ");
1080 if ((Z | (N ^ V)) == 0)
1081 fprintf_filtered (file, "> ");
1083 fprintf_filtered (file, "<= ");
1087 /* Same as 'info reg' but prints the registers in a different way. */
1089 m68hc11_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1090 struct frame_info *frame, int regno, int cpregs)
1094 const char *name = gdbarch_register_name (gdbarch, regno);
1096 if (!name || !*name)
1099 fprintf_filtered (file, "%-10s ", name);
1100 m68hc11_print_register (gdbarch, file, frame, regno);
1101 fprintf_filtered (file, "\n");
1107 fprintf_filtered (file, "PC=");
1108 m68hc11_print_register (gdbarch, file, frame, HARD_PC_REGNUM);
1110 fprintf_filtered (file, " SP=");
1111 m68hc11_print_register (gdbarch, file, frame, HARD_SP_REGNUM);
1113 fprintf_filtered (file, " FP=");
1114 m68hc11_print_register (gdbarch, file, frame, SOFT_FP_REGNUM);
1116 fprintf_filtered (file, "\nCCR=");
1117 m68hc11_print_register (gdbarch, file, frame, HARD_CCR_REGNUM);
1119 fprintf_filtered (file, "\nD=");
1120 m68hc11_print_register (gdbarch, file, frame, HARD_D_REGNUM);
1122 fprintf_filtered (file, " X=");
1123 m68hc11_print_register (gdbarch, file, frame, HARD_X_REGNUM);
1125 fprintf_filtered (file, " Y=");
1126 m68hc11_print_register (gdbarch, file, frame, HARD_Y_REGNUM);
1128 if (gdbarch_tdep (gdbarch)->use_page_register)
1130 fprintf_filtered (file, "\nPage=");
1131 m68hc11_print_register (gdbarch, file, frame, HARD_PAGE_REGNUM);
1133 fprintf_filtered (file, "\n");
1136 for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++)
1138 /* Skip registers which are not defined in the symbol table. */
1139 if (soft_regs[i].name == 0)
1142 fprintf_filtered (file, "D%d=", i - SOFT_D1_REGNUM + 1);
1143 m68hc11_print_register (gdbarch, file, frame, i);
1146 fprintf_filtered (file, "\n");
1148 fprintf_filtered (file, " ");
1150 if (nr && (nr % 8) != 7)
1151 fprintf_filtered (file, "\n");
1156 m68hc11_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1157 struct regcache *regcache, CORE_ADDR bp_addr,
1158 int nargs, struct value **args, CORE_ADDR sp,
1159 int struct_return, CORE_ADDR struct_addr)
1162 int first_stack_argnum;
1168 first_stack_argnum = 0;
1171 regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, struct_addr);
1175 type = value_type (args[0]);
1176 len = TYPE_LENGTH (type);
1178 /* First argument is passed in D and X registers. */
1183 v = extract_unsigned_integer (value_contents (args[0]), len);
1184 first_stack_argnum = 1;
1186 regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, v);
1190 regcache_cooked_write_unsigned (regcache, HARD_X_REGNUM, v);
1195 for (argnum = nargs - 1; argnum >= first_stack_argnum; argnum--)
1197 type = value_type (args[argnum]);
1198 len = TYPE_LENGTH (type);
1202 static char zero = 0;
1205 write_memory (sp, &zero, 1);
1207 val = (char*) value_contents (args[argnum]);
1209 write_memory (sp, val, len);
1212 /* Store return address. */
1214 store_unsigned_integer (buf, 2, bp_addr);
1215 write_memory (sp, buf, 2);
1217 /* Finally, update the stack pointer... */
1218 sp -= STACK_CORRECTION;
1219 regcache_cooked_write_unsigned (regcache, HARD_SP_REGNUM, sp);
1221 /* ...and fake a frame pointer. */
1222 regcache_cooked_write_unsigned (regcache, SOFT_FP_REGNUM, sp);
1224 /* DWARF2/GCC uses the stack address *before* the function call as a
1230 /* Return the GDB type object for the "standard" data type
1231 of data in register N. */
1233 static struct type *
1234 m68hc11_register_type (struct gdbarch *gdbarch, int reg_nr)
1238 case HARD_PAGE_REGNUM:
1241 case HARD_CCR_REGNUM:
1242 return builtin_type_uint8;
1244 case M68HC12_HARD_PC_REGNUM:
1245 return builtin_type_uint32;
1248 return builtin_type_uint16;
1253 m68hc11_store_return_value (struct type *type, struct regcache *regcache,
1258 len = TYPE_LENGTH (type);
1260 /* First argument is passed in D and X registers. */
1262 regcache_raw_write_part (regcache, HARD_D_REGNUM, 2 - len, len, valbuf);
1265 regcache_raw_write_part (regcache, HARD_X_REGNUM, 4 - len,
1267 regcache_raw_write (regcache, HARD_D_REGNUM, (char*) valbuf + (len - 2));
1270 error (_("return of value > 4 is not supported."));
1274 /* Given a return value in `regcache' with a type `type',
1275 extract and copy its value into `valbuf'. */
1278 m68hc11_extract_return_value (struct type *type, struct regcache *regcache,
1281 int len = TYPE_LENGTH (type);
1282 char buf[M68HC11_REG_SIZE];
1284 regcache_raw_read (regcache, HARD_D_REGNUM, buf);
1288 memcpy (valbuf, buf + 1, 1);
1292 memcpy (valbuf, buf, 2);
1296 memcpy ((char*) valbuf + 1, buf, 2);
1297 regcache_raw_read (regcache, HARD_X_REGNUM, buf);
1298 memcpy (valbuf, buf + 1, 1);
1302 memcpy ((char*) valbuf + 2, buf, 2);
1303 regcache_raw_read (regcache, HARD_X_REGNUM, buf);
1304 memcpy (valbuf, buf, 2);
1308 error (_("bad size for return value"));
1312 enum return_value_convention
1313 m68hc11_return_value (struct gdbarch *gdbarch, struct type *valtype,
1314 struct regcache *regcache, gdb_byte *readbuf,
1315 const gdb_byte *writebuf)
1317 if (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
1318 || TYPE_CODE (valtype) == TYPE_CODE_UNION
1319 || TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1320 || TYPE_LENGTH (valtype) > 4)
1321 return RETURN_VALUE_STRUCT_CONVENTION;
1324 if (readbuf != NULL)
1325 m68hc11_extract_return_value (valtype, regcache, readbuf);
1326 if (writebuf != NULL)
1327 m68hc11_store_return_value (valtype, regcache, writebuf);
1328 return RETURN_VALUE_REGISTER_CONVENTION;
1332 /* Test whether the ELF symbol corresponds to a function using rtc or
1336 m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
1338 unsigned char flags;
1340 flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other;
1341 if (flags & STO_M68HC12_FAR)
1342 MSYMBOL_SET_RTC (msym);
1343 if (flags & STO_M68HC12_INTERRUPT)
1344 MSYMBOL_SET_RTI (msym);
1348 gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
1350 if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11)
1351 return print_insn_m68hc11 (memaddr, info);
1353 return print_insn_m68hc12 (memaddr, info);
1358 /* 68HC11/68HC12 register groups.
1359 Identify real hard registers and soft registers used by gcc. */
1361 static struct reggroup *m68hc11_soft_reggroup;
1362 static struct reggroup *m68hc11_hard_reggroup;
1365 m68hc11_init_reggroups (void)
1367 m68hc11_hard_reggroup = reggroup_new ("hard", USER_REGGROUP);
1368 m68hc11_soft_reggroup = reggroup_new ("soft", USER_REGGROUP);
1372 m68hc11_add_reggroups (struct gdbarch *gdbarch)
1374 reggroup_add (gdbarch, m68hc11_hard_reggroup);
1375 reggroup_add (gdbarch, m68hc11_soft_reggroup);
1376 reggroup_add (gdbarch, general_reggroup);
1377 reggroup_add (gdbarch, float_reggroup);
1378 reggroup_add (gdbarch, all_reggroup);
1379 reggroup_add (gdbarch, save_reggroup);
1380 reggroup_add (gdbarch, restore_reggroup);
1381 reggroup_add (gdbarch, vector_reggroup);
1382 reggroup_add (gdbarch, system_reggroup);
1386 m68hc11_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1387 struct reggroup *group)
1389 /* We must save the real hard register as well as gcc
1390 soft registers including the frame pointer. */
1391 if (group == save_reggroup || group == restore_reggroup)
1393 return (regnum <= gdbarch_num_regs (gdbarch)
1394 || ((regnum == SOFT_FP_REGNUM
1395 || regnum == SOFT_TMP_REGNUM
1396 || regnum == SOFT_ZS_REGNUM
1397 || regnum == SOFT_XY_REGNUM)
1398 && m68hc11_register_name (regnum)));
1401 /* Group to identify gcc soft registers (d1..dN). */
1402 if (group == m68hc11_soft_reggroup)
1404 return regnum >= SOFT_D1_REGNUM && m68hc11_register_name (regnum);
1407 if (group == m68hc11_hard_reggroup)
1409 return regnum == HARD_PC_REGNUM || regnum == HARD_SP_REGNUM
1410 || regnum == HARD_X_REGNUM || regnum == HARD_D_REGNUM
1411 || regnum == HARD_Y_REGNUM || regnum == HARD_CCR_REGNUM;
1413 return default_register_reggroup_p (gdbarch, regnum, group);
1416 static struct gdbarch *
1417 m68hc11_gdbarch_init (struct gdbarch_info info,
1418 struct gdbarch_list *arches)
1420 struct gdbarch *gdbarch;
1421 struct gdbarch_tdep *tdep;
1424 soft_reg_initialized = 0;
1426 /* Extract the elf_flags if available. */
1427 if (info.abfd != NULL
1428 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1429 elf_flags = elf_elfheader (info.abfd)->e_flags;
1433 /* try to find a pre-existing architecture */
1434 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1436 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1438 if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
1441 return arches->gdbarch;
1444 /* Need a new architecture. Fill in a target specific vector. */
1445 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1446 gdbarch = gdbarch_alloc (&info, tdep);
1447 tdep->elf_flags = elf_flags;
1449 switch (info.bfd_arch_info->arch)
1451 case bfd_arch_m68hc11:
1452 tdep->stack_correction = 1;
1453 tdep->use_page_register = 0;
1454 tdep->prologue = m6811_prologue;
1455 set_gdbarch_addr_bit (gdbarch, 16);
1456 set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
1457 set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
1458 set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
1461 case bfd_arch_m68hc12:
1462 tdep->stack_correction = 0;
1463 tdep->use_page_register = elf_flags & E_M68HC12_BANKS;
1464 tdep->prologue = m6812_prologue;
1465 set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16);
1466 set_gdbarch_num_pseudo_regs (gdbarch,
1467 elf_flags & E_M68HC12_BANKS
1468 ? M68HC12_NUM_PSEUDO_REGS
1469 : M68HC11_NUM_PSEUDO_REGS);
1470 set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS
1471 ? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM);
1472 set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS
1473 ? M68HC12_NUM_REGS : M68HC11_NUM_REGS);
1480 /* Initially set everything according to the ABI.
1481 Use 16-bit integers since it will be the case for most
1482 programs. The size of these types should normally be set
1483 according to the dwarf2 debug information. */
1484 set_gdbarch_short_bit (gdbarch, 16);
1485 set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16);
1486 set_gdbarch_float_bit (gdbarch, 32);
1487 set_gdbarch_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32);
1488 set_gdbarch_long_double_bit (gdbarch, 64);
1489 set_gdbarch_long_bit (gdbarch, 32);
1490 set_gdbarch_ptr_bit (gdbarch, 16);
1491 set_gdbarch_long_long_bit (gdbarch, 64);
1493 /* Characters are unsigned. */
1494 set_gdbarch_char_signed (gdbarch, 0);
1496 set_gdbarch_unwind_pc (gdbarch, m68hc11_unwind_pc);
1497 set_gdbarch_unwind_sp (gdbarch, m68hc11_unwind_sp);
1499 /* Set register info. */
1500 set_gdbarch_fp0_regnum (gdbarch, -1);
1502 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
1504 set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
1505 set_gdbarch_register_name (gdbarch, m68hc11_register_name);
1506 set_gdbarch_register_type (gdbarch, m68hc11_register_type);
1507 set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read);
1508 set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write);
1510 set_gdbarch_push_dummy_call (gdbarch, m68hc11_push_dummy_call);
1512 set_gdbarch_return_value (gdbarch, m68hc11_return_value);
1513 set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
1514 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1515 set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
1516 set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11);
1518 m68hc11_add_reggroups (gdbarch);
1519 set_gdbarch_register_reggroup_p (gdbarch, m68hc11_register_reggroup_p);
1520 set_gdbarch_print_registers_info (gdbarch, m68hc11_print_registers_info);
1522 /* Hook in the DWARF CFI frame unwinder. */
1523 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1525 frame_unwind_append_sniffer (gdbarch, m68hc11_frame_sniffer);
1526 frame_base_set_default (gdbarch, &m68hc11_frame_base);
1528 /* Methods for saving / extracting a dummy frame's ID. The ID's
1529 stack address must match the SP value returned by
1530 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
1531 set_gdbarch_unwind_dummy_id (gdbarch, m68hc11_unwind_dummy_id);
1533 /* Return the unwound PC value. */
1534 set_gdbarch_unwind_pc (gdbarch, m68hc11_unwind_pc);
1536 /* Minsymbol frobbing. */
1537 set_gdbarch_elf_make_msymbol_special (gdbarch,
1538 m68hc11_elf_make_msymbol_special);
1540 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1545 extern initialize_file_ftype _initialize_m68hc11_tdep; /* -Wmissing-prototypes */
1548 _initialize_m68hc11_tdep (void)
1550 register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init);
1551 register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init);
1552 m68hc11_init_reggroups ();