1 /* Target-dependent code for Motorola 68HC11 & 68HC12
3 Copyright 1999, 2000, 2001, 2002, 2003, 2004 Free Software
6 Contributed by Stephane Carrez, stcarrez@nerim.fr
8 This file is part of GDB.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
27 #include "frame-unwind.h"
28 #include "frame-base.h"
29 #include "dwarf2-frame.h"
30 #include "trad-frame.h"
35 #include "gdb_string.h"
41 #include "arch-utils.h"
43 #include "reggroups.h"
46 #include "opcode/m68hc11.h"
47 #include "elf/m68hc11.h"
50 /* Macros for setting and testing a bit in a minimal symbol.
51 For 68HC11/68HC12 we have two flags that tell which return
52 type the function is using. This is used for prologue and frame
53 analysis to compute correct stack frame layout.
55 The MSB of the minimal symbol's "info" field is used for this purpose.
57 MSYMBOL_SET_RTC Actually sets the "RTC" bit.
58 MSYMBOL_SET_RTI Actually sets the "RTI" bit.
59 MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol.
60 MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol. */
62 #define MSYMBOL_SET_RTC(msym) \
63 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
66 #define MSYMBOL_SET_RTI(msym) \
67 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
70 #define MSYMBOL_IS_RTC(msym) \
71 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
73 #define MSYMBOL_IS_RTI(msym) \
74 (((long) MSYMBOL_INFO (msym) & 0x40000000) != 0)
76 enum insn_return_kind {
83 /* Register numbers of various important registers.
84 Note that some of these values are "real" register numbers,
85 and correspond to the general registers of the machine,
86 and some are "phony" register numbers which are too large
87 to be actual register numbers as far as the user is concerned
88 but do serve to get the desired values when passed to read_register. */
90 #define HARD_X_REGNUM 0
91 #define HARD_D_REGNUM 1
92 #define HARD_Y_REGNUM 2
93 #define HARD_SP_REGNUM 3
94 #define HARD_PC_REGNUM 4
96 #define HARD_A_REGNUM 5
97 #define HARD_B_REGNUM 6
98 #define HARD_CCR_REGNUM 7
100 /* 68HC12 page number register.
101 Note: to keep a compatibility with gcc register naming, we must
102 not have to rename FP and other soft registers. The page register
103 is a real hard register and must therefore be counted by NUM_REGS.
104 For this it has the same number as Z register (which is not used). */
105 #define HARD_PAGE_REGNUM 8
106 #define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
108 /* Z is replaced by X or Y by gcc during machine reorg.
109 ??? There is no way to get it and even know whether
110 it's in X or Y or in ZS. */
111 #define SOFT_Z_REGNUM 8
113 /* Soft registers. These registers are special. There are treated
114 like normal hard registers by gcc and gdb (ie, within dwarf2 info).
115 They are physically located in memory. */
116 #define SOFT_FP_REGNUM 9
117 #define SOFT_TMP_REGNUM 10
118 #define SOFT_ZS_REGNUM 11
119 #define SOFT_XY_REGNUM 12
120 #define SOFT_UNUSED_REGNUM 13
121 #define SOFT_D1_REGNUM 14
122 #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
123 #define M68HC11_MAX_SOFT_REGS 32
125 #define M68HC11_NUM_REGS (8)
126 #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
127 #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
129 #define M68HC11_REG_SIZE (2)
131 #define M68HC12_NUM_REGS (9)
132 #define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1)
133 #define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1)
135 struct insn_sequence;
138 /* Stack pointer correction value. For 68hc11, the stack pointer points
139 to the next push location. An offset of 1 must be applied to obtain
140 the address where the last value is saved. For 68hc12, the stack
141 pointer points to the last value pushed. No offset is necessary. */
142 int stack_correction;
144 /* Description of instructions in the prologue. */
145 struct insn_sequence *prologue;
147 /* True if the page memory bank register is available
149 int use_page_register;
151 /* ELF flags for ABI. */
155 #define M6811_TDEP gdbarch_tdep (current_gdbarch)
156 #define STACK_CORRECTION (M6811_TDEP->stack_correction)
157 #define USE_PAGE_REGISTER (M6811_TDEP->use_page_register)
159 struct m68hc11_unwind_cache
161 /* The previous frame's inner most stack address. Used as this
162 frame ID's stack_addr. */
164 /* The frame's base, optionally used by the high-level debug info. */
172 enum insn_return_kind return_kind;
174 /* Table indicating the location of each and every register. */
175 struct trad_frame_saved_reg *saved_regs;
178 /* Table of registers for 68HC11. This includes the hard registers
179 and the soft registers used by GCC. */
181 m68hc11_register_names[] =
183 "x", "d", "y", "sp", "pc", "a", "b",
184 "ccr", "page", "frame","tmp", "zs", "xy", 0,
185 "d1", "d2", "d3", "d4", "d5", "d6", "d7",
186 "d8", "d9", "d10", "d11", "d12", "d13", "d14",
187 "d15", "d16", "d17", "d18", "d19", "d20", "d21",
188 "d22", "d23", "d24", "d25", "d26", "d27", "d28",
189 "d29", "d30", "d31", "d32"
192 struct m68hc11_soft_reg
198 static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS];
200 #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
202 static int soft_min_addr;
203 static int soft_max_addr;
204 static int soft_reg_initialized = 0;
206 /* Look in the symbol table for the address of a pseudo register
207 in memory. If we don't find it, pretend the register is not used
208 and not available. */
210 m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
212 struct minimal_symbol *msymbol;
214 msymbol = lookup_minimal_symbol (name, NULL, NULL);
217 reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
218 reg->name = xstrdup (name);
220 /* Keep track of the address range for soft registers. */
221 if (reg->addr < (CORE_ADDR) soft_min_addr)
222 soft_min_addr = reg->addr;
223 if (reg->addr > (CORE_ADDR) soft_max_addr)
224 soft_max_addr = reg->addr;
233 /* Initialize the table of soft register addresses according
234 to the symbol table. */
236 m68hc11_initialize_register_info (void)
240 if (soft_reg_initialized)
243 soft_min_addr = INT_MAX;
245 for (i = 0; i < M68HC11_ALL_REGS; i++)
247 soft_regs[i].name = 0;
250 m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame");
251 m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp");
252 m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z");
253 soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM];
254 m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy");
256 for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++)
260 sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1);
261 m68hc11_get_register_info (&soft_regs[i], buf);
264 if (soft_regs[SOFT_FP_REGNUM].name == 0)
266 warning ("No frame soft register found in the symbol table.\n");
267 warning ("Stack backtrace will not work.\n");
269 soft_reg_initialized = 1;
272 /* Given an address in memory, return the soft register number if
273 that address corresponds to a soft register. Returns -1 if not. */
275 m68hc11_which_soft_register (CORE_ADDR addr)
279 if (addr < soft_min_addr || addr > soft_max_addr)
282 for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++)
284 if (soft_regs[i].name && soft_regs[i].addr == addr)
290 /* Fetch a pseudo register. The 68hc11 soft registers are treated like
291 pseudo registers. They are located in memory. Translate the register
292 fetch into a memory read. */
294 m68hc11_pseudo_register_read (struct gdbarch *gdbarch,
295 struct regcache *regcache,
296 int regno, void *buf)
298 /* The PC is a pseudo reg only for 68HC12 with the memory bank
300 if (regno == M68HC12_HARD_PC_REGNUM)
303 const int regsize = TYPE_LENGTH (builtin_type_uint32);
305 regcache_cooked_read_unsigned (regcache, HARD_PC_REGNUM, &pc);
306 if (pc >= 0x8000 && pc < 0xc000)
310 regcache_cooked_read_unsigned (regcache, HARD_PAGE_REGNUM, &page);
315 store_unsigned_integer (buf, regsize, pc);
319 m68hc11_initialize_register_info ();
321 /* Fetch a soft register: translate into a memory read. */
322 if (soft_regs[regno].name)
324 target_read_memory (soft_regs[regno].addr, buf, 2);
332 /* Store a pseudo register. Translate the register store
333 into a memory write. */
335 m68hc11_pseudo_register_write (struct gdbarch *gdbarch,
336 struct regcache *regcache,
337 int regno, const void *buf)
339 /* The PC is a pseudo reg only for 68HC12 with the memory bank
341 if (regno == M68HC12_HARD_PC_REGNUM)
343 const int regsize = TYPE_LENGTH (builtin_type_uint32);
344 char *tmp = alloca (regsize);
347 memcpy (tmp, buf, regsize);
348 pc = extract_unsigned_integer (tmp, regsize);
352 regcache_cooked_write_unsigned (regcache, HARD_PAGE_REGNUM,
355 regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM,
359 regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM, pc);
363 m68hc11_initialize_register_info ();
365 /* Store a soft register: translate into a memory write. */
366 if (soft_regs[regno].name)
368 const int regsize = 2;
369 char *tmp = alloca (regsize);
370 memcpy (tmp, buf, regsize);
371 target_write_memory (soft_regs[regno].addr, tmp, regsize);
376 m68hc11_register_name (int reg_nr)
378 if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER)
380 if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER)
385 if (reg_nr >= M68HC11_ALL_REGS)
388 m68hc11_initialize_register_info ();
390 /* If we don't know the address of a soft register, pretend it
392 if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0)
394 return m68hc11_register_names[reg_nr];
397 static const unsigned char *
398 m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
400 static unsigned char breakpoint[] = {0x0};
402 *lenptr = sizeof (breakpoint);
407 /* 68HC11 & 68HC12 prologue analysis.
412 /* 68HC11 opcodes. */
413 #undef M6811_OP_PAGE2
414 #define M6811_OP_PAGE2 (0x18)
415 #define M6811_OP_LDX (0xde)
416 #define M6811_OP_LDX_EXT (0xfe)
417 #define M6811_OP_PSHX (0x3c)
418 #define M6811_OP_STS (0x9f)
419 #define M6811_OP_STS_EXT (0xbf)
420 #define M6811_OP_TSX (0x30)
421 #define M6811_OP_XGDX (0x8f)
422 #define M6811_OP_ADDD (0xc3)
423 #define M6811_OP_TXS (0x35)
424 #define M6811_OP_DES (0x34)
426 /* 68HC12 opcodes. */
427 #define M6812_OP_PAGE2 (0x18)
428 #define M6812_OP_MOVW (0x01)
429 #define M6812_PB_PSHW (0xae)
430 #define M6812_OP_STS (0x5f)
431 #define M6812_OP_STS_EXT (0x7f)
432 #define M6812_OP_LEAS (0x1b)
433 #define M6812_OP_PSHX (0x34)
434 #define M6812_OP_PSHY (0x35)
436 /* Operand extraction. */
437 #define OP_DIRECT (0x100) /* 8-byte direct addressing. */
438 #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
439 #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
440 #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
442 /* Identification of the sequence. */
446 P_SAVE_REG, /* Save a register on the stack. */
447 P_SET_FRAME, /* Setup the frame pointer. */
448 P_LOCAL_1, /* Allocate 1 byte for locals. */
449 P_LOCAL_2, /* Allocate 2 bytes for locals. */
450 P_LOCAL_N /* Allocate N bytes for locals. */
453 struct insn_sequence {
454 enum m6811_seq_type type;
456 unsigned short code[MAX_CODES];
459 /* Sequence of instructions in the 68HC11 function prologue. */
460 static struct insn_sequence m6811_prologue[] = {
461 /* Sequences to save a soft-register. */
462 { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT,
464 { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT,
465 M6811_OP_PAGE2, M6811_OP_PSHX } },
466 { P_SAVE_REG, 4, { M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW,
468 { P_SAVE_REG, 6, { M6811_OP_PAGE2, M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW,
469 M6811_OP_PAGE2, M6811_OP_PSHX } },
471 /* Sequences to allocate local variables. */
472 { P_LOCAL_N, 7, { M6811_OP_TSX,
474 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
477 { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX,
478 M6811_OP_PAGE2, M6811_OP_XGDX,
479 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
480 M6811_OP_PAGE2, M6811_OP_XGDX,
481 M6811_OP_PAGE2, M6811_OP_TXS } },
482 { P_LOCAL_1, 1, { M6811_OP_DES } },
483 { P_LOCAL_2, 1, { M6811_OP_PSHX } },
484 { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } },
486 /* Initialize the frame pointer. */
487 { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } },
488 { P_SET_FRAME, 3, { M6811_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } },
493 /* Sequence of instructions in the 68HC12 function prologue. */
494 static struct insn_sequence m6812_prologue[] = {
495 { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW,
496 OP_IMM_HIGH, OP_IMM_LOW } },
497 { P_SET_FRAME, 2, { M6812_OP_STS, OP_DIRECT } },
498 { P_SET_FRAME, 3, { M6812_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } },
499 { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } },
500 { P_LOCAL_2, 1, { M6812_OP_PSHX } },
501 { P_LOCAL_2, 1, { M6812_OP_PSHY } },
506 /* Analyze the sequence of instructions starting at the given address.
507 Returns a pointer to the sequence when it is recognized and
508 the optional value (constant/address) associated with it. */
509 static struct insn_sequence *
510 m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR pc,
513 unsigned char buffer[MAX_CODES];
520 for (; seq->type != P_LAST; seq++)
523 for (j = 0; j < seq->length; j++)
527 buffer[bufsize] = read_memory_unsigned_integer (pc + bufsize,
531 /* Continue while we match the opcode. */
532 if (seq->code[j] == buffer[j])
535 if ((seq->code[j] & 0xf00) == 0)
538 /* Extract a sequence parameter (address or constant). */
539 switch (seq->code[j])
542 cur_val = (CORE_ADDR) buffer[j];
546 cur_val = cur_val & 0x0ff;
547 cur_val |= (buffer[j] << 8);
552 cur_val |= buffer[j];
556 if ((buffer[j] & 0xE0) == 0x80)
558 v = buffer[j] & 0x1f;
562 else if ((buffer[j] & 0xfe) == 0xf0)
564 v = read_memory_unsigned_integer (pc + j + 1, 1);
568 else if (buffer[j] == 0xf2)
570 v = read_memory_unsigned_integer (pc + j + 1, 2);
577 /* We have a full match. */
578 if (j == seq->length)
587 /* Return the instruction that the function at the PC is using. */
588 static enum insn_return_kind
589 m68hc11_get_return_insn (CORE_ADDR pc)
591 struct minimal_symbol *sym;
593 /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
594 function is stored by elfread.c in the high bit of the info field.
595 Use this to decide which instruction the function uses to return. */
596 sym = lookup_minimal_symbol_by_pc (pc);
600 if (MSYMBOL_IS_RTC (sym))
602 else if (MSYMBOL_IS_RTI (sym))
608 /* Analyze the function prologue to find some information
610 - the PC of the first line (for m68hc11_skip_prologue)
611 - the offset of the previous frame saved address (from current frame)
612 - the soft registers which are pushed. */
614 m68hc11_scan_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
615 struct m68hc11_unwind_cache *info)
620 int found_frame_point;
623 struct insn_sequence *seq_table;
627 if (pc >= current_pc)
632 m68hc11_initialize_register_info ();
639 seq_table = gdbarch_tdep (current_gdbarch)->prologue;
641 /* The 68hc11 stack is as follows:
657 +-----------+ <--- current frame
660 With most processors (like 68K) the previous frame can be computed
661 easily because it is always at a fixed offset (see link/unlink).
662 That is, locals are accessed with negative offsets, arguments are
663 accessed with positive ones. Since 68hc11 only supports offsets
664 in the range [0..255], the frame is defined at the bottom of
665 locals (see picture).
667 The purpose of the analysis made here is to find out the size
668 of locals in this function. An alternative to this is to use
669 DWARF2 info. This would be better but I don't know how to
670 access dwarf2 debug from this function.
672 Walk from the function entry point to the point where we save
673 the frame. While walking instructions, compute the size of bytes
674 which are pushed. This gives us the index to access the previous
677 We limit the search to 128 bytes so that the algorithm is bounded
678 in case of random and wrong code. We also stop and abort if
679 we find an instruction which is not supposed to appear in the
680 prologue (as generated by gcc 2.95, 2.96).
683 found_frame_point = 0;
686 while (!done && pc + 2 < func_end)
688 struct insn_sequence *seq;
691 seq = m68hc11_analyze_instruction (seq_table, pc, &val);
695 /* If we are within the instruction group, we can't advance the
696 pc nor the stack offset. Otherwise the caller's stack computed
697 from the current stack can be wrong. */
698 if (pc + seq->length > current_pc)
701 pc = pc + seq->length;
702 if (seq->type == P_SAVE_REG)
704 if (found_frame_point)
706 saved_reg = m68hc11_which_soft_register (val);
711 info->saved_regs[saved_reg].addr = save_addr;
718 else if (seq->type == P_SET_FRAME)
720 found_frame_point = 1;
723 else if (seq->type == P_LOCAL_1)
727 else if (seq->type == P_LOCAL_2)
731 else if (seq->type == P_LOCAL_N)
733 /* Stack pointer is decremented for the allocation. */
735 size -= (int) (val) | 0xffff0000;
740 if (found_frame_point == 0)
741 info->sp_offset = size;
743 info->sp_offset = -1;
748 m68hc11_skip_prologue (CORE_ADDR pc)
750 CORE_ADDR func_addr, func_end;
751 struct symtab_and_line sal;
752 struct m68hc11_unwind_cache tmp_cache = { 0 };
754 /* If we have line debugging information, then the end of the
755 prologue should be the first assembly instruction of the
756 first source line. */
757 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
759 sal = find_pc_line (func_addr, 0);
760 if (sal.end && sal.end < func_end)
764 pc = m68hc11_scan_prologue (pc, (CORE_ADDR) -1, &tmp_cache);
769 m68hc11_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
773 frame_unwind_unsigned_register (next_frame, gdbarch_pc_regnum (gdbarch),
778 /* Put here the code to store, into fi->saved_regs, the addresses of
779 the saved registers of frame described by FRAME_INFO. This
780 includes special registers such as pc and fp saved in special ways
781 in the stack frame. sp is even more special: the address we return
782 for it IS the sp for the next frame. */
784 struct m68hc11_unwind_cache *
785 m68hc11_frame_unwind_cache (struct frame_info *next_frame,
786 void **this_prologue_cache)
790 struct m68hc11_unwind_cache *info;
791 CORE_ADDR current_pc;
794 if ((*this_prologue_cache))
795 return (*this_prologue_cache);
797 info = FRAME_OBSTACK_ZALLOC (struct m68hc11_unwind_cache);
798 (*this_prologue_cache) = info;
799 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
801 info->pc = frame_func_unwind (next_frame);
804 info->return_kind = m68hc11_get_return_insn (info->pc);
806 /* The SP was moved to the FP. This indicates that a new frame
807 was created. Get THIS frame's FP value by unwinding it from
809 frame_unwind_unsigned_register (next_frame, SOFT_FP_REGNUM, &this_base);
816 current_pc = frame_pc_unwind (next_frame);
818 m68hc11_scan_prologue (info->pc, current_pc, info);
820 info->saved_regs[HARD_PC_REGNUM].addr = info->size;
822 if (info->sp_offset != (CORE_ADDR) -1)
824 info->saved_regs[HARD_PC_REGNUM].addr = info->sp_offset;
825 frame_unwind_unsigned_register (next_frame, HARD_SP_REGNUM, &this_base);
826 prev_sp = this_base + info->sp_offset + 2;
827 this_base += STACK_CORRECTION;
831 /* The FP points at the last saved register. Adjust the FP back
832 to before the first saved register giving the SP. */
833 prev_sp = this_base + info->size + 2;
835 this_base += STACK_CORRECTION;
836 if (soft_regs[SOFT_FP_REGNUM].name)
837 info->saved_regs[SOFT_FP_REGNUM].addr = info->size - 2;
840 if (info->return_kind == RETURN_RTC)
843 info->saved_regs[HARD_PAGE_REGNUM].addr = info->size;
844 info->saved_regs[HARD_PC_REGNUM].addr = info->size + 1;
846 else if (info->return_kind == RETURN_RTI)
849 info->saved_regs[HARD_CCR_REGNUM].addr = info->size;
850 info->saved_regs[HARD_D_REGNUM].addr = info->size + 1;
851 info->saved_regs[HARD_X_REGNUM].addr = info->size + 3;
852 info->saved_regs[HARD_Y_REGNUM].addr = info->size + 5;
853 info->saved_regs[HARD_PC_REGNUM].addr = info->size + 7;
856 /* Add 1 here to adjust for the post-decrement nature of the push
858 info->prev_sp = prev_sp;
860 info->base = this_base;
862 /* Adjust all the saved registers so that they contain addresses and not
864 for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS - 1; i++)
865 if (trad_frame_addr_p (info->saved_regs, i))
867 info->saved_regs[i].addr += this_base;
870 /* The previous frame's SP needed to be computed. Save the computed
872 trad_frame_set_value (info->saved_regs, HARD_SP_REGNUM, info->prev_sp);
877 /* Given a GDB frame, determine the address of the calling function's
878 frame. This will be used to create a new GDB frame struct. */
881 m68hc11_frame_this_id (struct frame_info *next_frame,
882 void **this_prologue_cache,
883 struct frame_id *this_id)
885 struct m68hc11_unwind_cache *info
886 = m68hc11_frame_unwind_cache (next_frame, this_prologue_cache);
891 /* The FUNC is easy. */
892 func = frame_func_unwind (next_frame);
894 /* Hopefully the prologue analysis either correctly determined the
895 frame's base (which is the SP from the previous frame), or set
896 that base to "NULL". */
897 base = info->prev_sp;
901 id = frame_id_build (base, func);
906 m68hc11_frame_prev_register (struct frame_info *next_frame,
907 void **this_prologue_cache,
908 int regnum, int *optimizedp,
909 enum lval_type *lvalp, CORE_ADDR *addrp,
910 int *realnump, void *bufferp)
912 struct m68hc11_unwind_cache *info
913 = m68hc11_frame_unwind_cache (next_frame, this_prologue_cache);
915 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
916 optimizedp, lvalp, addrp, realnump, bufferp);
918 if (regnum == HARD_PC_REGNUM)
920 /* Take into account the 68HC12 specific call (PC + page). */
921 if (info->return_kind == RETURN_RTC
922 && *addrp >= 0x08000 && *addrp < 0x0c000
923 && USE_PAGE_REGISTER)
929 trad_frame_get_prev_register (next_frame, info->saved_regs,
930 HARD_PAGE_REGNUM, &page_optimized,
933 *addrp += ((page & 0x0ff) << 14);
939 static const struct frame_unwind m68hc11_frame_unwind = {
941 m68hc11_frame_this_id,
942 m68hc11_frame_prev_register
945 const struct frame_unwind *
946 m68hc11_frame_sniffer (struct frame_info *next_frame)
948 return &m68hc11_frame_unwind;
952 m68hc11_frame_base_address (struct frame_info *next_frame, void **this_cache)
954 struct m68hc11_unwind_cache *info
955 = m68hc11_frame_unwind_cache (next_frame, this_cache);
961 m68hc11_frame_args_address (struct frame_info *next_frame, void **this_cache)
964 struct m68hc11_unwind_cache *info
965 = m68hc11_frame_unwind_cache (next_frame, this_cache);
967 addr = info->base + info->size;
968 if (info->return_kind == RETURN_RTC)
970 else if (info->return_kind == RETURN_RTI)
976 static const struct frame_base m68hc11_frame_base = {
977 &m68hc11_frame_unwind,
978 m68hc11_frame_base_address,
979 m68hc11_frame_base_address,
980 m68hc11_frame_args_address
984 m68hc11_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
987 frame_unwind_unsigned_register (next_frame, HARD_SP_REGNUM, &sp);
991 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
992 dummy frame. The frame ID's base needs to match the TOS value
993 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
996 static struct frame_id
997 m68hc11_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1000 CORE_ADDR pc = frame_pc_unwind (next_frame);
1002 frame_unwind_unsigned_register (next_frame, SOFT_FP_REGNUM, &tos);
1004 return frame_id_build (tos, pc);
1008 /* Get and print the register from the given frame. */
1010 m68hc11_print_register (struct gdbarch *gdbarch, struct ui_file *file,
1011 struct frame_info *frame, int regno)
1015 if (regno == HARD_PC_REGNUM || regno == HARD_SP_REGNUM
1016 || regno == SOFT_FP_REGNUM || regno == M68HC12_HARD_PC_REGNUM)
1017 rval = get_frame_register_unsigned (frame, regno);
1019 rval = get_frame_register_signed (frame, regno);
1021 if (regno == HARD_A_REGNUM || regno == HARD_B_REGNUM
1022 || regno == HARD_CCR_REGNUM || regno == HARD_PAGE_REGNUM)
1024 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
1025 if (regno != HARD_CCR_REGNUM)
1026 print_longest (file, 'd', 1, rval);
1030 if (regno == HARD_PC_REGNUM && gdbarch_tdep (gdbarch)->use_page_register)
1034 page = get_frame_register_unsigned (frame, HARD_PAGE_REGNUM);
1035 fprintf_filtered (file, "0x%02x:%04x ", (unsigned) page,
1040 fprintf_filtered (file, "0x%04x ", (unsigned) rval);
1041 if (regno != HARD_PC_REGNUM && regno != HARD_SP_REGNUM
1042 && regno != SOFT_FP_REGNUM && regno != M68HC12_HARD_PC_REGNUM)
1043 print_longest (file, 'd', 1, rval);
1047 if (regno == HARD_CCR_REGNUM)
1051 unsigned char l = rval & 0xff;
1053 fprintf_filtered (file, "%c%c%c%c%c%c%c%c ",
1054 l & M6811_S_BIT ? 'S' : '-',
1055 l & M6811_X_BIT ? 'X' : '-',
1056 l & M6811_H_BIT ? 'H' : '-',
1057 l & M6811_I_BIT ? 'I' : '-',
1058 l & M6811_N_BIT ? 'N' : '-',
1059 l & M6811_Z_BIT ? 'Z' : '-',
1060 l & M6811_V_BIT ? 'V' : '-',
1061 l & M6811_C_BIT ? 'C' : '-');
1062 N = (l & M6811_N_BIT) != 0;
1063 Z = (l & M6811_Z_BIT) != 0;
1064 V = (l & M6811_V_BIT) != 0;
1065 C = (l & M6811_C_BIT) != 0;
1067 /* Print flags following the h8300 */
1069 fprintf_filtered (file, "u> ");
1070 else if ((C | Z) == 1)
1071 fprintf_filtered (file, "u<= ");
1073 fprintf_filtered (file, "u< ");
1076 fprintf_filtered (file, "!= ");
1078 fprintf_filtered (file, "== ");
1081 fprintf_filtered (file, ">= ");
1083 fprintf_filtered (file, "< ");
1085 if ((Z | (N ^ V)) == 0)
1086 fprintf_filtered (file, "> ");
1088 fprintf_filtered (file, "<= ");
1092 /* Same as 'info reg' but prints the registers in a different way. */
1094 m68hc11_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1095 struct frame_info *frame, int regno, int cpregs)
1099 const char *name = gdbarch_register_name (gdbarch, regno);
1101 if (!name || !*name)
1104 fprintf_filtered (file, "%-10s ", name);
1105 m68hc11_print_register (gdbarch, file, frame, regno);
1106 fprintf_filtered (file, "\n");
1112 fprintf_filtered (file, "PC=");
1113 m68hc11_print_register (gdbarch, file, frame, HARD_PC_REGNUM);
1115 fprintf_filtered (file, " SP=");
1116 m68hc11_print_register (gdbarch, file, frame, HARD_SP_REGNUM);
1118 fprintf_filtered (file, " FP=");
1119 m68hc11_print_register (gdbarch, file, frame, SOFT_FP_REGNUM);
1121 fprintf_filtered (file, "\nCCR=");
1122 m68hc11_print_register (gdbarch, file, frame, HARD_CCR_REGNUM);
1124 fprintf_filtered (file, "\nD=");
1125 m68hc11_print_register (gdbarch, file, frame, HARD_D_REGNUM);
1127 fprintf_filtered (file, " X=");
1128 m68hc11_print_register (gdbarch, file, frame, HARD_X_REGNUM);
1130 fprintf_filtered (file, " Y=");
1131 m68hc11_print_register (gdbarch, file, frame, HARD_Y_REGNUM);
1133 if (gdbarch_tdep (gdbarch)->use_page_register)
1135 fprintf_filtered (file, "\nPage=");
1136 m68hc11_print_register (gdbarch, file, frame, HARD_PAGE_REGNUM);
1138 fprintf_filtered (file, "\n");
1141 for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++)
1143 /* Skip registers which are not defined in the symbol table. */
1144 if (soft_regs[i].name == 0)
1147 fprintf_filtered (file, "D%d=", i - SOFT_D1_REGNUM + 1);
1148 m68hc11_print_register (gdbarch, file, frame, i);
1151 fprintf_filtered (file, "\n");
1153 fprintf_filtered (file, " ");
1155 if (nr && (nr % 8) != 7)
1156 fprintf_filtered (file, "\n");
1160 /* Same as 'info reg' but prints the registers in a different way. */
1162 show_regs (char *args, int from_tty)
1164 m68hc11_print_registers_info (current_gdbarch, gdb_stdout,
1165 get_current_frame (), -1, 1);
1169 m68hc11_stack_align (CORE_ADDR addr)
1171 return ((addr + 1) & -2);
1175 m68hc11_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1176 struct regcache *regcache, CORE_ADDR bp_addr,
1177 int nargs, struct value **args, CORE_ADDR sp,
1178 int struct_return, CORE_ADDR struct_addr)
1181 int first_stack_argnum;
1187 first_stack_argnum = 0;
1190 /* The struct is allocated on the stack and gdb used the stack
1191 pointer for the address of that struct. We must apply the
1192 stack offset on the address. */
1193 regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM,
1194 struct_addr + STACK_CORRECTION);
1198 type = value_type (args[0]);
1199 len = TYPE_LENGTH (type);
1201 /* First argument is passed in D and X registers. */
1206 v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len);
1207 first_stack_argnum = 1;
1209 regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, v);
1213 regcache_cooked_write_unsigned (regcache, HARD_X_REGNUM, v);
1218 for (argnum = nargs - 1; argnum >= first_stack_argnum; argnum--)
1220 type = value_type (args[argnum]);
1221 len = TYPE_LENGTH (type);
1225 static char zero = 0;
1228 write_memory (sp, &zero, 1);
1230 val = (char*) VALUE_CONTENTS (args[argnum]);
1232 write_memory (sp, val, len);
1235 /* Store return address. */
1237 store_unsigned_integer (buf, 2, bp_addr);
1238 write_memory (sp, buf, 2);
1240 /* Finally, update the stack pointer... */
1241 sp -= STACK_CORRECTION;
1242 regcache_cooked_write_unsigned (regcache, HARD_SP_REGNUM, sp);
1244 /* ...and fake a frame pointer. */
1245 regcache_cooked_write_unsigned (regcache, SOFT_FP_REGNUM, sp);
1247 /* DWARF2/GCC uses the stack address *before* the function call as a
1253 /* Return the GDB type object for the "standard" data type
1254 of data in register N. */
1256 static struct type *
1257 m68hc11_register_type (struct gdbarch *gdbarch, int reg_nr)
1261 case HARD_PAGE_REGNUM:
1264 case HARD_CCR_REGNUM:
1265 return builtin_type_uint8;
1267 case M68HC12_HARD_PC_REGNUM:
1268 return builtin_type_uint32;
1271 return builtin_type_uint16;
1276 m68hc11_store_return_value (struct type *type, struct regcache *regcache,
1281 len = TYPE_LENGTH (type);
1283 /* First argument is passed in D and X registers. */
1285 regcache_raw_write_part (regcache, HARD_D_REGNUM, 2 - len, len, valbuf);
1288 regcache_raw_write_part (regcache, HARD_X_REGNUM, 4 - len,
1290 regcache_raw_write (regcache, HARD_D_REGNUM, (char*) valbuf + (len - 2));
1293 error ("return of value > 4 is not supported.");
1297 /* Given a return value in `regcache' with a type `type',
1298 extract and copy its value into `valbuf'. */
1301 m68hc11_extract_return_value (struct type *type, struct regcache *regcache,
1304 int len = TYPE_LENGTH (type);
1305 char buf[M68HC11_REG_SIZE];
1307 regcache_raw_read (regcache, HARD_D_REGNUM, buf);
1311 memcpy (valbuf, buf + 1, 1);
1315 memcpy (valbuf, buf, 2);
1319 memcpy ((char*) valbuf + 1, buf, 2);
1320 regcache_raw_read (regcache, HARD_X_REGNUM, buf);
1321 memcpy (valbuf, buf + 1, 1);
1325 memcpy ((char*) valbuf + 2, buf, 2);
1326 regcache_raw_read (regcache, HARD_X_REGNUM, buf);
1327 memcpy (valbuf, buf, 2);
1331 error ("bad size for return value");
1335 enum return_value_convention
1336 m68hc11_return_value (struct gdbarch *gdbarch, struct type *valtype,
1337 struct regcache *regcache, void *readbuf,
1338 const void *writebuf)
1340 if (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
1341 || TYPE_CODE (valtype) == TYPE_CODE_UNION
1342 || TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1343 || TYPE_LENGTH (valtype) > 4)
1344 return RETURN_VALUE_STRUCT_CONVENTION;
1347 if (readbuf != NULL)
1348 m68hc11_extract_return_value (valtype, regcache, readbuf);
1349 if (writebuf != NULL)
1350 m68hc11_store_return_value (valtype, regcache, writebuf);
1351 return RETURN_VALUE_REGISTER_CONVENTION;
1355 /* Test whether the ELF symbol corresponds to a function using rtc or
1359 m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
1361 unsigned char flags;
1363 flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other;
1364 if (flags & STO_M68HC12_FAR)
1365 MSYMBOL_SET_RTC (msym);
1366 if (flags & STO_M68HC12_INTERRUPT)
1367 MSYMBOL_SET_RTI (msym);
1371 gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
1373 if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11)
1374 return print_insn_m68hc11 (memaddr, info);
1376 return print_insn_m68hc12 (memaddr, info);
1381 /* 68HC11/68HC12 register groups.
1382 Identify real hard registers and soft registers used by gcc. */
1384 static struct reggroup *m68hc11_soft_reggroup;
1385 static struct reggroup *m68hc11_hard_reggroup;
1388 m68hc11_init_reggroups (void)
1390 m68hc11_hard_reggroup = reggroup_new ("hard", USER_REGGROUP);
1391 m68hc11_soft_reggroup = reggroup_new ("soft", USER_REGGROUP);
1395 m68hc11_add_reggroups (struct gdbarch *gdbarch)
1397 reggroup_add (gdbarch, m68hc11_hard_reggroup);
1398 reggroup_add (gdbarch, m68hc11_soft_reggroup);
1399 reggroup_add (gdbarch, general_reggroup);
1400 reggroup_add (gdbarch, float_reggroup);
1401 reggroup_add (gdbarch, all_reggroup);
1402 reggroup_add (gdbarch, save_reggroup);
1403 reggroup_add (gdbarch, restore_reggroup);
1404 reggroup_add (gdbarch, vector_reggroup);
1405 reggroup_add (gdbarch, system_reggroup);
1409 m68hc11_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1410 struct reggroup *group)
1412 /* We must save the real hard register as well as gcc
1413 soft registers including the frame pointer. */
1414 if (group == save_reggroup || group == restore_reggroup)
1416 return (regnum <= gdbarch_num_regs (gdbarch)
1417 || ((regnum == SOFT_FP_REGNUM
1418 || regnum == SOFT_TMP_REGNUM
1419 || regnum == SOFT_ZS_REGNUM
1420 || regnum == SOFT_XY_REGNUM)
1421 && m68hc11_register_name (regnum)));
1424 /* Group to identify gcc soft registers (d1..dN). */
1425 if (group == m68hc11_soft_reggroup)
1427 return regnum >= SOFT_D1_REGNUM && m68hc11_register_name (regnum);
1430 if (group == m68hc11_hard_reggroup)
1432 return regnum == HARD_PC_REGNUM || regnum == HARD_SP_REGNUM
1433 || regnum == HARD_X_REGNUM || regnum == HARD_D_REGNUM
1434 || regnum == HARD_Y_REGNUM || regnum == HARD_CCR_REGNUM;
1436 return default_register_reggroup_p (gdbarch, regnum, group);
1439 static struct gdbarch *
1440 m68hc11_gdbarch_init (struct gdbarch_info info,
1441 struct gdbarch_list *arches)
1443 struct gdbarch *gdbarch;
1444 struct gdbarch_tdep *tdep;
1447 soft_reg_initialized = 0;
1449 /* Extract the elf_flags if available. */
1450 if (info.abfd != NULL
1451 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1452 elf_flags = elf_elfheader (info.abfd)->e_flags;
1456 /* try to find a pre-existing architecture */
1457 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1459 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1461 if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
1464 return arches->gdbarch;
1467 /* Need a new architecture. Fill in a target specific vector. */
1468 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1469 gdbarch = gdbarch_alloc (&info, tdep);
1470 tdep->elf_flags = elf_flags;
1472 switch (info.bfd_arch_info->arch)
1474 case bfd_arch_m68hc11:
1475 tdep->stack_correction = 1;
1476 tdep->use_page_register = 0;
1477 tdep->prologue = m6811_prologue;
1478 set_gdbarch_addr_bit (gdbarch, 16);
1479 set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
1480 set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
1481 set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
1484 case bfd_arch_m68hc12:
1485 tdep->stack_correction = 0;
1486 tdep->use_page_register = elf_flags & E_M68HC12_BANKS;
1487 tdep->prologue = m6812_prologue;
1488 set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16);
1489 set_gdbarch_num_pseudo_regs (gdbarch,
1490 elf_flags & E_M68HC12_BANKS
1491 ? M68HC12_NUM_PSEUDO_REGS
1492 : M68HC11_NUM_PSEUDO_REGS);
1493 set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS
1494 ? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM);
1495 set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS
1496 ? M68HC12_NUM_REGS : M68HC11_NUM_REGS);
1503 /* Initially set everything according to the ABI.
1504 Use 16-bit integers since it will be the case for most
1505 programs. The size of these types should normally be set
1506 according to the dwarf2 debug information. */
1507 set_gdbarch_short_bit (gdbarch, 16);
1508 set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16);
1509 set_gdbarch_float_bit (gdbarch, 32);
1510 set_gdbarch_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32);
1511 set_gdbarch_long_double_bit (gdbarch, 64);
1512 set_gdbarch_long_bit (gdbarch, 32);
1513 set_gdbarch_ptr_bit (gdbarch, 16);
1514 set_gdbarch_long_long_bit (gdbarch, 64);
1516 /* Characters are unsigned. */
1517 set_gdbarch_char_signed (gdbarch, 0);
1519 set_gdbarch_unwind_pc (gdbarch, m68hc11_unwind_pc);
1520 set_gdbarch_unwind_sp (gdbarch, m68hc11_unwind_sp);
1522 /* Set register info. */
1523 set_gdbarch_fp0_regnum (gdbarch, -1);
1525 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
1527 set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
1528 set_gdbarch_register_name (gdbarch, m68hc11_register_name);
1529 set_gdbarch_register_type (gdbarch, m68hc11_register_type);
1530 set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read);
1531 set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write);
1533 set_gdbarch_push_dummy_call (gdbarch, m68hc11_push_dummy_call);
1535 set_gdbarch_return_value (gdbarch, m68hc11_return_value);
1536 set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
1537 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1538 set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
1539 set_gdbarch_deprecated_stack_align (gdbarch, m68hc11_stack_align);
1540 set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11);
1542 m68hc11_add_reggroups (gdbarch);
1543 set_gdbarch_register_reggroup_p (gdbarch, m68hc11_register_reggroup_p);
1544 set_gdbarch_print_registers_info (gdbarch, m68hc11_print_registers_info);
1546 /* Hook in the DWARF CFI frame unwinder. */
1547 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1549 frame_unwind_append_sniffer (gdbarch, m68hc11_frame_sniffer);
1550 frame_base_set_default (gdbarch, &m68hc11_frame_base);
1552 /* Methods for saving / extracting a dummy frame's ID. The ID's
1553 stack address must match the SP value returned by
1554 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
1555 set_gdbarch_unwind_dummy_id (gdbarch, m68hc11_unwind_dummy_id);
1557 /* Return the unwound PC value. */
1558 set_gdbarch_unwind_pc (gdbarch, m68hc11_unwind_pc);
1560 /* Minsymbol frobbing. */
1561 set_gdbarch_elf_make_msymbol_special (gdbarch,
1562 m68hc11_elf_make_msymbol_special);
1564 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1569 extern initialize_file_ftype _initialize_m68hc11_tdep; /* -Wmissing-prototypes */
1572 _initialize_m68hc11_tdep (void)
1574 register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init);
1575 register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init);
1576 m68hc11_init_reggroups ();
1578 deprecate_cmd (add_com ("regs", class_vars, show_regs,
1579 "Print all registers"),