1 /* Target-dependent code for Renesas M32R, for GDB.
3 Copyright (C) 1996-2016 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "frame-unwind.h"
23 #include "frame-base.h"
34 #include "arch-utils.h"
36 #include "trad-frame.h"
39 #include "m32r-tdep.h"
44 extern void _initialize_m32r_tdep (void);
47 m32r_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
49 /* Align to the size of an instruction (so that they can safely be
50 pushed onto the stack. */
57 The little endian mode of M32R is unique. In most of architectures,
58 two 16-bit instructions, A and B, are placed as the following:
66 In M32R, they are placed like this:
74 This is because M32R always fetches instructions in 32-bit.
76 The following functions take care of this behavior. */
79 m32r_memory_insert_breakpoint (struct gdbarch *gdbarch,
80 struct bp_target_info *bp_tgt)
82 CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
85 gdb_byte contents_cache[4];
86 gdb_byte bp_entry[] = { 0x10, 0xf1 }; /* dpt */
88 /* Save the memory contents. */
89 val = target_read_memory (addr & 0xfffffffc, contents_cache, 4);
91 return val; /* return error */
93 memcpy (bp_tgt->shadow_contents, contents_cache, 4);
94 bp_tgt->placed_size = bp_tgt->shadow_len = 4;
96 /* Determine appropriate breakpoint contents and size for this address. */
97 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
101 buf[0] = bp_entry[0];
102 buf[1] = bp_entry[1];
103 buf[2] = contents_cache[2] & 0x7f;
104 buf[3] = contents_cache[3];
108 buf[0] = contents_cache[0];
109 buf[1] = contents_cache[1];
110 buf[2] = bp_entry[0];
111 buf[3] = bp_entry[1];
114 else /* little-endian */
118 buf[0] = contents_cache[0];
119 buf[1] = contents_cache[1] & 0x7f;
120 buf[2] = bp_entry[1];
121 buf[3] = bp_entry[0];
125 buf[0] = bp_entry[1];
126 buf[1] = bp_entry[0];
127 buf[2] = contents_cache[2];
128 buf[3] = contents_cache[3];
132 /* Write the breakpoint. */
133 val = target_write_memory (addr & 0xfffffffc, buf, 4);
138 m32r_memory_remove_breakpoint (struct gdbarch *gdbarch,
139 struct bp_target_info *bp_tgt)
141 CORE_ADDR addr = bp_tgt->placed_address;
144 gdb_byte *contents_cache = bp_tgt->shadow_contents;
146 buf[0] = contents_cache[0];
147 buf[1] = contents_cache[1];
148 buf[2] = contents_cache[2];
149 buf[3] = contents_cache[3];
151 /* Remove parallel bit. */
152 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
154 if ((buf[0] & 0x80) == 0 && (buf[2] & 0x80) != 0)
157 else /* little-endian */
159 if ((buf[3] & 0x80) == 0 && (buf[1] & 0x80) != 0)
163 /* Write contents. */
164 val = target_write_raw_memory (addr & 0xfffffffc, buf, 4);
169 m32r_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
171 if ((*pcptr & 3) == 0)
177 static const gdb_byte *
178 m32r_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
180 static gdb_byte be_bp_entry[] = {
181 0x10, 0xf1, 0x70, 0x00
183 static gdb_byte le_bp_entry[] = {
184 0x00, 0x70, 0xf1, 0x10
189 /* Determine appropriate breakpoint. */
190 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
197 return le_bp_entry + 2;
201 GDBARCH_BREAKPOINT_FROM_PC (m32r)
203 char *m32r_register_names[] = {
204 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
205 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp",
206 "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch",
211 m32r_register_name (struct gdbarch *gdbarch, int reg_nr)
215 if (reg_nr >= M32R_NUM_REGS)
217 return m32r_register_names[reg_nr];
221 /* Return the GDB type object for the "standard" data type
222 of data in register N. */
225 m32r_register_type (struct gdbarch *gdbarch, int reg_nr)
227 if (reg_nr == M32R_PC_REGNUM)
228 return builtin_type (gdbarch)->builtin_func_ptr;
229 else if (reg_nr == M32R_SP_REGNUM || reg_nr == M32R_FP_REGNUM)
230 return builtin_type (gdbarch)->builtin_data_ptr;
232 return builtin_type (gdbarch)->builtin_int32;
236 /* Write into appropriate registers a function return value
237 of type TYPE, given in virtual format.
239 Things always get returned in RET1_REGNUM, RET2_REGNUM. */
242 m32r_store_return_value (struct type *type, struct regcache *regcache,
243 const gdb_byte *valbuf)
245 struct gdbarch *gdbarch = get_regcache_arch (regcache);
246 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
248 int len = TYPE_LENGTH (type);
250 regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len, byte_order);
251 regcache_cooked_write_unsigned (regcache, RET1_REGNUM, regval);
255 regval = extract_unsigned_integer (valbuf + 4,
256 len - 4, byte_order);
257 regcache_cooked_write_unsigned (regcache, RET1_REGNUM + 1, regval);
261 /* This is required by skip_prologue. The results of decoding a prologue
262 should be cached because this thrashing is getting nuts. */
265 decode_prologue (struct gdbarch *gdbarch,
266 CORE_ADDR start_pc, CORE_ADDR scan_limit,
267 CORE_ADDR *pl_endptr, unsigned long *framelength)
269 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
270 unsigned long framesize;
273 CORE_ADDR after_prologue = 0;
274 CORE_ADDR after_push = 0;
275 CORE_ADDR after_stack_adjust = 0;
276 CORE_ADDR current_pc;
277 LONGEST return_value;
282 for (current_pc = start_pc; current_pc < scan_limit; current_pc += 2)
284 /* Check if current pc's location is readable. */
285 if (!safe_read_memory_integer (current_pc, 2, byte_order, &return_value))
288 insn = read_memory_unsigned_integer (current_pc, 2, byte_order);
293 /* If this is a 32 bit instruction, we dont want to examine its
294 immediate data as though it were an instruction. */
295 if (current_pc & 0x02)
297 /* Decode this instruction further. */
304 if (current_pc == scan_limit)
305 scan_limit += 2; /* extend the search */
307 current_pc += 2; /* skip the immediate data */
309 /* Check if current pc's location is readable. */
310 if (!safe_read_memory_integer (current_pc, 2, byte_order,
314 if (insn == 0x8faf) /* add3 sp, sp, xxxx */
315 /* add 16 bit sign-extended offset */
318 -((short) read_memory_unsigned_integer (current_pc,
323 if (((insn >> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */
324 && safe_read_memory_integer (current_pc + 2,
327 && read_memory_unsigned_integer (current_pc + 2,
331 /* Subtract 24 bit sign-extended negative-offset. */
332 insn = read_memory_unsigned_integer (current_pc - 2,
334 if (insn & 0x00800000) /* sign extend */
335 insn |= 0xff000000; /* negative */
337 insn &= 0x00ffffff; /* positive */
341 after_push = current_pc + 2;
345 op1 = insn & 0xf000; /* Isolate just the first nibble. */
347 if ((insn & 0xf0ff) == 0x207f)
353 if ((insn >> 8) == 0x4f) /* addi sp, xx */
354 /* Add 8 bit sign-extended offset. */
356 int stack_adjust = (signed char) (insn & 0xff);
358 /* there are probably two of these stack adjustments:
359 1) A negative one in the prologue, and
360 2) A positive one in the epilogue.
361 We are only interested in the first one. */
363 if (stack_adjust < 0)
365 framesize -= stack_adjust;
367 /* A frameless function may have no "mv fp, sp".
368 In that case, this is the end of the prologue. */
369 after_stack_adjust = current_pc + 2;
375 after_prologue = current_pc + 2;
376 break; /* end of stack adjustments */
379 /* Nop looks like a branch, continue explicitly. */
382 after_prologue = current_pc + 2;
383 continue; /* nop occurs between pushes. */
385 /* End of prolog if any of these are trap instructions. */
386 if ((insn & 0xfff0) == 0x10f0)
388 after_prologue = current_pc;
391 /* End of prolog if any of these are branch instructions. */
392 if ((op1 == 0x7000) || (op1 == 0xb000) || (op1 == 0xf000))
394 after_prologue = current_pc;
397 /* Some of the branch instructions are mixed with other types. */
400 int subop = insn & 0x0ff0;
401 if ((subop == 0x0ec0) || (subop == 0x0fc0))
403 after_prologue = current_pc;
404 continue; /* jmp , jl */
410 *framelength = framesize;
412 if (current_pc >= scan_limit)
416 if (after_stack_adjust != 0)
417 /* We did not find a "mv fp,sp", but we DID find
418 a stack_adjust. Is it safe to use that as the
419 end of the prologue? I just don't know. */
421 *pl_endptr = after_stack_adjust;
423 else if (after_push != 0)
424 /* We did not find a "mv fp,sp", but we DID find
425 a push. Is it safe to use that as the
426 end of the prologue? I just don't know. */
428 *pl_endptr = after_push;
431 /* We reached the end of the loop without finding the end
432 of the prologue. No way to win -- we should report
433 failure. The way we do that is to return the original
434 start_pc. GDB will set a breakpoint at the start of
435 the function (etc.) */
436 *pl_endptr = start_pc;
441 if (after_prologue == 0)
442 after_prologue = current_pc;
445 *pl_endptr = after_prologue;
448 } /* decode_prologue */
450 /* Function: skip_prologue
451 Find end of function prologue. */
453 #define DEFAULT_SEARCH_LIMIT 128
456 m32r_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
458 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
459 CORE_ADDR func_addr, func_end;
460 struct symtab_and_line sal;
461 LONGEST return_value;
463 /* See what the symbol table says. */
465 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
467 sal = find_pc_line (func_addr, 0);
469 if (sal.line != 0 && sal.end <= func_end)
474 /* Either there's no line info, or the line after the prologue is after
475 the end of the function. In this case, there probably isn't a
478 func_end = std::min (func_end, func_addr + DEFAULT_SEARCH_LIMIT);
482 func_end = pc + DEFAULT_SEARCH_LIMIT;
484 /* If pc's location is not readable, just quit. */
485 if (!safe_read_memory_integer (pc, 4, byte_order, &return_value))
488 /* Find the end of prologue. */
489 if (decode_prologue (gdbarch, pc, func_end, &sal.end, NULL) < 0)
495 struct m32r_unwind_cache
497 /* The previous frame's inner most stack address. Used as this
498 frame ID's stack_addr. */
500 /* The frame's base, optionally used by the high-level debug info. */
503 /* How far the SP and r13 (FP) have been offset from the start of
504 the stack frame (as defined by the previous frame's stack
509 /* Table indicating the location of each and every register. */
510 struct trad_frame_saved_reg *saved_regs;
513 /* Put here the code to store, into fi->saved_regs, the addresses of
514 the saved registers of frame described by FRAME_INFO. This
515 includes special registers such as pc and fp saved in special ways
516 in the stack frame. sp is even more special: the address we return
517 for it IS the sp for the next frame. */
519 static struct m32r_unwind_cache *
520 m32r_frame_unwind_cache (struct frame_info *this_frame,
521 void **this_prologue_cache)
523 CORE_ADDR pc, scan_limit;
528 struct m32r_unwind_cache *info;
531 if ((*this_prologue_cache))
532 return (struct m32r_unwind_cache *) (*this_prologue_cache);
534 info = FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache);
535 (*this_prologue_cache) = info;
536 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
540 info->uses_frame = 0;
542 scan_limit = get_frame_pc (this_frame);
543 for (pc = get_frame_func (this_frame);
544 pc > 0 && pc < scan_limit; pc += 2)
548 op = get_frame_memory_unsigned (this_frame, pc, 4);
549 if ((op & 0x80000000) == 0x80000000)
551 /* 32-bit instruction */
552 if ((op & 0xffff0000) == 0x8faf0000)
554 /* add3 sp,sp,xxxx */
555 short n = op & 0xffff;
556 info->sp_offset += n;
558 else if (((op >> 8) == 0xe4)
559 && get_frame_memory_unsigned (this_frame, pc + 2,
562 /* ld24 r4, xxxxxx; sub sp, r4 */
563 unsigned long n = op & 0xffffff;
564 info->sp_offset += n;
565 pc += 2; /* skip sub instruction */
568 if (pc == scan_limit)
569 scan_limit += 2; /* extend the search */
570 pc += 2; /* skip the immediate data */
575 /* 16-bit instructions */
576 op = get_frame_memory_unsigned (this_frame, pc, 2) & 0x7fff;
577 if ((op & 0xf0ff) == 0x207f)
580 int regno = ((op >> 8) & 0xf);
581 info->sp_offset -= 4;
582 info->saved_regs[regno].addr = info->sp_offset;
584 else if ((op & 0xff00) == 0x4f00)
587 int n = (signed char) (op & 0xff);
588 info->sp_offset += n;
590 else if (op == 0x1d8f)
593 info->uses_frame = 1;
594 info->r13_offset = info->sp_offset;
595 break; /* end of stack adjustments */
597 else if ((op & 0xfff0) == 0x10f0)
599 /* End of prologue if this is a trap instruction. */
600 break; /* End of stack adjustments. */
604 info->size = -info->sp_offset;
606 /* Compute the previous frame's stack pointer (which is also the
607 frame's ID's stack address), and this frame's base pointer. */
608 if (info->uses_frame)
610 /* The SP was moved to the FP. This indicates that a new frame
611 was created. Get THIS frame's FP value by unwinding it from
613 this_base = get_frame_register_unsigned (this_frame, M32R_FP_REGNUM);
614 /* The FP points at the last saved register. Adjust the FP back
615 to before the first saved register giving the SP. */
616 prev_sp = this_base + info->size;
620 /* Assume that the FP is this frame's SP but with that pushed
621 stack space added back. */
622 this_base = get_frame_register_unsigned (this_frame, M32R_SP_REGNUM);
623 prev_sp = this_base + info->size;
626 /* Convert that SP/BASE into real addresses. */
627 info->prev_sp = prev_sp;
628 info->base = this_base;
630 /* Adjust all the saved registers so that they contain addresses and
632 for (i = 0; i < gdbarch_num_regs (get_frame_arch (this_frame)) - 1; i++)
633 if (trad_frame_addr_p (info->saved_regs, i))
634 info->saved_regs[i].addr = (info->prev_sp + info->saved_regs[i].addr);
636 /* The call instruction moves the caller's PC in the callee's LR.
637 Since this is an unwind, do the reverse. Copy the location of LR
638 into PC (the address / regnum) so that a request for PC will be
639 converted into a request for the LR. */
640 info->saved_regs[M32R_PC_REGNUM] = info->saved_regs[LR_REGNUM];
642 /* The previous frame's SP needed to be computed. Save the computed
644 trad_frame_set_value (info->saved_regs, M32R_SP_REGNUM, prev_sp);
650 m32r_read_pc (struct regcache *regcache)
653 regcache_cooked_read_unsigned (regcache, M32R_PC_REGNUM, &pc);
658 m32r_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
660 return frame_unwind_register_unsigned (next_frame, M32R_SP_REGNUM);
665 m32r_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
666 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
667 struct value **args, CORE_ADDR sp, int struct_return,
668 CORE_ADDR struct_addr)
670 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
671 int stack_offset, stack_alloc;
672 int argreg = ARG1_REGNUM;
675 enum type_code typecode;
678 gdb_byte valbuf[MAX_REGISTER_SIZE];
681 /* First force sp to a 4-byte alignment. */
684 /* Set the return address. For the m32r, the return breakpoint is
685 always at BP_ADDR. */
686 regcache_cooked_write_unsigned (regcache, LR_REGNUM, bp_addr);
688 /* If STRUCT_RETURN is true, then the struct return address (in
689 STRUCT_ADDR) will consume the first argument-passing register.
690 Both adjust the register count and store that value. */
693 regcache_cooked_write_unsigned (regcache, argreg, struct_addr);
697 /* Now make sure there's space on the stack. */
698 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
699 stack_alloc += ((TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3);
700 sp -= stack_alloc; /* Make room on stack for args. */
702 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
704 type = value_type (args[argnum]);
705 typecode = TYPE_CODE (type);
706 len = TYPE_LENGTH (type);
708 memset (valbuf, 0, sizeof (valbuf));
710 /* Passes structures that do not fit in 2 registers by reference. */
712 && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION))
714 store_unsigned_integer (valbuf, 4, byte_order,
715 value_address (args[argnum]));
716 typecode = TYPE_CODE_PTR;
722 /* Value gets right-justified in the register or stack word. */
723 memcpy (valbuf + (register_size (gdbarch, argreg) - len),
724 (gdb_byte *) value_contents (args[argnum]), len);
728 val = (gdb_byte *) value_contents (args[argnum]);
732 if (argreg > ARGN_REGNUM)
734 /* Must go on the stack. */
735 write_memory (sp + stack_offset, val, 4);
738 else if (argreg <= ARGN_REGNUM)
740 /* There's room in a register. */
742 extract_unsigned_integer (val,
743 register_size (gdbarch, argreg),
745 regcache_cooked_write_unsigned (regcache, argreg++, regval);
748 /* Store the value 4 bytes at a time. This means that things
749 larger than 4 bytes may go partly in registers and partly
751 len -= register_size (gdbarch, argreg);
752 val += register_size (gdbarch, argreg);
756 /* Finally, update the SP register. */
757 regcache_cooked_write_unsigned (regcache, M32R_SP_REGNUM, sp);
763 /* Given a return value in `regbuf' with a type `valtype',
764 extract and copy its value into `valbuf'. */
767 m32r_extract_return_value (struct type *type, struct regcache *regcache,
770 struct gdbarch *gdbarch = get_regcache_arch (regcache);
771 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
772 int len = TYPE_LENGTH (type);
775 /* By using store_unsigned_integer we avoid having to do
776 anything special for small big-endian values. */
777 regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &tmp);
778 store_unsigned_integer (dst, (len > 4 ? len - 4 : len), byte_order, tmp);
780 /* Ignore return values more than 8 bytes in size because the m32r
781 returns anything more than 8 bytes in the stack. */
784 regcache_cooked_read_unsigned (regcache, RET1_REGNUM + 1, &tmp);
785 store_unsigned_integer (dst + len - 4, 4, byte_order, tmp);
789 static enum return_value_convention
790 m32r_return_value (struct gdbarch *gdbarch, struct value *function,
791 struct type *valtype, struct regcache *regcache,
792 gdb_byte *readbuf, const gdb_byte *writebuf)
794 if (TYPE_LENGTH (valtype) > 8)
795 return RETURN_VALUE_STRUCT_CONVENTION;
799 m32r_extract_return_value (valtype, regcache, readbuf);
800 if (writebuf != NULL)
801 m32r_store_return_value (valtype, regcache, writebuf);
802 return RETURN_VALUE_REGISTER_CONVENTION;
809 m32r_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
811 return frame_unwind_register_unsigned (next_frame, M32R_PC_REGNUM);
814 /* Given a GDB frame, determine the address of the calling function's
815 frame. This will be used to create a new GDB frame struct. */
818 m32r_frame_this_id (struct frame_info *this_frame,
819 void **this_prologue_cache, struct frame_id *this_id)
821 struct m32r_unwind_cache *info
822 = m32r_frame_unwind_cache (this_frame, this_prologue_cache);
825 struct bound_minimal_symbol msym_stack;
828 /* The FUNC is easy. */
829 func = get_frame_func (this_frame);
831 /* Check if the stack is empty. */
832 msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL);
833 if (msym_stack.minsym && info->base == BMSYMBOL_VALUE_ADDRESS (msym_stack))
836 /* Hopefully the prologue analysis either correctly determined the
837 frame's base (which is the SP from the previous frame), or set
838 that base to "NULL". */
839 base = info->prev_sp;
843 id = frame_id_build (base, func);
847 static struct value *
848 m32r_frame_prev_register (struct frame_info *this_frame,
849 void **this_prologue_cache, int regnum)
851 struct m32r_unwind_cache *info
852 = m32r_frame_unwind_cache (this_frame, this_prologue_cache);
853 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
856 static const struct frame_unwind m32r_frame_unwind = {
858 default_frame_unwind_stop_reason,
860 m32r_frame_prev_register,
862 default_frame_sniffer
866 m32r_frame_base_address (struct frame_info *this_frame, void **this_cache)
868 struct m32r_unwind_cache *info
869 = m32r_frame_unwind_cache (this_frame, this_cache);
873 static const struct frame_base m32r_frame_base = {
875 m32r_frame_base_address,
876 m32r_frame_base_address,
877 m32r_frame_base_address
880 /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
881 frame. The frame ID's base needs to match the TOS value saved by
882 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
884 static struct frame_id
885 m32r_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
887 CORE_ADDR sp = get_frame_register_unsigned (this_frame, M32R_SP_REGNUM);
888 return frame_id_build (sp, get_frame_pc (this_frame));
892 static gdbarch_init_ftype m32r_gdbarch_init;
894 static struct gdbarch *
895 m32r_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
897 struct gdbarch *gdbarch;
898 struct gdbarch_tdep *tdep;
900 /* If there is already a candidate, use it. */
901 arches = gdbarch_list_lookup_by_info (arches, &info);
903 return arches->gdbarch;
905 /* Allocate space for the new architecture. */
906 tdep = XNEW (struct gdbarch_tdep);
907 gdbarch = gdbarch_alloc (&info, tdep);
909 set_gdbarch_read_pc (gdbarch, m32r_read_pc);
910 set_gdbarch_unwind_sp (gdbarch, m32r_unwind_sp);
912 set_gdbarch_num_regs (gdbarch, M32R_NUM_REGS);
913 set_gdbarch_pc_regnum (gdbarch, M32R_PC_REGNUM);
914 set_gdbarch_sp_regnum (gdbarch, M32R_SP_REGNUM);
915 set_gdbarch_register_name (gdbarch, m32r_register_name);
916 set_gdbarch_register_type (gdbarch, m32r_register_type);
918 set_gdbarch_push_dummy_call (gdbarch, m32r_push_dummy_call);
919 set_gdbarch_return_value (gdbarch, m32r_return_value);
921 set_gdbarch_skip_prologue (gdbarch, m32r_skip_prologue);
922 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
923 SET_GDBARCH_BREAKPOINT_MANIPULATION (m32r);
924 set_gdbarch_memory_insert_breakpoint (gdbarch,
925 m32r_memory_insert_breakpoint);
926 set_gdbarch_memory_remove_breakpoint (gdbarch,
927 m32r_memory_remove_breakpoint);
929 set_gdbarch_frame_align (gdbarch, m32r_frame_align);
931 frame_base_set_default (gdbarch, &m32r_frame_base);
933 /* Methods for saving / extracting a dummy frame's ID. The ID's
934 stack address must match the SP value returned by
935 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
936 set_gdbarch_dummy_id (gdbarch, m32r_dummy_id);
938 /* Return the unwound PC value. */
939 set_gdbarch_unwind_pc (gdbarch, m32r_unwind_pc);
941 set_gdbarch_print_insn (gdbarch, print_insn_m32r);
943 /* Hook in ABI-specific overrides, if they have been registered. */
944 gdbarch_init_osabi (info, gdbarch);
946 /* Hook in the default unwinders. */
947 frame_unwind_append_unwinder (gdbarch, &m32r_frame_unwind);
949 /* Support simple overlay manager. */
950 set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
956 _initialize_m32r_tdep (void)
958 register_gdbarch_init (bfd_arch_m32r, m32r_gdbarch_init);