1 /* Target-dependent code for Renesas M32R, for GDB.
3 Copyright 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
25 #include "frame-unwind.h"
26 #include "frame-base.h"
31 #include "gdb_string.h"
37 #include "arch-utils.h"
39 #include "trad-frame.h"
42 #include "gdb_assert.h"
44 #include "m32r-tdep.h"
48 extern void _initialize_m32r_tdep (void);
51 m32r_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
53 /* Align to the size of an instruction (so that they can safely be
54 pushed onto the stack. */
61 The little endian mode of M32R is unique. In most of architectures,
62 two 16-bit instructions, A and B, are placed as the following:
70 In M32R, they are placed like this:
78 This is because M32R always fetches instructions in 32-bit.
80 The following functions take care of this behavior. */
83 m32r_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
87 char bp_entry[] = { 0x10, 0xf1 }; /* dpt */
89 /* Save the memory contents. */
90 val = target_read_memory (addr & 0xfffffffc, contents_cache, 4);
92 return val; /* return error */
94 /* Determine appropriate breakpoint contents and size for this address. */
95 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
100 buf[1] = bp_entry[1];
101 buf[2] = contents_cache[2] & 0x7f;
102 buf[3] = contents_cache[3];
106 buf[0] = contents_cache[0];
107 buf[1] = contents_cache[1];
108 buf[2] = bp_entry[0];
109 buf[3] = bp_entry[1];
112 else /* little-endian */
116 buf[0] = contents_cache[0];
117 buf[1] = contents_cache[1] & 0x7f;
118 buf[2] = bp_entry[1];
119 buf[3] = bp_entry[0];
123 buf[0] = bp_entry[1];
124 buf[1] = bp_entry[0];
125 buf[2] = contents_cache[2];
126 buf[3] = contents_cache[3];
130 /* Write the breakpoint. */
131 val = target_write_memory (addr & 0xfffffffc, buf, 4);
136 m32r_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
141 buf[0] = contents_cache[0];
142 buf[1] = contents_cache[1];
143 buf[2] = contents_cache[2];
144 buf[3] = contents_cache[3];
146 /* Remove parallel bit. */
147 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
149 if ((buf[0] & 0x80) == 0 && (buf[2] & 0x80) != 0)
152 else /* little-endian */
154 if ((buf[3] & 0x80) == 0 && (buf[1] & 0x80) != 0)
158 /* Write contents. */
159 val = target_write_memory (addr & 0xfffffffc, buf, 4);
163 static const unsigned char *
164 m32r_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
166 static char be_bp_entry[] = { 0x10, 0xf1, 0x70, 0x00 }; /* dpt -> nop */
167 static char le_bp_entry[] = { 0x00, 0x70, 0xf1, 0x10 }; /* dpt -> nop */
170 /* Determine appropriate breakpoint. */
171 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
173 if ((*pcptr & 3) == 0)
186 if ((*pcptr & 3) == 0)
193 bp = le_bp_entry + 2;
202 char *m32r_register_names[] = {
203 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
204 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp",
205 "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch",
210 m32r_register_name (int reg_nr)
214 if (reg_nr >= M32R_NUM_REGS)
216 return m32r_register_names[reg_nr];
220 /* Return the GDB type object for the "standard" data type
221 of data in register N. */
224 m32r_register_type (struct gdbarch *gdbarch, int reg_nr)
226 if (reg_nr == M32R_PC_REGNUM)
227 return builtin_type_void_func_ptr;
228 else if (reg_nr == M32R_SP_REGNUM || reg_nr == M32R_FP_REGNUM)
229 return builtin_type_void_data_ptr;
231 return builtin_type_int32;
235 /* Write into appropriate registers a function return value
236 of type TYPE, given in virtual format.
238 Things always get returned in RET1_REGNUM, RET2_REGNUM. */
241 m32r_store_return_value (struct type *type, struct regcache *regcache,
245 int len = TYPE_LENGTH (type);
247 regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len);
248 regcache_cooked_write_unsigned (regcache, RET1_REGNUM, regval);
252 regval = extract_unsigned_integer ((char *) valbuf + 4, len - 4);
253 regcache_cooked_write_unsigned (regcache, RET1_REGNUM + 1, regval);
257 /* This is required by skip_prologue. The results of decoding a prologue
258 should be cached because this thrashing is getting nuts. */
261 decode_prologue (CORE_ADDR start_pc, CORE_ADDR scan_limit,
262 CORE_ADDR *pl_endptr, unsigned long *framelength)
264 unsigned long framesize;
267 CORE_ADDR after_prologue = 0;
268 CORE_ADDR after_push = 0;
269 CORE_ADDR after_stack_adjust = 0;
270 CORE_ADDR current_pc;
271 LONGEST return_value;
276 for (current_pc = start_pc; current_pc < scan_limit; current_pc += 2)
278 /* Check if current pc's location is readable. */
279 if (!safe_read_memory_integer (current_pc, 2, &return_value))
282 insn = read_memory_unsigned_integer (current_pc, 2);
287 /* If this is a 32 bit instruction, we dont want to examine its
288 immediate data as though it were an instruction */
289 if (current_pc & 0x02)
291 /* decode this instruction further */
298 if (current_pc == scan_limit)
299 scan_limit += 2; /* extend the search */
301 current_pc += 2; /* skip the immediate data */
303 /* Check if current pc's location is readable. */
304 if (!safe_read_memory_integer (current_pc, 2, &return_value))
307 if (insn == 0x8faf) /* add3 sp, sp, xxxx */
308 /* add 16 bit sign-extended offset */
311 -((short) read_memory_unsigned_integer (current_pc, 2));
315 if (((insn >> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */
316 && safe_read_memory_integer (current_pc + 2, 2,
318 && read_memory_unsigned_integer (current_pc + 2,
320 /* subtract 24 bit sign-extended negative-offset */
322 insn = read_memory_unsigned_integer (current_pc - 2, 4);
323 if (insn & 0x00800000) /* sign extend */
324 insn |= 0xff000000; /* negative */
326 insn &= 0x00ffffff; /* positive */
330 after_push = current_pc + 2;
334 op1 = insn & 0xf000; /* isolate just the first nibble */
336 if ((insn & 0xf0ff) == 0x207f)
340 regno = ((insn >> 8) & 0xf);
344 if ((insn >> 8) == 0x4f) /* addi sp, xx */
345 /* add 8 bit sign-extended offset */
347 int stack_adjust = (char) (insn & 0xff);
349 /* there are probably two of these stack adjustments:
350 1) A negative one in the prologue, and
351 2) A positive one in the epilogue.
352 We are only interested in the first one. */
354 if (stack_adjust < 0)
356 framesize -= stack_adjust;
358 /* A frameless function may have no "mv fp, sp".
359 In that case, this is the end of the prologue. */
360 after_stack_adjust = current_pc + 2;
366 after_prologue = current_pc + 2;
367 break; /* end of stack adjustments */
370 /* Nop looks like a branch, continue explicitly */
373 after_prologue = current_pc + 2;
374 continue; /* nop occurs between pushes */
376 /* End of prolog if any of these are trap instructions */
377 if ((insn & 0xfff0) == 0x10f0)
379 after_prologue = current_pc;
382 /* End of prolog if any of these are branch instructions */
383 if ((op1 == 0x7000) || (op1 == 0xb000) || (op1 == 0xf000))
385 after_prologue = current_pc;
388 /* Some of the branch instructions are mixed with other types */
391 int subop = insn & 0x0ff0;
392 if ((subop == 0x0ec0) || (subop == 0x0fc0))
394 after_prologue = current_pc;
395 continue; /* jmp , jl */
401 *framelength = framesize;
403 if (current_pc >= scan_limit)
407 if (after_stack_adjust != 0)
408 /* We did not find a "mv fp,sp", but we DID find
409 a stack_adjust. Is it safe to use that as the
410 end of the prologue? I just don't know. */
412 *pl_endptr = after_stack_adjust;
414 else if (after_push != 0)
415 /* We did not find a "mv fp,sp", but we DID find
416 a push. Is it safe to use that as the
417 end of the prologue? I just don't know. */
419 *pl_endptr = after_push;
422 /* We reached the end of the loop without finding the end
423 of the prologue. No way to win -- we should report failure.
424 The way we do that is to return the original start_pc.
425 GDB will set a breakpoint at the start of the function (etc.) */
426 *pl_endptr = start_pc;
431 if (after_prologue == 0)
432 after_prologue = current_pc;
435 *pl_endptr = after_prologue;
438 } /* decode_prologue */
440 /* Function: skip_prologue
441 Find end of function prologue */
443 #define DEFAULT_SEARCH_LIMIT 128
446 m32r_skip_prologue (CORE_ADDR pc)
448 CORE_ADDR func_addr, func_end;
449 struct symtab_and_line sal;
450 LONGEST return_value;
452 /* See what the symbol table says */
454 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
456 sal = find_pc_line (func_addr, 0);
458 if (sal.line != 0 && sal.end <= func_end)
463 /* Either there's no line info, or the line after the prologue is after
464 the end of the function. In this case, there probably isn't a
467 func_end = min (func_end, func_addr + DEFAULT_SEARCH_LIMIT);
471 func_end = pc + DEFAULT_SEARCH_LIMIT;
473 /* If pc's location is not readable, just quit. */
474 if (!safe_read_memory_integer (pc, 4, &return_value))
477 /* Find the end of prologue. */
478 if (decode_prologue (pc, func_end, &sal.end, NULL) < 0)
484 struct m32r_unwind_cache
486 /* The previous frame's inner most stack address. Used as this
487 frame ID's stack_addr. */
489 /* The frame's base, optionally used by the high-level debug info. */
492 /* How far the SP and r13 (FP) have been offset from the start of
493 the stack frame (as defined by the previous frame's stack
498 /* Table indicating the location of each and every register. */
499 struct trad_frame_saved_reg *saved_regs;
502 /* Put here the code to store, into fi->saved_regs, the addresses of
503 the saved registers of frame described by FRAME_INFO. This
504 includes special registers such as pc and fp saved in special ways
505 in the stack frame. sp is even more special: the address we return
506 for it IS the sp for the next frame. */
508 static struct m32r_unwind_cache *
509 m32r_frame_unwind_cache (struct frame_info *next_frame,
510 void **this_prologue_cache)
512 CORE_ADDR pc, scan_limit;
515 unsigned long op, op2;
517 struct m32r_unwind_cache *info;
520 if ((*this_prologue_cache))
521 return (*this_prologue_cache);
523 info = FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache);
524 (*this_prologue_cache) = info;
525 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
529 info->uses_frame = 0;
531 scan_limit = frame_pc_unwind (next_frame);
532 for (pc = frame_func_unwind (next_frame);
533 pc > 0 && pc < scan_limit; pc += 2)
537 op = get_frame_memory_unsigned (next_frame, pc, 4);
538 if ((op & 0x80000000) == 0x80000000)
540 /* 32-bit instruction */
541 if ((op & 0xffff0000) == 0x8faf0000)
543 /* add3 sp,sp,xxxx */
544 short n = op & 0xffff;
545 info->sp_offset += n;
547 else if (((op >> 8) == 0xe4)
548 && get_frame_memory_unsigned (next_frame, pc + 2,
551 /* ld24 r4, xxxxxx; sub sp, r4 */
552 unsigned long n = op & 0xffffff;
553 info->sp_offset += n;
554 pc += 2; /* skip sub instruction */
557 if (pc == scan_limit)
558 scan_limit += 2; /* extend the search */
559 pc += 2; /* skip the immediate data */
564 /* 16-bit instructions */
565 op = get_frame_memory_unsigned (next_frame, pc, 2) & 0x7fff;
566 if ((op & 0xf0ff) == 0x207f)
569 int regno = ((op >> 8) & 0xf);
570 info->sp_offset -= 4;
571 info->saved_regs[regno].addr = info->sp_offset;
573 else if ((op & 0xff00) == 0x4f00)
576 int n = (char) (op & 0xff);
577 info->sp_offset += n;
579 else if (op == 0x1d8f)
582 info->uses_frame = 1;
583 info->r13_offset = info->sp_offset;
584 break; /* end of stack adjustments */
586 else if ((op & 0xfff0) == 0x10f0)
588 /* end of prologue if this is a trap instruction */
589 break; /* end of stack adjustments */
593 info->size = -info->sp_offset;
595 /* Compute the previous frame's stack pointer (which is also the
596 frame's ID's stack address), and this frame's base pointer. */
597 if (info->uses_frame)
599 /* The SP was moved to the FP. This indicates that a new frame
600 was created. Get THIS frame's FP value by unwinding it from
602 this_base = frame_unwind_register_unsigned (next_frame, M32R_FP_REGNUM);
603 /* The FP points at the last saved register. Adjust the FP back
604 to before the first saved register giving the SP. */
605 prev_sp = this_base + info->size;
609 /* Assume that the FP is this frame's SP but with that pushed
610 stack space added back. */
611 this_base = frame_unwind_register_unsigned (next_frame, M32R_SP_REGNUM);
612 prev_sp = this_base + info->size;
615 /* Convert that SP/BASE into real addresses. */
616 info->prev_sp = prev_sp;
617 info->base = this_base;
619 /* Adjust all the saved registers so that they contain addresses and
621 for (i = 0; i < NUM_REGS - 1; i++)
622 if (trad_frame_addr_p (info->saved_regs, i))
623 info->saved_regs[i].addr = (info->prev_sp + info->saved_regs[i].addr);
625 /* The call instruction moves the caller's PC in the callee's LR.
626 Since this is an unwind, do the reverse. Copy the location of LR
627 into PC (the address / regnum) so that a request for PC will be
628 converted into a request for the LR. */
629 info->saved_regs[M32R_PC_REGNUM] = info->saved_regs[LR_REGNUM];
631 /* The previous frame's SP needed to be computed. Save the computed
633 trad_frame_set_value (info->saved_regs, M32R_SP_REGNUM, prev_sp);
639 m32r_read_pc (ptid_t ptid)
644 save_ptid = inferior_ptid;
645 inferior_ptid = ptid;
646 regcache_cooked_read_unsigned (current_regcache, M32R_PC_REGNUM, &pc);
647 inferior_ptid = save_ptid;
652 m32r_write_pc (CORE_ADDR val, ptid_t ptid)
656 save_ptid = inferior_ptid;
657 inferior_ptid = ptid;
658 write_register (M32R_PC_REGNUM, val);
659 inferior_ptid = save_ptid;
663 m32r_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
665 return frame_unwind_register_unsigned (next_frame, M32R_SP_REGNUM);
670 m32r_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
671 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
672 struct value **args, CORE_ADDR sp, int struct_return,
673 CORE_ADDR struct_addr)
675 int stack_offset, stack_alloc;
676 int argreg = ARG1_REGNUM;
679 enum type_code typecode;
682 char valbuf[MAX_REGISTER_SIZE];
684 int odd_sized_struct;
686 /* first force sp to a 4-byte alignment */
689 /* Set the return address. For the m32r, the return breakpoint is
690 always at BP_ADDR. */
691 regcache_cooked_write_unsigned (regcache, LR_REGNUM, bp_addr);
693 /* If STRUCT_RETURN is true, then the struct return address (in
694 STRUCT_ADDR) will consume the first argument-passing register.
695 Both adjust the register count and store that value. */
698 regcache_cooked_write_unsigned (regcache, argreg, struct_addr);
702 /* Now make sure there's space on the stack */
703 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
704 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
705 sp -= stack_alloc; /* make room on stack for args */
707 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
709 type = VALUE_TYPE (args[argnum]);
710 typecode = TYPE_CODE (type);
711 len = TYPE_LENGTH (type);
713 memset (valbuf, 0, sizeof (valbuf));
715 /* Passes structures that do not fit in 2 registers by reference. */
717 && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION))
719 store_unsigned_integer (valbuf, 4, VALUE_ADDRESS (args[argnum]));
720 typecode = TYPE_CODE_PTR;
726 /* value gets right-justified in the register or stack word */
727 memcpy (valbuf + (register_size (gdbarch, argreg) - len),
728 (char *) VALUE_CONTENTS (args[argnum]), len);
732 val = (char *) VALUE_CONTENTS (args[argnum]);
736 if (argreg > ARGN_REGNUM)
738 /* must go on the stack */
739 write_memory (sp + stack_offset, val, 4);
742 else if (argreg <= ARGN_REGNUM)
744 /* there's room in a register */
746 extract_unsigned_integer (val,
747 register_size (gdbarch, argreg));
748 regcache_cooked_write_unsigned (regcache, argreg++, regval);
751 /* Store the value 4 bytes at a time. This means that things
752 larger than 4 bytes may go partly in registers and partly
754 len -= register_size (gdbarch, argreg);
755 val += register_size (gdbarch, argreg);
759 /* Finally, update the SP register. */
760 regcache_cooked_write_unsigned (regcache, M32R_SP_REGNUM, sp);
766 /* Given a return value in `regbuf' with a type `valtype',
767 extract and copy its value into `valbuf'. */
770 m32r_extract_return_value (struct type *type, struct regcache *regcache,
773 bfd_byte *valbuf = dst;
774 int len = TYPE_LENGTH (type);
777 /* By using store_unsigned_integer we avoid having to do
778 anything special for small big-endian values. */
779 regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &tmp);
780 store_unsigned_integer (valbuf, (len > 4 ? len - 4 : len), tmp);
782 /* Ignore return values more than 8 bytes in size because the m32r
783 returns anything more than 8 bytes in the stack. */
786 regcache_cooked_read_unsigned (regcache, RET1_REGNUM + 1, &tmp);
787 store_unsigned_integer (valbuf + len - 4, 4, tmp);
791 enum return_value_convention
792 m32r_return_value (struct gdbarch *gdbarch, struct type *valtype,
793 struct regcache *regcache, void *readbuf,
794 const void *writebuf)
796 if (TYPE_LENGTH (valtype) > 8)
797 return RETURN_VALUE_STRUCT_CONVENTION;
801 m32r_extract_return_value (valtype, regcache, readbuf);
802 if (writebuf != NULL)
803 m32r_store_return_value (valtype, regcache, writebuf);
804 return RETURN_VALUE_REGISTER_CONVENTION;
811 m32r_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
813 return frame_unwind_register_unsigned (next_frame, M32R_PC_REGNUM);
816 /* Given a GDB frame, determine the address of the calling function's
817 frame. This will be used to create a new GDB frame struct. */
820 m32r_frame_this_id (struct frame_info *next_frame,
821 void **this_prologue_cache, struct frame_id *this_id)
823 struct m32r_unwind_cache *info
824 = m32r_frame_unwind_cache (next_frame, this_prologue_cache);
827 struct minimal_symbol *msym_stack;
830 /* The FUNC is easy. */
831 func = frame_func_unwind (next_frame);
833 /* Check if the stack is empty. */
834 msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL);
835 if (msym_stack && info->base == SYMBOL_VALUE_ADDRESS (msym_stack))
838 /* Hopefully the prologue analysis either correctly determined the
839 frame's base (which is the SP from the previous frame), or set
840 that base to "NULL". */
841 base = info->prev_sp;
845 id = frame_id_build (base, func);
850 m32r_frame_prev_register (struct frame_info *next_frame,
851 void **this_prologue_cache,
852 int regnum, int *optimizedp,
853 enum lval_type *lvalp, CORE_ADDR *addrp,
854 int *realnump, void *bufferp)
856 struct m32r_unwind_cache *info
857 = m32r_frame_unwind_cache (next_frame, this_prologue_cache);
858 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
859 optimizedp, lvalp, addrp, realnump, bufferp);
862 static const struct frame_unwind m32r_frame_unwind = {
865 m32r_frame_prev_register
868 static const struct frame_unwind *
869 m32r_frame_sniffer (struct frame_info *next_frame)
871 return &m32r_frame_unwind;
875 m32r_frame_base_address (struct frame_info *next_frame, void **this_cache)
877 struct m32r_unwind_cache *info
878 = m32r_frame_unwind_cache (next_frame, this_cache);
882 static const struct frame_base m32r_frame_base = {
884 m32r_frame_base_address,
885 m32r_frame_base_address,
886 m32r_frame_base_address
889 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
890 dummy frame. The frame ID's base needs to match the TOS value
891 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
894 static struct frame_id
895 m32r_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
897 return frame_id_build (m32r_unwind_sp (gdbarch, next_frame),
898 frame_pc_unwind (next_frame));
902 static gdbarch_init_ftype m32r_gdbarch_init;
904 static struct gdbarch *
905 m32r_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
907 struct gdbarch *gdbarch;
908 struct gdbarch_tdep *tdep;
910 /* If there is already a candidate, use it. */
911 arches = gdbarch_list_lookup_by_info (arches, &info);
913 return arches->gdbarch;
915 /* Allocate space for the new architecture. */
916 tdep = XMALLOC (struct gdbarch_tdep);
917 gdbarch = gdbarch_alloc (&info, tdep);
919 set_gdbarch_read_pc (gdbarch, m32r_read_pc);
920 set_gdbarch_write_pc (gdbarch, m32r_write_pc);
921 set_gdbarch_unwind_sp (gdbarch, m32r_unwind_sp);
923 set_gdbarch_num_regs (gdbarch, M32R_NUM_REGS);
924 set_gdbarch_sp_regnum (gdbarch, M32R_SP_REGNUM);
925 set_gdbarch_register_name (gdbarch, m32r_register_name);
926 set_gdbarch_register_type (gdbarch, m32r_register_type);
928 set_gdbarch_push_dummy_call (gdbarch, m32r_push_dummy_call);
929 set_gdbarch_return_value (gdbarch, m32r_return_value);
931 set_gdbarch_skip_prologue (gdbarch, m32r_skip_prologue);
932 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
933 set_gdbarch_breakpoint_from_pc (gdbarch, m32r_breakpoint_from_pc);
934 set_gdbarch_memory_insert_breakpoint (gdbarch,
935 m32r_memory_insert_breakpoint);
936 set_gdbarch_memory_remove_breakpoint (gdbarch,
937 m32r_memory_remove_breakpoint);
939 set_gdbarch_frame_align (gdbarch, m32r_frame_align);
941 frame_unwind_append_sniffer (gdbarch, m32r_frame_sniffer);
942 frame_base_set_default (gdbarch, &m32r_frame_base);
944 /* Methods for saving / extracting a dummy frame's ID. The ID's
945 stack address must match the SP value returned by
946 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
947 set_gdbarch_unwind_dummy_id (gdbarch, m32r_unwind_dummy_id);
949 /* Return the unwound PC value. */
950 set_gdbarch_unwind_pc (gdbarch, m32r_unwind_pc);
952 set_gdbarch_print_insn (gdbarch, print_insn_m32r);
958 _initialize_m32r_tdep (void)
960 register_gdbarch_init (bfd_arch_m32r, m32r_gdbarch_init);