1 /* Target-dependent code for Renesas M32R, for GDB.
3 Copyright 1996, 1998, 1999, 2000, 2001, 2002, 2003 Free Software
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
25 #include "frame-unwind.h"
26 #include "frame-base.h"
31 #include "gdb_string.h"
37 #include "arch-utils.h"
39 #include "trad-frame.h"
42 #include "gdb_assert.h"
46 /* gdbarch target dependent data here. Currently unused for M32R. */
49 /* m32r register names. */
60 /* m32r calling convention. */
61 ARG1_REGNUM = R0_REGNUM,
62 ARGN_REGNUM = R3_REGNUM,
63 RET1_REGNUM = R0_REGNUM,
68 extern void _initialize_m32r_tdep (void);
71 m32r_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
73 /* Align to the size of an instruction (so that they can safely be
74 pushed onto the stack. */
78 /* Should we use DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS instead of
79 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc and TYPE
80 is the type (which is known to be struct, union or array).
82 The m32r returns anything less than 8 bytes in size in
86 m32r_use_struct_convention (int gcc_p, struct type *type)
88 return (TYPE_LENGTH (type) > 8);
93 #define M32R_BE_BREAKPOINT32 {0x10, 0xf1, 0x70, 0x00}
94 #define M32R_LE_BREAKPOINT32 {0xf1, 0x10, 0x00, 0x70}
95 #define M32R_BE_BREAKPOINT16 {0x10, 0xf1}
96 #define M32R_LE_BREAKPOINT16 {0xf1, 0x10}
99 m32r_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
105 bplen = (addr & 3) ? 2 : 4;
107 /* Save the memory contents. */
108 val = target_read_memory (addr, contents_cache, bplen);
110 return val; /* return error */
112 /* Determine appropriate breakpoint contents and size for this address. */
113 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
115 if (((addr & 3) == 0)
116 && ((contents_cache[0] & 0x80) || (contents_cache[2] & 0x80)))
118 static unsigned char insn[] = M32R_BE_BREAKPOINT32;
120 bplen = sizeof (insn);
124 static unsigned char insn[] = M32R_BE_BREAKPOINT16;
126 bplen = sizeof (insn);
130 { /* little-endian */
131 if (((addr & 3) == 0)
132 && ((contents_cache[1] & 0x80) || (contents_cache[3] & 0x80)))
134 static unsigned char insn[] = M32R_LE_BREAKPOINT32;
136 bplen = sizeof (insn);
140 static unsigned char insn[] = M32R_LE_BREAKPOINT16;
142 bplen = sizeof (insn);
146 /* Write the breakpoint. */
147 val = target_write_memory (addr, (char *) bp, bplen);
152 m32r_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
157 /* Determine appropriate breakpoint contents and size for this address. */
158 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
160 if (((addr & 3) == 0)
161 && ((contents_cache[0] & 0x80) || (contents_cache[2] & 0x80)))
163 static unsigned char insn[] = M32R_BE_BREAKPOINT32;
164 bplen = sizeof (insn);
168 static unsigned char insn[] = M32R_BE_BREAKPOINT16;
169 bplen = sizeof (insn);
175 if (((addr & 3) == 0)
176 && ((contents_cache[1] & 0x80) || (contents_cache[3] & 0x80)))
178 static unsigned char insn[] = M32R_BE_BREAKPOINT32;
179 bplen = sizeof (insn);
183 static unsigned char insn[] = M32R_BE_BREAKPOINT16;
184 bplen = sizeof (insn);
188 /* Write contents. */
189 val = target_write_memory (addr, contents_cache, bplen);
193 static const unsigned char *
194 m32r_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
198 /* Determine appropriate breakpoint. */
199 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
201 if ((*pcptr & 3) == 0)
203 static unsigned char insn[] = M32R_BE_BREAKPOINT32;
205 *lenptr = sizeof (insn);
209 static unsigned char insn[] = M32R_BE_BREAKPOINT16;
211 *lenptr = sizeof (insn);
216 if ((*pcptr & 3) == 0)
218 static unsigned char insn[] = M32R_LE_BREAKPOINT32;
220 *lenptr = sizeof (insn);
224 static unsigned char insn[] = M32R_LE_BREAKPOINT16;
226 *lenptr = sizeof (insn);
234 char *m32r_register_names[] = {
235 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
236 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp",
237 "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch",
244 return (sizeof (m32r_register_names) / sizeof (m32r_register_names[0]));
248 m32r_register_name (int reg_nr)
252 if (reg_nr >= m32r_num_regs ())
254 return m32r_register_names[reg_nr];
258 /* Return the GDB type object for the "standard" data type
259 of data in register N. */
262 m32r_register_type (struct gdbarch *gdbarch, int reg_nr)
264 if (reg_nr == M32R_PC_REGNUM)
265 return builtin_type_void_func_ptr;
266 else if (reg_nr == M32R_SP_REGNUM || reg_nr == M32R_FP_REGNUM)
267 return builtin_type_void_data_ptr;
269 return builtin_type_int32;
273 /* Write into appropriate registers a function return value
274 of type TYPE, given in virtual format.
276 Things always get returned in RET1_REGNUM, RET2_REGNUM. */
279 m32r_store_return_value (struct type *type, struct regcache *regcache,
283 int len = TYPE_LENGTH (type);
285 regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len);
286 regcache_cooked_write_unsigned (regcache, RET1_REGNUM, regval);
290 regval = extract_unsigned_integer ((char *) valbuf + 4, len - 4);
291 regcache_cooked_write_unsigned (regcache, RET1_REGNUM + 1, regval);
295 /* Extract from an array REGBUF containing the (raw) register state
296 the address in which a function should return its structure value,
297 as a CORE_ADDR (or an expression that can be used as one). */
300 m32r_extract_struct_value_address (struct regcache *regcache)
303 regcache_cooked_read_unsigned (regcache, ARG1_REGNUM, &addr);
308 /* This is required by skip_prologue. The results of decoding a prologue
309 should be cached because this thrashing is getting nuts. */
312 decode_prologue (CORE_ADDR start_pc, CORE_ADDR scan_limit,
313 CORE_ADDR *pl_endptr)
315 unsigned long framesize;
318 int maybe_one_more = 0;
319 CORE_ADDR after_prologue = 0;
320 CORE_ADDR after_stack_adjust = 0;
321 CORE_ADDR current_pc;
326 for (current_pc = start_pc; current_pc < scan_limit; current_pc += 2)
328 insn = read_memory_unsigned_integer (current_pc, 2);
330 /* If this is a 32 bit instruction, we dont want to examine its
331 immediate data as though it were an instruction */
332 if (current_pc & 0x02)
334 /* Clear the parallel execution bit from 16 bit instruction */
337 /* The last instruction was a branch, usually terminates
338 the series, but if this is a parallel instruction,
339 it may be a stack framing instruction */
340 if (!(insn & 0x8000))
342 /* nope, we are really done */
346 /* decode this instruction further */
352 break; /* This isnt the one more */
355 if (current_pc == scan_limit)
356 scan_limit += 2; /* extend the search */
357 current_pc += 2; /* skip the immediate data */
358 if (insn == 0x8faf) /* add3 sp, sp, xxxx */
359 /* add 16 bit sign-extended offset */
362 -((short) read_memory_unsigned_integer (current_pc, 2));
366 if (((insn >> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */
367 && read_memory_unsigned_integer (current_pc + 2,
369 /* subtract 24 bit sign-extended negative-offset */
371 insn = read_memory_unsigned_integer (current_pc - 2, 4);
372 if (insn & 0x00800000) /* sign extend */
373 insn |= 0xff000000; /* negative */
375 insn &= 0x00ffffff; /* positive */
379 after_prologue = current_pc;
383 op1 = insn & 0xf000; /* isolate just the first nibble */
385 if ((insn & 0xf0ff) == 0x207f)
389 regno = ((insn >> 8) & 0xf);
393 if ((insn >> 8) == 0x4f) /* addi sp, xx */
394 /* add 8 bit sign-extended offset */
396 int stack_adjust = (char) (insn & 0xff);
398 /* there are probably two of these stack adjustments:
399 1) A negative one in the prologue, and
400 2) A positive one in the epilogue.
401 We are only interested in the first one. */
403 if (stack_adjust < 0)
405 framesize -= stack_adjust;
407 /* A frameless function may have no "mv fp, sp".
408 In that case, this is the end of the prologue. */
409 after_stack_adjust = current_pc + 2;
415 after_prologue = current_pc + 2;
416 break; /* end of stack adjustments */
418 /* Nop looks like a branch, continue explicitly */
421 after_prologue = current_pc + 2;
422 continue; /* nop occurs between pushes */
424 /* End of prolog if any of these are branch instructions */
425 if ((op1 == 0x7000) || (op1 == 0xb000) || (op1 == 0xf000))
427 after_prologue = current_pc;
431 /* Some of the branch instructions are mixed with other types */
434 int subop = insn & 0x0ff0;
435 if ((subop == 0x0ec0) || (subop == 0x0fc0))
437 after_prologue = current_pc;
439 continue; /* jmp , jl */
444 if (current_pc >= scan_limit)
448 if (after_stack_adjust != 0)
449 /* We did not find a "mv fp,sp", but we DID find
450 a stack_adjust. Is it safe to use that as the
451 end of the prologue? I just don't know. */
453 *pl_endptr = after_stack_adjust;
456 /* We reached the end of the loop without finding the end
457 of the prologue. No way to win -- we should report failure.
458 The way we do that is to return the original start_pc.
459 GDB will set a breakpoint at the start of the function (etc.) */
460 *pl_endptr = start_pc;
464 if (after_prologue == 0)
465 after_prologue = current_pc;
468 *pl_endptr = after_prologue;
469 } /* decode_prologue */
471 /* Function: skip_prologue
472 Find end of function prologue */
474 #define DEFAULT_SEARCH_LIMIT 44
477 m32r_skip_prologue (CORE_ADDR pc)
479 CORE_ADDR func_addr, func_end;
480 struct symtab_and_line sal;
482 /* See what the symbol table says */
484 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
486 sal = find_pc_line (func_addr, 0);
488 if (sal.line != 0 && sal.end <= func_end)
493 /* Either there's no line info, or the line after the prologue is after
494 the end of the function. In this case, there probably isn't a
497 func_end = min (func_end, func_addr + DEFAULT_SEARCH_LIMIT);
501 func_end = pc + DEFAULT_SEARCH_LIMIT;
502 decode_prologue (pc, func_end, &sal.end);
507 struct m32r_unwind_cache
509 /* The previous frame's inner most stack address. Used as this
510 frame ID's stack_addr. */
512 /* The frame's base, optionally used by the high-level debug info. */
515 /* How far the SP and r13 (FP) have been offset from the start of
516 the stack frame (as defined by the previous frame's stack
521 /* Table indicating the location of each and every register. */
522 struct trad_frame_saved_reg *saved_regs;
525 /* Put here the code to store, into fi->saved_regs, the addresses of
526 the saved registers of frame described by FRAME_INFO. This
527 includes special registers such as pc and fp saved in special ways
528 in the stack frame. sp is even more special: the address we return
529 for it IS the sp for the next frame. */
531 static struct m32r_unwind_cache *
532 m32r_frame_unwind_cache (struct frame_info *next_frame,
533 void **this_prologue_cache)
540 struct m32r_unwind_cache *info;
542 if ((*this_prologue_cache))
543 return (*this_prologue_cache);
545 info = FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache);
546 (*this_prologue_cache) = info;
547 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
552 info->uses_frame = 0;
553 for (pc = frame_func_unwind (next_frame);
554 pc > 0 && pc < frame_pc_unwind (next_frame); pc += 2)
558 op = get_frame_memory_unsigned (next_frame, pc, 4);
559 if ((op & 0x80000000) == 0x80000000)
561 /* 32-bit instruction */
562 if ((op & 0xffff0000) == 0x8faf0000)
564 /* add3 sp,sp,xxxx */
565 short n = op & 0xffff;
566 info->sp_offset += n;
568 else if (((op >> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */
569 && get_frame_memory_unsigned (next_frame, pc + 4,
572 unsigned long n = op & 0xffffff;
573 info->sp_offset += n;
584 /* 16-bit instructions */
585 op = get_frame_memory_unsigned (next_frame, pc, 2) & 0x7fff;
586 if ((op & 0xf0ff) == 0x207f)
589 int regno = ((op >> 8) & 0xf);
590 info->sp_offset -= 4;
591 info->saved_regs[regno].addr = info->sp_offset;
593 else if ((op & 0xff00) == 0x4f00)
596 int n = (char) (op & 0xff);
597 info->sp_offset += n;
599 else if (op == 0x1d8f)
602 info->uses_frame = 1;
603 info->r13_offset = info->sp_offset;
605 else if (op == 0x7000)
612 info->size = -info->sp_offset;
614 /* Compute the previous frame's stack pointer (which is also the
615 frame's ID's stack address), and this frame's base pointer. */
616 if (info->uses_frame)
618 /* The SP was moved to the FP. This indicates that a new frame
619 was created. Get THIS frame's FP value by unwinding it from
621 this_base = frame_unwind_register_unsigned (next_frame, M32R_FP_REGNUM);
622 /* The FP points at the last saved register. Adjust the FP back
623 to before the first saved register giving the SP. */
624 prev_sp = this_base + info->size;
628 /* Assume that the FP is this frame's SP but with that pushed
629 stack space added back. */
630 this_base = frame_unwind_register_unsigned (next_frame, M32R_SP_REGNUM);
631 prev_sp = this_base + info->size;
634 /* Convert that SP/BASE into real addresses. */
635 info->prev_sp = prev_sp;
636 info->base = this_base;
638 /* Adjust all the saved registers so that they contain addresses and
640 for (i = 0; i < NUM_REGS - 1; i++)
641 if (trad_frame_addr_p (info->saved_regs, i))
642 info->saved_regs[i].addr = (info->prev_sp + info->saved_regs[i].addr);
644 /* The call instruction moves the caller's PC in the callee's LR.
645 Since this is an unwind, do the reverse. Copy the location of LR
646 into PC (the address / regnum) so that a request for PC will be
647 converted into a request for the LR. */
648 info->saved_regs[M32R_PC_REGNUM] = info->saved_regs[LR_REGNUM];
650 /* The previous frame's SP needed to be computed. Save the computed
652 trad_frame_set_value (info->saved_regs, M32R_SP_REGNUM, prev_sp);
658 m32r_read_pc (ptid_t ptid)
663 save_ptid = inferior_ptid;
664 inferior_ptid = ptid;
665 regcache_cooked_read_unsigned (current_regcache, M32R_PC_REGNUM, &pc);
666 inferior_ptid = save_ptid;
671 m32r_write_pc (CORE_ADDR val, ptid_t ptid)
675 save_ptid = inferior_ptid;
676 inferior_ptid = ptid;
677 write_register (M32R_PC_REGNUM, val);
678 inferior_ptid = save_ptid;
682 m32r_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
684 return frame_unwind_register_unsigned (next_frame, M32R_SP_REGNUM);
689 m32r_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
690 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
691 struct value **args, CORE_ADDR sp, int struct_return,
692 CORE_ADDR struct_addr)
694 int stack_offset, stack_alloc;
695 int argreg = ARG1_REGNUM;
698 enum type_code typecode;
701 char valbuf[MAX_REGISTER_SIZE];
703 int odd_sized_struct;
705 /* first force sp to a 4-byte alignment */
708 /* Set the return address. For the m32r, the return breakpoint is
709 always at BP_ADDR. */
710 regcache_cooked_write_unsigned (regcache, LR_REGNUM, bp_addr);
712 /* If STRUCT_RETURN is true, then the struct return address (in
713 STRUCT_ADDR) will consume the first argument-passing register.
714 Both adjust the register count and store that value. */
717 regcache_cooked_write_unsigned (regcache, argreg, struct_addr);
721 /* Now make sure there's space on the stack */
722 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
723 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
724 sp -= stack_alloc; /* make room on stack for args */
726 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
728 type = VALUE_TYPE (args[argnum]);
729 typecode = TYPE_CODE (type);
730 len = TYPE_LENGTH (type);
732 memset (valbuf, 0, sizeof (valbuf));
734 /* Passes structures that do not fit in 2 registers by reference. */
736 && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION))
738 store_unsigned_integer (valbuf, 4, VALUE_ADDRESS (args[argnum]));
739 typecode = TYPE_CODE_PTR;
745 /* value gets right-justified in the register or stack word */
746 memcpy (valbuf + (register_size (gdbarch, argreg) - len),
747 (char *) VALUE_CONTENTS (args[argnum]), len);
751 val = (char *) VALUE_CONTENTS (args[argnum]);
755 if (argreg > ARGN_REGNUM)
757 /* must go on the stack */
758 write_memory (sp + stack_offset, val, 4);
761 else if (argreg <= ARGN_REGNUM)
763 /* there's room in a register */
765 extract_unsigned_integer (val,
766 register_size (gdbarch, argreg));
767 regcache_cooked_write_unsigned (regcache, argreg++, regval);
770 /* Store the value 4 bytes at a time. This means that things
771 larger than 4 bytes may go partly in registers and partly
773 len -= register_size (gdbarch, argreg);
774 val += register_size (gdbarch, argreg);
778 /* Finally, update the SP register. */
779 regcache_cooked_write_unsigned (regcache, M32R_SP_REGNUM, sp);
785 /* Given a return value in `regbuf' with a type `valtype',
786 extract and copy its value into `valbuf'. */
789 m32r_extract_return_value (struct type *type, struct regcache *regcache,
792 bfd_byte *valbuf = dst;
793 int len = TYPE_LENGTH (type);
796 /* By using store_unsigned_integer we avoid having to do
797 anything special for small big-endian values. */
798 regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &tmp);
799 store_unsigned_integer (valbuf, (len > 4 ? len - 4 : len), tmp);
801 /* Ignore return values more than 8 bytes in size because the m32r
802 returns anything more than 8 bytes in the stack. */
805 regcache_cooked_read_unsigned (regcache, RET1_REGNUM + 1, &tmp);
806 store_unsigned_integer (valbuf + len - 4, 4, tmp);
812 m32r_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
814 return frame_unwind_register_unsigned (next_frame, M32R_PC_REGNUM);
817 /* Given a GDB frame, determine the address of the calling function's
818 frame. This will be used to create a new GDB frame struct. */
821 m32r_frame_this_id (struct frame_info *next_frame,
822 void **this_prologue_cache, struct frame_id *this_id)
824 struct m32r_unwind_cache *info
825 = m32r_frame_unwind_cache (next_frame, this_prologue_cache);
828 struct minimal_symbol *msym_stack;
831 /* The FUNC is easy. */
832 func = frame_func_unwind (next_frame);
834 /* Check if the stack is empty. */
835 msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL);
836 if (msym_stack && info->base == SYMBOL_VALUE_ADDRESS (msym_stack))
839 /* Hopefully the prologue analysis either correctly determined the
840 frame's base (which is the SP from the previous frame), or set
841 that base to "NULL". */
842 base = info->prev_sp;
846 id = frame_id_build (base, func);
848 /* Check that we're not going round in circles with the same frame
849 ID (but avoid applying the test to sentinel frames which do go
850 round in circles). Can't use frame_id_eq() as that doesn't yet
851 compare the frame's PC value. */
852 if (frame_relative_level (next_frame) >= 0
853 && get_frame_type (next_frame) != DUMMY_FRAME
854 && frame_id_eq (get_frame_id (next_frame), id))
861 m32r_frame_prev_register (struct frame_info *next_frame,
862 void **this_prologue_cache,
863 int regnum, int *optimizedp,
864 enum lval_type *lvalp, CORE_ADDR *addrp,
865 int *realnump, void *bufferp)
867 struct m32r_unwind_cache *info
868 = m32r_frame_unwind_cache (next_frame, this_prologue_cache);
869 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
870 optimizedp, lvalp, addrp, realnump, bufferp);
873 static const struct frame_unwind m32r_frame_unwind = {
876 m32r_frame_prev_register
879 static const struct frame_unwind *
880 m32r_frame_sniffer (struct frame_info *next_frame)
882 return &m32r_frame_unwind;
886 m32r_frame_base_address (struct frame_info *next_frame, void **this_cache)
888 struct m32r_unwind_cache *info
889 = m32r_frame_unwind_cache (next_frame, this_cache);
893 static const struct frame_base m32r_frame_base = {
895 m32r_frame_base_address,
896 m32r_frame_base_address,
897 m32r_frame_base_address
900 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
901 dummy frame. The frame ID's base needs to match the TOS value
902 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
905 static struct frame_id
906 m32r_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
908 return frame_id_build (m32r_unwind_sp (gdbarch, next_frame),
909 frame_pc_unwind (next_frame));
913 static gdbarch_init_ftype m32r_gdbarch_init;
915 static struct gdbarch *
916 m32r_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
918 struct gdbarch *gdbarch;
919 struct gdbarch_tdep *tdep;
921 /* If there is already a candidate, use it. */
922 arches = gdbarch_list_lookup_by_info (arches, &info);
924 return arches->gdbarch;
926 /* Allocate space for the new architecture. */
927 tdep = XMALLOC (struct gdbarch_tdep);
928 gdbarch = gdbarch_alloc (&info, tdep);
930 set_gdbarch_read_pc (gdbarch, m32r_read_pc);
931 set_gdbarch_write_pc (gdbarch, m32r_write_pc);
932 set_gdbarch_unwind_sp (gdbarch, m32r_unwind_sp);
934 set_gdbarch_num_regs (gdbarch, m32r_num_regs ());
935 set_gdbarch_sp_regnum (gdbarch, M32R_SP_REGNUM);
936 set_gdbarch_register_name (gdbarch, m32r_register_name);
937 set_gdbarch_register_type (gdbarch, m32r_register_type);
939 set_gdbarch_extract_return_value (gdbarch, m32r_extract_return_value);
940 set_gdbarch_push_dummy_call (gdbarch, m32r_push_dummy_call);
941 set_gdbarch_store_return_value (gdbarch, m32r_store_return_value);
942 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, m32r_extract_struct_value_address);
943 set_gdbarch_use_struct_convention (gdbarch, m32r_use_struct_convention);
945 set_gdbarch_skip_prologue (gdbarch, m32r_skip_prologue);
946 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
947 set_gdbarch_breakpoint_from_pc (gdbarch, m32r_breakpoint_from_pc);
948 set_gdbarch_memory_insert_breakpoint (gdbarch,
949 m32r_memory_insert_breakpoint);
950 set_gdbarch_memory_remove_breakpoint (gdbarch,
951 m32r_memory_remove_breakpoint);
953 set_gdbarch_frameless_function_invocation (gdbarch,
954 frameless_look_for_prologue);
956 set_gdbarch_frame_align (gdbarch, m32r_frame_align);
958 frame_unwind_append_sniffer (gdbarch, m32r_frame_sniffer);
959 frame_base_set_default (gdbarch, &m32r_frame_base);
961 /* Methods for saving / extracting a dummy frame's ID. The ID's
962 stack address must match the SP value returned by
963 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
964 set_gdbarch_unwind_dummy_id (gdbarch, m32r_unwind_dummy_id);
966 /* Return the unwound PC value. */
967 set_gdbarch_unwind_pc (gdbarch, m32r_unwind_pc);
969 set_gdbarch_print_insn (gdbarch, print_insn_m32r);
975 _initialize_m32r_tdep (void)
977 register_gdbarch_init (bfd_arch_m32r, m32r_gdbarch_init);