1 /* Renesas M32C target-dependent code for GDB, the GNU debugger.
3 Copyright (C) 2004-2014 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "gdb/sim-m32c.h"
28 #include "arch-utils.h"
30 #include "frame-unwind.h"
31 #include "dwarf2-frame.h"
32 #include "dwarf2expr.h"
36 #include "reggroups.h"
37 #include "prologue-value.h"
42 /* The m32c tdep structure. */
44 static struct reggroup *m32c_dma_reggroup;
48 /* The type of a function that moves the value of REG between CACHE or
49 BUF --- in either direction. */
50 typedef enum register_status (m32c_move_reg_t) (struct m32c_reg *reg,
51 struct regcache *cache,
56 /* The name of this register. */
62 /* The architecture this register belongs to. */
65 /* Its GDB register number. */
68 /* Its sim register number. */
71 /* Its DWARF register number, or -1 if it doesn't have one. */
74 /* Register group memberships. */
75 unsigned int general_p : 1;
76 unsigned int dma_p : 1;
77 unsigned int system_p : 1;
78 unsigned int save_restore_p : 1;
80 /* Functions to read its value from a regcache, and write its value
82 m32c_move_reg_t *read, *write;
84 /* Data for READ and WRITE functions. The exact meaning depends on
85 the specific functions selected; see the comments for those
87 struct m32c_reg *rx, *ry;
92 /* An overestimate of the number of raw and pseudoregisters we will
93 have. The exact answer depends on the variant of the architecture
94 at hand, but we can use this to declare statically allocated
95 arrays, and bump it up when needed. */
96 #define M32C_MAX_NUM_REGS (75)
98 /* The largest assigned DWARF register number. */
99 #define M32C_MAX_DWARF_REGNUM (40)
104 /* All the registers for this variant, indexed by GDB register
105 number, and the number of registers present. */
106 struct m32c_reg regs[M32C_MAX_NUM_REGS];
108 /* The number of valid registers. */
111 /* Interesting registers. These are pointers into REGS. */
112 struct m32c_reg *pc, *flg;
113 struct m32c_reg *r0, *r1, *r2, *r3, *a0, *a1;
114 struct m32c_reg *r2r0, *r3r2r1r0, *r3r1r2r0;
115 struct m32c_reg *sb, *fb, *sp;
117 /* A table indexed by DWARF register numbers, pointing into
119 struct m32c_reg *dwarf_regs[M32C_MAX_DWARF_REGNUM + 1];
121 /* Types for this architecture. We can't use the builtin_type_foo
122 types, because they're not initialized when building a gdbarch
124 struct type *voyd, *ptr_voyd, *func_voyd;
125 struct type *uint8, *uint16;
126 struct type *int8, *int16, *int32, *int64;
128 /* The types for data address and code address registers. */
129 struct type *data_addr_reg_type, *code_addr_reg_type;
131 /* The number of bytes a return address pushed by a 'jsr' instruction
132 occupies on the stack. */
135 /* The number of bytes an address register occupies on the stack
136 when saved by an 'enter' or 'pushm' instruction. */
144 make_types (struct gdbarch *arch)
146 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
147 unsigned long mach = gdbarch_bfd_arch_info (arch)->mach;
148 int data_addr_reg_bits, code_addr_reg_bits;
152 /* This is used to clip CORE_ADDR values, so this value is
153 appropriate both on the m32c, where pointers are 32 bits long,
154 and on the m16c, where pointers are sixteen bits long, but there
155 may be code above the 64k boundary. */
156 set_gdbarch_addr_bit (arch, 24);
158 /* GCC uses 32 bits for addrs in the dwarf info, even though
159 only 16/24 bits are used. Setting addr_bit to 24 causes
160 errors in reading the dwarf addresses. */
161 set_gdbarch_addr_bit (arch, 32);
164 set_gdbarch_int_bit (arch, 16);
168 data_addr_reg_bits = 16;
169 code_addr_reg_bits = 24;
170 set_gdbarch_ptr_bit (arch, 16);
171 tdep->ret_addr_bytes = 3;
172 tdep->push_addr_bytes = 2;
176 data_addr_reg_bits = 24;
177 code_addr_reg_bits = 24;
178 set_gdbarch_ptr_bit (arch, 32);
179 tdep->ret_addr_bytes = 4;
180 tdep->push_addr_bytes = 4;
184 gdb_assert_not_reached ("unexpected mach");
187 /* The builtin_type_mumble variables are sometimes uninitialized when
188 this is called, so we avoid using them. */
189 tdep->voyd = arch_type (arch, TYPE_CODE_VOID, 1, "void");
191 = arch_type (arch, TYPE_CODE_PTR, gdbarch_ptr_bit (arch) / TARGET_CHAR_BIT,
193 TYPE_TARGET_TYPE (tdep->ptr_voyd) = tdep->voyd;
194 TYPE_UNSIGNED (tdep->ptr_voyd) = 1;
195 tdep->func_voyd = lookup_function_type (tdep->voyd);
197 xsnprintf (type_name, sizeof (type_name), "%s_data_addr_t",
198 gdbarch_bfd_arch_info (arch)->printable_name);
199 tdep->data_addr_reg_type
200 = arch_type (arch, TYPE_CODE_PTR, data_addr_reg_bits / TARGET_CHAR_BIT,
201 xstrdup (type_name));
202 TYPE_TARGET_TYPE (tdep->data_addr_reg_type) = tdep->voyd;
203 TYPE_UNSIGNED (tdep->data_addr_reg_type) = 1;
205 xsnprintf (type_name, sizeof (type_name), "%s_code_addr_t",
206 gdbarch_bfd_arch_info (arch)->printable_name);
207 tdep->code_addr_reg_type
208 = arch_type (arch, TYPE_CODE_PTR, code_addr_reg_bits / TARGET_CHAR_BIT,
209 xstrdup (type_name));
210 TYPE_TARGET_TYPE (tdep->code_addr_reg_type) = tdep->func_voyd;
211 TYPE_UNSIGNED (tdep->code_addr_reg_type) = 1;
213 tdep->uint8 = arch_integer_type (arch, 8, 1, "uint8_t");
214 tdep->uint16 = arch_integer_type (arch, 16, 1, "uint16_t");
215 tdep->int8 = arch_integer_type (arch, 8, 0, "int8_t");
216 tdep->int16 = arch_integer_type (arch, 16, 0, "int16_t");
217 tdep->int32 = arch_integer_type (arch, 32, 0, "int32_t");
218 tdep->int64 = arch_integer_type (arch, 64, 0, "int64_t");
226 m32c_register_name (struct gdbarch *gdbarch, int num)
228 return gdbarch_tdep (gdbarch)->regs[num].name;
233 m32c_register_type (struct gdbarch *arch, int reg_nr)
235 return gdbarch_tdep (arch)->regs[reg_nr].type;
240 m32c_register_sim_regno (struct gdbarch *gdbarch, int reg_nr)
242 return gdbarch_tdep (gdbarch)->regs[reg_nr].sim_num;
247 m32c_debug_info_reg_to_regnum (struct gdbarch *gdbarch, int reg_nr)
249 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
250 if (0 <= reg_nr && reg_nr <= M32C_MAX_DWARF_REGNUM
251 && tdep->dwarf_regs[reg_nr])
252 return tdep->dwarf_regs[reg_nr]->num;
254 /* The DWARF CFI code expects to see -1 for invalid register
261 m32c_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
262 struct reggroup *group)
264 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
265 struct m32c_reg *reg = &tdep->regs[regnum];
267 /* The anonymous raw registers aren't in any groups. */
271 if (group == all_reggroup)
274 if (group == general_reggroup
278 if (group == m32c_dma_reggroup
282 if (group == system_reggroup
286 /* Since the m32c DWARF register numbers refer to cooked registers, not
287 raw registers, and frame_pop depends on the save and restore groups
288 containing registers the DWARF CFI will actually mention, our save
289 and restore groups are cooked registers, not raw registers. (This is
290 why we can't use the default reggroup function.) */
291 if ((group == save_reggroup
292 || group == restore_reggroup)
293 && reg->save_restore_p)
300 /* Register move functions. We declare them here using
301 m32c_move_reg_t to check the types. */
302 static m32c_move_reg_t m32c_raw_read, m32c_raw_write;
303 static m32c_move_reg_t m32c_banked_read, m32c_banked_write;
304 static m32c_move_reg_t m32c_sb_read, m32c_sb_write;
305 static m32c_move_reg_t m32c_part_read, m32c_part_write;
306 static m32c_move_reg_t m32c_cat_read, m32c_cat_write;
307 static m32c_move_reg_t m32c_r3r2r1r0_read, m32c_r3r2r1r0_write;
310 /* Copy the value of the raw register REG from CACHE to BUF. */
311 static enum register_status
312 m32c_raw_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
314 return regcache_raw_read (cache, reg->num, buf);
318 /* Copy the value of the raw register REG from BUF to CACHE. */
319 static enum register_status
320 m32c_raw_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
322 regcache_raw_write (cache, reg->num, (const void *) buf);
328 /* Return the value of the 'flg' register in CACHE. */
330 m32c_read_flg (struct regcache *cache)
332 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (cache));
334 regcache_raw_read_unsigned (cache, tdep->flg->num, &flg);
339 /* Evaluate the real register number of a banked register. */
340 static struct m32c_reg *
341 m32c_banked_register (struct m32c_reg *reg, struct regcache *cache)
343 return ((m32c_read_flg (cache) & reg->n) ? reg->ry : reg->rx);
347 /* Move the value of a banked register from CACHE to BUF.
348 If the value of the 'flg' register in CACHE has any of the bits
349 masked in REG->n set, then read REG->ry. Otherwise, read
351 static enum register_status
352 m32c_banked_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
354 struct m32c_reg *bank_reg = m32c_banked_register (reg, cache);
355 return regcache_raw_read (cache, bank_reg->num, buf);
359 /* Move the value of a banked register from BUF to CACHE.
360 If the value of the 'flg' register in CACHE has any of the bits
361 masked in REG->n set, then write REG->ry. Otherwise, write
363 static enum register_status
364 m32c_banked_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
366 struct m32c_reg *bank_reg = m32c_banked_register (reg, cache);
367 regcache_raw_write (cache, bank_reg->num, (const void *) buf);
373 /* Move the value of SB from CACHE to BUF. On bfd_mach_m32c, SB is a
374 banked register; on bfd_mach_m16c, it's not. */
375 static enum register_status
376 m32c_sb_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
378 if (gdbarch_bfd_arch_info (reg->arch)->mach == bfd_mach_m16c)
379 return m32c_raw_read (reg->rx, cache, buf);
381 return m32c_banked_read (reg, cache, buf);
385 /* Move the value of SB from BUF to CACHE. On bfd_mach_m32c, SB is a
386 banked register; on bfd_mach_m16c, it's not. */
387 static enum register_status
388 m32c_sb_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
390 if (gdbarch_bfd_arch_info (reg->arch)->mach == bfd_mach_m16c)
391 m32c_raw_write (reg->rx, cache, buf);
393 m32c_banked_write (reg, cache, buf);
399 /* Assuming REG uses m32c_part_read and m32c_part_write, set *OFFSET_P
400 and *LEN_P to the offset and length, in bytes, of the part REG
401 occupies in its underlying register. The offset is from the
402 lower-addressed end, regardless of the architecture's endianness.
403 (The M32C family is always little-endian, but let's keep those
404 assumptions out of here.) */
406 m32c_find_part (struct m32c_reg *reg, int *offset_p, int *len_p)
408 /* The length of the containing register, of which REG is one part. */
409 int containing_len = TYPE_LENGTH (reg->rx->type);
411 /* The length of one "element" in our imaginary array. */
412 int elt_len = TYPE_LENGTH (reg->type);
414 /* The offset of REG's "element" from the least significant end of
415 the containing register. */
416 int elt_offset = reg->n * elt_len;
418 /* If we extend off the end, trim the length of the element. */
419 if (elt_offset + elt_len > containing_len)
421 elt_len = containing_len - elt_offset;
422 /* We shouldn't be declaring partial registers that go off the
423 end of their containing registers. */
424 gdb_assert (elt_len > 0);
427 /* Flip the offset around if we're big-endian. */
428 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
429 elt_offset = TYPE_LENGTH (reg->rx->type) - elt_offset - elt_len;
431 *offset_p = elt_offset;
436 /* Move the value of a partial register (r0h, intbl, etc.) from CACHE
437 to BUF. Treating the value of the register REG->rx as an array of
438 REG->type values, where higher indices refer to more significant
439 bits, read the value of the REG->n'th element. */
440 static enum register_status
441 m32c_part_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
445 memset (buf, 0, TYPE_LENGTH (reg->type));
446 m32c_find_part (reg, &offset, &len);
447 return regcache_cooked_read_part (cache, reg->rx->num, offset, len, buf);
451 /* Move the value of a banked register from BUF to CACHE.
452 Treating the value of the register REG->rx as an array of REG->type
453 values, where higher indices refer to more significant bits, write
454 the value of the REG->n'th element. */
455 static enum register_status
456 m32c_part_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
460 m32c_find_part (reg, &offset, &len);
461 regcache_cooked_write_part (cache, reg->rx->num, offset, len, buf);
467 /* Move the value of REG from CACHE to BUF. REG's value is the
468 concatenation of the values of the registers REG->rx and REG->ry,
469 with REG->rx contributing the more significant bits. */
470 static enum register_status
471 m32c_cat_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
473 int high_bytes = TYPE_LENGTH (reg->rx->type);
474 int low_bytes = TYPE_LENGTH (reg->ry->type);
475 /* For address arithmetic. */
476 unsigned char *cbuf = buf;
477 enum register_status status;
479 gdb_assert (TYPE_LENGTH (reg->type) == high_bytes + low_bytes);
481 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
483 status = regcache_cooked_read (cache, reg->rx->num, cbuf);
484 if (status == REG_VALID)
485 status = regcache_cooked_read (cache, reg->ry->num, cbuf + high_bytes);
489 status = regcache_cooked_read (cache, reg->rx->num, cbuf + low_bytes);
490 if (status == REG_VALID)
491 status = regcache_cooked_read (cache, reg->ry->num, cbuf);
498 /* Move the value of REG from CACHE to BUF. REG's value is the
499 concatenation of the values of the registers REG->rx and REG->ry,
500 with REG->rx contributing the more significant bits. */
501 static enum register_status
502 m32c_cat_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
504 int high_bytes = TYPE_LENGTH (reg->rx->type);
505 int low_bytes = TYPE_LENGTH (reg->ry->type);
506 /* For address arithmetic. */
507 unsigned char *cbuf = buf;
509 gdb_assert (TYPE_LENGTH (reg->type) == high_bytes + low_bytes);
511 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
513 regcache_cooked_write (cache, reg->rx->num, cbuf);
514 regcache_cooked_write (cache, reg->ry->num, cbuf + high_bytes);
518 regcache_cooked_write (cache, reg->rx->num, cbuf + low_bytes);
519 regcache_cooked_write (cache, reg->ry->num, cbuf);
526 /* Copy the value of the raw register REG from CACHE to BUF. REG is
527 the concatenation (from most significant to least) of r3, r2, r1,
529 static enum register_status
530 m32c_r3r2r1r0_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
532 struct gdbarch_tdep *tdep = gdbarch_tdep (reg->arch);
533 int len = TYPE_LENGTH (tdep->r0->type);
534 enum register_status status;
536 /* For address arithmetic. */
537 unsigned char *cbuf = buf;
539 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
541 status = regcache_cooked_read (cache, tdep->r0->num, cbuf + len * 3);
542 if (status == REG_VALID)
543 status = regcache_cooked_read (cache, tdep->r1->num, cbuf + len * 2);
544 if (status == REG_VALID)
545 status = regcache_cooked_read (cache, tdep->r2->num, cbuf + len * 1);
546 if (status == REG_VALID)
547 status = regcache_cooked_read (cache, tdep->r3->num, cbuf);
551 status = regcache_cooked_read (cache, tdep->r0->num, cbuf);
552 if (status == REG_VALID)
553 status = regcache_cooked_read (cache, tdep->r1->num, cbuf + len * 1);
554 if (status == REG_VALID)
555 status = regcache_cooked_read (cache, tdep->r2->num, cbuf + len * 2);
556 if (status == REG_VALID)
557 status = regcache_cooked_read (cache, tdep->r3->num, cbuf + len * 3);
564 /* Copy the value of the raw register REG from BUF to CACHE. REG is
565 the concatenation (from most significant to least) of r3, r2, r1,
567 static enum register_status
568 m32c_r3r2r1r0_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
570 struct gdbarch_tdep *tdep = gdbarch_tdep (reg->arch);
571 int len = TYPE_LENGTH (tdep->r0->type);
573 /* For address arithmetic. */
574 unsigned char *cbuf = buf;
576 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
578 regcache_cooked_write (cache, tdep->r0->num, cbuf + len * 3);
579 regcache_cooked_write (cache, tdep->r1->num, cbuf + len * 2);
580 regcache_cooked_write (cache, tdep->r2->num, cbuf + len * 1);
581 regcache_cooked_write (cache, tdep->r3->num, cbuf);
585 regcache_cooked_write (cache, tdep->r0->num, cbuf);
586 regcache_cooked_write (cache, tdep->r1->num, cbuf + len * 1);
587 regcache_cooked_write (cache, tdep->r2->num, cbuf + len * 2);
588 regcache_cooked_write (cache, tdep->r3->num, cbuf + len * 3);
595 static enum register_status
596 m32c_pseudo_register_read (struct gdbarch *arch,
597 struct regcache *cache,
601 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
602 struct m32c_reg *reg;
604 gdb_assert (0 <= cookednum && cookednum < tdep->num_regs);
605 gdb_assert (arch == get_regcache_arch (cache));
606 gdb_assert (arch == tdep->regs[cookednum].arch);
607 reg = &tdep->regs[cookednum];
609 return reg->read (reg, cache, buf);
614 m32c_pseudo_register_write (struct gdbarch *arch,
615 struct regcache *cache,
619 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
620 struct m32c_reg *reg;
622 gdb_assert (0 <= cookednum && cookednum < tdep->num_regs);
623 gdb_assert (arch == get_regcache_arch (cache));
624 gdb_assert (arch == tdep->regs[cookednum].arch);
625 reg = &tdep->regs[cookednum];
627 reg->write (reg, cache, (void *) buf);
631 /* Add a register with the given fields to the end of ARCH's table.
632 Return a pointer to the newly added register. */
633 static struct m32c_reg *
634 add_reg (struct gdbarch *arch,
638 m32c_move_reg_t *read,
639 m32c_move_reg_t *write,
644 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
645 struct m32c_reg *r = &tdep->regs[tdep->num_regs];
647 gdb_assert (tdep->num_regs < M32C_MAX_NUM_REGS);
652 r->num = tdep->num_regs;
653 r->sim_num = sim_num;
658 r->save_restore_p = 0;
671 /* Record NUM as REG's DWARF register number. */
673 set_dwarf_regnum (struct m32c_reg *reg, int num)
675 gdb_assert (num < M32C_MAX_NUM_REGS);
677 /* Update the reg->DWARF mapping. Only count the first number
678 assigned to this register. */
679 if (reg->dwarf_num == -1)
680 reg->dwarf_num = num;
682 /* Update the DWARF->reg mapping. */
683 gdbarch_tdep (reg->arch)->dwarf_regs[num] = reg;
687 /* Mark REG as a general-purpose register, and return it. */
688 static struct m32c_reg *
689 mark_general (struct m32c_reg *reg)
696 /* Mark REG as a DMA register, and return it. */
697 static struct m32c_reg *
698 mark_dma (struct m32c_reg *reg)
705 /* Mark REG as a SYSTEM register, and return it. */
706 static struct m32c_reg *
707 mark_system (struct m32c_reg *reg)
714 /* Mark REG as a save-restore register, and return it. */
715 static struct m32c_reg *
716 mark_save_restore (struct m32c_reg *reg)
718 reg->save_restore_p = 1;
723 #define FLAGBIT_B 0x0010
724 #define FLAGBIT_U 0x0080
726 /* Handy macros for declaring registers. These all evaluate to
727 pointers to the register declared. Macros that define two
728 registers evaluate to a pointer to the first. */
730 /* A raw register named NAME, with type TYPE and sim number SIM_NUM. */
731 #define R(name, type, sim_num) \
732 (add_reg (arch, (name), (type), (sim_num), \
733 m32c_raw_read, m32c_raw_write, NULL, NULL, 0))
735 /* The simulator register number for a raw register named NAME. */
736 #define SIM(name) (m32c_sim_reg_ ## name)
738 /* A raw unsigned 16-bit data register named NAME.
739 NAME should be an identifier, not a string. */
741 (R(#name, tdep->uint16, SIM (name)))
743 /* A raw data address register named NAME.
744 NAME should be an identifier, not a string. */
746 (R(#name, tdep->data_addr_reg_type, SIM (name)))
748 /* A raw code address register named NAME. NAME should
749 be an identifier, not a string. */
751 (R(#name, tdep->code_addr_reg_type, SIM (name)))
753 /* A pair of raw registers named NAME0 and NAME1, with type TYPE.
754 NAME should be an identifier, not a string. */
755 #define RP(name, type) \
756 (R(#name "0", (type), SIM (name ## 0)), \
757 R(#name "1", (type), SIM (name ## 1)) - 1)
759 /* A raw banked general-purpose data register named NAME.
760 NAME should be an identifier, not a string. */
762 (R(NULL, tdep->int16, SIM (name ## _bank0)), \
763 R(NULL, tdep->int16, SIM (name ## _bank1)) - 1)
765 /* A raw banked data address register named NAME.
766 NAME should be an identifier, not a string. */
768 (R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank0)), \
769 R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank1)) - 1)
771 /* A cooked register named NAME referring to a raw banked register
772 from the bank selected by the current value of FLG. RAW_PAIR
773 should be a pointer to the first register in the banked pair.
774 NAME must be an identifier, not a string. */
775 #define CB(name, raw_pair) \
776 (add_reg (arch, #name, (raw_pair)->type, 0, \
777 m32c_banked_read, m32c_banked_write, \
778 (raw_pair), (raw_pair + 1), FLAGBIT_B))
780 /* A pair of registers named NAMEH and NAMEL, of type TYPE, that
781 access the top and bottom halves of the register pointed to by
782 NAME. NAME should be an identifier. */
783 #define CHL(name, type) \
784 (add_reg (arch, #name "h", (type), 0, \
785 m32c_part_read, m32c_part_write, name, NULL, 1), \
786 add_reg (arch, #name "l", (type), 0, \
787 m32c_part_read, m32c_part_write, name, NULL, 0) - 1)
789 /* A register constructed by concatenating the two registers HIGH and
790 LOW, whose name is HIGHLOW and whose type is TYPE. */
791 #define CCAT(high, low, type) \
792 (add_reg (arch, #high #low, (type), 0, \
793 m32c_cat_read, m32c_cat_write, (high), (low), 0))
795 /* Abbreviations for marking register group membership. */
796 #define G(reg) (mark_general (reg))
797 #define S(reg) (mark_system (reg))
798 #define DMA(reg) (mark_dma (reg))
801 /* Construct the register set for ARCH. */
803 make_regs (struct gdbarch *arch)
805 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
806 int mach = gdbarch_bfd_arch_info (arch)->mach;
819 struct m32c_reg *r0hl;
820 struct m32c_reg *r1hl;
821 struct m32c_reg *r2hl;
822 struct m32c_reg *r3hl;
823 struct m32c_reg *intbhl;
824 struct m32c_reg *r2r0;
825 struct m32c_reg *r3r1;
826 struct m32c_reg *r3r1r2r0;
827 struct m32c_reg *r3r2r1r0;
828 struct m32c_reg *a1a0;
830 struct m32c_reg *raw_r0_pair = RBD (r0);
831 struct m32c_reg *raw_r1_pair = RBD (r1);
832 struct m32c_reg *raw_r2_pair = RBD (r2);
833 struct m32c_reg *raw_r3_pair = RBD (r3);
834 struct m32c_reg *raw_a0_pair = RBA (a0);
835 struct m32c_reg *raw_a1_pair = RBA (a1);
836 struct m32c_reg *raw_fb_pair = RBA (fb);
838 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
839 We always declare both raw registers, and deal with the distinction
840 in the pseudoregister. */
841 struct m32c_reg *raw_sb_pair = RBA (sb);
843 struct m32c_reg *usp = S (RA (usp));
844 struct m32c_reg *isp = S (RA (isp));
845 struct m32c_reg *intb = S (RC (intb));
846 struct m32c_reg *pc = G (RC (pc));
847 struct m32c_reg *flg = G (R16U (flg));
849 if (mach == bfd_mach_m32c)
851 struct m32c_reg *svf = S (R16U (svf));
852 struct m32c_reg *svp = S (RC (svp));
853 struct m32c_reg *vct = S (RC (vct));
855 struct m32c_reg *dmd01 = DMA (RP (dmd, tdep->uint8));
856 struct m32c_reg *dct01 = DMA (RP (dct, tdep->uint16));
857 struct m32c_reg *drc01 = DMA (RP (drc, tdep->uint16));
858 struct m32c_reg *dma01 = DMA (RP (dma, tdep->data_addr_reg_type));
859 struct m32c_reg *dsa01 = DMA (RP (dsa, tdep->data_addr_reg_type));
860 struct m32c_reg *dra01 = DMA (RP (dra, tdep->data_addr_reg_type));
863 num_raw_regs = tdep->num_regs;
865 r0 = G (CB (r0, raw_r0_pair));
866 r1 = G (CB (r1, raw_r1_pair));
867 r2 = G (CB (r2, raw_r2_pair));
868 r3 = G (CB (r3, raw_r3_pair));
869 a0 = G (CB (a0, raw_a0_pair));
870 a1 = G (CB (a1, raw_a1_pair));
871 fb = G (CB (fb, raw_fb_pair));
873 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
874 Specify custom read/write functions that do the right thing. */
875 sb = G (add_reg (arch, "sb", raw_sb_pair->type, 0,
876 m32c_sb_read, m32c_sb_write,
877 raw_sb_pair, raw_sb_pair + 1, 0));
879 /* The current sp is either usp or isp, depending on the value of
880 the FLG register's U bit. */
881 sp = G (add_reg (arch, "sp", usp->type, 0,
882 m32c_banked_read, m32c_banked_write,
883 isp, usp, FLAGBIT_U));
885 r0hl = CHL (r0, tdep->int8);
886 r1hl = CHL (r1, tdep->int8);
887 r2hl = CHL (r2, tdep->int8);
888 r3hl = CHL (r3, tdep->int8);
889 intbhl = CHL (intb, tdep->int16);
891 r2r0 = CCAT (r2, r0, tdep->int32);
892 r3r1 = CCAT (r3, r1, tdep->int32);
893 r3r1r2r0 = CCAT (r3r1, r2r0, tdep->int64);
896 = add_reg (arch, "r3r2r1r0", tdep->int64, 0,
897 m32c_r3r2r1r0_read, m32c_r3r2r1r0_write, NULL, NULL, 0);
899 if (mach == bfd_mach_m16c)
900 a1a0 = CCAT (a1, a0, tdep->int32);
904 num_cooked_regs = tdep->num_regs - num_raw_regs;
913 tdep->r3r2r1r0 = r3r2r1r0;
914 tdep->r3r1r2r0 = r3r1r2r0;
921 /* Set up the DWARF register table. */
922 memset (tdep->dwarf_regs, 0, sizeof (tdep->dwarf_regs));
923 set_dwarf_regnum (r0hl + 1, 0x01);
924 set_dwarf_regnum (r0hl + 0, 0x02);
925 set_dwarf_regnum (r1hl + 1, 0x03);
926 set_dwarf_regnum (r1hl + 0, 0x04);
927 set_dwarf_regnum (r0, 0x05);
928 set_dwarf_regnum (r1, 0x06);
929 set_dwarf_regnum (r2, 0x07);
930 set_dwarf_regnum (r3, 0x08);
931 set_dwarf_regnum (a0, 0x09);
932 set_dwarf_regnum (a1, 0x0a);
933 set_dwarf_regnum (fb, 0x0b);
934 set_dwarf_regnum (sp, 0x0c);
935 set_dwarf_regnum (pc, 0x0d); /* GCC's invention */
936 set_dwarf_regnum (sb, 0x13);
937 set_dwarf_regnum (r2r0, 0x15);
938 set_dwarf_regnum (r3r1, 0x16);
940 set_dwarf_regnum (a1a0, 0x17);
942 /* Enumerate the save/restore register group.
944 The regcache_save and regcache_restore functions apply their read
945 function to each register in this group.
947 Since frame_pop supplies frame_unwind_register as its read
948 function, the registers meaningful to the Dwarf unwinder need to
951 On the other hand, when we make inferior calls, save_inferior_status
952 and restore_inferior_status use them to preserve the current register
953 values across the inferior call. For this, you'd kind of like to
954 preserve all the raw registers, to protect the interrupted code from
955 any sort of bank switching the callee might have done. But we handle
956 those cases so badly anyway --- for example, it matters whether we
957 restore FLG before or after we restore the general-purpose registers,
958 but there's no way to express that --- that it isn't worth worrying
961 We omit control registers like inthl: if you call a function that
962 changes those, it's probably because you wanted that change to be
963 visible to the interrupted code. */
964 mark_save_restore (r0);
965 mark_save_restore (r1);
966 mark_save_restore (r2);
967 mark_save_restore (r3);
968 mark_save_restore (a0);
969 mark_save_restore (a1);
970 mark_save_restore (sb);
971 mark_save_restore (fb);
972 mark_save_restore (sp);
973 mark_save_restore (pc);
974 mark_save_restore (flg);
976 set_gdbarch_num_regs (arch, num_raw_regs);
977 set_gdbarch_num_pseudo_regs (arch, num_cooked_regs);
978 set_gdbarch_pc_regnum (arch, pc->num);
979 set_gdbarch_sp_regnum (arch, sp->num);
980 set_gdbarch_register_name (arch, m32c_register_name);
981 set_gdbarch_register_type (arch, m32c_register_type);
982 set_gdbarch_pseudo_register_read (arch, m32c_pseudo_register_read);
983 set_gdbarch_pseudo_register_write (arch, m32c_pseudo_register_write);
984 set_gdbarch_register_sim_regno (arch, m32c_register_sim_regno);
985 set_gdbarch_stab_reg_to_regnum (arch, m32c_debug_info_reg_to_regnum);
986 set_gdbarch_dwarf2_reg_to_regnum (arch, m32c_debug_info_reg_to_regnum);
987 set_gdbarch_register_reggroup_p (arch, m32c_register_reggroup_p);
989 reggroup_add (arch, general_reggroup);
990 reggroup_add (arch, all_reggroup);
991 reggroup_add (arch, save_reggroup);
992 reggroup_add (arch, restore_reggroup);
993 reggroup_add (arch, system_reggroup);
994 reggroup_add (arch, m32c_dma_reggroup);
1001 static const unsigned char *
1002 m32c_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
1004 static unsigned char break_insn[] = { 0x00 }; /* brk */
1006 *len = sizeof (break_insn);
1012 /* Prologue analysis. */
1014 struct m32c_prologue
1016 /* For consistency with the DWARF 2 .debug_frame info generated by
1017 GCC, a frame's CFA is the address immediately after the saved
1020 /* The architecture for which we generated this prologue info. */
1021 struct gdbarch *arch;
1024 /* This function uses a frame pointer. */
1025 prologue_with_frame_ptr,
1027 /* This function has no frame pointer. */
1028 prologue_sans_frame_ptr,
1030 /* This function sets up the stack, so its frame is the first
1031 frame on the stack. */
1032 prologue_first_frame
1036 /* If KIND is prologue_with_frame_ptr, this is the offset from the
1037 CFA to where the frame pointer points. This is always zero or
1039 LONGEST frame_ptr_offset;
1041 /* If KIND is prologue_sans_frame_ptr, the offset from the CFA to
1042 the stack pointer --- always zero or negative.
1044 Calling this a "size" is a bit misleading, but given that the
1045 stack grows downwards, using offsets for everything keeps one
1046 from going completely sign-crazy: you never change anything's
1047 sign for an ADD instruction; always change the second operand's
1048 sign for a SUB instruction; and everything takes care of
1051 Functions that use alloca don't have a constant frame size. But
1052 they always have frame pointers, so we must use that to find the
1053 CFA (and perhaps to unwind the stack pointer). */
1056 /* The address of the first instruction at which the frame has been
1057 set up and the arguments are where the debug info says they are
1058 --- as best as we can tell. */
1059 CORE_ADDR prologue_end;
1061 /* reg_offset[R] is the offset from the CFA at which register R is
1062 saved, or 1 if register R has not been saved. (Real values are
1063 always zero or negative.) */
1064 LONGEST reg_offset[M32C_MAX_NUM_REGS];
1068 /* The longest I've seen, anyway. */
1069 #define M32C_MAX_INSN_LEN (9)
1071 /* Processor state, for the prologue analyzer. */
1072 struct m32c_pv_state
1074 struct gdbarch *arch;
1075 pv_t r0, r1, r2, r3;
1079 struct pv_area *stack;
1081 /* Bytes from the current PC, the address they were read from,
1082 and the address of the next unconsumed byte. */
1083 gdb_byte insn[M32C_MAX_INSN_LEN];
1084 CORE_ADDR scan_pc, next_addr;
1088 /* Push VALUE on STATE's stack, occupying SIZE bytes. Return zero if
1089 all went well, or non-zero if simulating the action would trash our
1092 m32c_pv_push (struct m32c_pv_state *state, pv_t value, int size)
1094 if (pv_area_store_would_trash (state->stack, state->sp))
1097 state->sp = pv_add_constant (state->sp, -size);
1098 pv_area_store (state->stack, state->sp, size, value);
1104 /* A source or destination location for an m16c or m32c
1108 /* If srcdest_reg, the location is a register pointed to by REG.
1109 If srcdest_partial_reg, the location is part of a register pointed
1110 to by REG. We don't try to handle this too well.
1111 If srcdest_mem, the location is memory whose address is ADDR. */
1112 enum { srcdest_reg, srcdest_partial_reg, srcdest_mem } kind;
1117 /* Return the SIZE-byte value at LOC in STATE. */
1119 m32c_srcdest_fetch (struct m32c_pv_state *state, struct srcdest loc, int size)
1121 if (loc.kind == srcdest_mem)
1122 return pv_area_fetch (state->stack, loc.addr, size);
1123 else if (loc.kind == srcdest_partial_reg)
1124 return pv_unknown ();
1130 /* Write VALUE, a SIZE-byte value, to LOC in STATE. Return zero if
1131 all went well, or non-zero if simulating the store would trash our
1134 m32c_srcdest_store (struct m32c_pv_state *state, struct srcdest loc,
1135 pv_t value, int size)
1137 if (loc.kind == srcdest_mem)
1139 if (pv_area_store_would_trash (state->stack, loc.addr))
1141 pv_area_store (state->stack, loc.addr, size, value);
1143 else if (loc.kind == srcdest_partial_reg)
1144 *loc.reg = pv_unknown ();
1153 m32c_sign_ext (int v, int bits)
1155 int mask = 1 << (bits - 1);
1156 return (v ^ mask) - mask;
1160 m32c_next_byte (struct m32c_pv_state *st)
1162 gdb_assert (st->next_addr - st->scan_pc < sizeof (st->insn));
1163 return st->insn[st->next_addr++ - st->scan_pc];
1167 m32c_udisp8 (struct m32c_pv_state *st)
1169 return m32c_next_byte (st);
1174 m32c_sdisp8 (struct m32c_pv_state *st)
1176 return m32c_sign_ext (m32c_next_byte (st), 8);
1181 m32c_udisp16 (struct m32c_pv_state *st)
1183 int low = m32c_next_byte (st);
1184 int high = m32c_next_byte (st);
1186 return low + (high << 8);
1191 m32c_sdisp16 (struct m32c_pv_state *st)
1193 int low = m32c_next_byte (st);
1194 int high = m32c_next_byte (st);
1196 return m32c_sign_ext (low + (high << 8), 16);
1201 m32c_udisp24 (struct m32c_pv_state *st)
1203 int low = m32c_next_byte (st);
1204 int mid = m32c_next_byte (st);
1205 int high = m32c_next_byte (st);
1207 return low + (mid << 8) + (high << 16);
1211 /* Extract the 'source' field from an m32c MOV.size:G-format instruction. */
1213 m32c_get_src23 (unsigned char *i)
1215 return (((i[0] & 0x70) >> 2)
1216 | ((i[1] & 0x30) >> 4));
1220 /* Extract the 'dest' field from an m32c MOV.size:G-format instruction. */
1222 m32c_get_dest23 (unsigned char *i)
1224 return (((i[0] & 0x0e) << 1)
1225 | ((i[1] & 0xc0) >> 6));
1229 static struct srcdest
1230 m32c_decode_srcdest4 (struct m32c_pv_state *st,
1236 sd.kind = (size == 2 ? srcdest_reg : srcdest_partial_reg);
1238 sd.kind = srcdest_mem;
1240 sd.addr = pv_unknown ();
1245 case 0x0: sd.reg = (size == 1 ? &st->r0 : &st->r0); break;
1246 case 0x1: sd.reg = (size == 1 ? &st->r0 : &st->r1); break;
1247 case 0x2: sd.reg = (size == 1 ? &st->r1 : &st->r2); break;
1248 case 0x3: sd.reg = (size == 1 ? &st->r1 : &st->r3); break;
1250 case 0x4: sd.reg = &st->a0; break;
1251 case 0x5: sd.reg = &st->a1; break;
1253 case 0x6: sd.addr = st->a0; break;
1254 case 0x7: sd.addr = st->a1; break;
1256 case 0x8: sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); break;
1257 case 0x9: sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); break;
1258 case 0xa: sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); break;
1259 case 0xb: sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); break;
1261 case 0xc: sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); break;
1262 case 0xd: sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); break;
1263 case 0xe: sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); break;
1264 case 0xf: sd.addr = pv_constant (m32c_udisp16 (st)); break;
1267 gdb_assert_not_reached ("unexpected srcdest4");
1274 static struct srcdest
1275 m32c_decode_sd23 (struct m32c_pv_state *st, int code, int size, int ind)
1279 sd.addr = pv_unknown ();
1288 sd.kind = (size == 1) ? srcdest_partial_reg : srcdest_reg;
1293 sd.kind = (size == 4) ? srcdest_reg : srcdest_partial_reg;
1297 sd.kind = srcdest_mem;
1304 case 0x12: sd.reg = &st->r0; break;
1305 case 0x13: sd.reg = &st->r1; break;
1306 case 0x10: sd.reg = ((size == 1) ? &st->r0 : &st->r2); break;
1307 case 0x11: sd.reg = ((size == 1) ? &st->r1 : &st->r3); break;
1308 case 0x02: sd.reg = &st->a0; break;
1309 case 0x03: sd.reg = &st->a1; break;
1311 case 0x00: sd.addr = st->a0; break;
1312 case 0x01: sd.addr = st->a1; break;
1313 case 0x04: sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); break;
1314 case 0x05: sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); break;
1315 case 0x06: sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); break;
1316 case 0x07: sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); break;
1317 case 0x08: sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); break;
1318 case 0x09: sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); break;
1319 case 0x0a: sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); break;
1320 case 0x0b: sd.addr = pv_add_constant (st->fb, m32c_sdisp16 (st)); break;
1321 case 0x0c: sd.addr = pv_add_constant (st->a0, m32c_udisp24 (st)); break;
1322 case 0x0d: sd.addr = pv_add_constant (st->a1, m32c_udisp24 (st)); break;
1323 case 0x0f: sd.addr = pv_constant (m32c_udisp16 (st)); break;
1324 case 0x0e: sd.addr = pv_constant (m32c_udisp24 (st)); break;
1326 gdb_assert_not_reached ("unexpected sd23");
1331 sd.addr = m32c_srcdest_fetch (st, sd, 4);
1332 sd.kind = srcdest_mem;
1339 /* The r16c and r32c machines have instructions with similar
1340 semantics, but completely different machine language encodings. So
1341 we break out the semantics into their own functions, and leave
1342 machine-specific decoding in m32c_analyze_prologue.
1344 The following functions all expect their arguments already decoded,
1345 and they all return zero if analysis should continue past this
1346 instruction, or non-zero if analysis should stop. */
1349 /* Simulate an 'enter SIZE' instruction in STATE. */
1351 m32c_pv_enter (struct m32c_pv_state *state, int size)
1353 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1355 /* If simulating this store would require us to forget
1356 everything we know about the stack frame in the name of
1357 accuracy, it would be better to just quit now. */
1358 if (pv_area_store_would_trash (state->stack, state->sp))
1361 if (m32c_pv_push (state, state->fb, tdep->push_addr_bytes))
1363 state->fb = state->sp;
1364 state->sp = pv_add_constant (state->sp, -size);
1371 m32c_pv_pushm_one (struct m32c_pv_state *state, pv_t reg,
1372 int bit, int src, int size)
1376 if (m32c_pv_push (state, reg, size))
1384 /* Simulate a 'pushm SRC' instruction in STATE. */
1386 m32c_pv_pushm (struct m32c_pv_state *state, int src)
1388 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1390 /* The bits in SRC indicating which registers to save are:
1391 r0 r1 r2 r3 a0 a1 sb fb */
1393 ( m32c_pv_pushm_one (state, state->fb, 0x01, src, tdep->push_addr_bytes)
1394 || m32c_pv_pushm_one (state, state->sb, 0x02, src, tdep->push_addr_bytes)
1395 || m32c_pv_pushm_one (state, state->a1, 0x04, src, tdep->push_addr_bytes)
1396 || m32c_pv_pushm_one (state, state->a0, 0x08, src, tdep->push_addr_bytes)
1397 || m32c_pv_pushm_one (state, state->r3, 0x10, src, 2)
1398 || m32c_pv_pushm_one (state, state->r2, 0x20, src, 2)
1399 || m32c_pv_pushm_one (state, state->r1, 0x40, src, 2)
1400 || m32c_pv_pushm_one (state, state->r0, 0x80, src, 2));
1403 /* Return non-zero if VALUE is the first incoming argument register. */
1406 m32c_is_1st_arg_reg (struct m32c_pv_state *state, pv_t value)
1408 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1409 return (value.kind == pvk_register
1410 && (gdbarch_bfd_arch_info (state->arch)->mach == bfd_mach_m16c
1411 ? (value.reg == tdep->r1->num)
1412 : (value.reg == tdep->r0->num))
1416 /* Return non-zero if VALUE is an incoming argument register. */
1419 m32c_is_arg_reg (struct m32c_pv_state *state, pv_t value)
1421 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1422 return (value.kind == pvk_register
1423 && (gdbarch_bfd_arch_info (state->arch)->mach == bfd_mach_m16c
1424 ? (value.reg == tdep->r1->num || value.reg == tdep->r2->num)
1425 : (value.reg == tdep->r0->num))
1429 /* Return non-zero if a store of VALUE to LOC is probably spilling an
1430 argument register to its stack slot in STATE. Such instructions
1431 should be included in the prologue, if possible.
1433 The store is a spill if:
1434 - the value being stored is the original value of an argument register;
1435 - the value has not already been stored somewhere in STACK; and
1436 - LOC is a stack slot (e.g., a memory location whose address is
1437 relative to the original value of the SP). */
1440 m32c_is_arg_spill (struct m32c_pv_state *st,
1444 struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);
1446 return (m32c_is_arg_reg (st, value)
1447 && loc.kind == srcdest_mem
1448 && pv_is_register (loc.addr, tdep->sp->num)
1449 && ! pv_area_find_reg (st->stack, st->arch, value.reg, 0));
1452 /* Return non-zero if a store of VALUE to LOC is probably
1453 copying the struct return address into an address register
1454 for immediate use. This is basically a "spill" into the
1455 address register, instead of onto the stack.
1457 The prerequisites are:
1458 - value being stored is original value of the FIRST arg register;
1459 - value has not already been stored on stack; and
1460 - LOC is an address register (a0 or a1). */
1463 m32c_is_struct_return (struct m32c_pv_state *st,
1467 struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);
1469 return (m32c_is_1st_arg_reg (st, value)
1470 && !pv_area_find_reg (st->stack, st->arch, value.reg, 0)
1471 && loc.kind == srcdest_reg
1472 && (pv_is_register (*loc.reg, tdep->a0->num)
1473 || pv_is_register (*loc.reg, tdep->a1->num)));
1476 /* Return non-zero if a 'pushm' saving the registers indicated by SRC
1477 was a register save:
1478 - all the named registers should have their original values, and
1479 - the stack pointer should be at a constant offset from the
1480 original stack pointer. */
1482 m32c_pushm_is_reg_save (struct m32c_pv_state *st, int src)
1484 struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);
1485 /* The bits in SRC indicating which registers to save are:
1486 r0 r1 r2 r3 a0 a1 sb fb */
1488 (pv_is_register (st->sp, tdep->sp->num)
1489 && (! (src & 0x01) || pv_is_register_k (st->fb, tdep->fb->num, 0))
1490 && (! (src & 0x02) || pv_is_register_k (st->sb, tdep->sb->num, 0))
1491 && (! (src & 0x04) || pv_is_register_k (st->a1, tdep->a1->num, 0))
1492 && (! (src & 0x08) || pv_is_register_k (st->a0, tdep->a0->num, 0))
1493 && (! (src & 0x10) || pv_is_register_k (st->r3, tdep->r3->num, 0))
1494 && (! (src & 0x20) || pv_is_register_k (st->r2, tdep->r2->num, 0))
1495 && (! (src & 0x40) || pv_is_register_k (st->r1, tdep->r1->num, 0))
1496 && (! (src & 0x80) || pv_is_register_k (st->r0, tdep->r0->num, 0)));
1500 /* Function for finding saved registers in a 'struct pv_area'; we pass
1501 this to pv_area_scan.
1503 If VALUE is a saved register, ADDR says it was saved at a constant
1504 offset from the frame base, and SIZE indicates that the whole
1505 register was saved, record its offset in RESULT_UNTYPED. */
1507 check_for_saved (void *prologue_untyped, pv_t addr, CORE_ADDR size, pv_t value)
1509 struct m32c_prologue *prologue = (struct m32c_prologue *) prologue_untyped;
1510 struct gdbarch *arch = prologue->arch;
1511 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1513 /* Is this the unchanged value of some register being saved on the
1515 if (value.kind == pvk_register
1517 && pv_is_register (addr, tdep->sp->num))
1519 /* Some registers require special handling: they're saved as a
1520 larger value than the register itself. */
1521 CORE_ADDR saved_size = register_size (arch, value.reg);
1523 if (value.reg == tdep->pc->num)
1524 saved_size = tdep->ret_addr_bytes;
1525 else if (register_type (arch, value.reg)
1526 == tdep->data_addr_reg_type)
1527 saved_size = tdep->push_addr_bytes;
1529 if (size == saved_size)
1531 /* Find which end of the saved value corresponds to our
1533 if (gdbarch_byte_order (arch) == BFD_ENDIAN_BIG)
1534 prologue->reg_offset[value.reg]
1535 = (addr.k + saved_size - register_size (arch, value.reg));
1537 prologue->reg_offset[value.reg] = addr.k;
1543 /* Analyze the function prologue for ARCH at START, going no further
1544 than LIMIT, and place a description of what we found in
1547 m32c_analyze_prologue (struct gdbarch *arch,
1548 CORE_ADDR start, CORE_ADDR limit,
1549 struct m32c_prologue *prologue)
1551 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1552 unsigned long mach = gdbarch_bfd_arch_info (arch)->mach;
1553 CORE_ADDR after_last_frame_related_insn;
1554 struct cleanup *back_to;
1555 struct m32c_pv_state st;
1558 st.r0 = pv_register (tdep->r0->num, 0);
1559 st.r1 = pv_register (tdep->r1->num, 0);
1560 st.r2 = pv_register (tdep->r2->num, 0);
1561 st.r3 = pv_register (tdep->r3->num, 0);
1562 st.a0 = pv_register (tdep->a0->num, 0);
1563 st.a1 = pv_register (tdep->a1->num, 0);
1564 st.sb = pv_register (tdep->sb->num, 0);
1565 st.fb = pv_register (tdep->fb->num, 0);
1566 st.sp = pv_register (tdep->sp->num, 0);
1567 st.pc = pv_register (tdep->pc->num, 0);
1568 st.stack = make_pv_area (tdep->sp->num, gdbarch_addr_bit (arch));
1569 back_to = make_cleanup_free_pv_area (st.stack);
1571 /* Record that the call instruction has saved the return address on
1573 m32c_pv_push (&st, st.pc, tdep->ret_addr_bytes);
1575 memset (prologue, 0, sizeof (*prologue));
1576 prologue->arch = arch;
1579 for (i = 0; i < M32C_MAX_NUM_REGS; i++)
1580 prologue->reg_offset[i] = 1;
1583 st.scan_pc = after_last_frame_related_insn = start;
1585 while (st.scan_pc < limit)
1587 pv_t pre_insn_fb = st.fb;
1588 pv_t pre_insn_sp = st.sp;
1590 /* In theory we could get in trouble by trying to read ahead
1591 here, when we only know we're expecting one byte. In
1592 practice I doubt anyone will care, and it makes the rest of
1594 if (target_read_memory (st.scan_pc, st.insn, sizeof (st.insn)))
1595 /* If we can't fetch the instruction from memory, stop here
1596 and hope for the best. */
1598 st.next_addr = st.scan_pc;
1600 /* The assembly instructions are written as they appear in the
1601 section of the processor manuals that describe the
1602 instruction encodings.
1604 When a single assembly language instruction has several
1605 different machine-language encodings, the manual
1606 distinguishes them by a number in parens, before the
1607 mnemonic. Those numbers are included, as well.
1609 The srcdest decoding instructions have the same names as the
1610 analogous functions in the simulator. */
1611 if (mach == bfd_mach_m16c)
1613 /* (1) ENTER #imm8 */
1614 if (st.insn[0] == 0x7c && st.insn[1] == 0xf2)
1616 if (m32c_pv_enter (&st, st.insn[2]))
1621 else if (st.insn[0] == 0xec)
1623 int src = st.insn[1];
1624 if (m32c_pv_pushm (&st, src))
1628 if (m32c_pushm_is_reg_save (&st, src))
1629 after_last_frame_related_insn = st.next_addr;
1632 /* (6) MOV.size:G src, dest */
1633 else if ((st.insn[0] & 0xfe) == 0x72)
1635 int size = (st.insn[0] & 0x01) ? 2 : 1;
1637 struct srcdest dest;
1642 = m32c_decode_srcdest4 (&st, (st.insn[1] >> 4) & 0xf, size);
1644 = m32c_decode_srcdest4 (&st, st.insn[1] & 0xf, size);
1645 src_value = m32c_srcdest_fetch (&st, src, size);
1647 if (m32c_is_arg_spill (&st, dest, src_value))
1648 after_last_frame_related_insn = st.next_addr;
1649 else if (m32c_is_struct_return (&st, dest, src_value))
1650 after_last_frame_related_insn = st.next_addr;
1652 if (m32c_srcdest_store (&st, dest, src_value, size))
1656 /* (1) LDC #IMM16, sp */
1657 else if (st.insn[0] == 0xeb
1658 && st.insn[1] == 0x50)
1661 st.sp = pv_constant (m32c_udisp16 (&st));
1665 /* We've hit some instruction we don't know how to simulate.
1666 Strictly speaking, we should set every value we're
1667 tracking to "unknown". But we'll be optimistic, assume
1668 that we have enough information already, and stop
1674 int src_indirect = 0;
1675 int dest_indirect = 0;
1678 gdb_assert (mach == bfd_mach_m32c);
1680 /* Check for prefix bytes indicating indirect addressing. */
1681 if (st.insn[0] == 0x41)
1686 else if (st.insn[0] == 0x09)
1691 else if (st.insn[0] == 0x49)
1693 src_indirect = dest_indirect = 1;
1697 /* (1) ENTER #imm8 */
1698 if (st.insn[i] == 0xec)
1700 if (m32c_pv_enter (&st, st.insn[i + 1]))
1706 else if (st.insn[i] == 0x8f)
1708 int src = st.insn[i + 1];
1709 if (m32c_pv_pushm (&st, src))
1713 if (m32c_pushm_is_reg_save (&st, src))
1714 after_last_frame_related_insn = st.next_addr;
1717 /* (7) MOV.size:G src, dest */
1718 else if ((st.insn[i] & 0x80) == 0x80
1719 && (st.insn[i + 1] & 0x0f) == 0x0b
1720 && m32c_get_src23 (&st.insn[i]) < 20
1721 && m32c_get_dest23 (&st.insn[i]) < 20)
1724 struct srcdest dest;
1726 int bw = st.insn[i] & 0x01;
1727 int size = bw ? 2 : 1;
1731 = m32c_decode_sd23 (&st, m32c_get_src23 (&st.insn[i]),
1732 size, src_indirect);
1734 = m32c_decode_sd23 (&st, m32c_get_dest23 (&st.insn[i]),
1735 size, dest_indirect);
1736 src_value = m32c_srcdest_fetch (&st, src, size);
1738 if (m32c_is_arg_spill (&st, dest, src_value))
1739 after_last_frame_related_insn = st.next_addr;
1741 if (m32c_srcdest_store (&st, dest, src_value, size))
1744 /* (2) LDC #IMM24, sp */
1745 else if (st.insn[i] == 0xd5
1746 && st.insn[i + 1] == 0x29)
1749 st.sp = pv_constant (m32c_udisp24 (&st));
1752 /* We've hit some instruction we don't know how to simulate.
1753 Strictly speaking, we should set every value we're
1754 tracking to "unknown". But we'll be optimistic, assume
1755 that we have enough information already, and stop
1760 /* If this instruction changed the FB or decreased the SP (i.e.,
1761 allocated more stack space), then this may be a good place to
1762 declare the prologue finished. However, there are some
1765 - If the instruction just changed the FB back to its original
1766 value, then that's probably a restore instruction. The
1767 prologue should definitely end before that.
1769 - If the instruction increased the value of the SP (that is,
1770 shrunk the frame), then it's probably part of a frame
1771 teardown sequence, and the prologue should end before
1774 if (! pv_is_identical (st.fb, pre_insn_fb))
1776 if (! pv_is_register_k (st.fb, tdep->fb->num, 0))
1777 after_last_frame_related_insn = st.next_addr;
1779 else if (! pv_is_identical (st.sp, pre_insn_sp))
1781 /* The comparison of the constants looks odd, there, because
1782 .k is unsigned. All it really means is that the SP is
1783 lower than it was before the instruction. */
1784 if ( pv_is_register (pre_insn_sp, tdep->sp->num)
1785 && pv_is_register (st.sp, tdep->sp->num)
1786 && ((pre_insn_sp.k - st.sp.k) < (st.sp.k - pre_insn_sp.k)))
1787 after_last_frame_related_insn = st.next_addr;
1790 st.scan_pc = st.next_addr;
1793 /* Did we load a constant value into the stack pointer? */
1794 if (pv_is_constant (st.sp))
1795 prologue->kind = prologue_first_frame;
1797 /* Alternatively, did we initialize the frame pointer? Remember
1798 that the CFA is the address after the return address. */
1799 if (pv_is_register (st.fb, tdep->sp->num))
1801 prologue->kind = prologue_with_frame_ptr;
1802 prologue->frame_ptr_offset = st.fb.k;
1805 /* Is the frame size a known constant? Remember that frame_size is
1806 actually the offset from the CFA to the SP (i.e., a negative
1808 else if (pv_is_register (st.sp, tdep->sp->num))
1810 prologue->kind = prologue_sans_frame_ptr;
1811 prologue->frame_size = st.sp.k;
1814 /* We haven't been able to make sense of this function's frame. Treat
1815 it as the first frame. */
1817 prologue->kind = prologue_first_frame;
1819 /* Record where all the registers were saved. */
1820 pv_area_scan (st.stack, check_for_saved, (void *) prologue);
1822 prologue->prologue_end = after_last_frame_related_insn;
1824 do_cleanups (back_to);
1829 m32c_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR ip)
1832 CORE_ADDR func_addr, func_end, sal_end;
1833 struct m32c_prologue p;
1835 /* Try to find the extent of the function that contains IP. */
1836 if (! find_pc_partial_function (ip, &name, &func_addr, &func_end))
1839 /* Find end by prologue analysis. */
1840 m32c_analyze_prologue (gdbarch, ip, func_end, &p);
1841 /* Find end by line info. */
1842 sal_end = skip_prologue_using_sal (gdbarch, ip);
1843 /* Return whichever is lower. */
1844 if (sal_end != 0 && sal_end != ip && sal_end < p.prologue_end)
1847 return p.prologue_end;
1852 /* Stack unwinding. */
1854 static struct m32c_prologue *
1855 m32c_analyze_frame_prologue (struct frame_info *this_frame,
1856 void **this_prologue_cache)
1858 if (! *this_prologue_cache)
1860 CORE_ADDR func_start = get_frame_func (this_frame);
1861 CORE_ADDR stop_addr = get_frame_pc (this_frame);
1863 /* If we couldn't find any function containing the PC, then
1864 just initialize the prologue cache, but don't do anything. */
1866 stop_addr = func_start;
1868 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct m32c_prologue);
1869 m32c_analyze_prologue (get_frame_arch (this_frame),
1870 func_start, stop_addr, *this_prologue_cache);
1873 return *this_prologue_cache;
1878 m32c_frame_base (struct frame_info *this_frame,
1879 void **this_prologue_cache)
1881 struct m32c_prologue *p
1882 = m32c_analyze_frame_prologue (this_frame, this_prologue_cache);
1883 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
1885 /* In functions that use alloca, the distance between the stack
1886 pointer and the frame base varies dynamically, so we can't use
1887 the SP plus static information like prologue analysis to find the
1888 frame base. However, such functions must have a frame pointer,
1889 to be able to restore the SP on exit. So whenever we do have a
1890 frame pointer, use that to find the base. */
1893 case prologue_with_frame_ptr:
1896 = get_frame_register_unsigned (this_frame, tdep->fb->num);
1897 return fb - p->frame_ptr_offset;
1900 case prologue_sans_frame_ptr:
1903 = get_frame_register_unsigned (this_frame, tdep->sp->num);
1904 return sp - p->frame_size;
1907 case prologue_first_frame:
1911 gdb_assert_not_reached ("unexpected prologue kind");
1917 m32c_this_id (struct frame_info *this_frame,
1918 void **this_prologue_cache,
1919 struct frame_id *this_id)
1921 CORE_ADDR base = m32c_frame_base (this_frame, this_prologue_cache);
1924 *this_id = frame_id_build (base, get_frame_func (this_frame));
1925 /* Otherwise, leave it unset, and that will terminate the backtrace. */
1929 static struct value *
1930 m32c_prev_register (struct frame_info *this_frame,
1931 void **this_prologue_cache, int regnum)
1933 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
1934 struct m32c_prologue *p
1935 = m32c_analyze_frame_prologue (this_frame, this_prologue_cache);
1936 CORE_ADDR frame_base = m32c_frame_base (this_frame, this_prologue_cache);
1937 int reg_size = register_size (get_frame_arch (this_frame), regnum);
1939 if (regnum == tdep->sp->num)
1940 return frame_unwind_got_constant (this_frame, regnum, frame_base);
1942 /* If prologue analysis says we saved this register somewhere,
1943 return a description of the stack slot holding it. */
1944 if (p->reg_offset[regnum] != 1)
1945 return frame_unwind_got_memory (this_frame, regnum,
1946 frame_base + p->reg_offset[regnum]);
1948 /* Otherwise, presume we haven't changed the value of this
1949 register, and get it from the next frame. */
1950 return frame_unwind_got_register (this_frame, regnum, regnum);
1954 static const struct frame_unwind m32c_unwind = {
1956 default_frame_unwind_stop_reason,
1960 default_frame_sniffer
1965 m32c_unwind_pc (struct gdbarch *arch, struct frame_info *next_frame)
1967 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1968 return frame_unwind_register_unsigned (next_frame, tdep->pc->num);
1973 m32c_unwind_sp (struct gdbarch *arch, struct frame_info *next_frame)
1975 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1976 return frame_unwind_register_unsigned (next_frame, tdep->sp->num);
1980 /* Inferior calls. */
1982 /* The calling conventions, according to GCC:
1986 First arg may be passed in r1l or r1 if it (1) fits (QImode or
1987 HImode), (2) is named, and (3) is an integer or pointer type (no
1988 structs, floats, etc). Otherwise, it's passed on the stack.
1990 Second arg may be passed in r2, same restrictions (but not QImode),
1991 even if the first arg is passed on the stack.
1993 Third and further args are passed on the stack. No padding is
1994 used, stack "alignment" is 8 bits.
1999 First arg may be passed in r0l or r0, same restrictions as above.
2001 Second and further args are passed on the stack. Padding is used
2002 after QImode parameters (i.e. lower-addressed byte is the value,
2003 higher-addressed byte is the padding), stack "alignment" is 16
2007 /* Return true if TYPE is a type that can be passed in registers. (We
2008 ignore the size, and pay attention only to the type code;
2009 acceptable sizes depends on which register is being considered to
2012 m32c_reg_arg_type (struct type *type)
2014 enum type_code code = TYPE_CODE (type);
2016 return (code == TYPE_CODE_INT
2017 || code == TYPE_CODE_ENUM
2018 || code == TYPE_CODE_PTR
2019 || code == TYPE_CODE_REF
2020 || code == TYPE_CODE_BOOL
2021 || code == TYPE_CODE_CHAR);
2026 m32c_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2027 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
2028 struct value **args, CORE_ADDR sp, int struct_return,
2029 CORE_ADDR struct_addr)
2031 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2032 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2033 unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
2037 /* The number of arguments given in this function's prototype, or
2038 zero if it has a non-prototyped function type. The m32c ABI
2039 passes arguments mentioned in the prototype differently from
2040 those in the ellipsis of a varargs function, or from those passed
2041 to a non-prototyped function. */
2042 int num_prototyped_args = 0;
2045 struct type *func_type = value_type (function);
2047 /* Dereference function pointer types. */
2048 if (TYPE_CODE (func_type) == TYPE_CODE_PTR)
2049 func_type = TYPE_TARGET_TYPE (func_type);
2051 gdb_assert (TYPE_CODE (func_type) == TYPE_CODE_FUNC ||
2052 TYPE_CODE (func_type) == TYPE_CODE_METHOD);
2055 /* The ABI description in gcc/config/m32c/m32c.abi says that
2056 we need to handle prototyped and non-prototyped functions
2057 separately, but the code in GCC doesn't actually do so. */
2058 if (TYPE_PROTOTYPED (func_type))
2060 num_prototyped_args = TYPE_NFIELDS (func_type);
2063 /* First, if the function returns an aggregate by value, push a
2064 pointer to a buffer for it. This doesn't affect the way
2065 subsequent arguments are allocated to registers. */
2068 int ptr_len = TYPE_LENGTH (tdep->ptr_voyd);
2070 write_memory_unsigned_integer (sp, ptr_len, byte_order, struct_addr);
2073 /* Push the arguments. */
2074 for (i = nargs - 1; i >= 0; i--)
2076 struct value *arg = args[i];
2077 const gdb_byte *arg_bits = value_contents (arg);
2078 struct type *arg_type = value_type (arg);
2079 ULONGEST arg_size = TYPE_LENGTH (arg_type);
2081 /* Can it go in r1 or r1l (for m16c) or r0 or r0l (for m32c)? */
2084 && i < num_prototyped_args
2085 && m32c_reg_arg_type (arg_type))
2087 /* Extract and re-store as an integer as a terse way to make
2088 sure it ends up in the least significant end of r1. (GDB
2089 should avoid assuming endianness, even on uni-endian
2091 ULONGEST u = extract_unsigned_integer (arg_bits, arg_size,
2093 struct m32c_reg *reg = (mach == bfd_mach_m16c) ? tdep->r1 : tdep->r0;
2094 regcache_cooked_write_unsigned (regcache, reg->num, u);
2097 /* Can it go in r2? */
2098 else if (mach == bfd_mach_m16c
2101 && i < num_prototyped_args
2102 && m32c_reg_arg_type (arg_type))
2103 regcache_cooked_write (regcache, tdep->r2->num, arg_bits);
2105 /* Everything else goes on the stack. */
2110 /* Align the stack. */
2111 if (mach == bfd_mach_m32c)
2114 write_memory (sp, arg_bits, arg_size);
2118 /* This is the CFA we use to identify the dummy frame. */
2121 /* Push the return address. */
2122 sp -= tdep->ret_addr_bytes;
2123 write_memory_unsigned_integer (sp, tdep->ret_addr_bytes, byte_order,
2126 /* Update the stack pointer. */
2127 regcache_cooked_write_unsigned (regcache, tdep->sp->num, sp);
2129 /* We need to borrow an odd trick from the i386 target here.
2131 The value we return from this function gets used as the stack
2132 address (the CFA) for the dummy frame's ID. The obvious thing is
2133 to return the new TOS. However, that points at the return
2134 address, saved on the stack, which is inconsistent with the CFA's
2135 described by GCC's DWARF 2 .debug_frame information: DWARF 2
2136 .debug_frame info uses the address immediately after the saved
2137 return address. So you end up with a dummy frame whose CFA
2138 points at the return address, but the frame for the function
2139 being called has a CFA pointing after the return address: the
2140 younger CFA is *greater than* the older CFA. The sanity checks
2141 in frame.c don't like that.
2143 So we try to be consistent with the CFA's used by DWARF 2.
2144 Having a dummy frame and a real frame with the *same* CFA is
2150 static struct frame_id
2151 m32c_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
2153 /* This needs to return a frame ID whose PC is the return address
2154 passed to m32c_push_dummy_call, and whose stack_addr is the SP
2155 m32c_push_dummy_call returned.
2157 m32c_unwind_sp gives us the CFA, which is the value the SP had
2158 before the return address was pushed. */
2159 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2160 CORE_ADDR sp = get_frame_register_unsigned (this_frame, tdep->sp->num);
2161 return frame_id_build (sp, get_frame_pc (this_frame));
2166 /* Return values. */
2168 /* Return value conventions, according to GCC:
2179 Aggregate values (regardless of size) are returned by pushing a
2180 pointer to a temporary area on the stack after the args are pushed.
2181 The function fills in this area with the value. Note that this
2182 pointer on the stack does not affect how register arguments, if any,
2189 /* Return non-zero if values of type TYPE are returned by storing them
2190 in a buffer whose address is passed on the stack, ahead of the
2193 m32c_return_by_passed_buf (struct type *type)
2195 enum type_code code = TYPE_CODE (type);
2197 return (code == TYPE_CODE_STRUCT
2198 || code == TYPE_CODE_UNION);
2201 static enum return_value_convention
2202 m32c_return_value (struct gdbarch *gdbarch,
2203 struct value *function,
2204 struct type *valtype,
2205 struct regcache *regcache,
2207 const gdb_byte *writebuf)
2209 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2210 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2211 enum return_value_convention conv;
2212 ULONGEST valtype_len = TYPE_LENGTH (valtype);
2214 if (m32c_return_by_passed_buf (valtype))
2215 conv = RETURN_VALUE_STRUCT_CONVENTION;
2217 conv = RETURN_VALUE_REGISTER_CONVENTION;
2221 /* We should never be called to find values being returned by
2222 RETURN_VALUE_STRUCT_CONVENTION. Those can't be located,
2223 unless we made the call ourselves. */
2224 gdb_assert (conv == RETURN_VALUE_REGISTER_CONVENTION);
2226 gdb_assert (valtype_len <= 8);
2228 /* Anything that fits in r0 is returned there. */
2229 if (valtype_len <= TYPE_LENGTH (tdep->r0->type))
2232 regcache_cooked_read_unsigned (regcache, tdep->r0->num, &u);
2233 store_unsigned_integer (readbuf, valtype_len, byte_order, u);
2237 /* Everything else is passed in mem0, using as many bytes as
2238 needed. This is not what the Renesas tools do, but it's
2239 what GCC does at the moment. */
2240 struct bound_minimal_symbol mem0
2241 = lookup_minimal_symbol ("mem0", NULL, NULL);
2244 error (_("The return value is stored in memory at 'mem0', "
2245 "but GDB cannot find\n"
2247 read_memory (BMSYMBOL_VALUE_ADDRESS (mem0), readbuf, valtype_len);
2253 /* We should never be called to store values to be returned
2254 using RETURN_VALUE_STRUCT_CONVENTION. We have no way of
2255 finding the buffer, unless we made the call ourselves. */
2256 gdb_assert (conv == RETURN_VALUE_REGISTER_CONVENTION);
2258 gdb_assert (valtype_len <= 8);
2260 /* Anything that fits in r0 is returned there. */
2261 if (valtype_len <= TYPE_LENGTH (tdep->r0->type))
2263 ULONGEST u = extract_unsigned_integer (writebuf, valtype_len,
2265 regcache_cooked_write_unsigned (regcache, tdep->r0->num, u);
2269 /* Everything else is passed in mem0, using as many bytes as
2270 needed. This is not what the Renesas tools do, but it's
2271 what GCC does at the moment. */
2272 struct bound_minimal_symbol mem0
2273 = lookup_minimal_symbol ("mem0", NULL, NULL);
2276 error (_("The return value is stored in memory at 'mem0', "
2277 "but GDB cannot find\n"
2279 write_memory (BMSYMBOL_VALUE_ADDRESS (mem0), writebuf, valtype_len);
2290 /* The m16c and m32c use a trampoline function for indirect function
2291 calls. An indirect call looks like this:
2293 ... push arguments ...
2294 ... push target function address ...
2297 The code for m32c_jsri16 looks like this:
2301 # Save return address.
2303 pop.b m32c_jsri_ret+2
2305 # Store target function address.
2306 pop.w m32c_jsri_addr
2308 # Re-push return address.
2309 push.b m32c_jsri_ret+2
2310 push.w m32c_jsri_ret
2312 # Call the target function.
2313 jmpi.a m32c_jsri_addr
2315 Without further information, GDB will treat calls to m32c_jsri16
2316 like calls to any other function. Since m32c_jsri16 doesn't have
2317 debugging information, that normally means that GDB sets a step-
2318 resume breakpoint and lets the program continue --- which is not
2319 what the user wanted. (Giving the trampoline debugging info
2320 doesn't help: the user expects the program to stop in the function
2321 their program is calling, not in some trampoline code they've never
2324 The gdbarch_skip_trampoline_code method tells GDB how to step
2325 through such trampoline functions transparently to the user. When
2326 given the address of a trampoline function's first instruction,
2327 gdbarch_skip_trampoline_code should return the address of the first
2328 instruction of the function really being called. If GDB decides it
2329 wants to step into that function, it will set a breakpoint there
2330 and silently continue to it.
2332 We recognize the trampoline by name, and extract the target address
2333 directly from the stack. This isn't great, but recognizing by its
2334 code sequence seems more fragile. */
2337 m32c_skip_trampoline_code (struct frame_info *frame, CORE_ADDR stop_pc)
2339 struct gdbarch *gdbarch = get_frame_arch (frame);
2340 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2341 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2343 /* It would be nicer to simply look up the addresses of known
2344 trampolines once, and then compare stop_pc with them. However,
2345 we'd need to ensure that that cached address got invalidated when
2346 someone loaded a new executable, and I'm not quite sure of the
2347 best way to do that. find_pc_partial_function does do some
2348 caching, so we'll see how this goes. */
2350 CORE_ADDR start, end;
2352 if (find_pc_partial_function (stop_pc, &name, &start, &end))
2354 /* Are we stopped at the beginning of the trampoline function? */
2355 if (strcmp (name, "m32c_jsri16") == 0
2356 && stop_pc == start)
2358 /* Get the stack pointer. The return address is at the top,
2359 and the target function's address is just below that. We
2360 know it's a two-byte address, since the trampoline is
2362 CORE_ADDR sp = get_frame_sp (get_current_frame ());
2364 = read_memory_unsigned_integer (sp + tdep->ret_addr_bytes,
2367 /* What we have now is the address of a jump instruction.
2368 What we need is the destination of that jump.
2369 The opcode is 1 byte, and the destination is the next 3 bytes. */
2371 target = read_memory_unsigned_integer (target + 1, 3, byte_order);
2380 /* Address/pointer conversions. */
2382 /* On the m16c, there is a 24-bit address space, but only a very few
2383 instructions can generate addresses larger than 0xffff: jumps,
2384 jumps to subroutines, and the lde/std (load/store extended)
2387 Since GCC can only support one size of pointer, we can't have
2388 distinct 'near' and 'far' pointer types; we have to pick one size
2389 for everything. If we wanted to use 24-bit pointers, then GCC
2390 would have to use lde and ste for all memory references, which
2391 would be terrible for performance and code size. So the GNU
2392 toolchain uses 16-bit pointers for everything, and gives up the
2393 ability to have pointers point outside the first 64k of memory.
2395 However, as a special hack, we let the linker place functions at
2396 addresses above 0xffff, as long as it also places a trampoline in
2397 the low 64k for every function whose address is taken. Each
2398 trampoline consists of a single jmp.a instruction that jumps to the
2399 function's real entry point. Pointers to functions can be 16 bits
2400 long, even though the functions themselves are at higher addresses:
2401 the pointers refer to the trampolines, not the functions.
2403 This complicates things for GDB, however: given the address of a
2404 function (from debug info or linker symbols, say) which could be
2405 anywhere in the 24-bit address space, how can we find an
2406 appropriate 16-bit value to use as a pointer to it?
2408 If the linker has not generated a trampoline for the function,
2409 we're out of luck. Well, I guess we could malloc some space and
2410 write a jmp.a instruction to it, but I'm not going to get into that
2413 If the linker has generated a trampoline for the function, then it
2414 also emitted a symbol for the trampoline: if the function's linker
2415 symbol is named NAME, then the function's trampoline's linker
2416 symbol is named NAME.plt.
2418 So, given a code address:
2419 - We try to find a linker symbol at that address.
2420 - If we find such a symbol named NAME, we look for a linker symbol
2422 - If we find such a symbol, we assume it is a trampoline, and use
2423 its address as the pointer value.
2425 And, given a function pointer:
2426 - We try to find a linker symbol at that address named NAME.plt.
2427 - If we find such a symbol, we look for a linker symbol named NAME.
2428 - If we find that, we provide that as the function's address.
2429 - If any of the above steps fail, we return the original address
2430 unchanged; it might really be a function in the low 64k.
2432 See? You *knew* there was a reason you wanted to be a computer
2436 m32c_m16c_address_to_pointer (struct gdbarch *gdbarch,
2437 struct type *type, gdb_byte *buf, CORE_ADDR addr)
2439 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2440 enum type_code target_code;
2441 gdb_assert (TYPE_CODE (type) == TYPE_CODE_PTR ||
2442 TYPE_CODE (type) == TYPE_CODE_REF);
2444 target_code = TYPE_CODE (TYPE_TARGET_TYPE (type));
2446 if (target_code == TYPE_CODE_FUNC || target_code == TYPE_CODE_METHOD)
2448 const char *func_name;
2450 struct bound_minimal_symbol tramp_msym;
2452 /* Try to find a linker symbol at this address. */
2453 struct bound_minimal_symbol func_msym
2454 = lookup_minimal_symbol_by_pc (addr);
2456 if (! func_msym.minsym)
2457 error (_("Cannot convert code address %s to function pointer:\n"
2458 "couldn't find a symbol at that address, to find trampoline."),
2459 paddress (gdbarch, addr));
2461 func_name = MSYMBOL_LINKAGE_NAME (func_msym.minsym);
2462 tramp_name = xmalloc (strlen (func_name) + 5);
2463 strcpy (tramp_name, func_name);
2464 strcat (tramp_name, ".plt");
2466 /* Try to find a linker symbol for the trampoline. */
2467 tramp_msym = lookup_minimal_symbol (tramp_name, NULL, NULL);
2469 /* We've either got another copy of the name now, or don't need
2470 the name any more. */
2473 if (! tramp_msym.minsym)
2477 /* No PLT entry found. Mask off the upper bits of the address
2478 to make a pointer. As noted in the warning to the user
2479 below, this value might be useful if converted back into
2480 an address by GDB, but will otherwise, almost certainly,
2483 Using this masked result does seem to be useful
2484 in gdb.cp/cplusfuncs.exp in which ~40 FAILs turn into
2485 PASSes. These results appear to be correct as well.
2487 We print a warning here so that the user can make a
2488 determination about whether the result is useful or not. */
2489 ptrval = addr & 0xffff;
2491 warning (_("Cannot convert code address %s to function pointer:\n"
2492 "couldn't find trampoline named '%s.plt'.\n"
2493 "Returning pointer value %s instead; this may produce\n"
2494 "a useful result if converted back into an address by GDB,\n"
2495 "but will most likely not be useful otherwise.\n"),
2496 paddress (gdbarch, addr), func_name,
2497 paddress (gdbarch, ptrval));
2504 /* The trampoline's address is our pointer. */
2505 addr = BMSYMBOL_VALUE_ADDRESS (tramp_msym);
2509 store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order, addr);
2514 m32c_m16c_pointer_to_address (struct gdbarch *gdbarch,
2515 struct type *type, const gdb_byte *buf)
2517 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2519 enum type_code target_code;
2521 gdb_assert (TYPE_CODE (type) == TYPE_CODE_PTR ||
2522 TYPE_CODE (type) == TYPE_CODE_REF);
2524 ptr = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order);
2526 target_code = TYPE_CODE (TYPE_TARGET_TYPE (type));
2528 if (target_code == TYPE_CODE_FUNC || target_code == TYPE_CODE_METHOD)
2530 /* See if there is a minimal symbol at that address whose name is
2532 struct bound_minimal_symbol ptr_msym = lookup_minimal_symbol_by_pc (ptr);
2534 if (ptr_msym.minsym)
2536 const char *ptr_msym_name = MSYMBOL_LINKAGE_NAME (ptr_msym.minsym);
2537 int len = strlen (ptr_msym_name);
2540 && strcmp (ptr_msym_name + len - 4, ".plt") == 0)
2542 struct bound_minimal_symbol func_msym;
2543 /* We have a .plt symbol; try to find the symbol for the
2544 corresponding function.
2546 Since the trampoline contains a jump instruction, we
2547 could also just extract the jump's target address. I
2548 don't see much advantage one way or the other. */
2549 char *func_name = xmalloc (len - 4 + 1);
2550 memcpy (func_name, ptr_msym_name, len - 4);
2551 func_name[len - 4] = '\0';
2553 = lookup_minimal_symbol (func_name, NULL, NULL);
2555 /* If we do have such a symbol, return its value as the
2556 function's true address. */
2557 if (func_msym.minsym)
2558 ptr = BMSYMBOL_VALUE_ADDRESS (func_msym);
2565 for (aspace = 1; aspace <= 15; aspace++)
2567 ptr_msym = lookup_minimal_symbol_by_pc ((aspace << 16) | ptr);
2569 if (ptr_msym.minsym)
2570 ptr |= aspace << 16;
2579 m32c_virtual_frame_pointer (struct gdbarch *gdbarch, CORE_ADDR pc,
2581 LONGEST *frame_offset)
2584 CORE_ADDR func_addr, func_end;
2585 struct m32c_prologue p;
2587 struct regcache *regcache = get_current_regcache ();
2588 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2590 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
2591 internal_error (__FILE__, __LINE__,
2592 _("No virtual frame pointer available"));
2594 m32c_analyze_prologue (gdbarch, func_addr, pc, &p);
2597 case prologue_with_frame_ptr:
2598 *frame_regnum = m32c_banked_register (tdep->fb, regcache)->num;
2599 *frame_offset = p.frame_ptr_offset;
2601 case prologue_sans_frame_ptr:
2602 *frame_regnum = m32c_banked_register (tdep->sp, regcache)->num;
2603 *frame_offset = p.frame_size;
2606 *frame_regnum = m32c_banked_register (tdep->sp, regcache)->num;
2611 if (*frame_regnum > gdbarch_num_regs (gdbarch))
2612 internal_error (__FILE__, __LINE__,
2613 _("No virtual frame pointer available"));
2617 /* Initialization. */
2619 static struct gdbarch *
2620 m32c_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2622 struct gdbarch *arch;
2623 struct gdbarch_tdep *tdep;
2624 unsigned long mach = info.bfd_arch_info->mach;
2626 /* Find a candidate among the list of architectures we've created
2628 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2630 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2631 return arches->gdbarch;
2633 tdep = xcalloc (1, sizeof (*tdep));
2634 arch = gdbarch_alloc (&info, tdep);
2636 /* Essential types. */
2639 /* Address/pointer conversions. */
2640 if (mach == bfd_mach_m16c)
2642 set_gdbarch_address_to_pointer (arch, m32c_m16c_address_to_pointer);
2643 set_gdbarch_pointer_to_address (arch, m32c_m16c_pointer_to_address);
2650 set_gdbarch_print_insn (arch, print_insn_m32c);
2653 set_gdbarch_breakpoint_from_pc (arch, m32c_breakpoint_from_pc);
2655 /* Prologue analysis and unwinding. */
2656 set_gdbarch_inner_than (arch, core_addr_lessthan);
2657 set_gdbarch_skip_prologue (arch, m32c_skip_prologue);
2658 set_gdbarch_unwind_pc (arch, m32c_unwind_pc);
2659 set_gdbarch_unwind_sp (arch, m32c_unwind_sp);
2661 /* I'm dropping the dwarf2 sniffer because it has a few problems.
2662 They may be in the dwarf2 cfi code in GDB, or they may be in
2663 the debug info emitted by the upstream toolchain. I don't
2664 know which, but I do know that the prologue analyzer works better.
2666 dwarf2_append_sniffers (arch);
2668 frame_unwind_append_unwinder (arch, &m32c_unwind);
2670 /* Inferior calls. */
2671 set_gdbarch_push_dummy_call (arch, m32c_push_dummy_call);
2672 set_gdbarch_return_value (arch, m32c_return_value);
2673 set_gdbarch_dummy_id (arch, m32c_dummy_id);
2676 set_gdbarch_skip_trampoline_code (arch, m32c_skip_trampoline_code);
2678 set_gdbarch_virtual_frame_pointer (arch, m32c_virtual_frame_pointer);
2680 /* m32c function boundary addresses are not necessarily even.
2681 Therefore, the `vbit', which indicates a pointer to a virtual
2682 member function, is stored in the delta field, rather than as
2683 the low bit of a function pointer address.
2685 In order to verify this, see the definition of
2686 TARGET_PTRMEMFUNC_VBIT_LOCATION in gcc/defaults.h along with the
2687 definition of FUNCTION_BOUNDARY in gcc/config/m32c/m32c.h. */
2688 set_gdbarch_vbit_in_delta (arch, 1);
2693 /* Provide a prototype to silence -Wmissing-prototypes. */
2694 extern initialize_file_ftype _initialize_m32c_tdep;
2697 _initialize_m32c_tdep (void)
2699 register_gdbarch_init (bfd_arch_m32c, m32c_gdbarch_init);
2701 m32c_dma_reggroup = reggroup_new ("dma", USER_REGGROUP);