1 /* Renesas M32C target-dependent code for GDB, the GNU debugger.
3 Copyright 2004, 2005, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
25 #if defined (HAVE_STRING_H)
29 #include "gdb_assert.h"
32 #include "gdb/sim-m32c.h"
36 #include "arch-utils.h"
38 #include "frame-unwind.h"
39 #include "dwarf2-frame.h"
40 #include "dwarf2expr.h"
44 #include "reggroups.h"
45 #include "prologue-value.h"
49 /* The m32c tdep structure. */
51 static struct reggroup *m32c_dma_reggroup;
55 /* The type of a function that moves the value of REG between CACHE or
56 BUF --- in either direction. */
57 typedef enum register_status (m32c_move_reg_t) (struct m32c_reg *reg,
58 struct regcache *cache,
63 /* The name of this register. */
69 /* The architecture this register belongs to. */
72 /* Its GDB register number. */
75 /* Its sim register number. */
78 /* Its DWARF register number, or -1 if it doesn't have one. */
81 /* Register group memberships. */
82 unsigned int general_p : 1;
83 unsigned int dma_p : 1;
84 unsigned int system_p : 1;
85 unsigned int save_restore_p : 1;
87 /* Functions to read its value from a regcache, and write its value
89 m32c_move_reg_t *read, *write;
91 /* Data for READ and WRITE functions. The exact meaning depends on
92 the specific functions selected; see the comments for those
94 struct m32c_reg *rx, *ry;
99 /* An overestimate of the number of raw and pseudoregisters we will
100 have. The exact answer depends on the variant of the architecture
101 at hand, but we can use this to declare statically allocated
102 arrays, and bump it up when needed. */
103 #define M32C_MAX_NUM_REGS (75)
105 /* The largest assigned DWARF register number. */
106 #define M32C_MAX_DWARF_REGNUM (40)
111 /* All the registers for this variant, indexed by GDB register
112 number, and the number of registers present. */
113 struct m32c_reg regs[M32C_MAX_NUM_REGS];
115 /* The number of valid registers. */
118 /* Interesting registers. These are pointers into REGS. */
119 struct m32c_reg *pc, *flg;
120 struct m32c_reg *r0, *r1, *r2, *r3, *a0, *a1;
121 struct m32c_reg *r2r0, *r3r2r1r0, *r3r1r2r0;
122 struct m32c_reg *sb, *fb, *sp;
124 /* A table indexed by DWARF register numbers, pointing into
126 struct m32c_reg *dwarf_regs[M32C_MAX_DWARF_REGNUM + 1];
128 /* Types for this architecture. We can't use the builtin_type_foo
129 types, because they're not initialized when building a gdbarch
131 struct type *voyd, *ptr_voyd, *func_voyd;
132 struct type *uint8, *uint16;
133 struct type *int8, *int16, *int32, *int64;
135 /* The types for data address and code address registers. */
136 struct type *data_addr_reg_type, *code_addr_reg_type;
138 /* The number of bytes a return address pushed by a 'jsr' instruction
139 occupies on the stack. */
142 /* The number of bytes an address register occupies on the stack
143 when saved by an 'enter' or 'pushm' instruction. */
151 make_types (struct gdbarch *arch)
153 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
154 unsigned long mach = gdbarch_bfd_arch_info (arch)->mach;
155 int data_addr_reg_bits, code_addr_reg_bits;
159 /* This is used to clip CORE_ADDR values, so this value is
160 appropriate both on the m32c, where pointers are 32 bits long,
161 and on the m16c, where pointers are sixteen bits long, but there
162 may be code above the 64k boundary. */
163 set_gdbarch_addr_bit (arch, 24);
165 /* GCC uses 32 bits for addrs in the dwarf info, even though
166 only 16/24 bits are used. Setting addr_bit to 24 causes
167 errors in reading the dwarf addresses. */
168 set_gdbarch_addr_bit (arch, 32);
171 set_gdbarch_int_bit (arch, 16);
175 data_addr_reg_bits = 16;
176 code_addr_reg_bits = 24;
177 set_gdbarch_ptr_bit (arch, 16);
178 tdep->ret_addr_bytes = 3;
179 tdep->push_addr_bytes = 2;
183 data_addr_reg_bits = 24;
184 code_addr_reg_bits = 24;
185 set_gdbarch_ptr_bit (arch, 32);
186 tdep->ret_addr_bytes = 4;
187 tdep->push_addr_bytes = 4;
191 gdb_assert_not_reached ("unexpected mach");
194 /* The builtin_type_mumble variables are sometimes uninitialized when
195 this is called, so we avoid using them. */
196 tdep->voyd = arch_type (arch, TYPE_CODE_VOID, 1, "void");
198 = arch_type (arch, TYPE_CODE_PTR, gdbarch_ptr_bit (arch) / TARGET_CHAR_BIT,
200 TYPE_TARGET_TYPE (tdep->ptr_voyd) = tdep->voyd;
201 TYPE_UNSIGNED (tdep->ptr_voyd) = 1;
202 tdep->func_voyd = lookup_function_type (tdep->voyd);
204 sprintf (type_name, "%s_data_addr_t",
205 gdbarch_bfd_arch_info (arch)->printable_name);
206 tdep->data_addr_reg_type
207 = arch_type (arch, TYPE_CODE_PTR, data_addr_reg_bits / TARGET_CHAR_BIT,
208 xstrdup (type_name));
209 TYPE_TARGET_TYPE (tdep->data_addr_reg_type) = tdep->voyd;
210 TYPE_UNSIGNED (tdep->data_addr_reg_type) = 1;
212 sprintf (type_name, "%s_code_addr_t",
213 gdbarch_bfd_arch_info (arch)->printable_name);
214 tdep->code_addr_reg_type
215 = arch_type (arch, TYPE_CODE_PTR, code_addr_reg_bits / TARGET_CHAR_BIT,
216 xstrdup (type_name));
217 TYPE_TARGET_TYPE (tdep->code_addr_reg_type) = tdep->func_voyd;
218 TYPE_UNSIGNED (tdep->code_addr_reg_type) = 1;
220 tdep->uint8 = arch_integer_type (arch, 8, 1, "uint8_t");
221 tdep->uint16 = arch_integer_type (arch, 16, 1, "uint16_t");
222 tdep->int8 = arch_integer_type (arch, 8, 0, "int8_t");
223 tdep->int16 = arch_integer_type (arch, 16, 0, "int16_t");
224 tdep->int32 = arch_integer_type (arch, 32, 0, "int32_t");
225 tdep->int64 = arch_integer_type (arch, 64, 0, "int64_t");
233 m32c_register_name (struct gdbarch *gdbarch, int num)
235 return gdbarch_tdep (gdbarch)->regs[num].name;
240 m32c_register_type (struct gdbarch *arch, int reg_nr)
242 return gdbarch_tdep (arch)->regs[reg_nr].type;
247 m32c_register_sim_regno (struct gdbarch *gdbarch, int reg_nr)
249 return gdbarch_tdep (gdbarch)->regs[reg_nr].sim_num;
254 m32c_debug_info_reg_to_regnum (struct gdbarch *gdbarch, int reg_nr)
256 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
257 if (0 <= reg_nr && reg_nr <= M32C_MAX_DWARF_REGNUM
258 && tdep->dwarf_regs[reg_nr])
259 return tdep->dwarf_regs[reg_nr]->num;
261 /* The DWARF CFI code expects to see -1 for invalid register
268 m32c_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
269 struct reggroup *group)
271 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
272 struct m32c_reg *reg = &tdep->regs[regnum];
274 /* The anonymous raw registers aren't in any groups. */
278 if (group == all_reggroup)
281 if (group == general_reggroup
285 if (group == m32c_dma_reggroup
289 if (group == system_reggroup
293 /* Since the m32c DWARF register numbers refer to cooked registers, not
294 raw registers, and frame_pop depends on the save and restore groups
295 containing registers the DWARF CFI will actually mention, our save
296 and restore groups are cooked registers, not raw registers. (This is
297 why we can't use the default reggroup function.) */
298 if ((group == save_reggroup
299 || group == restore_reggroup)
300 && reg->save_restore_p)
307 /* Register move functions. We declare them here using
308 m32c_move_reg_t to check the types. */
309 static m32c_move_reg_t m32c_raw_read, m32c_raw_write;
310 static m32c_move_reg_t m32c_banked_read, m32c_banked_write;
311 static m32c_move_reg_t m32c_sb_read, m32c_sb_write;
312 static m32c_move_reg_t m32c_part_read, m32c_part_write;
313 static m32c_move_reg_t m32c_cat_read, m32c_cat_write;
314 static m32c_move_reg_t m32c_r3r2r1r0_read, m32c_r3r2r1r0_write;
317 /* Copy the value of the raw register REG from CACHE to BUF. */
318 static enum register_status
319 m32c_raw_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
321 return regcache_raw_read (cache, reg->num, buf);
325 /* Copy the value of the raw register REG from BUF to CACHE. */
326 static enum register_status
327 m32c_raw_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
329 regcache_raw_write (cache, reg->num, (const void *) buf);
335 /* Return the value of the 'flg' register in CACHE. */
337 m32c_read_flg (struct regcache *cache)
339 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (cache));
341 regcache_raw_read_unsigned (cache, tdep->flg->num, &flg);
346 /* Evaluate the real register number of a banked register. */
347 static struct m32c_reg *
348 m32c_banked_register (struct m32c_reg *reg, struct regcache *cache)
350 return ((m32c_read_flg (cache) & reg->n) ? reg->ry : reg->rx);
354 /* Move the value of a banked register from CACHE to BUF.
355 If the value of the 'flg' register in CACHE has any of the bits
356 masked in REG->n set, then read REG->ry. Otherwise, read
358 static enum register_status
359 m32c_banked_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
361 struct m32c_reg *bank_reg = m32c_banked_register (reg, cache);
362 return regcache_raw_read (cache, bank_reg->num, buf);
366 /* Move the value of a banked register from BUF to CACHE.
367 If the value of the 'flg' register in CACHE has any of the bits
368 masked in REG->n set, then write REG->ry. Otherwise, write
370 static enum register_status
371 m32c_banked_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
373 struct m32c_reg *bank_reg = m32c_banked_register (reg, cache);
374 regcache_raw_write (cache, bank_reg->num, (const void *) buf);
380 /* Move the value of SB from CACHE to BUF. On bfd_mach_m32c, SB is a
381 banked register; on bfd_mach_m16c, it's not. */
382 static enum register_status
383 m32c_sb_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
385 if (gdbarch_bfd_arch_info (reg->arch)->mach == bfd_mach_m16c)
386 return m32c_raw_read (reg->rx, cache, buf);
388 return m32c_banked_read (reg, cache, buf);
392 /* Move the value of SB from BUF to CACHE. On bfd_mach_m32c, SB is a
393 banked register; on bfd_mach_m16c, it's not. */
394 static enum register_status
395 m32c_sb_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
397 if (gdbarch_bfd_arch_info (reg->arch)->mach == bfd_mach_m16c)
398 m32c_raw_write (reg->rx, cache, buf);
400 m32c_banked_write (reg, cache, buf);
406 /* Assuming REG uses m32c_part_read and m32c_part_write, set *OFFSET_P
407 and *LEN_P to the offset and length, in bytes, of the part REG
408 occupies in its underlying register. The offset is from the
409 lower-addressed end, regardless of the architecture's endianness.
410 (The M32C family is always little-endian, but let's keep those
411 assumptions out of here.) */
413 m32c_find_part (struct m32c_reg *reg, int *offset_p, int *len_p)
415 /* The length of the containing register, of which REG is one part. */
416 int containing_len = TYPE_LENGTH (reg->rx->type);
418 /* The length of one "element" in our imaginary array. */
419 int elt_len = TYPE_LENGTH (reg->type);
421 /* The offset of REG's "element" from the least significant end of
422 the containing register. */
423 int elt_offset = reg->n * elt_len;
425 /* If we extend off the end, trim the length of the element. */
426 if (elt_offset + elt_len > containing_len)
428 elt_len = containing_len - elt_offset;
429 /* We shouldn't be declaring partial registers that go off the
430 end of their containing registers. */
431 gdb_assert (elt_len > 0);
434 /* Flip the offset around if we're big-endian. */
435 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
436 elt_offset = TYPE_LENGTH (reg->rx->type) - elt_offset - elt_len;
438 *offset_p = elt_offset;
443 /* Move the value of a partial register (r0h, intbl, etc.) from CACHE
444 to BUF. Treating the value of the register REG->rx as an array of
445 REG->type values, where higher indices refer to more significant
446 bits, read the value of the REG->n'th element. */
447 static enum register_status
448 m32c_part_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
452 memset (buf, 0, TYPE_LENGTH (reg->type));
453 m32c_find_part (reg, &offset, &len);
454 return regcache_cooked_read_part (cache, reg->rx->num, offset, len, buf);
458 /* Move the value of a banked register from BUF to CACHE.
459 Treating the value of the register REG->rx as an array of REG->type
460 values, where higher indices refer to more significant bits, write
461 the value of the REG->n'th element. */
462 static enum register_status
463 m32c_part_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
467 m32c_find_part (reg, &offset, &len);
468 regcache_cooked_write_part (cache, reg->rx->num, offset, len, buf);
474 /* Move the value of REG from CACHE to BUF. REG's value is the
475 concatenation of the values of the registers REG->rx and REG->ry,
476 with REG->rx contributing the more significant bits. */
477 static enum register_status
478 m32c_cat_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
480 int high_bytes = TYPE_LENGTH (reg->rx->type);
481 int low_bytes = TYPE_LENGTH (reg->ry->type);
482 /* For address arithmetic. */
483 unsigned char *cbuf = buf;
484 enum register_status status;
486 gdb_assert (TYPE_LENGTH (reg->type) == high_bytes + low_bytes);
488 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
490 status = regcache_cooked_read (cache, reg->rx->num, cbuf);
491 if (status == REG_VALID)
492 status = regcache_cooked_read (cache, reg->ry->num, cbuf + high_bytes);
496 status = regcache_cooked_read (cache, reg->rx->num, cbuf + low_bytes);
497 if (status == REG_VALID)
498 status = regcache_cooked_read (cache, reg->ry->num, cbuf);
505 /* Move the value of REG from CACHE to BUF. REG's value is the
506 concatenation of the values of the registers REG->rx and REG->ry,
507 with REG->rx contributing the more significant bits. */
508 static enum register_status
509 m32c_cat_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
511 int high_bytes = TYPE_LENGTH (reg->rx->type);
512 int low_bytes = TYPE_LENGTH (reg->ry->type);
513 /* For address arithmetic. */
514 unsigned char *cbuf = buf;
516 gdb_assert (TYPE_LENGTH (reg->type) == high_bytes + low_bytes);
518 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
520 regcache_cooked_write (cache, reg->rx->num, cbuf);
521 regcache_cooked_write (cache, reg->ry->num, cbuf + high_bytes);
525 regcache_cooked_write (cache, reg->rx->num, cbuf + low_bytes);
526 regcache_cooked_write (cache, reg->ry->num, cbuf);
533 /* Copy the value of the raw register REG from CACHE to BUF. REG is
534 the concatenation (from most significant to least) of r3, r2, r1,
536 static enum register_status
537 m32c_r3r2r1r0_read (struct m32c_reg *reg, struct regcache *cache, void *buf)
539 struct gdbarch_tdep *tdep = gdbarch_tdep (reg->arch);
540 int len = TYPE_LENGTH (tdep->r0->type);
541 enum register_status status;
543 /* For address arithmetic. */
544 unsigned char *cbuf = buf;
546 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
548 status = regcache_cooked_read (cache, tdep->r0->num, cbuf + len * 3);
549 if (status == REG_VALID)
550 status = regcache_cooked_read (cache, tdep->r1->num, cbuf + len * 2);
551 if (status == REG_VALID)
552 status = regcache_cooked_read (cache, tdep->r2->num, cbuf + len * 1);
553 if (status == REG_VALID)
554 status = regcache_cooked_read (cache, tdep->r3->num, cbuf);
558 status = regcache_cooked_read (cache, tdep->r0->num, cbuf);
559 if (status == REG_VALID)
560 status = regcache_cooked_read (cache, tdep->r1->num, cbuf + len * 1);
561 if (status == REG_VALID)
562 status = regcache_cooked_read (cache, tdep->r2->num, cbuf + len * 2);
563 if (status == REG_VALID)
564 status = regcache_cooked_read (cache, tdep->r3->num, cbuf + len * 3);
571 /* Copy the value of the raw register REG from BUF to CACHE. REG is
572 the concatenation (from most significant to least) of r3, r2, r1,
574 static enum register_status
575 m32c_r3r2r1r0_write (struct m32c_reg *reg, struct regcache *cache, void *buf)
577 struct gdbarch_tdep *tdep = gdbarch_tdep (reg->arch);
578 int len = TYPE_LENGTH (tdep->r0->type);
580 /* For address arithmetic. */
581 unsigned char *cbuf = buf;
583 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
585 regcache_cooked_write (cache, tdep->r0->num, cbuf + len * 3);
586 regcache_cooked_write (cache, tdep->r1->num, cbuf + len * 2);
587 regcache_cooked_write (cache, tdep->r2->num, cbuf + len * 1);
588 regcache_cooked_write (cache, tdep->r3->num, cbuf);
592 regcache_cooked_write (cache, tdep->r0->num, cbuf);
593 regcache_cooked_write (cache, tdep->r1->num, cbuf + len * 1);
594 regcache_cooked_write (cache, tdep->r2->num, cbuf + len * 2);
595 regcache_cooked_write (cache, tdep->r3->num, cbuf + len * 3);
602 static enum register_status
603 m32c_pseudo_register_read (struct gdbarch *arch,
604 struct regcache *cache,
608 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
609 struct m32c_reg *reg;
611 gdb_assert (0 <= cookednum && cookednum < tdep->num_regs);
612 gdb_assert (arch == get_regcache_arch (cache));
613 gdb_assert (arch == tdep->regs[cookednum].arch);
614 reg = &tdep->regs[cookednum];
616 return reg->read (reg, cache, buf);
621 m32c_pseudo_register_write (struct gdbarch *arch,
622 struct regcache *cache,
626 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
627 struct m32c_reg *reg;
629 gdb_assert (0 <= cookednum && cookednum < tdep->num_regs);
630 gdb_assert (arch == get_regcache_arch (cache));
631 gdb_assert (arch == tdep->regs[cookednum].arch);
632 reg = &tdep->regs[cookednum];
634 reg->write (reg, cache, (void *) buf);
638 /* Add a register with the given fields to the end of ARCH's table.
639 Return a pointer to the newly added register. */
640 static struct m32c_reg *
641 add_reg (struct gdbarch *arch,
645 m32c_move_reg_t *read,
646 m32c_move_reg_t *write,
651 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
652 struct m32c_reg *r = &tdep->regs[tdep->num_regs];
654 gdb_assert (tdep->num_regs < M32C_MAX_NUM_REGS);
659 r->num = tdep->num_regs;
660 r->sim_num = sim_num;
665 r->save_restore_p = 0;
678 /* Record NUM as REG's DWARF register number. */
680 set_dwarf_regnum (struct m32c_reg *reg, int num)
682 gdb_assert (num < M32C_MAX_NUM_REGS);
684 /* Update the reg->DWARF mapping. Only count the first number
685 assigned to this register. */
686 if (reg->dwarf_num == -1)
687 reg->dwarf_num = num;
689 /* Update the DWARF->reg mapping. */
690 gdbarch_tdep (reg->arch)->dwarf_regs[num] = reg;
694 /* Mark REG as a general-purpose register, and return it. */
695 static struct m32c_reg *
696 mark_general (struct m32c_reg *reg)
703 /* Mark REG as a DMA register, and return it. */
704 static struct m32c_reg *
705 mark_dma (struct m32c_reg *reg)
712 /* Mark REG as a SYSTEM register, and return it. */
713 static struct m32c_reg *
714 mark_system (struct m32c_reg *reg)
721 /* Mark REG as a save-restore register, and return it. */
722 static struct m32c_reg *
723 mark_save_restore (struct m32c_reg *reg)
725 reg->save_restore_p = 1;
730 #define FLAGBIT_B 0x0010
731 #define FLAGBIT_U 0x0080
733 /* Handy macros for declaring registers. These all evaluate to
734 pointers to the register declared. Macros that define two
735 registers evaluate to a pointer to the first. */
737 /* A raw register named NAME, with type TYPE and sim number SIM_NUM. */
738 #define R(name, type, sim_num) \
739 (add_reg (arch, (name), (type), (sim_num), \
740 m32c_raw_read, m32c_raw_write, NULL, NULL, 0))
742 /* The simulator register number for a raw register named NAME. */
743 #define SIM(name) (m32c_sim_reg_ ## name)
745 /* A raw unsigned 16-bit data register named NAME.
746 NAME should be an identifier, not a string. */
748 (R(#name, tdep->uint16, SIM (name)))
750 /* A raw data address register named NAME.
751 NAME should be an identifier, not a string. */
753 (R(#name, tdep->data_addr_reg_type, SIM (name)))
755 /* A raw code address register named NAME. NAME should
756 be an identifier, not a string. */
758 (R(#name, tdep->code_addr_reg_type, SIM (name)))
760 /* A pair of raw registers named NAME0 and NAME1, with type TYPE.
761 NAME should be an identifier, not a string. */
762 #define RP(name, type) \
763 (R(#name "0", (type), SIM (name ## 0)), \
764 R(#name "1", (type), SIM (name ## 1)) - 1)
766 /* A raw banked general-purpose data register named NAME.
767 NAME should be an identifier, not a string. */
769 (R(NULL, tdep->int16, SIM (name ## _bank0)), \
770 R(NULL, tdep->int16, SIM (name ## _bank1)) - 1)
772 /* A raw banked data address register named NAME.
773 NAME should be an identifier, not a string. */
775 (R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank0)), \
776 R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank1)) - 1)
778 /* A cooked register named NAME referring to a raw banked register
779 from the bank selected by the current value of FLG. RAW_PAIR
780 should be a pointer to the first register in the banked pair.
781 NAME must be an identifier, not a string. */
782 #define CB(name, raw_pair) \
783 (add_reg (arch, #name, (raw_pair)->type, 0, \
784 m32c_banked_read, m32c_banked_write, \
785 (raw_pair), (raw_pair + 1), FLAGBIT_B))
787 /* A pair of registers named NAMEH and NAMEL, of type TYPE, that
788 access the top and bottom halves of the register pointed to by
789 NAME. NAME should be an identifier. */
790 #define CHL(name, type) \
791 (add_reg (arch, #name "h", (type), 0, \
792 m32c_part_read, m32c_part_write, name, NULL, 1), \
793 add_reg (arch, #name "l", (type), 0, \
794 m32c_part_read, m32c_part_write, name, NULL, 0) - 1)
796 /* A register constructed by concatenating the two registers HIGH and
797 LOW, whose name is HIGHLOW and whose type is TYPE. */
798 #define CCAT(high, low, type) \
799 (add_reg (arch, #high #low, (type), 0, \
800 m32c_cat_read, m32c_cat_write, (high), (low), 0))
802 /* Abbreviations for marking register group membership. */
803 #define G(reg) (mark_general (reg))
804 #define S(reg) (mark_system (reg))
805 #define DMA(reg) (mark_dma (reg))
808 /* Construct the register set for ARCH. */
810 make_regs (struct gdbarch *arch)
812 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
813 int mach = gdbarch_bfd_arch_info (arch)->mach;
826 struct m32c_reg *r0hl;
827 struct m32c_reg *r1hl;
828 struct m32c_reg *r2hl;
829 struct m32c_reg *r3hl;
830 struct m32c_reg *intbhl;
831 struct m32c_reg *r2r0;
832 struct m32c_reg *r3r1;
833 struct m32c_reg *r3r1r2r0;
834 struct m32c_reg *r3r2r1r0;
835 struct m32c_reg *a1a0;
837 struct m32c_reg *raw_r0_pair = RBD (r0);
838 struct m32c_reg *raw_r1_pair = RBD (r1);
839 struct m32c_reg *raw_r2_pair = RBD (r2);
840 struct m32c_reg *raw_r3_pair = RBD (r3);
841 struct m32c_reg *raw_a0_pair = RBA (a0);
842 struct m32c_reg *raw_a1_pair = RBA (a1);
843 struct m32c_reg *raw_fb_pair = RBA (fb);
845 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
846 We always declare both raw registers, and deal with the distinction
847 in the pseudoregister. */
848 struct m32c_reg *raw_sb_pair = RBA (sb);
850 struct m32c_reg *usp = S (RA (usp));
851 struct m32c_reg *isp = S (RA (isp));
852 struct m32c_reg *intb = S (RC (intb));
853 struct m32c_reg *pc = G (RC (pc));
854 struct m32c_reg *flg = G (R16U (flg));
856 if (mach == bfd_mach_m32c)
858 struct m32c_reg *svf = S (R16U (svf));
859 struct m32c_reg *svp = S (RC (svp));
860 struct m32c_reg *vct = S (RC (vct));
862 struct m32c_reg *dmd01 = DMA (RP (dmd, tdep->uint8));
863 struct m32c_reg *dct01 = DMA (RP (dct, tdep->uint16));
864 struct m32c_reg *drc01 = DMA (RP (drc, tdep->uint16));
865 struct m32c_reg *dma01 = DMA (RP (dma, tdep->data_addr_reg_type));
866 struct m32c_reg *dsa01 = DMA (RP (dsa, tdep->data_addr_reg_type));
867 struct m32c_reg *dra01 = DMA (RP (dra, tdep->data_addr_reg_type));
870 num_raw_regs = tdep->num_regs;
872 r0 = G (CB (r0, raw_r0_pair));
873 r1 = G (CB (r1, raw_r1_pair));
874 r2 = G (CB (r2, raw_r2_pair));
875 r3 = G (CB (r3, raw_r3_pair));
876 a0 = G (CB (a0, raw_a0_pair));
877 a1 = G (CB (a1, raw_a1_pair));
878 fb = G (CB (fb, raw_fb_pair));
880 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
881 Specify custom read/write functions that do the right thing. */
882 sb = G (add_reg (arch, "sb", raw_sb_pair->type, 0,
883 m32c_sb_read, m32c_sb_write,
884 raw_sb_pair, raw_sb_pair + 1, 0));
886 /* The current sp is either usp or isp, depending on the value of
887 the FLG register's U bit. */
888 sp = G (add_reg (arch, "sp", usp->type, 0,
889 m32c_banked_read, m32c_banked_write,
890 isp, usp, FLAGBIT_U));
892 r0hl = CHL (r0, tdep->int8);
893 r1hl = CHL (r1, tdep->int8);
894 r2hl = CHL (r2, tdep->int8);
895 r3hl = CHL (r3, tdep->int8);
896 intbhl = CHL (intb, tdep->int16);
898 r2r0 = CCAT (r2, r0, tdep->int32);
899 r3r1 = CCAT (r3, r1, tdep->int32);
900 r3r1r2r0 = CCAT (r3r1, r2r0, tdep->int64);
903 = add_reg (arch, "r3r2r1r0", tdep->int64, 0,
904 m32c_r3r2r1r0_read, m32c_r3r2r1r0_write, NULL, NULL, 0);
906 if (mach == bfd_mach_m16c)
907 a1a0 = CCAT (a1, a0, tdep->int32);
911 num_cooked_regs = tdep->num_regs - num_raw_regs;
920 tdep->r3r2r1r0 = r3r2r1r0;
921 tdep->r3r1r2r0 = r3r1r2r0;
928 /* Set up the DWARF register table. */
929 memset (tdep->dwarf_regs, 0, sizeof (tdep->dwarf_regs));
930 set_dwarf_regnum (r0hl + 1, 0x01);
931 set_dwarf_regnum (r0hl + 0, 0x02);
932 set_dwarf_regnum (r1hl + 1, 0x03);
933 set_dwarf_regnum (r1hl + 0, 0x04);
934 set_dwarf_regnum (r0, 0x05);
935 set_dwarf_regnum (r1, 0x06);
936 set_dwarf_regnum (r2, 0x07);
937 set_dwarf_regnum (r3, 0x08);
938 set_dwarf_regnum (a0, 0x09);
939 set_dwarf_regnum (a1, 0x0a);
940 set_dwarf_regnum (fb, 0x0b);
941 set_dwarf_regnum (sp, 0x0c);
942 set_dwarf_regnum (pc, 0x0d); /* GCC's invention */
943 set_dwarf_regnum (sb, 0x13);
944 set_dwarf_regnum (r2r0, 0x15);
945 set_dwarf_regnum (r3r1, 0x16);
947 set_dwarf_regnum (a1a0, 0x17);
949 /* Enumerate the save/restore register group.
951 The regcache_save and regcache_restore functions apply their read
952 function to each register in this group.
954 Since frame_pop supplies frame_unwind_register as its read
955 function, the registers meaningful to the Dwarf unwinder need to
958 On the other hand, when we make inferior calls, save_inferior_status
959 and restore_inferior_status use them to preserve the current register
960 values across the inferior call. For this, you'd kind of like to
961 preserve all the raw registers, to protect the interrupted code from
962 any sort of bank switching the callee might have done. But we handle
963 those cases so badly anyway --- for example, it matters whether we
964 restore FLG before or after we restore the general-purpose registers,
965 but there's no way to express that --- that it isn't worth worrying
968 We omit control registers like inthl: if you call a function that
969 changes those, it's probably because you wanted that change to be
970 visible to the interrupted code. */
971 mark_save_restore (r0);
972 mark_save_restore (r1);
973 mark_save_restore (r2);
974 mark_save_restore (r3);
975 mark_save_restore (a0);
976 mark_save_restore (a1);
977 mark_save_restore (sb);
978 mark_save_restore (fb);
979 mark_save_restore (sp);
980 mark_save_restore (pc);
981 mark_save_restore (flg);
983 set_gdbarch_num_regs (arch, num_raw_regs);
984 set_gdbarch_num_pseudo_regs (arch, num_cooked_regs);
985 set_gdbarch_pc_regnum (arch, pc->num);
986 set_gdbarch_sp_regnum (arch, sp->num);
987 set_gdbarch_register_name (arch, m32c_register_name);
988 set_gdbarch_register_type (arch, m32c_register_type);
989 set_gdbarch_pseudo_register_read (arch, m32c_pseudo_register_read);
990 set_gdbarch_pseudo_register_write (arch, m32c_pseudo_register_write);
991 set_gdbarch_register_sim_regno (arch, m32c_register_sim_regno);
992 set_gdbarch_stab_reg_to_regnum (arch, m32c_debug_info_reg_to_regnum);
993 set_gdbarch_dwarf2_reg_to_regnum (arch, m32c_debug_info_reg_to_regnum);
994 set_gdbarch_register_reggroup_p (arch, m32c_register_reggroup_p);
996 reggroup_add (arch, general_reggroup);
997 reggroup_add (arch, all_reggroup);
998 reggroup_add (arch, save_reggroup);
999 reggroup_add (arch, restore_reggroup);
1000 reggroup_add (arch, system_reggroup);
1001 reggroup_add (arch, m32c_dma_reggroup);
1008 static const unsigned char *
1009 m32c_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
1011 static unsigned char break_insn[] = { 0x00 }; /* brk */
1013 *len = sizeof (break_insn);
1019 /* Prologue analysis. */
1021 struct m32c_prologue
1023 /* For consistency with the DWARF 2 .debug_frame info generated by
1024 GCC, a frame's CFA is the address immediately after the saved
1027 /* The architecture for which we generated this prologue info. */
1028 struct gdbarch *arch;
1031 /* This function uses a frame pointer. */
1032 prologue_with_frame_ptr,
1034 /* This function has no frame pointer. */
1035 prologue_sans_frame_ptr,
1037 /* This function sets up the stack, so its frame is the first
1038 frame on the stack. */
1039 prologue_first_frame
1043 /* If KIND is prologue_with_frame_ptr, this is the offset from the
1044 CFA to where the frame pointer points. This is always zero or
1046 LONGEST frame_ptr_offset;
1048 /* If KIND is prologue_sans_frame_ptr, the offset from the CFA to
1049 the stack pointer --- always zero or negative.
1051 Calling this a "size" is a bit misleading, but given that the
1052 stack grows downwards, using offsets for everything keeps one
1053 from going completely sign-crazy: you never change anything's
1054 sign for an ADD instruction; always change the second operand's
1055 sign for a SUB instruction; and everything takes care of
1058 Functions that use alloca don't have a constant frame size. But
1059 they always have frame pointers, so we must use that to find the
1060 CFA (and perhaps to unwind the stack pointer). */
1063 /* The address of the first instruction at which the frame has been
1064 set up and the arguments are where the debug info says they are
1065 --- as best as we can tell. */
1066 CORE_ADDR prologue_end;
1068 /* reg_offset[R] is the offset from the CFA at which register R is
1069 saved, or 1 if register R has not been saved. (Real values are
1070 always zero or negative.) */
1071 LONGEST reg_offset[M32C_MAX_NUM_REGS];
1075 /* The longest I've seen, anyway. */
1076 #define M32C_MAX_INSN_LEN (9)
1078 /* Processor state, for the prologue analyzer. */
1079 struct m32c_pv_state
1081 struct gdbarch *arch;
1082 pv_t r0, r1, r2, r3;
1086 struct pv_area *stack;
1088 /* Bytes from the current PC, the address they were read from,
1089 and the address of the next unconsumed byte. */
1090 gdb_byte insn[M32C_MAX_INSN_LEN];
1091 CORE_ADDR scan_pc, next_addr;
1095 /* Push VALUE on STATE's stack, occupying SIZE bytes. Return zero if
1096 all went well, or non-zero if simulating the action would trash our
1099 m32c_pv_push (struct m32c_pv_state *state, pv_t value, int size)
1101 if (pv_area_store_would_trash (state->stack, state->sp))
1104 state->sp = pv_add_constant (state->sp, -size);
1105 pv_area_store (state->stack, state->sp, size, value);
1111 /* A source or destination location for an m16c or m32c
1115 /* If srcdest_reg, the location is a register pointed to by REG.
1116 If srcdest_partial_reg, the location is part of a register pointed
1117 to by REG. We don't try to handle this too well.
1118 If srcdest_mem, the location is memory whose address is ADDR. */
1119 enum { srcdest_reg, srcdest_partial_reg, srcdest_mem } kind;
1124 /* Return the SIZE-byte value at LOC in STATE. */
1126 m32c_srcdest_fetch (struct m32c_pv_state *state, struct srcdest loc, int size)
1128 if (loc.kind == srcdest_mem)
1129 return pv_area_fetch (state->stack, loc.addr, size);
1130 else if (loc.kind == srcdest_partial_reg)
1131 return pv_unknown ();
1137 /* Write VALUE, a SIZE-byte value, to LOC in STATE. Return zero if
1138 all went well, or non-zero if simulating the store would trash our
1141 m32c_srcdest_store (struct m32c_pv_state *state, struct srcdest loc,
1142 pv_t value, int size)
1144 if (loc.kind == srcdest_mem)
1146 if (pv_area_store_would_trash (state->stack, loc.addr))
1148 pv_area_store (state->stack, loc.addr, size, value);
1150 else if (loc.kind == srcdest_partial_reg)
1151 *loc.reg = pv_unknown ();
1160 m32c_sign_ext (int v, int bits)
1162 int mask = 1 << (bits - 1);
1163 return (v ^ mask) - mask;
1167 m32c_next_byte (struct m32c_pv_state *st)
1169 gdb_assert (st->next_addr - st->scan_pc < sizeof (st->insn));
1170 return st->insn[st->next_addr++ - st->scan_pc];
1174 m32c_udisp8 (struct m32c_pv_state *st)
1176 return m32c_next_byte (st);
1181 m32c_sdisp8 (struct m32c_pv_state *st)
1183 return m32c_sign_ext (m32c_next_byte (st), 8);
1188 m32c_udisp16 (struct m32c_pv_state *st)
1190 int low = m32c_next_byte (st);
1191 int high = m32c_next_byte (st);
1193 return low + (high << 8);
1198 m32c_sdisp16 (struct m32c_pv_state *st)
1200 int low = m32c_next_byte (st);
1201 int high = m32c_next_byte (st);
1203 return m32c_sign_ext (low + (high << 8), 16);
1208 m32c_udisp24 (struct m32c_pv_state *st)
1210 int low = m32c_next_byte (st);
1211 int mid = m32c_next_byte (st);
1212 int high = m32c_next_byte (st);
1214 return low + (mid << 8) + (high << 16);
1218 /* Extract the 'source' field from an m32c MOV.size:G-format instruction. */
1220 m32c_get_src23 (unsigned char *i)
1222 return (((i[0] & 0x70) >> 2)
1223 | ((i[1] & 0x30) >> 4));
1227 /* Extract the 'dest' field from an m32c MOV.size:G-format instruction. */
1229 m32c_get_dest23 (unsigned char *i)
1231 return (((i[0] & 0x0e) << 1)
1232 | ((i[1] & 0xc0) >> 6));
1236 static struct srcdest
1237 m32c_decode_srcdest4 (struct m32c_pv_state *st,
1243 sd.kind = (size == 2 ? srcdest_reg : srcdest_partial_reg);
1245 sd.kind = srcdest_mem;
1247 sd.addr = pv_unknown ();
1252 case 0x0: sd.reg = (size == 1 ? &st->r0 : &st->r0); break;
1253 case 0x1: sd.reg = (size == 1 ? &st->r0 : &st->r1); break;
1254 case 0x2: sd.reg = (size == 1 ? &st->r1 : &st->r2); break;
1255 case 0x3: sd.reg = (size == 1 ? &st->r1 : &st->r3); break;
1257 case 0x4: sd.reg = &st->a0; break;
1258 case 0x5: sd.reg = &st->a1; break;
1260 case 0x6: sd.addr = st->a0; break;
1261 case 0x7: sd.addr = st->a1; break;
1263 case 0x8: sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); break;
1264 case 0x9: sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); break;
1265 case 0xa: sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); break;
1266 case 0xb: sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); break;
1268 case 0xc: sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); break;
1269 case 0xd: sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); break;
1270 case 0xe: sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); break;
1271 case 0xf: sd.addr = pv_constant (m32c_udisp16 (st)); break;
1274 gdb_assert_not_reached ("unexpected srcdest4");
1281 static struct srcdest
1282 m32c_decode_sd23 (struct m32c_pv_state *st, int code, int size, int ind)
1286 sd.addr = pv_unknown ();
1295 sd.kind = (size == 1) ? srcdest_partial_reg : srcdest_reg;
1300 sd.kind = (size == 4) ? srcdest_reg : srcdest_partial_reg;
1304 sd.kind = srcdest_mem;
1311 case 0x12: sd.reg = &st->r0; break;
1312 case 0x13: sd.reg = &st->r1; break;
1313 case 0x10: sd.reg = ((size == 1) ? &st->r0 : &st->r2); break;
1314 case 0x11: sd.reg = ((size == 1) ? &st->r1 : &st->r3); break;
1315 case 0x02: sd.reg = &st->a0; break;
1316 case 0x03: sd.reg = &st->a1; break;
1318 case 0x00: sd.addr = st->a0; break;
1319 case 0x01: sd.addr = st->a1; break;
1320 case 0x04: sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); break;
1321 case 0x05: sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); break;
1322 case 0x06: sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); break;
1323 case 0x07: sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); break;
1324 case 0x08: sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); break;
1325 case 0x09: sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); break;
1326 case 0x0a: sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); break;
1327 case 0x0b: sd.addr = pv_add_constant (st->fb, m32c_sdisp16 (st)); break;
1328 case 0x0c: sd.addr = pv_add_constant (st->a0, m32c_udisp24 (st)); break;
1329 case 0x0d: sd.addr = pv_add_constant (st->a1, m32c_udisp24 (st)); break;
1330 case 0x0f: sd.addr = pv_constant (m32c_udisp16 (st)); break;
1331 case 0x0e: sd.addr = pv_constant (m32c_udisp24 (st)); break;
1333 gdb_assert_not_reached ("unexpected sd23");
1338 sd.addr = m32c_srcdest_fetch (st, sd, 4);
1339 sd.kind = srcdest_mem;
1346 /* The r16c and r32c machines have instructions with similar
1347 semantics, but completely different machine language encodings. So
1348 we break out the semantics into their own functions, and leave
1349 machine-specific decoding in m32c_analyze_prologue.
1351 The following functions all expect their arguments already decoded,
1352 and they all return zero if analysis should continue past this
1353 instruction, or non-zero if analysis should stop. */
1356 /* Simulate an 'enter SIZE' instruction in STATE. */
1358 m32c_pv_enter (struct m32c_pv_state *state, int size)
1360 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1362 /* If simulating this store would require us to forget
1363 everything we know about the stack frame in the name of
1364 accuracy, it would be better to just quit now. */
1365 if (pv_area_store_would_trash (state->stack, state->sp))
1368 if (m32c_pv_push (state, state->fb, tdep->push_addr_bytes))
1370 state->fb = state->sp;
1371 state->sp = pv_add_constant (state->sp, -size);
1378 m32c_pv_pushm_one (struct m32c_pv_state *state, pv_t reg,
1379 int bit, int src, int size)
1383 if (m32c_pv_push (state, reg, size))
1391 /* Simulate a 'pushm SRC' instruction in STATE. */
1393 m32c_pv_pushm (struct m32c_pv_state *state, int src)
1395 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1397 /* The bits in SRC indicating which registers to save are:
1398 r0 r1 r2 r3 a0 a1 sb fb */
1400 ( m32c_pv_pushm_one (state, state->fb, 0x01, src, tdep->push_addr_bytes)
1401 || m32c_pv_pushm_one (state, state->sb, 0x02, src, tdep->push_addr_bytes)
1402 || m32c_pv_pushm_one (state, state->a1, 0x04, src, tdep->push_addr_bytes)
1403 || m32c_pv_pushm_one (state, state->a0, 0x08, src, tdep->push_addr_bytes)
1404 || m32c_pv_pushm_one (state, state->r3, 0x10, src, 2)
1405 || m32c_pv_pushm_one (state, state->r2, 0x20, src, 2)
1406 || m32c_pv_pushm_one (state, state->r1, 0x40, src, 2)
1407 || m32c_pv_pushm_one (state, state->r0, 0x80, src, 2));
1410 /* Return non-zero if VALUE is the first incoming argument register. */
1413 m32c_is_1st_arg_reg (struct m32c_pv_state *state, pv_t value)
1415 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1416 return (value.kind == pvk_register
1417 && (gdbarch_bfd_arch_info (state->arch)->mach == bfd_mach_m16c
1418 ? (value.reg == tdep->r1->num)
1419 : (value.reg == tdep->r0->num))
1423 /* Return non-zero if VALUE is an incoming argument register. */
1426 m32c_is_arg_reg (struct m32c_pv_state *state, pv_t value)
1428 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1429 return (value.kind == pvk_register
1430 && (gdbarch_bfd_arch_info (state->arch)->mach == bfd_mach_m16c
1431 ? (value.reg == tdep->r1->num || value.reg == tdep->r2->num)
1432 : (value.reg == tdep->r0->num))
1436 /* Return non-zero if a store of VALUE to LOC is probably spilling an
1437 argument register to its stack slot in STATE. Such instructions
1438 should be included in the prologue, if possible.
1440 The store is a spill if:
1441 - the value being stored is the original value of an argument register;
1442 - the value has not already been stored somewhere in STACK; and
1443 - LOC is a stack slot (e.g., a memory location whose address is
1444 relative to the original value of the SP). */
1447 m32c_is_arg_spill (struct m32c_pv_state *st,
1451 struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);
1453 return (m32c_is_arg_reg (st, value)
1454 && loc.kind == srcdest_mem
1455 && pv_is_register (loc.addr, tdep->sp->num)
1456 && ! pv_area_find_reg (st->stack, st->arch, value.reg, 0));
1459 /* Return non-zero if a store of VALUE to LOC is probably
1460 copying the struct return address into an address register
1461 for immediate use. This is basically a "spill" into the
1462 address register, instead of onto the stack.
1464 The prerequisites are:
1465 - value being stored is original value of the FIRST arg register;
1466 - value has not already been stored on stack; and
1467 - LOC is an address register (a0 or a1). */
1470 m32c_is_struct_return (struct m32c_pv_state *st,
1474 struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);
1476 return (m32c_is_1st_arg_reg (st, value)
1477 && !pv_area_find_reg (st->stack, st->arch, value.reg, 0)
1478 && loc.kind == srcdest_reg
1479 && (pv_is_register (*loc.reg, tdep->a0->num)
1480 || pv_is_register (*loc.reg, tdep->a1->num)));
1483 /* Return non-zero if a 'pushm' saving the registers indicated by SRC
1484 was a register save:
1485 - all the named registers should have their original values, and
1486 - the stack pointer should be at a constant offset from the
1487 original stack pointer. */
1489 m32c_pushm_is_reg_save (struct m32c_pv_state *st, int src)
1491 struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);
1492 /* The bits in SRC indicating which registers to save are:
1493 r0 r1 r2 r3 a0 a1 sb fb */
1495 (pv_is_register (st->sp, tdep->sp->num)
1496 && (! (src & 0x01) || pv_is_register_k (st->fb, tdep->fb->num, 0))
1497 && (! (src & 0x02) || pv_is_register_k (st->sb, tdep->sb->num, 0))
1498 && (! (src & 0x04) || pv_is_register_k (st->a1, tdep->a1->num, 0))
1499 && (! (src & 0x08) || pv_is_register_k (st->a0, tdep->a0->num, 0))
1500 && (! (src & 0x10) || pv_is_register_k (st->r3, tdep->r3->num, 0))
1501 && (! (src & 0x20) || pv_is_register_k (st->r2, tdep->r2->num, 0))
1502 && (! (src & 0x40) || pv_is_register_k (st->r1, tdep->r1->num, 0))
1503 && (! (src & 0x80) || pv_is_register_k (st->r0, tdep->r0->num, 0)));
1507 /* Function for finding saved registers in a 'struct pv_area'; we pass
1508 this to pv_area_scan.
1510 If VALUE is a saved register, ADDR says it was saved at a constant
1511 offset from the frame base, and SIZE indicates that the whole
1512 register was saved, record its offset in RESULT_UNTYPED. */
1514 check_for_saved (void *prologue_untyped, pv_t addr, CORE_ADDR size, pv_t value)
1516 struct m32c_prologue *prologue = (struct m32c_prologue *) prologue_untyped;
1517 struct gdbarch *arch = prologue->arch;
1518 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1520 /* Is this the unchanged value of some register being saved on the
1522 if (value.kind == pvk_register
1524 && pv_is_register (addr, tdep->sp->num))
1526 /* Some registers require special handling: they're saved as a
1527 larger value than the register itself. */
1528 CORE_ADDR saved_size = register_size (arch, value.reg);
1530 if (value.reg == tdep->pc->num)
1531 saved_size = tdep->ret_addr_bytes;
1532 else if (register_type (arch, value.reg)
1533 == tdep->data_addr_reg_type)
1534 saved_size = tdep->push_addr_bytes;
1536 if (size == saved_size)
1538 /* Find which end of the saved value corresponds to our
1540 if (gdbarch_byte_order (arch) == BFD_ENDIAN_BIG)
1541 prologue->reg_offset[value.reg]
1542 = (addr.k + saved_size - register_size (arch, value.reg));
1544 prologue->reg_offset[value.reg] = addr.k;
1550 /* Analyze the function prologue for ARCH at START, going no further
1551 than LIMIT, and place a description of what we found in
1554 m32c_analyze_prologue (struct gdbarch *arch,
1555 CORE_ADDR start, CORE_ADDR limit,
1556 struct m32c_prologue *prologue)
1558 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1559 unsigned long mach = gdbarch_bfd_arch_info (arch)->mach;
1560 CORE_ADDR after_last_frame_related_insn;
1561 struct cleanup *back_to;
1562 struct m32c_pv_state st;
1565 st.r0 = pv_register (tdep->r0->num, 0);
1566 st.r1 = pv_register (tdep->r1->num, 0);
1567 st.r2 = pv_register (tdep->r2->num, 0);
1568 st.r3 = pv_register (tdep->r3->num, 0);
1569 st.a0 = pv_register (tdep->a0->num, 0);
1570 st.a1 = pv_register (tdep->a1->num, 0);
1571 st.sb = pv_register (tdep->sb->num, 0);
1572 st.fb = pv_register (tdep->fb->num, 0);
1573 st.sp = pv_register (tdep->sp->num, 0);
1574 st.pc = pv_register (tdep->pc->num, 0);
1575 st.stack = make_pv_area (tdep->sp->num, gdbarch_addr_bit (arch));
1576 back_to = make_cleanup_free_pv_area (st.stack);
1578 /* Record that the call instruction has saved the return address on
1580 m32c_pv_push (&st, st.pc, tdep->ret_addr_bytes);
1582 memset (prologue, 0, sizeof (*prologue));
1583 prologue->arch = arch;
1586 for (i = 0; i < M32C_MAX_NUM_REGS; i++)
1587 prologue->reg_offset[i] = 1;
1590 st.scan_pc = after_last_frame_related_insn = start;
1592 while (st.scan_pc < limit)
1594 pv_t pre_insn_fb = st.fb;
1595 pv_t pre_insn_sp = st.sp;
1597 /* In theory we could get in trouble by trying to read ahead
1598 here, when we only know we're expecting one byte. In
1599 practice I doubt anyone will care, and it makes the rest of
1601 if (target_read_memory (st.scan_pc, st.insn, sizeof (st.insn)))
1602 /* If we can't fetch the instruction from memory, stop here
1603 and hope for the best. */
1605 st.next_addr = st.scan_pc;
1607 /* The assembly instructions are written as they appear in the
1608 section of the processor manuals that describe the
1609 instruction encodings.
1611 When a single assembly language instruction has several
1612 different machine-language encodings, the manual
1613 distinguishes them by a number in parens, before the
1614 mnemonic. Those numbers are included, as well.
1616 The srcdest decoding instructions have the same names as the
1617 analogous functions in the simulator. */
1618 if (mach == bfd_mach_m16c)
1620 /* (1) ENTER #imm8 */
1621 if (st.insn[0] == 0x7c && st.insn[1] == 0xf2)
1623 if (m32c_pv_enter (&st, st.insn[2]))
1628 else if (st.insn[0] == 0xec)
1630 int src = st.insn[1];
1631 if (m32c_pv_pushm (&st, src))
1635 if (m32c_pushm_is_reg_save (&st, src))
1636 after_last_frame_related_insn = st.next_addr;
1639 /* (6) MOV.size:G src, dest */
1640 else if ((st.insn[0] & 0xfe) == 0x72)
1642 int size = (st.insn[0] & 0x01) ? 2 : 1;
1644 struct srcdest dest;
1649 = m32c_decode_srcdest4 (&st, (st.insn[1] >> 4) & 0xf, size);
1651 = m32c_decode_srcdest4 (&st, st.insn[1] & 0xf, size);
1652 src_value = m32c_srcdest_fetch (&st, src, size);
1654 if (m32c_is_arg_spill (&st, dest, src_value))
1655 after_last_frame_related_insn = st.next_addr;
1656 else if (m32c_is_struct_return (&st, dest, src_value))
1657 after_last_frame_related_insn = st.next_addr;
1659 if (m32c_srcdest_store (&st, dest, src_value, size))
1663 /* (1) LDC #IMM16, sp */
1664 else if (st.insn[0] == 0xeb
1665 && st.insn[1] == 0x50)
1668 st.sp = pv_constant (m32c_udisp16 (&st));
1672 /* We've hit some instruction we don't know how to simulate.
1673 Strictly speaking, we should set every value we're
1674 tracking to "unknown". But we'll be optimistic, assume
1675 that we have enough information already, and stop
1681 int src_indirect = 0;
1682 int dest_indirect = 0;
1685 gdb_assert (mach == bfd_mach_m32c);
1687 /* Check for prefix bytes indicating indirect addressing. */
1688 if (st.insn[0] == 0x41)
1693 else if (st.insn[0] == 0x09)
1698 else if (st.insn[0] == 0x49)
1700 src_indirect = dest_indirect = 1;
1704 /* (1) ENTER #imm8 */
1705 if (st.insn[i] == 0xec)
1707 if (m32c_pv_enter (&st, st.insn[i + 1]))
1713 else if (st.insn[i] == 0x8f)
1715 int src = st.insn[i + 1];
1716 if (m32c_pv_pushm (&st, src))
1720 if (m32c_pushm_is_reg_save (&st, src))
1721 after_last_frame_related_insn = st.next_addr;
1724 /* (7) MOV.size:G src, dest */
1725 else if ((st.insn[i] & 0x80) == 0x80
1726 && (st.insn[i + 1] & 0x0f) == 0x0b
1727 && m32c_get_src23 (&st.insn[i]) < 20
1728 && m32c_get_dest23 (&st.insn[i]) < 20)
1731 struct srcdest dest;
1733 int bw = st.insn[i] & 0x01;
1734 int size = bw ? 2 : 1;
1738 = m32c_decode_sd23 (&st, m32c_get_src23 (&st.insn[i]),
1739 size, src_indirect);
1741 = m32c_decode_sd23 (&st, m32c_get_dest23 (&st.insn[i]),
1742 size, dest_indirect);
1743 src_value = m32c_srcdest_fetch (&st, src, size);
1745 if (m32c_is_arg_spill (&st, dest, src_value))
1746 after_last_frame_related_insn = st.next_addr;
1748 if (m32c_srcdest_store (&st, dest, src_value, size))
1751 /* (2) LDC #IMM24, sp */
1752 else if (st.insn[i] == 0xd5
1753 && st.insn[i + 1] == 0x29)
1756 st.sp = pv_constant (m32c_udisp24 (&st));
1759 /* We've hit some instruction we don't know how to simulate.
1760 Strictly speaking, we should set every value we're
1761 tracking to "unknown". But we'll be optimistic, assume
1762 that we have enough information already, and stop
1767 /* If this instruction changed the FB or decreased the SP (i.e.,
1768 allocated more stack space), then this may be a good place to
1769 declare the prologue finished. However, there are some
1772 - If the instruction just changed the FB back to its original
1773 value, then that's probably a restore instruction. The
1774 prologue should definitely end before that.
1776 - If the instruction increased the value of the SP (that is,
1777 shrunk the frame), then it's probably part of a frame
1778 teardown sequence, and the prologue should end before
1781 if (! pv_is_identical (st.fb, pre_insn_fb))
1783 if (! pv_is_register_k (st.fb, tdep->fb->num, 0))
1784 after_last_frame_related_insn = st.next_addr;
1786 else if (! pv_is_identical (st.sp, pre_insn_sp))
1788 /* The comparison of the constants looks odd, there, because
1789 .k is unsigned. All it really means is that the SP is
1790 lower than it was before the instruction. */
1791 if ( pv_is_register (pre_insn_sp, tdep->sp->num)
1792 && pv_is_register (st.sp, tdep->sp->num)
1793 && ((pre_insn_sp.k - st.sp.k) < (st.sp.k - pre_insn_sp.k)))
1794 after_last_frame_related_insn = st.next_addr;
1797 st.scan_pc = st.next_addr;
1800 /* Did we load a constant value into the stack pointer? */
1801 if (pv_is_constant (st.sp))
1802 prologue->kind = prologue_first_frame;
1804 /* Alternatively, did we initialize the frame pointer? Remember
1805 that the CFA is the address after the return address. */
1806 if (pv_is_register (st.fb, tdep->sp->num))
1808 prologue->kind = prologue_with_frame_ptr;
1809 prologue->frame_ptr_offset = st.fb.k;
1812 /* Is the frame size a known constant? Remember that frame_size is
1813 actually the offset from the CFA to the SP (i.e., a negative
1815 else if (pv_is_register (st.sp, tdep->sp->num))
1817 prologue->kind = prologue_sans_frame_ptr;
1818 prologue->frame_size = st.sp.k;
1821 /* We haven't been able to make sense of this function's frame. Treat
1822 it as the first frame. */
1824 prologue->kind = prologue_first_frame;
1826 /* Record where all the registers were saved. */
1827 pv_area_scan (st.stack, check_for_saved, (void *) prologue);
1829 prologue->prologue_end = after_last_frame_related_insn;
1831 do_cleanups (back_to);
1836 m32c_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR ip)
1839 CORE_ADDR func_addr, func_end, sal_end;
1840 struct m32c_prologue p;
1842 /* Try to find the extent of the function that contains IP. */
1843 if (! find_pc_partial_function (ip, &name, &func_addr, &func_end))
1846 /* Find end by prologue analysis. */
1847 m32c_analyze_prologue (gdbarch, ip, func_end, &p);
1848 /* Find end by line info. */
1849 sal_end = skip_prologue_using_sal (gdbarch, ip);
1850 /* Return whichever is lower. */
1851 if (sal_end != 0 && sal_end != ip && sal_end < p.prologue_end)
1854 return p.prologue_end;
1859 /* Stack unwinding. */
1861 static struct m32c_prologue *
1862 m32c_analyze_frame_prologue (struct frame_info *this_frame,
1863 void **this_prologue_cache)
1865 if (! *this_prologue_cache)
1867 CORE_ADDR func_start = get_frame_func (this_frame);
1868 CORE_ADDR stop_addr = get_frame_pc (this_frame);
1870 /* If we couldn't find any function containing the PC, then
1871 just initialize the prologue cache, but don't do anything. */
1873 stop_addr = func_start;
1875 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct m32c_prologue);
1876 m32c_analyze_prologue (get_frame_arch (this_frame),
1877 func_start, stop_addr, *this_prologue_cache);
1880 return *this_prologue_cache;
1885 m32c_frame_base (struct frame_info *this_frame,
1886 void **this_prologue_cache)
1888 struct m32c_prologue *p
1889 = m32c_analyze_frame_prologue (this_frame, this_prologue_cache);
1890 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
1892 /* In functions that use alloca, the distance between the stack
1893 pointer and the frame base varies dynamically, so we can't use
1894 the SP plus static information like prologue analysis to find the
1895 frame base. However, such functions must have a frame pointer,
1896 to be able to restore the SP on exit. So whenever we do have a
1897 frame pointer, use that to find the base. */
1900 case prologue_with_frame_ptr:
1903 = get_frame_register_unsigned (this_frame, tdep->fb->num);
1904 return fb - p->frame_ptr_offset;
1907 case prologue_sans_frame_ptr:
1910 = get_frame_register_unsigned (this_frame, tdep->sp->num);
1911 return sp - p->frame_size;
1914 case prologue_first_frame:
1918 gdb_assert_not_reached ("unexpected prologue kind");
1924 m32c_this_id (struct frame_info *this_frame,
1925 void **this_prologue_cache,
1926 struct frame_id *this_id)
1928 CORE_ADDR base = m32c_frame_base (this_frame, this_prologue_cache);
1931 *this_id = frame_id_build (base, get_frame_func (this_frame));
1932 /* Otherwise, leave it unset, and that will terminate the backtrace. */
1936 static struct value *
1937 m32c_prev_register (struct frame_info *this_frame,
1938 void **this_prologue_cache, int regnum)
1940 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
1941 struct m32c_prologue *p
1942 = m32c_analyze_frame_prologue (this_frame, this_prologue_cache);
1943 CORE_ADDR frame_base = m32c_frame_base (this_frame, this_prologue_cache);
1944 int reg_size = register_size (get_frame_arch (this_frame), regnum);
1946 if (regnum == tdep->sp->num)
1947 return frame_unwind_got_constant (this_frame, regnum, frame_base);
1949 /* If prologue analysis says we saved this register somewhere,
1950 return a description of the stack slot holding it. */
1951 if (p->reg_offset[regnum] != 1)
1952 return frame_unwind_got_memory (this_frame, regnum,
1953 frame_base + p->reg_offset[regnum]);
1955 /* Otherwise, presume we haven't changed the value of this
1956 register, and get it from the next frame. */
1957 return frame_unwind_got_register (this_frame, regnum, regnum);
1961 static const struct frame_unwind m32c_unwind = {
1966 default_frame_sniffer
1971 m32c_unwind_pc (struct gdbarch *arch, struct frame_info *next_frame)
1973 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1974 return frame_unwind_register_unsigned (next_frame, tdep->pc->num);
1979 m32c_unwind_sp (struct gdbarch *arch, struct frame_info *next_frame)
1981 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1982 return frame_unwind_register_unsigned (next_frame, tdep->sp->num);
1986 /* Inferior calls. */
1988 /* The calling conventions, according to GCC:
1992 First arg may be passed in r1l or r1 if it (1) fits (QImode or
1993 HImode), (2) is named, and (3) is an integer or pointer type (no
1994 structs, floats, etc). Otherwise, it's passed on the stack.
1996 Second arg may be passed in r2, same restrictions (but not QImode),
1997 even if the first arg is passed on the stack.
1999 Third and further args are passed on the stack. No padding is
2000 used, stack "alignment" is 8 bits.
2005 First arg may be passed in r0l or r0, same restrictions as above.
2007 Second and further args are passed on the stack. Padding is used
2008 after QImode parameters (i.e. lower-addressed byte is the value,
2009 higher-addressed byte is the padding), stack "alignment" is 16
2013 /* Return true if TYPE is a type that can be passed in registers. (We
2014 ignore the size, and pay attention only to the type code;
2015 acceptable sizes depends on which register is being considered to
2018 m32c_reg_arg_type (struct type *type)
2020 enum type_code code = TYPE_CODE (type);
2022 return (code == TYPE_CODE_INT
2023 || code == TYPE_CODE_ENUM
2024 || code == TYPE_CODE_PTR
2025 || code == TYPE_CODE_REF
2026 || code == TYPE_CODE_BOOL
2027 || code == TYPE_CODE_CHAR);
2032 m32c_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2033 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
2034 struct value **args, CORE_ADDR sp, int struct_return,
2035 CORE_ADDR struct_addr)
2037 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2038 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2039 unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
2043 /* The number of arguments given in this function's prototype, or
2044 zero if it has a non-prototyped function type. The m32c ABI
2045 passes arguments mentioned in the prototype differently from
2046 those in the ellipsis of a varargs function, or from those passed
2047 to a non-prototyped function. */
2048 int num_prototyped_args = 0;
2051 struct type *func_type = value_type (function);
2053 /* Dereference function pointer types. */
2054 if (TYPE_CODE (func_type) == TYPE_CODE_PTR)
2055 func_type = TYPE_TARGET_TYPE (func_type);
2057 gdb_assert (TYPE_CODE (func_type) == TYPE_CODE_FUNC ||
2058 TYPE_CODE (func_type) == TYPE_CODE_METHOD);
2061 /* The ABI description in gcc/config/m32c/m32c.abi says that
2062 we need to handle prototyped and non-prototyped functions
2063 separately, but the code in GCC doesn't actually do so. */
2064 if (TYPE_PROTOTYPED (func_type))
2066 num_prototyped_args = TYPE_NFIELDS (func_type);
2069 /* First, if the function returns an aggregate by value, push a
2070 pointer to a buffer for it. This doesn't affect the way
2071 subsequent arguments are allocated to registers. */
2074 int ptr_len = TYPE_LENGTH (tdep->ptr_voyd);
2076 write_memory_unsigned_integer (sp, ptr_len, byte_order, struct_addr);
2079 /* Push the arguments. */
2080 for (i = nargs - 1; i >= 0; i--)
2082 struct value *arg = args[i];
2083 const gdb_byte *arg_bits = value_contents (arg);
2084 struct type *arg_type = value_type (arg);
2085 ULONGEST arg_size = TYPE_LENGTH (arg_type);
2087 /* Can it go in r1 or r1l (for m16c) or r0 or r0l (for m32c)? */
2090 && i < num_prototyped_args
2091 && m32c_reg_arg_type (arg_type))
2093 /* Extract and re-store as an integer as a terse way to make
2094 sure it ends up in the least significant end of r1. (GDB
2095 should avoid assuming endianness, even on uni-endian
2097 ULONGEST u = extract_unsigned_integer (arg_bits, arg_size,
2099 struct m32c_reg *reg = (mach == bfd_mach_m16c) ? tdep->r1 : tdep->r0;
2100 regcache_cooked_write_unsigned (regcache, reg->num, u);
2103 /* Can it go in r2? */
2104 else if (mach == bfd_mach_m16c
2107 && i < num_prototyped_args
2108 && m32c_reg_arg_type (arg_type))
2109 regcache_cooked_write (regcache, tdep->r2->num, arg_bits);
2111 /* Everything else goes on the stack. */
2116 /* Align the stack. */
2117 if (mach == bfd_mach_m32c)
2120 write_memory (sp, arg_bits, arg_size);
2124 /* This is the CFA we use to identify the dummy frame. */
2127 /* Push the return address. */
2128 sp -= tdep->ret_addr_bytes;
2129 write_memory_unsigned_integer (sp, tdep->ret_addr_bytes, byte_order,
2132 /* Update the stack pointer. */
2133 regcache_cooked_write_unsigned (regcache, tdep->sp->num, sp);
2135 /* We need to borrow an odd trick from the i386 target here.
2137 The value we return from this function gets used as the stack
2138 address (the CFA) for the dummy frame's ID. The obvious thing is
2139 to return the new TOS. However, that points at the return
2140 address, saved on the stack, which is inconsistent with the CFA's
2141 described by GCC's DWARF 2 .debug_frame information: DWARF 2
2142 .debug_frame info uses the address immediately after the saved
2143 return address. So you end up with a dummy frame whose CFA
2144 points at the return address, but the frame for the function
2145 being called has a CFA pointing after the return address: the
2146 younger CFA is *greater than* the older CFA. The sanity checks
2147 in frame.c don't like that.
2149 So we try to be consistent with the CFA's used by DWARF 2.
2150 Having a dummy frame and a real frame with the *same* CFA is
2156 static struct frame_id
2157 m32c_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
2159 /* This needs to return a frame ID whose PC is the return address
2160 passed to m32c_push_dummy_call, and whose stack_addr is the SP
2161 m32c_push_dummy_call returned.
2163 m32c_unwind_sp gives us the CFA, which is the value the SP had
2164 before the return address was pushed. */
2165 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2166 CORE_ADDR sp = get_frame_register_unsigned (this_frame, tdep->sp->num);
2167 return frame_id_build (sp, get_frame_pc (this_frame));
2172 /* Return values. */
2174 /* Return value conventions, according to GCC:
2185 Aggregate values (regardless of size) are returned by pushing a
2186 pointer to a temporary area on the stack after the args are pushed.
2187 The function fills in this area with the value. Note that this
2188 pointer on the stack does not affect how register arguments, if any,
2195 /* Return non-zero if values of type TYPE are returned by storing them
2196 in a buffer whose address is passed on the stack, ahead of the
2199 m32c_return_by_passed_buf (struct type *type)
2201 enum type_code code = TYPE_CODE (type);
2203 return (code == TYPE_CODE_STRUCT
2204 || code == TYPE_CODE_UNION);
2207 static enum return_value_convention
2208 m32c_return_value (struct gdbarch *gdbarch,
2209 struct type *func_type,
2210 struct type *valtype,
2211 struct regcache *regcache,
2213 const gdb_byte *writebuf)
2215 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2216 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2217 enum return_value_convention conv;
2218 ULONGEST valtype_len = TYPE_LENGTH (valtype);
2220 if (m32c_return_by_passed_buf (valtype))
2221 conv = RETURN_VALUE_STRUCT_CONVENTION;
2223 conv = RETURN_VALUE_REGISTER_CONVENTION;
2227 /* We should never be called to find values being returned by
2228 RETURN_VALUE_STRUCT_CONVENTION. Those can't be located,
2229 unless we made the call ourselves. */
2230 gdb_assert (conv == RETURN_VALUE_REGISTER_CONVENTION);
2232 gdb_assert (valtype_len <= 8);
2234 /* Anything that fits in r0 is returned there. */
2235 if (valtype_len <= TYPE_LENGTH (tdep->r0->type))
2238 regcache_cooked_read_unsigned (regcache, tdep->r0->num, &u);
2239 store_unsigned_integer (readbuf, valtype_len, byte_order, u);
2243 /* Everything else is passed in mem0, using as many bytes as
2244 needed. This is not what the Renesas tools do, but it's
2245 what GCC does at the moment. */
2246 struct minimal_symbol *mem0
2247 = lookup_minimal_symbol ("mem0", NULL, NULL);
2250 error (_("The return value is stored in memory at 'mem0', "
2251 "but GDB cannot find\n"
2253 read_memory (SYMBOL_VALUE_ADDRESS (mem0), readbuf, valtype_len);
2259 /* We should never be called to store values to be returned
2260 using RETURN_VALUE_STRUCT_CONVENTION. We have no way of
2261 finding the buffer, unless we made the call ourselves. */
2262 gdb_assert (conv == RETURN_VALUE_REGISTER_CONVENTION);
2264 gdb_assert (valtype_len <= 8);
2266 /* Anything that fits in r0 is returned there. */
2267 if (valtype_len <= TYPE_LENGTH (tdep->r0->type))
2269 ULONGEST u = extract_unsigned_integer (writebuf, valtype_len,
2271 regcache_cooked_write_unsigned (regcache, tdep->r0->num, u);
2275 /* Everything else is passed in mem0, using as many bytes as
2276 needed. This is not what the Renesas tools do, but it's
2277 what GCC does at the moment. */
2278 struct minimal_symbol *mem0
2279 = lookup_minimal_symbol ("mem0", NULL, NULL);
2282 error (_("The return value is stored in memory at 'mem0', "
2283 "but GDB cannot find\n"
2285 write_memory (SYMBOL_VALUE_ADDRESS (mem0),
2286 (char *) writebuf, valtype_len);
2297 /* The m16c and m32c use a trampoline function for indirect function
2298 calls. An indirect call looks like this:
2300 ... push arguments ...
2301 ... push target function address ...
2304 The code for m32c_jsri16 looks like this:
2308 # Save return address.
2310 pop.b m32c_jsri_ret+2
2312 # Store target function address.
2313 pop.w m32c_jsri_addr
2315 # Re-push return address.
2316 push.b m32c_jsri_ret+2
2317 push.w m32c_jsri_ret
2319 # Call the target function.
2320 jmpi.a m32c_jsri_addr
2322 Without further information, GDB will treat calls to m32c_jsri16
2323 like calls to any other function. Since m32c_jsri16 doesn't have
2324 debugging information, that normally means that GDB sets a step-
2325 resume breakpoint and lets the program continue --- which is not
2326 what the user wanted. (Giving the trampoline debugging info
2327 doesn't help: the user expects the program to stop in the function
2328 their program is calling, not in some trampoline code they've never
2331 The gdbarch_skip_trampoline_code method tells GDB how to step
2332 through such trampoline functions transparently to the user. When
2333 given the address of a trampoline function's first instruction,
2334 gdbarch_skip_trampoline_code should return the address of the first
2335 instruction of the function really being called. If GDB decides it
2336 wants to step into that function, it will set a breakpoint there
2337 and silently continue to it.
2339 We recognize the trampoline by name, and extract the target address
2340 directly from the stack. This isn't great, but recognizing by its
2341 code sequence seems more fragile. */
2344 m32c_skip_trampoline_code (struct frame_info *frame, CORE_ADDR stop_pc)
2346 struct gdbarch *gdbarch = get_frame_arch (frame);
2347 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2348 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2350 /* It would be nicer to simply look up the addresses of known
2351 trampolines once, and then compare stop_pc with them. However,
2352 we'd need to ensure that that cached address got invalidated when
2353 someone loaded a new executable, and I'm not quite sure of the
2354 best way to do that. find_pc_partial_function does do some
2355 caching, so we'll see how this goes. */
2357 CORE_ADDR start, end;
2359 if (find_pc_partial_function (stop_pc, &name, &start, &end))
2361 /* Are we stopped at the beginning of the trampoline function? */
2362 if (strcmp (name, "m32c_jsri16") == 0
2363 && stop_pc == start)
2365 /* Get the stack pointer. The return address is at the top,
2366 and the target function's address is just below that. We
2367 know it's a two-byte address, since the trampoline is
2369 CORE_ADDR sp = get_frame_sp (get_current_frame ());
2371 = read_memory_unsigned_integer (sp + tdep->ret_addr_bytes,
2374 /* What we have now is the address of a jump instruction.
2375 What we need is the destination of that jump.
2376 The opcode is 1 byte, and the destination is the next 3 bytes. */
2378 target = read_memory_unsigned_integer (target + 1, 3, byte_order);
2387 /* Address/pointer conversions. */
2389 /* On the m16c, there is a 24-bit address space, but only a very few
2390 instructions can generate addresses larger than 0xffff: jumps,
2391 jumps to subroutines, and the lde/std (load/store extended)
2394 Since GCC can only support one size of pointer, we can't have
2395 distinct 'near' and 'far' pointer types; we have to pick one size
2396 for everything. If we wanted to use 24-bit pointers, then GCC
2397 would have to use lde and ste for all memory references, which
2398 would be terrible for performance and code size. So the GNU
2399 toolchain uses 16-bit pointers for everything, and gives up the
2400 ability to have pointers point outside the first 64k of memory.
2402 However, as a special hack, we let the linker place functions at
2403 addresses above 0xffff, as long as it also places a trampoline in
2404 the low 64k for every function whose address is taken. Each
2405 trampoline consists of a single jmp.a instruction that jumps to the
2406 function's real entry point. Pointers to functions can be 16 bits
2407 long, even though the functions themselves are at higher addresses:
2408 the pointers refer to the trampolines, not the functions.
2410 This complicates things for GDB, however: given the address of a
2411 function (from debug info or linker symbols, say) which could be
2412 anywhere in the 24-bit address space, how can we find an
2413 appropriate 16-bit value to use as a pointer to it?
2415 If the linker has not generated a trampoline for the function,
2416 we're out of luck. Well, I guess we could malloc some space and
2417 write a jmp.a instruction to it, but I'm not going to get into that
2420 If the linker has generated a trampoline for the function, then it
2421 also emitted a symbol for the trampoline: if the function's linker
2422 symbol is named NAME, then the function's trampoline's linker
2423 symbol is named NAME.plt.
2425 So, given a code address:
2426 - We try to find a linker symbol at that address.
2427 - If we find such a symbol named NAME, we look for a linker symbol
2429 - If we find such a symbol, we assume it is a trampoline, and use
2430 its address as the pointer value.
2432 And, given a function pointer:
2433 - We try to find a linker symbol at that address named NAME.plt.
2434 - If we find such a symbol, we look for a linker symbol named NAME.
2435 - If we find that, we provide that as the function's address.
2436 - If any of the above steps fail, we return the original address
2437 unchanged; it might really be a function in the low 64k.
2439 See? You *knew* there was a reason you wanted to be a computer
2443 m32c_m16c_address_to_pointer (struct gdbarch *gdbarch,
2444 struct type *type, gdb_byte *buf, CORE_ADDR addr)
2446 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2447 enum type_code target_code;
2448 gdb_assert (TYPE_CODE (type) == TYPE_CODE_PTR ||
2449 TYPE_CODE (type) == TYPE_CODE_REF);
2451 target_code = TYPE_CODE (TYPE_TARGET_TYPE (type));
2453 if (target_code == TYPE_CODE_FUNC || target_code == TYPE_CODE_METHOD)
2457 struct minimal_symbol *tramp_msym;
2459 /* Try to find a linker symbol at this address. */
2460 struct minimal_symbol *func_msym = lookup_minimal_symbol_by_pc (addr);
2463 error (_("Cannot convert code address %s to function pointer:\n"
2464 "couldn't find a symbol at that address, to find trampoline."),
2465 paddress (gdbarch, addr));
2467 func_name = SYMBOL_LINKAGE_NAME (func_msym);
2468 tramp_name = xmalloc (strlen (func_name) + 5);
2469 strcpy (tramp_name, func_name);
2470 strcat (tramp_name, ".plt");
2472 /* Try to find a linker symbol for the trampoline. */
2473 tramp_msym = lookup_minimal_symbol (tramp_name, NULL, NULL);
2475 /* We've either got another copy of the name now, or don't need
2476 the name any more. */
2483 /* No PLT entry found. Mask off the upper bits of the address
2484 to make a pointer. As noted in the warning to the user
2485 below, this value might be useful if converted back into
2486 an address by GDB, but will otherwise, almost certainly,
2489 Using this masked result does seem to be useful
2490 in gdb.cp/cplusfuncs.exp in which ~40 FAILs turn into
2491 PASSes. These results appear to be correct as well.
2493 We print a warning here so that the user can make a
2494 determination about whether the result is useful or not. */
2495 ptrval = addr & 0xffff;
2497 warning (_("Cannot convert code address %s to function pointer:\n"
2498 "couldn't find trampoline named '%s.plt'.\n"
2499 "Returning pointer value %s instead; this may produce\n"
2500 "a useful result if converted back into an address by GDB,\n"
2501 "but will most likely not be useful otherwise.\n"),
2502 paddress (gdbarch, addr), func_name,
2503 paddress (gdbarch, ptrval));
2510 /* The trampoline's address is our pointer. */
2511 addr = SYMBOL_VALUE_ADDRESS (tramp_msym);
2515 store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order, addr);
2520 m32c_m16c_pointer_to_address (struct gdbarch *gdbarch,
2521 struct type *type, const gdb_byte *buf)
2523 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2525 enum type_code target_code;
2527 gdb_assert (TYPE_CODE (type) == TYPE_CODE_PTR ||
2528 TYPE_CODE (type) == TYPE_CODE_REF);
2530 ptr = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order);
2532 target_code = TYPE_CODE (TYPE_TARGET_TYPE (type));
2534 if (target_code == TYPE_CODE_FUNC || target_code == TYPE_CODE_METHOD)
2536 /* See if there is a minimal symbol at that address whose name is
2538 struct minimal_symbol *ptr_msym = lookup_minimal_symbol_by_pc (ptr);
2542 char *ptr_msym_name = SYMBOL_LINKAGE_NAME (ptr_msym);
2543 int len = strlen (ptr_msym_name);
2546 && strcmp (ptr_msym_name + len - 4, ".plt") == 0)
2548 struct minimal_symbol *func_msym;
2549 /* We have a .plt symbol; try to find the symbol for the
2550 corresponding function.
2552 Since the trampoline contains a jump instruction, we
2553 could also just extract the jump's target address. I
2554 don't see much advantage one way or the other. */
2555 char *func_name = xmalloc (len - 4 + 1);
2556 memcpy (func_name, ptr_msym_name, len - 4);
2557 func_name[len - 4] = '\0';
2559 = lookup_minimal_symbol (func_name, NULL, NULL);
2561 /* If we do have such a symbol, return its value as the
2562 function's true address. */
2564 ptr = SYMBOL_VALUE_ADDRESS (func_msym);
2571 for (aspace = 1; aspace <= 15; aspace++)
2573 ptr_msym = lookup_minimal_symbol_by_pc ((aspace << 16) | ptr);
2576 ptr |= aspace << 16;
2585 m32c_virtual_frame_pointer (struct gdbarch *gdbarch, CORE_ADDR pc,
2587 LONGEST *frame_offset)
2590 CORE_ADDR func_addr, func_end, sal_end;
2591 struct m32c_prologue p;
2593 struct regcache *regcache = get_current_regcache ();
2594 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2596 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
2597 internal_error (__FILE__, __LINE__,
2598 _("No virtual frame pointer available"));
2600 m32c_analyze_prologue (gdbarch, func_addr, pc, &p);
2603 case prologue_with_frame_ptr:
2604 *frame_regnum = m32c_banked_register (tdep->fb, regcache)->num;
2605 *frame_offset = p.frame_ptr_offset;
2607 case prologue_sans_frame_ptr:
2608 *frame_regnum = m32c_banked_register (tdep->sp, regcache)->num;
2609 *frame_offset = p.frame_size;
2612 *frame_regnum = m32c_banked_register (tdep->sp, regcache)->num;
2617 if (*frame_regnum > gdbarch_num_regs (gdbarch))
2618 internal_error (__FILE__, __LINE__,
2619 _("No virtual frame pointer available"));
2623 /* Initialization. */
2625 static struct gdbarch *
2626 m32c_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2628 struct gdbarch *arch;
2629 struct gdbarch_tdep *tdep;
2630 unsigned long mach = info.bfd_arch_info->mach;
2632 /* Find a candidate among the list of architectures we've created
2634 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2636 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2637 return arches->gdbarch;
2639 tdep = xcalloc (1, sizeof (*tdep));
2640 arch = gdbarch_alloc (&info, tdep);
2642 /* Essential types. */
2645 /* Address/pointer conversions. */
2646 if (mach == bfd_mach_m16c)
2648 set_gdbarch_address_to_pointer (arch, m32c_m16c_address_to_pointer);
2649 set_gdbarch_pointer_to_address (arch, m32c_m16c_pointer_to_address);
2656 set_gdbarch_print_insn (arch, print_insn_m32c);
2659 set_gdbarch_breakpoint_from_pc (arch, m32c_breakpoint_from_pc);
2661 /* Prologue analysis and unwinding. */
2662 set_gdbarch_inner_than (arch, core_addr_lessthan);
2663 set_gdbarch_skip_prologue (arch, m32c_skip_prologue);
2664 set_gdbarch_unwind_pc (arch, m32c_unwind_pc);
2665 set_gdbarch_unwind_sp (arch, m32c_unwind_sp);
2667 /* I'm dropping the dwarf2 sniffer because it has a few problems.
2668 They may be in the dwarf2 cfi code in GDB, or they may be in
2669 the debug info emitted by the upstream toolchain. I don't
2670 know which, but I do know that the prologue analyzer works better.
2672 dwarf2_append_sniffers (arch);
2674 frame_unwind_append_unwinder (arch, &m32c_unwind);
2676 /* Inferior calls. */
2677 set_gdbarch_push_dummy_call (arch, m32c_push_dummy_call);
2678 set_gdbarch_return_value (arch, m32c_return_value);
2679 set_gdbarch_dummy_id (arch, m32c_dummy_id);
2682 set_gdbarch_skip_trampoline_code (arch, m32c_skip_trampoline_code);
2684 set_gdbarch_virtual_frame_pointer (arch, m32c_virtual_frame_pointer);
2686 /* m32c function boundary addresses are not necessarily even.
2687 Therefore, the `vbit', which indicates a pointer to a virtual
2688 member function, is stored in the delta field, rather than as
2689 the low bit of a function pointer address.
2691 In order to verify this, see the definition of
2692 TARGET_PTRMEMFUNC_VBIT_LOCATION in gcc/defaults.h along with the
2693 definition of FUNCTION_BOUNDARY in gcc/config/m32c/m32c.h. */
2694 set_gdbarch_vbit_in_delta (arch, 1);
2699 /* Provide a prototype to silence -Wmissing-prototypes. */
2700 extern initialize_file_ftype _initialize_m32c_tdep;
2703 _initialize_m32c_tdep (void)
2705 register_gdbarch_init (bfd_arch_m32c, m32c_gdbarch_init);
2707 m32c_dma_reggroup = reggroup_new ("dma", USER_REGGROUP);