1 /* Renesas M32C target-dependent code for GDB, the GNU debugger.
3 Copyright (C) 2004-2016 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "gdb/sim-m32c.h"
27 #include "arch-utils.h"
29 #include "frame-unwind.h"
30 #include "dwarf2-frame.h"
31 #include "dwarf2expr.h"
35 #include "reggroups.h"
36 #include "prologue-value.h"
41 /* The m32c tdep structure. */
43 static struct reggroup *m32c_dma_reggroup;
47 /* The type of a function that moves the value of REG between CACHE or
48 BUF --- in either direction. */
49 typedef enum register_status (m32c_write_reg_t) (struct m32c_reg *reg,
50 struct regcache *cache,
53 typedef enum register_status (m32c_read_reg_t) (struct m32c_reg *reg,
54 struct regcache *cache,
59 /* The name of this register. */
65 /* The architecture this register belongs to. */
68 /* Its GDB register number. */
71 /* Its sim register number. */
74 /* Its DWARF register number, or -1 if it doesn't have one. */
77 /* Register group memberships. */
78 unsigned int general_p : 1;
79 unsigned int dma_p : 1;
80 unsigned int system_p : 1;
81 unsigned int save_restore_p : 1;
83 /* Functions to read its value from a regcache, and write its value
85 m32c_read_reg_t *read;
86 m32c_write_reg_t *write;
88 /* Data for READ and WRITE functions. The exact meaning depends on
89 the specific functions selected; see the comments for those
91 struct m32c_reg *rx, *ry;
96 /* An overestimate of the number of raw and pseudoregisters we will
97 have. The exact answer depends on the variant of the architecture
98 at hand, but we can use this to declare statically allocated
99 arrays, and bump it up when needed. */
100 #define M32C_MAX_NUM_REGS (75)
102 /* The largest assigned DWARF register number. */
103 #define M32C_MAX_DWARF_REGNUM (40)
108 /* All the registers for this variant, indexed by GDB register
109 number, and the number of registers present. */
110 struct m32c_reg regs[M32C_MAX_NUM_REGS];
112 /* The number of valid registers. */
115 /* Interesting registers. These are pointers into REGS. */
116 struct m32c_reg *pc, *flg;
117 struct m32c_reg *r0, *r1, *r2, *r3, *a0, *a1;
118 struct m32c_reg *r2r0, *r3r2r1r0, *r3r1r2r0;
119 struct m32c_reg *sb, *fb, *sp;
121 /* A table indexed by DWARF register numbers, pointing into
123 struct m32c_reg *dwarf_regs[M32C_MAX_DWARF_REGNUM + 1];
125 /* Types for this architecture. We can't use the builtin_type_foo
126 types, because they're not initialized when building a gdbarch
128 struct type *voyd, *ptr_voyd, *func_voyd;
129 struct type *uint8, *uint16;
130 struct type *int8, *int16, *int32, *int64;
132 /* The types for data address and code address registers. */
133 struct type *data_addr_reg_type, *code_addr_reg_type;
135 /* The number of bytes a return address pushed by a 'jsr' instruction
136 occupies on the stack. */
139 /* The number of bytes an address register occupies on the stack
140 when saved by an 'enter' or 'pushm' instruction. */
148 make_types (struct gdbarch *arch)
150 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
151 unsigned long mach = gdbarch_bfd_arch_info (arch)->mach;
152 int data_addr_reg_bits, code_addr_reg_bits;
156 /* This is used to clip CORE_ADDR values, so this value is
157 appropriate both on the m32c, where pointers are 32 bits long,
158 and on the m16c, where pointers are sixteen bits long, but there
159 may be code above the 64k boundary. */
160 set_gdbarch_addr_bit (arch, 24);
162 /* GCC uses 32 bits for addrs in the dwarf info, even though
163 only 16/24 bits are used. Setting addr_bit to 24 causes
164 errors in reading the dwarf addresses. */
165 set_gdbarch_addr_bit (arch, 32);
168 set_gdbarch_int_bit (arch, 16);
172 data_addr_reg_bits = 16;
173 code_addr_reg_bits = 24;
174 set_gdbarch_ptr_bit (arch, 16);
175 tdep->ret_addr_bytes = 3;
176 tdep->push_addr_bytes = 2;
180 data_addr_reg_bits = 24;
181 code_addr_reg_bits = 24;
182 set_gdbarch_ptr_bit (arch, 32);
183 tdep->ret_addr_bytes = 4;
184 tdep->push_addr_bytes = 4;
188 gdb_assert_not_reached ("unexpected mach");
191 /* The builtin_type_mumble variables are sometimes uninitialized when
192 this is called, so we avoid using them. */
193 tdep->voyd = arch_type (arch, TYPE_CODE_VOID, 1, "void");
195 = arch_type (arch, TYPE_CODE_PTR, gdbarch_ptr_bit (arch) / TARGET_CHAR_BIT,
197 TYPE_TARGET_TYPE (tdep->ptr_voyd) = tdep->voyd;
198 TYPE_UNSIGNED (tdep->ptr_voyd) = 1;
199 tdep->func_voyd = lookup_function_type (tdep->voyd);
201 xsnprintf (type_name, sizeof (type_name), "%s_data_addr_t",
202 gdbarch_bfd_arch_info (arch)->printable_name);
203 tdep->data_addr_reg_type
204 = arch_type (arch, TYPE_CODE_PTR, data_addr_reg_bits / TARGET_CHAR_BIT,
205 xstrdup (type_name));
206 TYPE_TARGET_TYPE (tdep->data_addr_reg_type) = tdep->voyd;
207 TYPE_UNSIGNED (tdep->data_addr_reg_type) = 1;
209 xsnprintf (type_name, sizeof (type_name), "%s_code_addr_t",
210 gdbarch_bfd_arch_info (arch)->printable_name);
211 tdep->code_addr_reg_type
212 = arch_type (arch, TYPE_CODE_PTR, code_addr_reg_bits / TARGET_CHAR_BIT,
213 xstrdup (type_name));
214 TYPE_TARGET_TYPE (tdep->code_addr_reg_type) = tdep->func_voyd;
215 TYPE_UNSIGNED (tdep->code_addr_reg_type) = 1;
217 tdep->uint8 = arch_integer_type (arch, 8, 1, "uint8_t");
218 tdep->uint16 = arch_integer_type (arch, 16, 1, "uint16_t");
219 tdep->int8 = arch_integer_type (arch, 8, 0, "int8_t");
220 tdep->int16 = arch_integer_type (arch, 16, 0, "int16_t");
221 tdep->int32 = arch_integer_type (arch, 32, 0, "int32_t");
222 tdep->int64 = arch_integer_type (arch, 64, 0, "int64_t");
230 m32c_register_name (struct gdbarch *gdbarch, int num)
232 return gdbarch_tdep (gdbarch)->regs[num].name;
237 m32c_register_type (struct gdbarch *arch, int reg_nr)
239 return gdbarch_tdep (arch)->regs[reg_nr].type;
244 m32c_register_sim_regno (struct gdbarch *gdbarch, int reg_nr)
246 return gdbarch_tdep (gdbarch)->regs[reg_nr].sim_num;
251 m32c_debug_info_reg_to_regnum (struct gdbarch *gdbarch, int reg_nr)
253 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
254 if (0 <= reg_nr && reg_nr <= M32C_MAX_DWARF_REGNUM
255 && tdep->dwarf_regs[reg_nr])
256 return tdep->dwarf_regs[reg_nr]->num;
258 /* The DWARF CFI code expects to see -1 for invalid register
265 m32c_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
266 struct reggroup *group)
268 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
269 struct m32c_reg *reg = &tdep->regs[regnum];
271 /* The anonymous raw registers aren't in any groups. */
275 if (group == all_reggroup)
278 if (group == general_reggroup
282 if (group == m32c_dma_reggroup
286 if (group == system_reggroup
290 /* Since the m32c DWARF register numbers refer to cooked registers, not
291 raw registers, and frame_pop depends on the save and restore groups
292 containing registers the DWARF CFI will actually mention, our save
293 and restore groups are cooked registers, not raw registers. (This is
294 why we can't use the default reggroup function.) */
295 if ((group == save_reggroup
296 || group == restore_reggroup)
297 && reg->save_restore_p)
304 /* Register move functions. We declare them here using
305 m32c_{read,write}_reg_t to check the types. */
306 static m32c_read_reg_t m32c_raw_read;
307 static m32c_read_reg_t m32c_banked_read;
308 static m32c_read_reg_t m32c_sb_read;
309 static m32c_read_reg_t m32c_part_read;
310 static m32c_read_reg_t m32c_cat_read;
311 static m32c_read_reg_t m32c_r3r2r1r0_read;
313 static m32c_write_reg_t m32c_raw_write;
314 static m32c_write_reg_t m32c_banked_write;
315 static m32c_write_reg_t m32c_sb_write;
316 static m32c_write_reg_t m32c_part_write;
317 static m32c_write_reg_t m32c_cat_write;
318 static m32c_write_reg_t m32c_r3r2r1r0_write;
320 /* Copy the value of the raw register REG from CACHE to BUF. */
321 static enum register_status
322 m32c_raw_read (struct m32c_reg *reg, struct regcache *cache, gdb_byte *buf)
324 return regcache_raw_read (cache, reg->num, buf);
328 /* Copy the value of the raw register REG from BUF to CACHE. */
329 static enum register_status
330 m32c_raw_write (struct m32c_reg *reg, struct regcache *cache,
333 regcache_raw_write (cache, reg->num, buf);
339 /* Return the value of the 'flg' register in CACHE. */
341 m32c_read_flg (struct regcache *cache)
343 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (cache));
345 regcache_raw_read_unsigned (cache, tdep->flg->num, &flg);
350 /* Evaluate the real register number of a banked register. */
351 static struct m32c_reg *
352 m32c_banked_register (struct m32c_reg *reg, struct regcache *cache)
354 return ((m32c_read_flg (cache) & reg->n) ? reg->ry : reg->rx);
358 /* Move the value of a banked register from CACHE to BUF.
359 If the value of the 'flg' register in CACHE has any of the bits
360 masked in REG->n set, then read REG->ry. Otherwise, read
362 static enum register_status
363 m32c_banked_read (struct m32c_reg *reg, struct regcache *cache, gdb_byte *buf)
365 struct m32c_reg *bank_reg = m32c_banked_register (reg, cache);
366 return regcache_raw_read (cache, bank_reg->num, buf);
370 /* Move the value of a banked register from BUF to CACHE.
371 If the value of the 'flg' register in CACHE has any of the bits
372 masked in REG->n set, then write REG->ry. Otherwise, write
374 static enum register_status
375 m32c_banked_write (struct m32c_reg *reg, struct regcache *cache,
378 struct m32c_reg *bank_reg = m32c_banked_register (reg, cache);
379 regcache_raw_write (cache, bank_reg->num, buf);
385 /* Move the value of SB from CACHE to BUF. On bfd_mach_m32c, SB is a
386 banked register; on bfd_mach_m16c, it's not. */
387 static enum register_status
388 m32c_sb_read (struct m32c_reg *reg, struct regcache *cache, gdb_byte *buf)
390 if (gdbarch_bfd_arch_info (reg->arch)->mach == bfd_mach_m16c)
391 return m32c_raw_read (reg->rx, cache, buf);
393 return m32c_banked_read (reg, cache, buf);
397 /* Move the value of SB from BUF to CACHE. On bfd_mach_m32c, SB is a
398 banked register; on bfd_mach_m16c, it's not. */
399 static enum register_status
400 m32c_sb_write (struct m32c_reg *reg, struct regcache *cache, const gdb_byte *buf)
402 if (gdbarch_bfd_arch_info (reg->arch)->mach == bfd_mach_m16c)
403 m32c_raw_write (reg->rx, cache, buf);
405 m32c_banked_write (reg, cache, buf);
411 /* Assuming REG uses m32c_part_read and m32c_part_write, set *OFFSET_P
412 and *LEN_P to the offset and length, in bytes, of the part REG
413 occupies in its underlying register. The offset is from the
414 lower-addressed end, regardless of the architecture's endianness.
415 (The M32C family is always little-endian, but let's keep those
416 assumptions out of here.) */
418 m32c_find_part (struct m32c_reg *reg, int *offset_p, int *len_p)
420 /* The length of the containing register, of which REG is one part. */
421 int containing_len = TYPE_LENGTH (reg->rx->type);
423 /* The length of one "element" in our imaginary array. */
424 int elt_len = TYPE_LENGTH (reg->type);
426 /* The offset of REG's "element" from the least significant end of
427 the containing register. */
428 int elt_offset = reg->n * elt_len;
430 /* If we extend off the end, trim the length of the element. */
431 if (elt_offset + elt_len > containing_len)
433 elt_len = containing_len - elt_offset;
434 /* We shouldn't be declaring partial registers that go off the
435 end of their containing registers. */
436 gdb_assert (elt_len > 0);
439 /* Flip the offset around if we're big-endian. */
440 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
441 elt_offset = TYPE_LENGTH (reg->rx->type) - elt_offset - elt_len;
443 *offset_p = elt_offset;
448 /* Move the value of a partial register (r0h, intbl, etc.) from CACHE
449 to BUF. Treating the value of the register REG->rx as an array of
450 REG->type values, where higher indices refer to more significant
451 bits, read the value of the REG->n'th element. */
452 static enum register_status
453 m32c_part_read (struct m32c_reg *reg, struct regcache *cache, gdb_byte *buf)
457 memset (buf, 0, TYPE_LENGTH (reg->type));
458 m32c_find_part (reg, &offset, &len);
459 return regcache_cooked_read_part (cache, reg->rx->num, offset, len, buf);
463 /* Move the value of a banked register from BUF to CACHE.
464 Treating the value of the register REG->rx as an array of REG->type
465 values, where higher indices refer to more significant bits, write
466 the value of the REG->n'th element. */
467 static enum register_status
468 m32c_part_write (struct m32c_reg *reg, struct regcache *cache,
473 m32c_find_part (reg, &offset, &len);
474 regcache_cooked_write_part (cache, reg->rx->num, offset, len, buf);
480 /* Move the value of REG from CACHE to BUF. REG's value is the
481 concatenation of the values of the registers REG->rx and REG->ry,
482 with REG->rx contributing the more significant bits. */
483 static enum register_status
484 m32c_cat_read (struct m32c_reg *reg, struct regcache *cache, gdb_byte *buf)
486 int high_bytes = TYPE_LENGTH (reg->rx->type);
487 int low_bytes = TYPE_LENGTH (reg->ry->type);
488 enum register_status status;
490 gdb_assert (TYPE_LENGTH (reg->type) == high_bytes + low_bytes);
492 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
494 status = regcache_cooked_read (cache, reg->rx->num, buf);
495 if (status == REG_VALID)
496 status = regcache_cooked_read (cache, reg->ry->num, buf + high_bytes);
500 status = regcache_cooked_read (cache, reg->rx->num, buf + low_bytes);
501 if (status == REG_VALID)
502 status = regcache_cooked_read (cache, reg->ry->num, buf);
509 /* Move the value of REG from CACHE to BUF. REG's value is the
510 concatenation of the values of the registers REG->rx and REG->ry,
511 with REG->rx contributing the more significant bits. */
512 static enum register_status
513 m32c_cat_write (struct m32c_reg *reg, struct regcache *cache,
516 int high_bytes = TYPE_LENGTH (reg->rx->type);
517 int low_bytes = TYPE_LENGTH (reg->ry->type);
519 gdb_assert (TYPE_LENGTH (reg->type) == high_bytes + low_bytes);
521 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
523 regcache_cooked_write (cache, reg->rx->num, buf);
524 regcache_cooked_write (cache, reg->ry->num, buf + high_bytes);
528 regcache_cooked_write (cache, reg->rx->num, buf + low_bytes);
529 regcache_cooked_write (cache, reg->ry->num, buf);
536 /* Copy the value of the raw register REG from CACHE to BUF. REG is
537 the concatenation (from most significant to least) of r3, r2, r1,
539 static enum register_status
540 m32c_r3r2r1r0_read (struct m32c_reg *reg, struct regcache *cache, gdb_byte *buf)
542 struct gdbarch_tdep *tdep = gdbarch_tdep (reg->arch);
543 int len = TYPE_LENGTH (tdep->r0->type);
544 enum register_status status;
546 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
548 status = regcache_cooked_read (cache, tdep->r0->num, buf + len * 3);
549 if (status == REG_VALID)
550 status = regcache_cooked_read (cache, tdep->r1->num, buf + len * 2);
551 if (status == REG_VALID)
552 status = regcache_cooked_read (cache, tdep->r2->num, buf + len * 1);
553 if (status == REG_VALID)
554 status = regcache_cooked_read (cache, tdep->r3->num, buf);
558 status = regcache_cooked_read (cache, tdep->r0->num, buf);
559 if (status == REG_VALID)
560 status = regcache_cooked_read (cache, tdep->r1->num, buf + len * 1);
561 if (status == REG_VALID)
562 status = regcache_cooked_read (cache, tdep->r2->num, buf + len * 2);
563 if (status == REG_VALID)
564 status = regcache_cooked_read (cache, tdep->r3->num, buf + len * 3);
571 /* Copy the value of the raw register REG from BUF to CACHE. REG is
572 the concatenation (from most significant to least) of r3, r2, r1,
574 static enum register_status
575 m32c_r3r2r1r0_write (struct m32c_reg *reg, struct regcache *cache,
578 struct gdbarch_tdep *tdep = gdbarch_tdep (reg->arch);
579 int len = TYPE_LENGTH (tdep->r0->type);
581 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
583 regcache_cooked_write (cache, tdep->r0->num, buf + len * 3);
584 regcache_cooked_write (cache, tdep->r1->num, buf + len * 2);
585 regcache_cooked_write (cache, tdep->r2->num, buf + len * 1);
586 regcache_cooked_write (cache, tdep->r3->num, buf);
590 regcache_cooked_write (cache, tdep->r0->num, buf);
591 regcache_cooked_write (cache, tdep->r1->num, buf + len * 1);
592 regcache_cooked_write (cache, tdep->r2->num, buf + len * 2);
593 regcache_cooked_write (cache, tdep->r3->num, buf + len * 3);
600 static enum register_status
601 m32c_pseudo_register_read (struct gdbarch *arch,
602 struct regcache *cache,
606 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
607 struct m32c_reg *reg;
609 gdb_assert (0 <= cookednum && cookednum < tdep->num_regs);
610 gdb_assert (arch == get_regcache_arch (cache));
611 gdb_assert (arch == tdep->regs[cookednum].arch);
612 reg = &tdep->regs[cookednum];
614 return reg->read (reg, cache, buf);
619 m32c_pseudo_register_write (struct gdbarch *arch,
620 struct regcache *cache,
624 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
625 struct m32c_reg *reg;
627 gdb_assert (0 <= cookednum && cookednum < tdep->num_regs);
628 gdb_assert (arch == get_regcache_arch (cache));
629 gdb_assert (arch == tdep->regs[cookednum].arch);
630 reg = &tdep->regs[cookednum];
632 reg->write (reg, cache, buf);
636 /* Add a register with the given fields to the end of ARCH's table.
637 Return a pointer to the newly added register. */
638 static struct m32c_reg *
639 add_reg (struct gdbarch *arch,
643 m32c_read_reg_t *read,
644 m32c_write_reg_t *write,
649 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
650 struct m32c_reg *r = &tdep->regs[tdep->num_regs];
652 gdb_assert (tdep->num_regs < M32C_MAX_NUM_REGS);
657 r->num = tdep->num_regs;
658 r->sim_num = sim_num;
663 r->save_restore_p = 0;
676 /* Record NUM as REG's DWARF register number. */
678 set_dwarf_regnum (struct m32c_reg *reg, int num)
680 gdb_assert (num < M32C_MAX_NUM_REGS);
682 /* Update the reg->DWARF mapping. Only count the first number
683 assigned to this register. */
684 if (reg->dwarf_num == -1)
685 reg->dwarf_num = num;
687 /* Update the DWARF->reg mapping. */
688 gdbarch_tdep (reg->arch)->dwarf_regs[num] = reg;
692 /* Mark REG as a general-purpose register, and return it. */
693 static struct m32c_reg *
694 mark_general (struct m32c_reg *reg)
701 /* Mark REG as a DMA register, and return it. */
702 static struct m32c_reg *
703 mark_dma (struct m32c_reg *reg)
710 /* Mark REG as a SYSTEM register, and return it. */
711 static struct m32c_reg *
712 mark_system (struct m32c_reg *reg)
719 /* Mark REG as a save-restore register, and return it. */
720 static struct m32c_reg *
721 mark_save_restore (struct m32c_reg *reg)
723 reg->save_restore_p = 1;
728 #define FLAGBIT_B 0x0010
729 #define FLAGBIT_U 0x0080
731 /* Handy macros for declaring registers. These all evaluate to
732 pointers to the register declared. Macros that define two
733 registers evaluate to a pointer to the first. */
735 /* A raw register named NAME, with type TYPE and sim number SIM_NUM. */
736 #define R(name, type, sim_num) \
737 (add_reg (arch, (name), (type), (sim_num), \
738 m32c_raw_read, m32c_raw_write, NULL, NULL, 0))
740 /* The simulator register number for a raw register named NAME. */
741 #define SIM(name) (m32c_sim_reg_ ## name)
743 /* A raw unsigned 16-bit data register named NAME.
744 NAME should be an identifier, not a string. */
746 (R(#name, tdep->uint16, SIM (name)))
748 /* A raw data address register named NAME.
749 NAME should be an identifier, not a string. */
751 (R(#name, tdep->data_addr_reg_type, SIM (name)))
753 /* A raw code address register named NAME. NAME should
754 be an identifier, not a string. */
756 (R(#name, tdep->code_addr_reg_type, SIM (name)))
758 /* A pair of raw registers named NAME0 and NAME1, with type TYPE.
759 NAME should be an identifier, not a string. */
760 #define RP(name, type) \
761 (R(#name "0", (type), SIM (name ## 0)), \
762 R(#name "1", (type), SIM (name ## 1)) - 1)
764 /* A raw banked general-purpose data register named NAME.
765 NAME should be an identifier, not a string. */
767 (R(NULL, tdep->int16, SIM (name ## _bank0)), \
768 R(NULL, tdep->int16, SIM (name ## _bank1)) - 1)
770 /* A raw banked data address register named NAME.
771 NAME should be an identifier, not a string. */
773 (R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank0)), \
774 R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank1)) - 1)
776 /* A cooked register named NAME referring to a raw banked register
777 from the bank selected by the current value of FLG. RAW_PAIR
778 should be a pointer to the first register in the banked pair.
779 NAME must be an identifier, not a string. */
780 #define CB(name, raw_pair) \
781 (add_reg (arch, #name, (raw_pair)->type, 0, \
782 m32c_banked_read, m32c_banked_write, \
783 (raw_pair), (raw_pair + 1), FLAGBIT_B))
785 /* A pair of registers named NAMEH and NAMEL, of type TYPE, that
786 access the top and bottom halves of the register pointed to by
787 NAME. NAME should be an identifier. */
788 #define CHL(name, type) \
789 (add_reg (arch, #name "h", (type), 0, \
790 m32c_part_read, m32c_part_write, name, NULL, 1), \
791 add_reg (arch, #name "l", (type), 0, \
792 m32c_part_read, m32c_part_write, name, NULL, 0) - 1)
794 /* A register constructed by concatenating the two registers HIGH and
795 LOW, whose name is HIGHLOW and whose type is TYPE. */
796 #define CCAT(high, low, type) \
797 (add_reg (arch, #high #low, (type), 0, \
798 m32c_cat_read, m32c_cat_write, (high), (low), 0))
800 /* Abbreviations for marking register group membership. */
801 #define G(reg) (mark_general (reg))
802 #define S(reg) (mark_system (reg))
803 #define DMA(reg) (mark_dma (reg))
806 /* Construct the register set for ARCH. */
808 make_regs (struct gdbarch *arch)
810 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
811 int mach = gdbarch_bfd_arch_info (arch)->mach;
824 struct m32c_reg *r0hl;
825 struct m32c_reg *r1hl;
826 struct m32c_reg *r2hl;
827 struct m32c_reg *r3hl;
828 struct m32c_reg *intbhl;
829 struct m32c_reg *r2r0;
830 struct m32c_reg *r3r1;
831 struct m32c_reg *r3r1r2r0;
832 struct m32c_reg *r3r2r1r0;
833 struct m32c_reg *a1a0;
835 struct m32c_reg *raw_r0_pair = RBD (r0);
836 struct m32c_reg *raw_r1_pair = RBD (r1);
837 struct m32c_reg *raw_r2_pair = RBD (r2);
838 struct m32c_reg *raw_r3_pair = RBD (r3);
839 struct m32c_reg *raw_a0_pair = RBA (a0);
840 struct m32c_reg *raw_a1_pair = RBA (a1);
841 struct m32c_reg *raw_fb_pair = RBA (fb);
843 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
844 We always declare both raw registers, and deal with the distinction
845 in the pseudoregister. */
846 struct m32c_reg *raw_sb_pair = RBA (sb);
848 struct m32c_reg *usp = S (RA (usp));
849 struct m32c_reg *isp = S (RA (isp));
850 struct m32c_reg *intb = S (RC (intb));
851 struct m32c_reg *pc = G (RC (pc));
852 struct m32c_reg *flg = G (R16U (flg));
854 if (mach == bfd_mach_m32c)
856 struct m32c_reg *svf = S (R16U (svf));
857 struct m32c_reg *svp = S (RC (svp));
858 struct m32c_reg *vct = S (RC (vct));
860 struct m32c_reg *dmd01 = DMA (RP (dmd, tdep->uint8));
861 struct m32c_reg *dct01 = DMA (RP (dct, tdep->uint16));
862 struct m32c_reg *drc01 = DMA (RP (drc, tdep->uint16));
863 struct m32c_reg *dma01 = DMA (RP (dma, tdep->data_addr_reg_type));
864 struct m32c_reg *dsa01 = DMA (RP (dsa, tdep->data_addr_reg_type));
865 struct m32c_reg *dra01 = DMA (RP (dra, tdep->data_addr_reg_type));
868 num_raw_regs = tdep->num_regs;
870 r0 = G (CB (r0, raw_r0_pair));
871 r1 = G (CB (r1, raw_r1_pair));
872 r2 = G (CB (r2, raw_r2_pair));
873 r3 = G (CB (r3, raw_r3_pair));
874 a0 = G (CB (a0, raw_a0_pair));
875 a1 = G (CB (a1, raw_a1_pair));
876 fb = G (CB (fb, raw_fb_pair));
878 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
879 Specify custom read/write functions that do the right thing. */
880 sb = G (add_reg (arch, "sb", raw_sb_pair->type, 0,
881 m32c_sb_read, m32c_sb_write,
882 raw_sb_pair, raw_sb_pair + 1, 0));
884 /* The current sp is either usp or isp, depending on the value of
885 the FLG register's U bit. */
886 sp = G (add_reg (arch, "sp", usp->type, 0,
887 m32c_banked_read, m32c_banked_write,
888 isp, usp, FLAGBIT_U));
890 r0hl = CHL (r0, tdep->int8);
891 r1hl = CHL (r1, tdep->int8);
892 r2hl = CHL (r2, tdep->int8);
893 r3hl = CHL (r3, tdep->int8);
894 intbhl = CHL (intb, tdep->int16);
896 r2r0 = CCAT (r2, r0, tdep->int32);
897 r3r1 = CCAT (r3, r1, tdep->int32);
898 r3r1r2r0 = CCAT (r3r1, r2r0, tdep->int64);
901 = add_reg (arch, "r3r2r1r0", tdep->int64, 0,
902 m32c_r3r2r1r0_read, m32c_r3r2r1r0_write, NULL, NULL, 0);
904 if (mach == bfd_mach_m16c)
905 a1a0 = CCAT (a1, a0, tdep->int32);
909 num_cooked_regs = tdep->num_regs - num_raw_regs;
918 tdep->r3r2r1r0 = r3r2r1r0;
919 tdep->r3r1r2r0 = r3r1r2r0;
926 /* Set up the DWARF register table. */
927 memset (tdep->dwarf_regs, 0, sizeof (tdep->dwarf_regs));
928 set_dwarf_regnum (r0hl + 1, 0x01);
929 set_dwarf_regnum (r0hl + 0, 0x02);
930 set_dwarf_regnum (r1hl + 1, 0x03);
931 set_dwarf_regnum (r1hl + 0, 0x04);
932 set_dwarf_regnum (r0, 0x05);
933 set_dwarf_regnum (r1, 0x06);
934 set_dwarf_regnum (r2, 0x07);
935 set_dwarf_regnum (r3, 0x08);
936 set_dwarf_regnum (a0, 0x09);
937 set_dwarf_regnum (a1, 0x0a);
938 set_dwarf_regnum (fb, 0x0b);
939 set_dwarf_regnum (sp, 0x0c);
940 set_dwarf_regnum (pc, 0x0d); /* GCC's invention */
941 set_dwarf_regnum (sb, 0x13);
942 set_dwarf_regnum (r2r0, 0x15);
943 set_dwarf_regnum (r3r1, 0x16);
945 set_dwarf_regnum (a1a0, 0x17);
947 /* Enumerate the save/restore register group.
949 The regcache_save and regcache_restore functions apply their read
950 function to each register in this group.
952 Since frame_pop supplies frame_unwind_register as its read
953 function, the registers meaningful to the Dwarf unwinder need to
956 On the other hand, when we make inferior calls, save_inferior_status
957 and restore_inferior_status use them to preserve the current register
958 values across the inferior call. For this, you'd kind of like to
959 preserve all the raw registers, to protect the interrupted code from
960 any sort of bank switching the callee might have done. But we handle
961 those cases so badly anyway --- for example, it matters whether we
962 restore FLG before or after we restore the general-purpose registers,
963 but there's no way to express that --- that it isn't worth worrying
966 We omit control registers like inthl: if you call a function that
967 changes those, it's probably because you wanted that change to be
968 visible to the interrupted code. */
969 mark_save_restore (r0);
970 mark_save_restore (r1);
971 mark_save_restore (r2);
972 mark_save_restore (r3);
973 mark_save_restore (a0);
974 mark_save_restore (a1);
975 mark_save_restore (sb);
976 mark_save_restore (fb);
977 mark_save_restore (sp);
978 mark_save_restore (pc);
979 mark_save_restore (flg);
981 set_gdbarch_num_regs (arch, num_raw_regs);
982 set_gdbarch_num_pseudo_regs (arch, num_cooked_regs);
983 set_gdbarch_pc_regnum (arch, pc->num);
984 set_gdbarch_sp_regnum (arch, sp->num);
985 set_gdbarch_register_name (arch, m32c_register_name);
986 set_gdbarch_register_type (arch, m32c_register_type);
987 set_gdbarch_pseudo_register_read (arch, m32c_pseudo_register_read);
988 set_gdbarch_pseudo_register_write (arch, m32c_pseudo_register_write);
989 set_gdbarch_register_sim_regno (arch, m32c_register_sim_regno);
990 set_gdbarch_stab_reg_to_regnum (arch, m32c_debug_info_reg_to_regnum);
991 set_gdbarch_dwarf2_reg_to_regnum (arch, m32c_debug_info_reg_to_regnum);
992 set_gdbarch_register_reggroup_p (arch, m32c_register_reggroup_p);
994 reggroup_add (arch, general_reggroup);
995 reggroup_add (arch, all_reggroup);
996 reggroup_add (arch, save_reggroup);
997 reggroup_add (arch, restore_reggroup);
998 reggroup_add (arch, system_reggroup);
999 reggroup_add (arch, m32c_dma_reggroup);
1006 static const unsigned char *
1007 m32c_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
1009 static unsigned char break_insn[] = { 0x00 }; /* brk */
1011 *len = sizeof (break_insn);
1017 /* Prologue analysis. */
1019 enum m32c_prologue_kind
1021 /* This function uses a frame pointer. */
1022 prologue_with_frame_ptr,
1024 /* This function has no frame pointer. */
1025 prologue_sans_frame_ptr,
1027 /* This function sets up the stack, so its frame is the first
1028 frame on the stack. */
1029 prologue_first_frame
1032 struct m32c_prologue
1034 /* For consistency with the DWARF 2 .debug_frame info generated by
1035 GCC, a frame's CFA is the address immediately after the saved
1038 /* The architecture for which we generated this prologue info. */
1039 struct gdbarch *arch;
1041 enum m32c_prologue_kind kind;
1043 /* If KIND is prologue_with_frame_ptr, this is the offset from the
1044 CFA to where the frame pointer points. This is always zero or
1046 LONGEST frame_ptr_offset;
1048 /* If KIND is prologue_sans_frame_ptr, the offset from the CFA to
1049 the stack pointer --- always zero or negative.
1051 Calling this a "size" is a bit misleading, but given that the
1052 stack grows downwards, using offsets for everything keeps one
1053 from going completely sign-crazy: you never change anything's
1054 sign for an ADD instruction; always change the second operand's
1055 sign for a SUB instruction; and everything takes care of
1058 Functions that use alloca don't have a constant frame size. But
1059 they always have frame pointers, so we must use that to find the
1060 CFA (and perhaps to unwind the stack pointer). */
1063 /* The address of the first instruction at which the frame has been
1064 set up and the arguments are where the debug info says they are
1065 --- as best as we can tell. */
1066 CORE_ADDR prologue_end;
1068 /* reg_offset[R] is the offset from the CFA at which register R is
1069 saved, or 1 if register R has not been saved. (Real values are
1070 always zero or negative.) */
1071 LONGEST reg_offset[M32C_MAX_NUM_REGS];
1075 /* The longest I've seen, anyway. */
1076 #define M32C_MAX_INSN_LEN (9)
1078 /* Processor state, for the prologue analyzer. */
1079 struct m32c_pv_state
1081 struct gdbarch *arch;
1082 pv_t r0, r1, r2, r3;
1086 struct pv_area *stack;
1088 /* Bytes from the current PC, the address they were read from,
1089 and the address of the next unconsumed byte. */
1090 gdb_byte insn[M32C_MAX_INSN_LEN];
1091 CORE_ADDR scan_pc, next_addr;
1095 /* Push VALUE on STATE's stack, occupying SIZE bytes. Return zero if
1096 all went well, or non-zero if simulating the action would trash our
1099 m32c_pv_push (struct m32c_pv_state *state, pv_t value, int size)
1101 if (pv_area_store_would_trash (state->stack, state->sp))
1104 state->sp = pv_add_constant (state->sp, -size);
1105 pv_area_store (state->stack, state->sp, size, value);
1114 srcdest_partial_reg,
1118 /* A source or destination location for an m16c or m32c
1122 /* If srcdest_reg, the location is a register pointed to by REG.
1123 If srcdest_partial_reg, the location is part of a register pointed
1124 to by REG. We don't try to handle this too well.
1125 If srcdest_mem, the location is memory whose address is ADDR. */
1126 enum srcdest_kind kind;
1131 /* Return the SIZE-byte value at LOC in STATE. */
1133 m32c_srcdest_fetch (struct m32c_pv_state *state, struct srcdest loc, int size)
1135 if (loc.kind == srcdest_mem)
1136 return pv_area_fetch (state->stack, loc.addr, size);
1137 else if (loc.kind == srcdest_partial_reg)
1138 return pv_unknown ();
1144 /* Write VALUE, a SIZE-byte value, to LOC in STATE. Return zero if
1145 all went well, or non-zero if simulating the store would trash our
1148 m32c_srcdest_store (struct m32c_pv_state *state, struct srcdest loc,
1149 pv_t value, int size)
1151 if (loc.kind == srcdest_mem)
1153 if (pv_area_store_would_trash (state->stack, loc.addr))
1155 pv_area_store (state->stack, loc.addr, size, value);
1157 else if (loc.kind == srcdest_partial_reg)
1158 *loc.reg = pv_unknown ();
1167 m32c_sign_ext (int v, int bits)
1169 int mask = 1 << (bits - 1);
1170 return (v ^ mask) - mask;
1174 m32c_next_byte (struct m32c_pv_state *st)
1176 gdb_assert (st->next_addr - st->scan_pc < sizeof (st->insn));
1177 return st->insn[st->next_addr++ - st->scan_pc];
1181 m32c_udisp8 (struct m32c_pv_state *st)
1183 return m32c_next_byte (st);
1188 m32c_sdisp8 (struct m32c_pv_state *st)
1190 return m32c_sign_ext (m32c_next_byte (st), 8);
1195 m32c_udisp16 (struct m32c_pv_state *st)
1197 int low = m32c_next_byte (st);
1198 int high = m32c_next_byte (st);
1200 return low + (high << 8);
1205 m32c_sdisp16 (struct m32c_pv_state *st)
1207 int low = m32c_next_byte (st);
1208 int high = m32c_next_byte (st);
1210 return m32c_sign_ext (low + (high << 8), 16);
1215 m32c_udisp24 (struct m32c_pv_state *st)
1217 int low = m32c_next_byte (st);
1218 int mid = m32c_next_byte (st);
1219 int high = m32c_next_byte (st);
1221 return low + (mid << 8) + (high << 16);
1225 /* Extract the 'source' field from an m32c MOV.size:G-format instruction. */
1227 m32c_get_src23 (unsigned char *i)
1229 return (((i[0] & 0x70) >> 2)
1230 | ((i[1] & 0x30) >> 4));
1234 /* Extract the 'dest' field from an m32c MOV.size:G-format instruction. */
1236 m32c_get_dest23 (unsigned char *i)
1238 return (((i[0] & 0x0e) << 1)
1239 | ((i[1] & 0xc0) >> 6));
1243 static struct srcdest
1244 m32c_decode_srcdest4 (struct m32c_pv_state *st,
1250 sd.kind = (size == 2 ? srcdest_reg : srcdest_partial_reg);
1252 sd.kind = srcdest_mem;
1254 sd.addr = pv_unknown ();
1259 case 0x0: sd.reg = (size == 1 ? &st->r0 : &st->r0); break;
1260 case 0x1: sd.reg = (size == 1 ? &st->r0 : &st->r1); break;
1261 case 0x2: sd.reg = (size == 1 ? &st->r1 : &st->r2); break;
1262 case 0x3: sd.reg = (size == 1 ? &st->r1 : &st->r3); break;
1264 case 0x4: sd.reg = &st->a0; break;
1265 case 0x5: sd.reg = &st->a1; break;
1267 case 0x6: sd.addr = st->a0; break;
1268 case 0x7: sd.addr = st->a1; break;
1270 case 0x8: sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); break;
1271 case 0x9: sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); break;
1272 case 0xa: sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); break;
1273 case 0xb: sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); break;
1275 case 0xc: sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); break;
1276 case 0xd: sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); break;
1277 case 0xe: sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); break;
1278 case 0xf: sd.addr = pv_constant (m32c_udisp16 (st)); break;
1281 gdb_assert_not_reached ("unexpected srcdest4");
1288 static struct srcdest
1289 m32c_decode_sd23 (struct m32c_pv_state *st, int code, int size, int ind)
1293 sd.addr = pv_unknown ();
1302 sd.kind = (size == 1) ? srcdest_partial_reg : srcdest_reg;
1307 sd.kind = (size == 4) ? srcdest_reg : srcdest_partial_reg;
1311 sd.kind = srcdest_mem;
1318 case 0x12: sd.reg = &st->r0; break;
1319 case 0x13: sd.reg = &st->r1; break;
1320 case 0x10: sd.reg = ((size == 1) ? &st->r0 : &st->r2); break;
1321 case 0x11: sd.reg = ((size == 1) ? &st->r1 : &st->r3); break;
1322 case 0x02: sd.reg = &st->a0; break;
1323 case 0x03: sd.reg = &st->a1; break;
1325 case 0x00: sd.addr = st->a0; break;
1326 case 0x01: sd.addr = st->a1; break;
1327 case 0x04: sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); break;
1328 case 0x05: sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); break;
1329 case 0x06: sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); break;
1330 case 0x07: sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); break;
1331 case 0x08: sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); break;
1332 case 0x09: sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); break;
1333 case 0x0a: sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); break;
1334 case 0x0b: sd.addr = pv_add_constant (st->fb, m32c_sdisp16 (st)); break;
1335 case 0x0c: sd.addr = pv_add_constant (st->a0, m32c_udisp24 (st)); break;
1336 case 0x0d: sd.addr = pv_add_constant (st->a1, m32c_udisp24 (st)); break;
1337 case 0x0f: sd.addr = pv_constant (m32c_udisp16 (st)); break;
1338 case 0x0e: sd.addr = pv_constant (m32c_udisp24 (st)); break;
1340 gdb_assert_not_reached ("unexpected sd23");
1345 sd.addr = m32c_srcdest_fetch (st, sd, 4);
1346 sd.kind = srcdest_mem;
1353 /* The r16c and r32c machines have instructions with similar
1354 semantics, but completely different machine language encodings. So
1355 we break out the semantics into their own functions, and leave
1356 machine-specific decoding in m32c_analyze_prologue.
1358 The following functions all expect their arguments already decoded,
1359 and they all return zero if analysis should continue past this
1360 instruction, or non-zero if analysis should stop. */
1363 /* Simulate an 'enter SIZE' instruction in STATE. */
1365 m32c_pv_enter (struct m32c_pv_state *state, int size)
1367 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1369 /* If simulating this store would require us to forget
1370 everything we know about the stack frame in the name of
1371 accuracy, it would be better to just quit now. */
1372 if (pv_area_store_would_trash (state->stack, state->sp))
1375 if (m32c_pv_push (state, state->fb, tdep->push_addr_bytes))
1377 state->fb = state->sp;
1378 state->sp = pv_add_constant (state->sp, -size);
1385 m32c_pv_pushm_one (struct m32c_pv_state *state, pv_t reg,
1386 int bit, int src, int size)
1390 if (m32c_pv_push (state, reg, size))
1398 /* Simulate a 'pushm SRC' instruction in STATE. */
1400 m32c_pv_pushm (struct m32c_pv_state *state, int src)
1402 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1404 /* The bits in SRC indicating which registers to save are:
1405 r0 r1 r2 r3 a0 a1 sb fb */
1407 ( m32c_pv_pushm_one (state, state->fb, 0x01, src, tdep->push_addr_bytes)
1408 || m32c_pv_pushm_one (state, state->sb, 0x02, src, tdep->push_addr_bytes)
1409 || m32c_pv_pushm_one (state, state->a1, 0x04, src, tdep->push_addr_bytes)
1410 || m32c_pv_pushm_one (state, state->a0, 0x08, src, tdep->push_addr_bytes)
1411 || m32c_pv_pushm_one (state, state->r3, 0x10, src, 2)
1412 || m32c_pv_pushm_one (state, state->r2, 0x20, src, 2)
1413 || m32c_pv_pushm_one (state, state->r1, 0x40, src, 2)
1414 || m32c_pv_pushm_one (state, state->r0, 0x80, src, 2));
1417 /* Return non-zero if VALUE is the first incoming argument register. */
1420 m32c_is_1st_arg_reg (struct m32c_pv_state *state, pv_t value)
1422 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1423 return (value.kind == pvk_register
1424 && (gdbarch_bfd_arch_info (state->arch)->mach == bfd_mach_m16c
1425 ? (value.reg == tdep->r1->num)
1426 : (value.reg == tdep->r0->num))
1430 /* Return non-zero if VALUE is an incoming argument register. */
1433 m32c_is_arg_reg (struct m32c_pv_state *state, pv_t value)
1435 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1436 return (value.kind == pvk_register
1437 && (gdbarch_bfd_arch_info (state->arch)->mach == bfd_mach_m16c
1438 ? (value.reg == tdep->r1->num || value.reg == tdep->r2->num)
1439 : (value.reg == tdep->r0->num))
1443 /* Return non-zero if a store of VALUE to LOC is probably spilling an
1444 argument register to its stack slot in STATE. Such instructions
1445 should be included in the prologue, if possible.
1447 The store is a spill if:
1448 - the value being stored is the original value of an argument register;
1449 - the value has not already been stored somewhere in STACK; and
1450 - LOC is a stack slot (e.g., a memory location whose address is
1451 relative to the original value of the SP). */
1454 m32c_is_arg_spill (struct m32c_pv_state *st,
1458 struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);
1460 return (m32c_is_arg_reg (st, value)
1461 && loc.kind == srcdest_mem
1462 && pv_is_register (loc.addr, tdep->sp->num)
1463 && ! pv_area_find_reg (st->stack, st->arch, value.reg, 0));
1466 /* Return non-zero if a store of VALUE to LOC is probably
1467 copying the struct return address into an address register
1468 for immediate use. This is basically a "spill" into the
1469 address register, instead of onto the stack.
1471 The prerequisites are:
1472 - value being stored is original value of the FIRST arg register;
1473 - value has not already been stored on stack; and
1474 - LOC is an address register (a0 or a1). */
1477 m32c_is_struct_return (struct m32c_pv_state *st,
1481 struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);
1483 return (m32c_is_1st_arg_reg (st, value)
1484 && !pv_area_find_reg (st->stack, st->arch, value.reg, 0)
1485 && loc.kind == srcdest_reg
1486 && (pv_is_register (*loc.reg, tdep->a0->num)
1487 || pv_is_register (*loc.reg, tdep->a1->num)));
1490 /* Return non-zero if a 'pushm' saving the registers indicated by SRC
1491 was a register save:
1492 - all the named registers should have their original values, and
1493 - the stack pointer should be at a constant offset from the
1494 original stack pointer. */
1496 m32c_pushm_is_reg_save (struct m32c_pv_state *st, int src)
1498 struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);
1499 /* The bits in SRC indicating which registers to save are:
1500 r0 r1 r2 r3 a0 a1 sb fb */
1502 (pv_is_register (st->sp, tdep->sp->num)
1503 && (! (src & 0x01) || pv_is_register_k (st->fb, tdep->fb->num, 0))
1504 && (! (src & 0x02) || pv_is_register_k (st->sb, tdep->sb->num, 0))
1505 && (! (src & 0x04) || pv_is_register_k (st->a1, tdep->a1->num, 0))
1506 && (! (src & 0x08) || pv_is_register_k (st->a0, tdep->a0->num, 0))
1507 && (! (src & 0x10) || pv_is_register_k (st->r3, tdep->r3->num, 0))
1508 && (! (src & 0x20) || pv_is_register_k (st->r2, tdep->r2->num, 0))
1509 && (! (src & 0x40) || pv_is_register_k (st->r1, tdep->r1->num, 0))
1510 && (! (src & 0x80) || pv_is_register_k (st->r0, tdep->r0->num, 0)));
1514 /* Function for finding saved registers in a 'struct pv_area'; we pass
1515 this to pv_area_scan.
1517 If VALUE is a saved register, ADDR says it was saved at a constant
1518 offset from the frame base, and SIZE indicates that the whole
1519 register was saved, record its offset in RESULT_UNTYPED. */
1521 check_for_saved (void *prologue_untyped, pv_t addr, CORE_ADDR size, pv_t value)
1523 struct m32c_prologue *prologue = (struct m32c_prologue *) prologue_untyped;
1524 struct gdbarch *arch = prologue->arch;
1525 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1527 /* Is this the unchanged value of some register being saved on the
1529 if (value.kind == pvk_register
1531 && pv_is_register (addr, tdep->sp->num))
1533 /* Some registers require special handling: they're saved as a
1534 larger value than the register itself. */
1535 CORE_ADDR saved_size = register_size (arch, value.reg);
1537 if (value.reg == tdep->pc->num)
1538 saved_size = tdep->ret_addr_bytes;
1539 else if (register_type (arch, value.reg)
1540 == tdep->data_addr_reg_type)
1541 saved_size = tdep->push_addr_bytes;
1543 if (size == saved_size)
1545 /* Find which end of the saved value corresponds to our
1547 if (gdbarch_byte_order (arch) == BFD_ENDIAN_BIG)
1548 prologue->reg_offset[value.reg]
1549 = (addr.k + saved_size - register_size (arch, value.reg));
1551 prologue->reg_offset[value.reg] = addr.k;
1557 /* Analyze the function prologue for ARCH at START, going no further
1558 than LIMIT, and place a description of what we found in
1561 m32c_analyze_prologue (struct gdbarch *arch,
1562 CORE_ADDR start, CORE_ADDR limit,
1563 struct m32c_prologue *prologue)
1565 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1566 unsigned long mach = gdbarch_bfd_arch_info (arch)->mach;
1567 CORE_ADDR after_last_frame_related_insn;
1568 struct cleanup *back_to;
1569 struct m32c_pv_state st;
1572 st.r0 = pv_register (tdep->r0->num, 0);
1573 st.r1 = pv_register (tdep->r1->num, 0);
1574 st.r2 = pv_register (tdep->r2->num, 0);
1575 st.r3 = pv_register (tdep->r3->num, 0);
1576 st.a0 = pv_register (tdep->a0->num, 0);
1577 st.a1 = pv_register (tdep->a1->num, 0);
1578 st.sb = pv_register (tdep->sb->num, 0);
1579 st.fb = pv_register (tdep->fb->num, 0);
1580 st.sp = pv_register (tdep->sp->num, 0);
1581 st.pc = pv_register (tdep->pc->num, 0);
1582 st.stack = make_pv_area (tdep->sp->num, gdbarch_addr_bit (arch));
1583 back_to = make_cleanup_free_pv_area (st.stack);
1585 /* Record that the call instruction has saved the return address on
1587 m32c_pv_push (&st, st.pc, tdep->ret_addr_bytes);
1589 memset (prologue, 0, sizeof (*prologue));
1590 prologue->arch = arch;
1593 for (i = 0; i < M32C_MAX_NUM_REGS; i++)
1594 prologue->reg_offset[i] = 1;
1597 st.scan_pc = after_last_frame_related_insn = start;
1599 while (st.scan_pc < limit)
1601 pv_t pre_insn_fb = st.fb;
1602 pv_t pre_insn_sp = st.sp;
1604 /* In theory we could get in trouble by trying to read ahead
1605 here, when we only know we're expecting one byte. In
1606 practice I doubt anyone will care, and it makes the rest of
1608 if (target_read_memory (st.scan_pc, st.insn, sizeof (st.insn)))
1609 /* If we can't fetch the instruction from memory, stop here
1610 and hope for the best. */
1612 st.next_addr = st.scan_pc;
1614 /* The assembly instructions are written as they appear in the
1615 section of the processor manuals that describe the
1616 instruction encodings.
1618 When a single assembly language instruction has several
1619 different machine-language encodings, the manual
1620 distinguishes them by a number in parens, before the
1621 mnemonic. Those numbers are included, as well.
1623 The srcdest decoding instructions have the same names as the
1624 analogous functions in the simulator. */
1625 if (mach == bfd_mach_m16c)
1627 /* (1) ENTER #imm8 */
1628 if (st.insn[0] == 0x7c && st.insn[1] == 0xf2)
1630 if (m32c_pv_enter (&st, st.insn[2]))
1635 else if (st.insn[0] == 0xec)
1637 int src = st.insn[1];
1638 if (m32c_pv_pushm (&st, src))
1642 if (m32c_pushm_is_reg_save (&st, src))
1643 after_last_frame_related_insn = st.next_addr;
1646 /* (6) MOV.size:G src, dest */
1647 else if ((st.insn[0] & 0xfe) == 0x72)
1649 int size = (st.insn[0] & 0x01) ? 2 : 1;
1651 struct srcdest dest;
1656 = m32c_decode_srcdest4 (&st, (st.insn[1] >> 4) & 0xf, size);
1658 = m32c_decode_srcdest4 (&st, st.insn[1] & 0xf, size);
1659 src_value = m32c_srcdest_fetch (&st, src, size);
1661 if (m32c_is_arg_spill (&st, dest, src_value))
1662 after_last_frame_related_insn = st.next_addr;
1663 else if (m32c_is_struct_return (&st, dest, src_value))
1664 after_last_frame_related_insn = st.next_addr;
1666 if (m32c_srcdest_store (&st, dest, src_value, size))
1670 /* (1) LDC #IMM16, sp */
1671 else if (st.insn[0] == 0xeb
1672 && st.insn[1] == 0x50)
1675 st.sp = pv_constant (m32c_udisp16 (&st));
1679 /* We've hit some instruction we don't know how to simulate.
1680 Strictly speaking, we should set every value we're
1681 tracking to "unknown". But we'll be optimistic, assume
1682 that we have enough information already, and stop
1688 int src_indirect = 0;
1689 int dest_indirect = 0;
1692 gdb_assert (mach == bfd_mach_m32c);
1694 /* Check for prefix bytes indicating indirect addressing. */
1695 if (st.insn[0] == 0x41)
1700 else if (st.insn[0] == 0x09)
1705 else if (st.insn[0] == 0x49)
1707 src_indirect = dest_indirect = 1;
1711 /* (1) ENTER #imm8 */
1712 if (st.insn[i] == 0xec)
1714 if (m32c_pv_enter (&st, st.insn[i + 1]))
1720 else if (st.insn[i] == 0x8f)
1722 int src = st.insn[i + 1];
1723 if (m32c_pv_pushm (&st, src))
1727 if (m32c_pushm_is_reg_save (&st, src))
1728 after_last_frame_related_insn = st.next_addr;
1731 /* (7) MOV.size:G src, dest */
1732 else if ((st.insn[i] & 0x80) == 0x80
1733 && (st.insn[i + 1] & 0x0f) == 0x0b
1734 && m32c_get_src23 (&st.insn[i]) < 20
1735 && m32c_get_dest23 (&st.insn[i]) < 20)
1738 struct srcdest dest;
1740 int bw = st.insn[i] & 0x01;
1741 int size = bw ? 2 : 1;
1745 = m32c_decode_sd23 (&st, m32c_get_src23 (&st.insn[i]),
1746 size, src_indirect);
1748 = m32c_decode_sd23 (&st, m32c_get_dest23 (&st.insn[i]),
1749 size, dest_indirect);
1750 src_value = m32c_srcdest_fetch (&st, src, size);
1752 if (m32c_is_arg_spill (&st, dest, src_value))
1753 after_last_frame_related_insn = st.next_addr;
1755 if (m32c_srcdest_store (&st, dest, src_value, size))
1758 /* (2) LDC #IMM24, sp */
1759 else if (st.insn[i] == 0xd5
1760 && st.insn[i + 1] == 0x29)
1763 st.sp = pv_constant (m32c_udisp24 (&st));
1766 /* We've hit some instruction we don't know how to simulate.
1767 Strictly speaking, we should set every value we're
1768 tracking to "unknown". But we'll be optimistic, assume
1769 that we have enough information already, and stop
1774 /* If this instruction changed the FB or decreased the SP (i.e.,
1775 allocated more stack space), then this may be a good place to
1776 declare the prologue finished. However, there are some
1779 - If the instruction just changed the FB back to its original
1780 value, then that's probably a restore instruction. The
1781 prologue should definitely end before that.
1783 - If the instruction increased the value of the SP (that is,
1784 shrunk the frame), then it's probably part of a frame
1785 teardown sequence, and the prologue should end before
1788 if (! pv_is_identical (st.fb, pre_insn_fb))
1790 if (! pv_is_register_k (st.fb, tdep->fb->num, 0))
1791 after_last_frame_related_insn = st.next_addr;
1793 else if (! pv_is_identical (st.sp, pre_insn_sp))
1795 /* The comparison of the constants looks odd, there, because
1796 .k is unsigned. All it really means is that the SP is
1797 lower than it was before the instruction. */
1798 if ( pv_is_register (pre_insn_sp, tdep->sp->num)
1799 && pv_is_register (st.sp, tdep->sp->num)
1800 && ((pre_insn_sp.k - st.sp.k) < (st.sp.k - pre_insn_sp.k)))
1801 after_last_frame_related_insn = st.next_addr;
1804 st.scan_pc = st.next_addr;
1807 /* Did we load a constant value into the stack pointer? */
1808 if (pv_is_constant (st.sp))
1809 prologue->kind = prologue_first_frame;
1811 /* Alternatively, did we initialize the frame pointer? Remember
1812 that the CFA is the address after the return address. */
1813 if (pv_is_register (st.fb, tdep->sp->num))
1815 prologue->kind = prologue_with_frame_ptr;
1816 prologue->frame_ptr_offset = st.fb.k;
1819 /* Is the frame size a known constant? Remember that frame_size is
1820 actually the offset from the CFA to the SP (i.e., a negative
1822 else if (pv_is_register (st.sp, tdep->sp->num))
1824 prologue->kind = prologue_sans_frame_ptr;
1825 prologue->frame_size = st.sp.k;
1828 /* We haven't been able to make sense of this function's frame. Treat
1829 it as the first frame. */
1831 prologue->kind = prologue_first_frame;
1833 /* Record where all the registers were saved. */
1834 pv_area_scan (st.stack, check_for_saved, (void *) prologue);
1836 prologue->prologue_end = after_last_frame_related_insn;
1838 do_cleanups (back_to);
1843 m32c_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR ip)
1846 CORE_ADDR func_addr, func_end, sal_end;
1847 struct m32c_prologue p;
1849 /* Try to find the extent of the function that contains IP. */
1850 if (! find_pc_partial_function (ip, &name, &func_addr, &func_end))
1853 /* Find end by prologue analysis. */
1854 m32c_analyze_prologue (gdbarch, ip, func_end, &p);
1855 /* Find end by line info. */
1856 sal_end = skip_prologue_using_sal (gdbarch, ip);
1857 /* Return whichever is lower. */
1858 if (sal_end != 0 && sal_end != ip && sal_end < p.prologue_end)
1861 return p.prologue_end;
1866 /* Stack unwinding. */
1868 static struct m32c_prologue *
1869 m32c_analyze_frame_prologue (struct frame_info *this_frame,
1870 void **this_prologue_cache)
1872 if (! *this_prologue_cache)
1874 CORE_ADDR func_start = get_frame_func (this_frame);
1875 CORE_ADDR stop_addr = get_frame_pc (this_frame);
1877 /* If we couldn't find any function containing the PC, then
1878 just initialize the prologue cache, but don't do anything. */
1880 stop_addr = func_start;
1882 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct m32c_prologue);
1883 m32c_analyze_prologue (get_frame_arch (this_frame),
1884 func_start, stop_addr,
1885 (struct m32c_prologue *) *this_prologue_cache);
1888 return (struct m32c_prologue *) *this_prologue_cache;
1893 m32c_frame_base (struct frame_info *this_frame,
1894 void **this_prologue_cache)
1896 struct m32c_prologue *p
1897 = m32c_analyze_frame_prologue (this_frame, this_prologue_cache);
1898 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
1900 /* In functions that use alloca, the distance between the stack
1901 pointer and the frame base varies dynamically, so we can't use
1902 the SP plus static information like prologue analysis to find the
1903 frame base. However, such functions must have a frame pointer,
1904 to be able to restore the SP on exit. So whenever we do have a
1905 frame pointer, use that to find the base. */
1908 case prologue_with_frame_ptr:
1911 = get_frame_register_unsigned (this_frame, tdep->fb->num);
1912 return fb - p->frame_ptr_offset;
1915 case prologue_sans_frame_ptr:
1918 = get_frame_register_unsigned (this_frame, tdep->sp->num);
1919 return sp - p->frame_size;
1922 case prologue_first_frame:
1926 gdb_assert_not_reached ("unexpected prologue kind");
1932 m32c_this_id (struct frame_info *this_frame,
1933 void **this_prologue_cache,
1934 struct frame_id *this_id)
1936 CORE_ADDR base = m32c_frame_base (this_frame, this_prologue_cache);
1939 *this_id = frame_id_build (base, get_frame_func (this_frame));
1940 /* Otherwise, leave it unset, and that will terminate the backtrace. */
1944 static struct value *
1945 m32c_prev_register (struct frame_info *this_frame,
1946 void **this_prologue_cache, int regnum)
1948 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
1949 struct m32c_prologue *p
1950 = m32c_analyze_frame_prologue (this_frame, this_prologue_cache);
1951 CORE_ADDR frame_base = m32c_frame_base (this_frame, this_prologue_cache);
1952 int reg_size = register_size (get_frame_arch (this_frame), regnum);
1954 if (regnum == tdep->sp->num)
1955 return frame_unwind_got_constant (this_frame, regnum, frame_base);
1957 /* If prologue analysis says we saved this register somewhere,
1958 return a description of the stack slot holding it. */
1959 if (p->reg_offset[regnum] != 1)
1960 return frame_unwind_got_memory (this_frame, regnum,
1961 frame_base + p->reg_offset[regnum]);
1963 /* Otherwise, presume we haven't changed the value of this
1964 register, and get it from the next frame. */
1965 return frame_unwind_got_register (this_frame, regnum, regnum);
1969 static const struct frame_unwind m32c_unwind = {
1971 default_frame_unwind_stop_reason,
1975 default_frame_sniffer
1980 m32c_unwind_pc (struct gdbarch *arch, struct frame_info *next_frame)
1982 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1983 return frame_unwind_register_unsigned (next_frame, tdep->pc->num);
1988 m32c_unwind_sp (struct gdbarch *arch, struct frame_info *next_frame)
1990 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1991 return frame_unwind_register_unsigned (next_frame, tdep->sp->num);
1995 /* Inferior calls. */
1997 /* The calling conventions, according to GCC:
2001 First arg may be passed in r1l or r1 if it (1) fits (QImode or
2002 HImode), (2) is named, and (3) is an integer or pointer type (no
2003 structs, floats, etc). Otherwise, it's passed on the stack.
2005 Second arg may be passed in r2, same restrictions (but not QImode),
2006 even if the first arg is passed on the stack.
2008 Third and further args are passed on the stack. No padding is
2009 used, stack "alignment" is 8 bits.
2014 First arg may be passed in r0l or r0, same restrictions as above.
2016 Second and further args are passed on the stack. Padding is used
2017 after QImode parameters (i.e. lower-addressed byte is the value,
2018 higher-addressed byte is the padding), stack "alignment" is 16
2022 /* Return true if TYPE is a type that can be passed in registers. (We
2023 ignore the size, and pay attention only to the type code;
2024 acceptable sizes depends on which register is being considered to
2027 m32c_reg_arg_type (struct type *type)
2029 enum type_code code = TYPE_CODE (type);
2031 return (code == TYPE_CODE_INT
2032 || code == TYPE_CODE_ENUM
2033 || code == TYPE_CODE_PTR
2034 || code == TYPE_CODE_REF
2035 || code == TYPE_CODE_BOOL
2036 || code == TYPE_CODE_CHAR);
2041 m32c_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2042 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
2043 struct value **args, CORE_ADDR sp, int struct_return,
2044 CORE_ADDR struct_addr)
2046 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2047 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2048 unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
2052 /* The number of arguments given in this function's prototype, or
2053 zero if it has a non-prototyped function type. The m32c ABI
2054 passes arguments mentioned in the prototype differently from
2055 those in the ellipsis of a varargs function, or from those passed
2056 to a non-prototyped function. */
2057 int num_prototyped_args = 0;
2060 struct type *func_type = value_type (function);
2062 /* Dereference function pointer types. */
2063 if (TYPE_CODE (func_type) == TYPE_CODE_PTR)
2064 func_type = TYPE_TARGET_TYPE (func_type);
2066 gdb_assert (TYPE_CODE (func_type) == TYPE_CODE_FUNC ||
2067 TYPE_CODE (func_type) == TYPE_CODE_METHOD);
2070 /* The ABI description in gcc/config/m32c/m32c.abi says that
2071 we need to handle prototyped and non-prototyped functions
2072 separately, but the code in GCC doesn't actually do so. */
2073 if (TYPE_PROTOTYPED (func_type))
2075 num_prototyped_args = TYPE_NFIELDS (func_type);
2078 /* First, if the function returns an aggregate by value, push a
2079 pointer to a buffer for it. This doesn't affect the way
2080 subsequent arguments are allocated to registers. */
2083 int ptr_len = TYPE_LENGTH (tdep->ptr_voyd);
2085 write_memory_unsigned_integer (sp, ptr_len, byte_order, struct_addr);
2088 /* Push the arguments. */
2089 for (i = nargs - 1; i >= 0; i--)
2091 struct value *arg = args[i];
2092 const gdb_byte *arg_bits = value_contents (arg);
2093 struct type *arg_type = value_type (arg);
2094 ULONGEST arg_size = TYPE_LENGTH (arg_type);
2096 /* Can it go in r1 or r1l (for m16c) or r0 or r0l (for m32c)? */
2099 && i < num_prototyped_args
2100 && m32c_reg_arg_type (arg_type))
2102 /* Extract and re-store as an integer as a terse way to make
2103 sure it ends up in the least significant end of r1. (GDB
2104 should avoid assuming endianness, even on uni-endian
2106 ULONGEST u = extract_unsigned_integer (arg_bits, arg_size,
2108 struct m32c_reg *reg = (mach == bfd_mach_m16c) ? tdep->r1 : tdep->r0;
2109 regcache_cooked_write_unsigned (regcache, reg->num, u);
2112 /* Can it go in r2? */
2113 else if (mach == bfd_mach_m16c
2116 && i < num_prototyped_args
2117 && m32c_reg_arg_type (arg_type))
2118 regcache_cooked_write (regcache, tdep->r2->num, arg_bits);
2120 /* Everything else goes on the stack. */
2125 /* Align the stack. */
2126 if (mach == bfd_mach_m32c)
2129 write_memory (sp, arg_bits, arg_size);
2133 /* This is the CFA we use to identify the dummy frame. */
2136 /* Push the return address. */
2137 sp -= tdep->ret_addr_bytes;
2138 write_memory_unsigned_integer (sp, tdep->ret_addr_bytes, byte_order,
2141 /* Update the stack pointer. */
2142 regcache_cooked_write_unsigned (regcache, tdep->sp->num, sp);
2144 /* We need to borrow an odd trick from the i386 target here.
2146 The value we return from this function gets used as the stack
2147 address (the CFA) for the dummy frame's ID. The obvious thing is
2148 to return the new TOS. However, that points at the return
2149 address, saved on the stack, which is inconsistent with the CFA's
2150 described by GCC's DWARF 2 .debug_frame information: DWARF 2
2151 .debug_frame info uses the address immediately after the saved
2152 return address. So you end up with a dummy frame whose CFA
2153 points at the return address, but the frame for the function
2154 being called has a CFA pointing after the return address: the
2155 younger CFA is *greater than* the older CFA. The sanity checks
2156 in frame.c don't like that.
2158 So we try to be consistent with the CFA's used by DWARF 2.
2159 Having a dummy frame and a real frame with the *same* CFA is
2165 static struct frame_id
2166 m32c_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
2168 /* This needs to return a frame ID whose PC is the return address
2169 passed to m32c_push_dummy_call, and whose stack_addr is the SP
2170 m32c_push_dummy_call returned.
2172 m32c_unwind_sp gives us the CFA, which is the value the SP had
2173 before the return address was pushed. */
2174 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2175 CORE_ADDR sp = get_frame_register_unsigned (this_frame, tdep->sp->num);
2176 return frame_id_build (sp, get_frame_pc (this_frame));
2181 /* Return values. */
2183 /* Return value conventions, according to GCC:
2194 Aggregate values (regardless of size) are returned by pushing a
2195 pointer to a temporary area on the stack after the args are pushed.
2196 The function fills in this area with the value. Note that this
2197 pointer on the stack does not affect how register arguments, if any,
2204 /* Return non-zero if values of type TYPE are returned by storing them
2205 in a buffer whose address is passed on the stack, ahead of the
2208 m32c_return_by_passed_buf (struct type *type)
2210 enum type_code code = TYPE_CODE (type);
2212 return (code == TYPE_CODE_STRUCT
2213 || code == TYPE_CODE_UNION);
2216 static enum return_value_convention
2217 m32c_return_value (struct gdbarch *gdbarch,
2218 struct value *function,
2219 struct type *valtype,
2220 struct regcache *regcache,
2222 const gdb_byte *writebuf)
2224 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2225 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2226 enum return_value_convention conv;
2227 ULONGEST valtype_len = TYPE_LENGTH (valtype);
2229 if (m32c_return_by_passed_buf (valtype))
2230 conv = RETURN_VALUE_STRUCT_CONVENTION;
2232 conv = RETURN_VALUE_REGISTER_CONVENTION;
2236 /* We should never be called to find values being returned by
2237 RETURN_VALUE_STRUCT_CONVENTION. Those can't be located,
2238 unless we made the call ourselves. */
2239 gdb_assert (conv == RETURN_VALUE_REGISTER_CONVENTION);
2241 gdb_assert (valtype_len <= 8);
2243 /* Anything that fits in r0 is returned there. */
2244 if (valtype_len <= TYPE_LENGTH (tdep->r0->type))
2247 regcache_cooked_read_unsigned (regcache, tdep->r0->num, &u);
2248 store_unsigned_integer (readbuf, valtype_len, byte_order, u);
2252 /* Everything else is passed in mem0, using as many bytes as
2253 needed. This is not what the Renesas tools do, but it's
2254 what GCC does at the moment. */
2255 struct bound_minimal_symbol mem0
2256 = lookup_minimal_symbol ("mem0", NULL, NULL);
2259 error (_("The return value is stored in memory at 'mem0', "
2260 "but GDB cannot find\n"
2262 read_memory (BMSYMBOL_VALUE_ADDRESS (mem0), readbuf, valtype_len);
2268 /* We should never be called to store values to be returned
2269 using RETURN_VALUE_STRUCT_CONVENTION. We have no way of
2270 finding the buffer, unless we made the call ourselves. */
2271 gdb_assert (conv == RETURN_VALUE_REGISTER_CONVENTION);
2273 gdb_assert (valtype_len <= 8);
2275 /* Anything that fits in r0 is returned there. */
2276 if (valtype_len <= TYPE_LENGTH (tdep->r0->type))
2278 ULONGEST u = extract_unsigned_integer (writebuf, valtype_len,
2280 regcache_cooked_write_unsigned (regcache, tdep->r0->num, u);
2284 /* Everything else is passed in mem0, using as many bytes as
2285 needed. This is not what the Renesas tools do, but it's
2286 what GCC does at the moment. */
2287 struct bound_minimal_symbol mem0
2288 = lookup_minimal_symbol ("mem0", NULL, NULL);
2291 error (_("The return value is stored in memory at 'mem0', "
2292 "but GDB cannot find\n"
2294 write_memory (BMSYMBOL_VALUE_ADDRESS (mem0), writebuf, valtype_len);
2305 /* The m16c and m32c use a trampoline function for indirect function
2306 calls. An indirect call looks like this:
2308 ... push arguments ...
2309 ... push target function address ...
2312 The code for m32c_jsri16 looks like this:
2316 # Save return address.
2318 pop.b m32c_jsri_ret+2
2320 # Store target function address.
2321 pop.w m32c_jsri_addr
2323 # Re-push return address.
2324 push.b m32c_jsri_ret+2
2325 push.w m32c_jsri_ret
2327 # Call the target function.
2328 jmpi.a m32c_jsri_addr
2330 Without further information, GDB will treat calls to m32c_jsri16
2331 like calls to any other function. Since m32c_jsri16 doesn't have
2332 debugging information, that normally means that GDB sets a step-
2333 resume breakpoint and lets the program continue --- which is not
2334 what the user wanted. (Giving the trampoline debugging info
2335 doesn't help: the user expects the program to stop in the function
2336 their program is calling, not in some trampoline code they've never
2339 The gdbarch_skip_trampoline_code method tells GDB how to step
2340 through such trampoline functions transparently to the user. When
2341 given the address of a trampoline function's first instruction,
2342 gdbarch_skip_trampoline_code should return the address of the first
2343 instruction of the function really being called. If GDB decides it
2344 wants to step into that function, it will set a breakpoint there
2345 and silently continue to it.
2347 We recognize the trampoline by name, and extract the target address
2348 directly from the stack. This isn't great, but recognizing by its
2349 code sequence seems more fragile. */
2352 m32c_skip_trampoline_code (struct frame_info *frame, CORE_ADDR stop_pc)
2354 struct gdbarch *gdbarch = get_frame_arch (frame);
2355 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2356 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2358 /* It would be nicer to simply look up the addresses of known
2359 trampolines once, and then compare stop_pc with them. However,
2360 we'd need to ensure that that cached address got invalidated when
2361 someone loaded a new executable, and I'm not quite sure of the
2362 best way to do that. find_pc_partial_function does do some
2363 caching, so we'll see how this goes. */
2365 CORE_ADDR start, end;
2367 if (find_pc_partial_function (stop_pc, &name, &start, &end))
2369 /* Are we stopped at the beginning of the trampoline function? */
2370 if (strcmp (name, "m32c_jsri16") == 0
2371 && stop_pc == start)
2373 /* Get the stack pointer. The return address is at the top,
2374 and the target function's address is just below that. We
2375 know it's a two-byte address, since the trampoline is
2377 CORE_ADDR sp = get_frame_sp (get_current_frame ());
2379 = read_memory_unsigned_integer (sp + tdep->ret_addr_bytes,
2382 /* What we have now is the address of a jump instruction.
2383 What we need is the destination of that jump.
2384 The opcode is 1 byte, and the destination is the next 3 bytes. */
2386 target = read_memory_unsigned_integer (target + 1, 3, byte_order);
2395 /* Address/pointer conversions. */
2397 /* On the m16c, there is a 24-bit address space, but only a very few
2398 instructions can generate addresses larger than 0xffff: jumps,
2399 jumps to subroutines, and the lde/std (load/store extended)
2402 Since GCC can only support one size of pointer, we can't have
2403 distinct 'near' and 'far' pointer types; we have to pick one size
2404 for everything. If we wanted to use 24-bit pointers, then GCC
2405 would have to use lde and ste for all memory references, which
2406 would be terrible for performance and code size. So the GNU
2407 toolchain uses 16-bit pointers for everything, and gives up the
2408 ability to have pointers point outside the first 64k of memory.
2410 However, as a special hack, we let the linker place functions at
2411 addresses above 0xffff, as long as it also places a trampoline in
2412 the low 64k for every function whose address is taken. Each
2413 trampoline consists of a single jmp.a instruction that jumps to the
2414 function's real entry point. Pointers to functions can be 16 bits
2415 long, even though the functions themselves are at higher addresses:
2416 the pointers refer to the trampolines, not the functions.
2418 This complicates things for GDB, however: given the address of a
2419 function (from debug info or linker symbols, say) which could be
2420 anywhere in the 24-bit address space, how can we find an
2421 appropriate 16-bit value to use as a pointer to it?
2423 If the linker has not generated a trampoline for the function,
2424 we're out of luck. Well, I guess we could malloc some space and
2425 write a jmp.a instruction to it, but I'm not going to get into that
2428 If the linker has generated a trampoline for the function, then it
2429 also emitted a symbol for the trampoline: if the function's linker
2430 symbol is named NAME, then the function's trampoline's linker
2431 symbol is named NAME.plt.
2433 So, given a code address:
2434 - We try to find a linker symbol at that address.
2435 - If we find such a symbol named NAME, we look for a linker symbol
2437 - If we find such a symbol, we assume it is a trampoline, and use
2438 its address as the pointer value.
2440 And, given a function pointer:
2441 - We try to find a linker symbol at that address named NAME.plt.
2442 - If we find such a symbol, we look for a linker symbol named NAME.
2443 - If we find that, we provide that as the function's address.
2444 - If any of the above steps fail, we return the original address
2445 unchanged; it might really be a function in the low 64k.
2447 See? You *knew* there was a reason you wanted to be a computer
2451 m32c_m16c_address_to_pointer (struct gdbarch *gdbarch,
2452 struct type *type, gdb_byte *buf, CORE_ADDR addr)
2454 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2455 enum type_code target_code;
2456 gdb_assert (TYPE_CODE (type) == TYPE_CODE_PTR ||
2457 TYPE_CODE (type) == TYPE_CODE_REF);
2459 target_code = TYPE_CODE (TYPE_TARGET_TYPE (type));
2461 if (target_code == TYPE_CODE_FUNC || target_code == TYPE_CODE_METHOD)
2463 const char *func_name;
2465 struct bound_minimal_symbol tramp_msym;
2467 /* Try to find a linker symbol at this address. */
2468 struct bound_minimal_symbol func_msym
2469 = lookup_minimal_symbol_by_pc (addr);
2471 if (! func_msym.minsym)
2472 error (_("Cannot convert code address %s to function pointer:\n"
2473 "couldn't find a symbol at that address, to find trampoline."),
2474 paddress (gdbarch, addr));
2476 func_name = MSYMBOL_LINKAGE_NAME (func_msym.minsym);
2477 tramp_name = (char *) xmalloc (strlen (func_name) + 5);
2478 strcpy (tramp_name, func_name);
2479 strcat (tramp_name, ".plt");
2481 /* Try to find a linker symbol for the trampoline. */
2482 tramp_msym = lookup_minimal_symbol (tramp_name, NULL, NULL);
2484 /* We've either got another copy of the name now, or don't need
2485 the name any more. */
2488 if (! tramp_msym.minsym)
2492 /* No PLT entry found. Mask off the upper bits of the address
2493 to make a pointer. As noted in the warning to the user
2494 below, this value might be useful if converted back into
2495 an address by GDB, but will otherwise, almost certainly,
2498 Using this masked result does seem to be useful
2499 in gdb.cp/cplusfuncs.exp in which ~40 FAILs turn into
2500 PASSes. These results appear to be correct as well.
2502 We print a warning here so that the user can make a
2503 determination about whether the result is useful or not. */
2504 ptrval = addr & 0xffff;
2506 warning (_("Cannot convert code address %s to function pointer:\n"
2507 "couldn't find trampoline named '%s.plt'.\n"
2508 "Returning pointer value %s instead; this may produce\n"
2509 "a useful result if converted back into an address by GDB,\n"
2510 "but will most likely not be useful otherwise.\n"),
2511 paddress (gdbarch, addr), func_name,
2512 paddress (gdbarch, ptrval));
2519 /* The trampoline's address is our pointer. */
2520 addr = BMSYMBOL_VALUE_ADDRESS (tramp_msym);
2524 store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order, addr);
2529 m32c_m16c_pointer_to_address (struct gdbarch *gdbarch,
2530 struct type *type, const gdb_byte *buf)
2532 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2534 enum type_code target_code;
2536 gdb_assert (TYPE_CODE (type) == TYPE_CODE_PTR ||
2537 TYPE_CODE (type) == TYPE_CODE_REF);
2539 ptr = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order);
2541 target_code = TYPE_CODE (TYPE_TARGET_TYPE (type));
2543 if (target_code == TYPE_CODE_FUNC || target_code == TYPE_CODE_METHOD)
2545 /* See if there is a minimal symbol at that address whose name is
2547 struct bound_minimal_symbol ptr_msym = lookup_minimal_symbol_by_pc (ptr);
2549 if (ptr_msym.minsym)
2551 const char *ptr_msym_name = MSYMBOL_LINKAGE_NAME (ptr_msym.minsym);
2552 int len = strlen (ptr_msym_name);
2555 && strcmp (ptr_msym_name + len - 4, ".plt") == 0)
2557 struct bound_minimal_symbol func_msym;
2558 /* We have a .plt symbol; try to find the symbol for the
2559 corresponding function.
2561 Since the trampoline contains a jump instruction, we
2562 could also just extract the jump's target address. I
2563 don't see much advantage one way or the other. */
2564 char *func_name = (char *) xmalloc (len - 4 + 1);
2565 memcpy (func_name, ptr_msym_name, len - 4);
2566 func_name[len - 4] = '\0';
2568 = lookup_minimal_symbol (func_name, NULL, NULL);
2570 /* If we do have such a symbol, return its value as the
2571 function's true address. */
2572 if (func_msym.minsym)
2573 ptr = BMSYMBOL_VALUE_ADDRESS (func_msym);
2580 for (aspace = 1; aspace <= 15; aspace++)
2582 ptr_msym = lookup_minimal_symbol_by_pc ((aspace << 16) | ptr);
2584 if (ptr_msym.minsym)
2585 ptr |= aspace << 16;
2594 m32c_virtual_frame_pointer (struct gdbarch *gdbarch, CORE_ADDR pc,
2596 LONGEST *frame_offset)
2599 CORE_ADDR func_addr, func_end;
2600 struct m32c_prologue p;
2602 struct regcache *regcache = get_current_regcache ();
2603 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2605 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
2606 internal_error (__FILE__, __LINE__,
2607 _("No virtual frame pointer available"));
2609 m32c_analyze_prologue (gdbarch, func_addr, pc, &p);
2612 case prologue_with_frame_ptr:
2613 *frame_regnum = m32c_banked_register (tdep->fb, regcache)->num;
2614 *frame_offset = p.frame_ptr_offset;
2616 case prologue_sans_frame_ptr:
2617 *frame_regnum = m32c_banked_register (tdep->sp, regcache)->num;
2618 *frame_offset = p.frame_size;
2621 *frame_regnum = m32c_banked_register (tdep->sp, regcache)->num;
2626 if (*frame_regnum > gdbarch_num_regs (gdbarch))
2627 internal_error (__FILE__, __LINE__,
2628 _("No virtual frame pointer available"));
2632 /* Initialization. */
2634 static struct gdbarch *
2635 m32c_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2637 struct gdbarch *arch;
2638 struct gdbarch_tdep *tdep;
2639 unsigned long mach = info.bfd_arch_info->mach;
2641 /* Find a candidate among the list of architectures we've created
2643 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2645 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2646 return arches->gdbarch;
2648 tdep = XCNEW (struct gdbarch_tdep);
2649 arch = gdbarch_alloc (&info, tdep);
2651 /* Essential types. */
2654 /* Address/pointer conversions. */
2655 if (mach == bfd_mach_m16c)
2657 set_gdbarch_address_to_pointer (arch, m32c_m16c_address_to_pointer);
2658 set_gdbarch_pointer_to_address (arch, m32c_m16c_pointer_to_address);
2665 set_gdbarch_print_insn (arch, print_insn_m32c);
2668 set_gdbarch_breakpoint_from_pc (arch, m32c_breakpoint_from_pc);
2670 /* Prologue analysis and unwinding. */
2671 set_gdbarch_inner_than (arch, core_addr_lessthan);
2672 set_gdbarch_skip_prologue (arch, m32c_skip_prologue);
2673 set_gdbarch_unwind_pc (arch, m32c_unwind_pc);
2674 set_gdbarch_unwind_sp (arch, m32c_unwind_sp);
2676 /* I'm dropping the dwarf2 sniffer because it has a few problems.
2677 They may be in the dwarf2 cfi code in GDB, or they may be in
2678 the debug info emitted by the upstream toolchain. I don't
2679 know which, but I do know that the prologue analyzer works better.
2681 dwarf2_append_sniffers (arch);
2683 frame_unwind_append_unwinder (arch, &m32c_unwind);
2685 /* Inferior calls. */
2686 set_gdbarch_push_dummy_call (arch, m32c_push_dummy_call);
2687 set_gdbarch_return_value (arch, m32c_return_value);
2688 set_gdbarch_dummy_id (arch, m32c_dummy_id);
2691 set_gdbarch_skip_trampoline_code (arch, m32c_skip_trampoline_code);
2693 set_gdbarch_virtual_frame_pointer (arch, m32c_virtual_frame_pointer);
2695 /* m32c function boundary addresses are not necessarily even.
2696 Therefore, the `vbit', which indicates a pointer to a virtual
2697 member function, is stored in the delta field, rather than as
2698 the low bit of a function pointer address.
2700 In order to verify this, see the definition of
2701 TARGET_PTRMEMFUNC_VBIT_LOCATION in gcc/defaults.h along with the
2702 definition of FUNCTION_BOUNDARY in gcc/config/m32c/m32c.h. */
2703 set_gdbarch_vbit_in_delta (arch, 1);
2708 /* Provide a prototype to silence -Wmissing-prototypes. */
2709 extern initialize_file_ftype _initialize_m32c_tdep;
2712 _initialize_m32c_tdep (void)
2714 register_gdbarch_init (bfd_arch_m32c, m32c_gdbarch_init);
2716 m32c_dma_reggroup = reggroup_new ("dma", USER_REGGROUP);