1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 #include "symfile.h" /* for entry_point_address */
26 #include "arch-utils.h"
27 #include "floatformat.h"
33 #include "elf/common.h" /* for DT_PLTGOT value */
36 /* Hook for determining the global pointer when calling functions in
37 the inferior under AIX. The initialization code in ia64-aix-nat.c
38 sets this hook to the address of a function which will find the
39 global pointer for a given address.
41 The generic code which uses the dynamic section in the inferior for
42 finding the global pointer is not of much use on AIX since the
43 values obtained from the inferior have not been relocated. */
45 CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
47 /* An enumeration of the different IA-64 instruction types. */
49 typedef enum instruction_type
51 A, /* Integer ALU ; I-unit or M-unit */
52 I, /* Non-ALU integer; I-unit */
53 M, /* Memory ; M-unit */
54 F, /* Floating-point ; F-unit */
55 B, /* Branch ; B-unit */
56 L, /* Extended (L+X) ; I-unit */
57 X, /* Extended (L+X) ; I-unit */
58 undefined /* undefined or reserved */
61 /* We represent IA-64 PC addresses as the value of the instruction
62 pointer or'd with some bit combination in the low nibble which
63 represents the slot number in the bundle addressed by the
64 instruction pointer. The problem is that the Linux kernel
65 multiplies its slot numbers (for exceptions) by one while the
66 disassembler multiplies its slot numbers by 6. In addition, I've
67 heard it said that the simulator uses 1 as the multiplier.
69 I've fixed the disassembler so that the bytes_per_line field will
70 be the slot multiplier. If bytes_per_line comes in as zero, it
71 is set to six (which is how it was set up initially). -- objdump
72 displays pretty disassembly dumps with this value. For our purposes,
73 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
74 never want to also display the raw bytes the way objdump does. */
76 #define SLOT_MULTIPLIER 1
78 /* Length in bytes of an instruction bundle */
82 /* FIXME: These extern declarations should go in ia64-tdep.h. */
83 extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
84 extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
86 static gdbarch_init_ftype ia64_gdbarch_init;
88 static gdbarch_register_name_ftype ia64_register_name;
89 static gdbarch_register_raw_size_ftype ia64_register_raw_size;
90 static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
91 static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
92 static gdbarch_register_byte_ftype ia64_register_byte;
93 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
94 static gdbarch_frame_chain_ftype ia64_frame_chain;
95 static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
96 static gdbarch_skip_prologue_ftype ia64_skip_prologue;
97 static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs;
98 static gdbarch_get_saved_register_ftype ia64_get_saved_register;
99 static gdbarch_deprecated_extract_return_value_ftype ia64_extract_return_value;
100 static gdbarch_deprecated_extract_struct_value_address_ftype ia64_extract_struct_value_address;
101 static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
102 static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
103 static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info;
104 static gdbarch_store_struct_return_ftype ia64_store_struct_return;
105 static gdbarch_push_arguments_ftype ia64_push_arguments;
106 static gdbarch_push_return_address_ftype ia64_push_return_address;
107 static gdbarch_pop_frame_ftype ia64_pop_frame;
108 static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
109 static void ia64_pop_frame_regular (struct frame_info *frame);
110 static struct type *is_float_or_hfa_type (struct type *t);
112 static int ia64_num_regs = 590;
114 static int pc_regnum = IA64_IP_REGNUM;
115 static int sp_regnum = IA64_GR12_REGNUM;
116 static int fp_regnum = IA64_VFP_REGNUM;
117 static int lr_regnum = IA64_VRAP_REGNUM;
119 static LONGEST ia64_call_dummy_words[] = {0};
121 /* Array of register names; There should be ia64_num_regs strings in
124 static char *ia64_register_names[] =
125 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
126 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
127 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
128 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
129 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
130 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
131 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
132 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
133 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
134 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
135 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
136 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
137 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
138 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
139 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
140 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
142 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
143 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
144 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
145 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
146 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
147 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
148 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
149 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
150 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
151 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
152 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
153 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
154 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
155 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
156 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
157 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
159 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
160 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
161 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
162 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
163 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
164 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
165 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
166 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
168 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
172 "pr", "ip", "psr", "cfm",
174 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
175 "", "", "", "", "", "", "", "",
176 "rsc", "bsp", "bspstore", "rnat",
178 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
179 "ccv", "", "", "", "unat", "", "", "",
180 "fpsr", "", "", "", "itc",
181 "", "", "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "", "", "",
189 "", "", "", "", "", "", "", "", "", "",
191 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
192 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
193 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
194 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
195 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
196 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
197 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
198 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
199 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
200 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
201 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
202 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
203 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
204 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
205 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
206 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
209 struct frame_extra_info
211 CORE_ADDR bsp; /* points at r32 for the current frame */
212 CORE_ADDR cfm; /* cfm value for current frame */
213 int sof; /* Size of frame (decoded from cfm value) */
214 int sol; /* Size of locals (decoded from cfm value) */
215 CORE_ADDR after_prologue;
216 /* Address of first instruction after the last
217 prologue instruction; Note that there may
218 be instructions from the function's body
219 intermingled with the prologue. */
220 int mem_stack_frame_size;
221 /* Size of the memory stack frame (may be zero),
222 or -1 if it has not been determined yet. */
223 int fp_reg; /* Register number (if any) used a frame pointer
224 for this frame. 0 if no register is being used
225 as the frame pointer. */
230 int os_ident; /* From the ELF header, one of the ELFOSABI_
231 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
233 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
234 /* OS specific function which, given a frame address
235 and register number, returns the offset to the
236 given register from the start of the frame. */
237 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
240 #define SIGCONTEXT_REGISTER_ADDRESS \
241 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
242 #define FIND_GLOBAL_POINTER \
243 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
246 ia64_register_name (int reg)
248 return ia64_register_names[reg];
252 ia64_register_raw_size (int reg)
254 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
258 ia64_register_virtual_size (int reg)
260 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
263 /* Return true iff register N's virtual format is different from
266 ia64_register_convertible (int nr)
268 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
271 const struct floatformat floatformat_ia64_ext =
273 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
274 floatformat_intbit_yes
278 ia64_register_convert_to_virtual (int regnum, struct type *type,
279 char *from, char *to)
281 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
284 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
285 store_floating(to, TYPE_LENGTH(type), val);
288 error("ia64_register_convert_to_virtual called with non floating point register number");
292 ia64_register_convert_to_raw (struct type *type, int regnum,
293 char *from, char *to)
295 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
297 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
298 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
301 error("ia64_register_convert_to_raw called with non floating point register number");
305 ia64_register_virtual_type (int reg)
307 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
308 return builtin_type_long_double;
310 return builtin_type_long;
314 ia64_register_byte (int reg)
317 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
320 /* Read the given register from a sigcontext structure in the
324 read_sigcontext_register (struct frame_info *frame, int regnum)
329 internal_error (__FILE__, __LINE__,
330 "read_sigcontext_register: NULL frame");
331 if (!(get_frame_type (frame) == SIGTRAMP_FRAME))
332 internal_error (__FILE__, __LINE__,
333 "read_sigcontext_register: frame not a signal trampoline");
334 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
335 internal_error (__FILE__, __LINE__,
336 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
338 regaddr = SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regnum);
340 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
342 internal_error (__FILE__, __LINE__,
343 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
346 /* Extract ``len'' bits from an instruction bundle starting at
350 extract_bit_field (char *bundle, int from, int len)
352 long long result = 0LL;
354 int from_byte = from / 8;
355 int to_byte = to / 8;
356 unsigned char *b = (unsigned char *) bundle;
362 if (from_byte == to_byte)
363 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
364 result = c >> (from % 8);
365 lshift = 8 - (from % 8);
367 for (i = from_byte+1; i < to_byte; i++)
369 result |= ((long long) b[i]) << lshift;
373 if (from_byte < to_byte && (to % 8 != 0))
376 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
377 result |= ((long long) c) << lshift;
383 /* Replace the specified bits in an instruction bundle */
386 replace_bit_field (char *bundle, long long val, int from, int len)
389 int from_byte = from / 8;
390 int to_byte = to / 8;
391 unsigned char *b = (unsigned char *) bundle;
394 if (from_byte == to_byte)
396 unsigned char left, right;
398 left = (c >> (to % 8)) << (to % 8);
399 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
400 c = (unsigned char) (val & 0xff);
401 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
409 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
410 c = c | (val << (from % 8));
412 val >>= 8 - from % 8;
414 for (i = from_byte+1; i < to_byte; i++)
423 unsigned char cv = (unsigned char) val;
425 c = c >> (to % 8) << (to % 8);
426 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
432 /* Return the contents of slot N (for N = 0, 1, or 2) in
433 and instruction bundle */
436 slotN_contents (char *bundle, int slotnum)
438 return extract_bit_field (bundle, 5+41*slotnum, 41);
441 /* Store an instruction in an instruction bundle */
444 replace_slotN_contents (char *bundle, long long instr, int slotnum)
446 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
449 static enum instruction_type template_encoding_table[32][3] =
451 { M, I, I }, /* 00 */
452 { M, I, I }, /* 01 */
453 { M, I, I }, /* 02 */
454 { M, I, I }, /* 03 */
455 { M, L, X }, /* 04 */
456 { M, L, X }, /* 05 */
457 { undefined, undefined, undefined }, /* 06 */
458 { undefined, undefined, undefined }, /* 07 */
459 { M, M, I }, /* 08 */
460 { M, M, I }, /* 09 */
461 { M, M, I }, /* 0A */
462 { M, M, I }, /* 0B */
463 { M, F, I }, /* 0C */
464 { M, F, I }, /* 0D */
465 { M, M, F }, /* 0E */
466 { M, M, F }, /* 0F */
467 { M, I, B }, /* 10 */
468 { M, I, B }, /* 11 */
469 { M, B, B }, /* 12 */
470 { M, B, B }, /* 13 */
471 { undefined, undefined, undefined }, /* 14 */
472 { undefined, undefined, undefined }, /* 15 */
473 { B, B, B }, /* 16 */
474 { B, B, B }, /* 17 */
475 { M, M, B }, /* 18 */
476 { M, M, B }, /* 19 */
477 { undefined, undefined, undefined }, /* 1A */
478 { undefined, undefined, undefined }, /* 1B */
479 { M, F, B }, /* 1C */
480 { M, F, B }, /* 1D */
481 { undefined, undefined, undefined }, /* 1E */
482 { undefined, undefined, undefined }, /* 1F */
485 /* Fetch and (partially) decode an instruction at ADDR and return the
486 address of the next instruction to fetch. */
489 fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
491 char bundle[BUNDLE_LEN];
492 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
496 /* Warn about slot numbers greater than 2. We used to generate
497 an error here on the assumption that the user entered an invalid
498 address. But, sometimes GDB itself requests an invalid address.
499 This can (easily) happen when execution stops in a function for
500 which there are no symbols. The prologue scanner will attempt to
501 find the beginning of the function - if the nearest symbol
502 happens to not be aligned on a bundle boundary (16 bytes), the
503 resulting starting address will cause GDB to think that the slot
506 So we warn about it and set the slot number to zero. It is
507 not necessarily a fatal condition, particularly if debugging
508 at the assembly language level. */
511 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
512 "Using slot 0 instead");
518 val = target_read_memory (addr, bundle, BUNDLE_LEN);
523 *instr = slotN_contents (bundle, slotnum);
524 template = extract_bit_field (bundle, 0, 5);
525 *it = template_encoding_table[(int)template][slotnum];
527 if (slotnum == 2 || (slotnum == 1 && *it == L))
530 addr += (slotnum + 1) * SLOT_MULTIPLIER;
535 /* There are 5 different break instructions (break.i, break.b,
536 break.m, break.f, and break.x), but they all have the same
537 encoding. (The five bit template in the low five bits of the
538 instruction bundle distinguishes one from another.)
540 The runtime architecture manual specifies that break instructions
541 used for debugging purposes must have the upper two bits of the 21
542 bit immediate set to a 0 and a 1 respectively. A breakpoint
543 instruction encodes the most significant bit of its 21 bit
544 immediate at bit 36 of the 41 bit instruction. The penultimate msb
545 is at bit 25 which leads to the pattern below.
547 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
548 it turns out that 0x80000 was used as the syscall break in the early
549 simulators. So I changed the pattern slightly to do "break.i 0x080001"
550 instead. But that didn't work either (I later found out that this
551 pattern was used by the simulator that I was using.) So I ended up
552 using the pattern seen below. */
555 #define BREAKPOINT 0x00002000040LL
557 #define BREAKPOINT 0x00003333300LL
560 ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
562 char bundle[BUNDLE_LEN];
563 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
569 error("Can't insert breakpoint for slot numbers greater than 2.");
573 val = target_read_memory (addr, bundle, BUNDLE_LEN);
575 /* Check for L type instruction in 2nd slot, if present then
576 bump up the slot number to the 3rd slot */
577 template = extract_bit_field (bundle, 0, 5);
578 if (slotnum == 1 && template_encoding_table[template][1] == L)
583 instr = slotN_contents (bundle, slotnum);
584 memcpy(contents_cache, &instr, sizeof(instr));
585 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
587 target_write_memory (addr, bundle, BUNDLE_LEN);
593 ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
595 char bundle[BUNDLE_LEN];
596 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
603 val = target_read_memory (addr, bundle, BUNDLE_LEN);
605 /* Check for L type instruction in 2nd slot, if present then
606 bump up the slot number to the 3rd slot */
607 template = extract_bit_field (bundle, 0, 5);
608 if (slotnum == 1 && template_encoding_table[template][1] == L)
613 memcpy (&instr, contents_cache, sizeof instr);
614 replace_slotN_contents (bundle, instr, slotnum);
616 target_write_memory (addr, bundle, BUNDLE_LEN);
621 /* We don't really want to use this, but remote.c needs to call it in order
622 to figure out if Z-packets are supported or not. Oh, well. */
623 const unsigned char *
624 ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
626 static unsigned char breakpoint[] =
627 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
628 *lenptr = sizeof (breakpoint);
636 ia64_read_pc (ptid_t ptid)
638 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
639 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
640 int slot_num = (psr_value >> 41) & 3;
642 return pc_value | (slot_num * SLOT_MULTIPLIER);
646 ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
648 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
649 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
650 psr_value &= ~(3LL << 41);
651 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
655 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
656 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
659 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
661 /* Returns the address of the slot that's NSLOTS slots away from
662 the address ADDR. NSLOTS may be positive or negative. */
664 rse_address_add(CORE_ADDR addr, int nslots)
667 int mandatory_nat_slots = nslots / 63;
668 int direction = nslots < 0 ? -1 : 1;
670 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
672 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
673 new_addr += 8 * direction;
675 if (IS_NaT_COLLECTION_ADDR(new_addr))
676 new_addr += 8 * direction;
681 /* The IA-64 frame chain is a bit odd. We won't always have a frame
682 pointer, so we use the SP value as the FP for the purpose of
683 creating a frame. There is sometimes a register (not fixed) which
684 is used as a frame pointer. When this register exists, it is not
685 especially hard to determine which one is being used. It isn't
686 even really hard to compute the frame chain, but it can be
687 computationally expensive. So, instead of making life difficult
688 (and slow), we pick a more convenient representation of the frame
689 chain, knowing that we'll have to make some small adjustments in
690 other places. (E.g, note that read_fp() is actually read_sp() in
691 ia64_gdbarch_init() below.)
693 Okay, so what is the frame chain exactly? It'll be the SP value
694 at the time that the function in question was entered.
696 Note that this *should* actually the frame pointer for the current
697 function! But as I note above, if we were to attempt to find the
698 address of the beginning of the previous frame, we'd waste a lot
699 of cycles for no good reason. So instead, we simply choose to
700 represent the frame chain as the end of the previous frame instead
704 ia64_frame_chain (struct frame_info *frame)
706 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
707 return read_sigcontext_register (frame, sp_regnum);
708 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
709 get_frame_base (frame),
710 get_frame_base (frame)))
711 return get_frame_base (frame);
714 FRAME_INIT_SAVED_REGS (frame);
715 if (get_frame_saved_regs (frame)[IA64_VFP_REGNUM])
716 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VFP_REGNUM], 8);
718 return (get_frame_base (frame)
719 + frame->extra_info->mem_stack_frame_size);
724 ia64_frame_saved_pc (struct frame_info *frame)
726 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
727 return read_sigcontext_register (frame, pc_regnum);
728 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
729 get_frame_base (frame),
730 get_frame_base (frame)))
731 return deprecated_read_register_dummy (get_frame_pc (frame),
732 get_frame_base (frame), pc_regnum);
735 FRAME_INIT_SAVED_REGS (frame);
737 if (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM])
738 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM], 8);
739 else if (frame->next && (get_frame_type (frame->next) == SIGTRAMP_FRAME))
740 return read_sigcontext_register (frame->next, IA64_BR0_REGNUM);
741 else /* either frameless, or not far enough along in the prologue... */
742 return ia64_saved_pc_after_call (frame);
746 /* Limit the number of skipped non-prologue instructions since examining
747 of the prologue is expensive. */
748 static int max_skip_non_prologue_insns = 10;
750 /* Given PC representing the starting address of a function, and
751 LIM_PC which is the (sloppy) limit to which to scan when looking
752 for a prologue, attempt to further refine this limit by using
753 the line data in the symbol table. If successful, a better guess
754 on where the prologue ends is returned, otherwise the previous
755 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
756 which will be set to indicate whether the returned limit may be
757 used with no further scanning in the event that the function is
761 refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
763 struct symtab_and_line prologue_sal;
764 CORE_ADDR start_pc = pc;
766 /* Start off not trusting the limit. */
769 prologue_sal = find_pc_line (pc, 0);
770 if (prologue_sal.line != 0)
773 CORE_ADDR addr = prologue_sal.end;
775 /* Handle the case in which compiler's optimizer/scheduler
776 has moved instructions into the prologue. We scan ahead
777 in the function looking for address ranges whose corresponding
778 line number is less than or equal to the first one that we
779 found for the function. (It can be less than when the
780 scheduler puts a body instruction before the first prologue
782 for (i = 2 * max_skip_non_prologue_insns;
783 i > 0 && (lim_pc == 0 || addr < lim_pc);
786 struct symtab_and_line sal;
788 sal = find_pc_line (addr, 0);
791 if (sal.line <= prologue_sal.line
792 && sal.symtab == prologue_sal.symtab)
799 if (lim_pc == 0 || prologue_sal.end < lim_pc)
801 lim_pc = prologue_sal.end;
802 if (start_pc == get_pc_function_start (lim_pc))
809 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
810 || (8 <= (_regnum_) && (_regnum_) <= 11) \
811 || (14 <= (_regnum_) && (_regnum_) <= 31))
812 #define imm9(_instr_) \
813 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
814 | (((_instr_) & 0x00008000000LL) >> 20) \
815 | (((_instr_) & 0x00000001fc0LL) >> 6))
818 examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
821 CORE_ADDR last_prologue_pc = pc;
824 int do_fsr_stuff = 0;
829 int unat_save_reg = 0;
831 int mem_stack_frame_size = 0;
833 CORE_ADDR spill_addr = 0;
838 memset (instores, 0, sizeof instores);
839 memset (infpstores, 0, sizeof infpstores);
841 if (frame && !get_frame_saved_regs (frame))
843 frame_saved_regs_zalloc (frame);
849 && frame->extra_info->after_prologue != 0
850 && frame->extra_info->after_prologue <= lim_pc)
851 return frame->extra_info->after_prologue;
853 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
855 /* Must start with an alloc instruction */
856 next_pc = fetch_instruction (pc, &it, &instr);
857 if (pc < lim_pc && next_pc
858 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
861 int sor = (int) ((instr & 0x00078000000LL) >> 27);
862 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
863 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
864 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
865 we could compare against the size given to us via the cfm as
866 either a sanity check or possibly to see if the frame has been
867 changed by a later alloc instruction... */
868 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
870 last_prologue_pc = next_pc;
875 pc = lim_pc; /* Frameless: We're done early. */
877 last_prologue_pc = lim_pc;
880 /* Loop, looking for prologue instructions, keeping track of
881 where preserved registers were spilled. */
884 next_pc = fetch_instruction (pc, &it, &instr);
888 if ((it == B && ((instr & 0x1e1f800003f) != 0x04000000000))
889 || ((instr & 0x3fLL) != 0LL))
891 /* Exit loop upon hitting a non-nop branch instruction
892 or a predicated instruction. */
895 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
898 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
899 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
900 int qp = (int) (instr & 0x0000000003f);
902 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
905 last_prologue_pc = next_pc;
908 else if ((it == I || it == M)
909 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
911 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
912 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
913 | ((instr & 0x001f8000000LL) >> 20)
914 | ((instr & 0x000000fe000LL) >> 13));
915 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
916 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
917 int qp = (int) (instr & 0x0000000003fLL);
919 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
923 last_prologue_pc = next_pc;
925 else if (qp == 0 && rN == 12 && rM == 12)
927 /* adds r12, -mem_stack_frame_size, r12 */
928 mem_stack_frame_size -= imm;
929 last_prologue_pc = next_pc;
931 else if (qp == 0 && rN == 2
932 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
934 /* adds r2, spilloffset, rFramePointer
936 adds r2, spilloffset, r12
938 Get ready for stf.spill or st8.spill instructions.
939 The address to start spilling at is loaded into r2.
940 FIXME: Why r2? That's what gcc currently uses; it
941 could well be different for other compilers. */
943 /* Hmm... whether or not this will work will depend on
944 where the pc is. If it's still early in the prologue
945 this'll be wrong. FIXME */
946 spill_addr = (frame ? get_frame_base (frame) : 0)
947 + (rM == 12 ? 0 : mem_stack_frame_size)
950 last_prologue_pc = next_pc;
954 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
955 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
957 /* stf.spill [rN] = fM, imm9
959 stf.spill [rN] = fM */
961 int imm = imm9(instr);
962 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
963 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
964 int qp = (int) (instr & 0x0000000003fLL);
965 if (qp == 0 && rN == spill_reg && spill_addr != 0
966 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
969 get_frame_saved_regs (frame)[IA64_FR0_REGNUM + fM] = spill_addr;
971 if ((instr & 0x1efc0000000) == 0x0eec0000000)
974 spill_addr = 0; /* last one; must be done */
975 last_prologue_pc = next_pc;
978 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
979 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
985 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
986 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
987 int qp = (int) (instr & 0x0000000003fLL);
988 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
990 /* We have something like "mov.m r3 = ar.unat". Remember the
991 r3 (or whatever) and watch for a store of this register... */
993 last_prologue_pc = next_pc;
996 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
999 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1000 int qp = (int) (instr & 0x0000000003fLL);
1001 if (qp == 0 && isScratch (rN))
1004 last_prologue_pc = next_pc;
1008 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1009 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1013 st8 [rN] = rM, imm9 */
1014 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1015 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1016 int qp = (int) (instr & 0x0000000003fLL);
1017 if (qp == 0 && rN == spill_reg && spill_addr != 0
1018 && (rM == unat_save_reg || rM == pr_save_reg))
1020 /* We've found a spill of either the UNAT register or the PR
1021 register. (Well, not exactly; what we've actually found is
1022 a spill of the register that UNAT or PR was moved to).
1023 Record that fact and move on... */
1024 if (rM == unat_save_reg)
1026 /* Track UNAT register */
1028 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] = spill_addr;
1033 /* Track PR register */
1035 get_frame_saved_regs (frame)[IA64_PR_REGNUM] = spill_addr;
1038 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1039 /* st8 [rN] = rM, imm9 */
1040 spill_addr += imm9(instr);
1042 spill_addr = 0; /* must be done spilling */
1043 last_prologue_pc = next_pc;
1045 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1047 /* Allow up to one store of each input register. */
1048 instores[rM-32] = 1;
1049 last_prologue_pc = next_pc;
1052 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1059 Note that the st8 case is handled in the clause above.
1061 Advance over stores of input registers. One store per input
1062 register is permitted. */
1063 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1064 int qp = (int) (instr & 0x0000000003fLL);
1065 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1067 instores[rM-32] = 1;
1068 last_prologue_pc = next_pc;
1071 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1078 Advance over stores of floating point input registers. Again
1079 one store per register is permitted */
1080 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1081 int qp = (int) (instr & 0x0000000003fLL);
1082 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1084 infpstores[fM-8] = 1;
1085 last_prologue_pc = next_pc;
1089 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1090 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1092 /* st8.spill [rN] = rM
1094 st8.spill [rN] = rM, imm9 */
1095 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1096 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1097 int qp = (int) (instr & 0x0000000003fLL);
1098 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1100 /* We've found a spill of one of the preserved general purpose
1101 regs. Record the spill address and advance the spill
1102 register if appropriate. */
1104 get_frame_saved_regs (frame)[IA64_GR0_REGNUM + rM] = spill_addr;
1105 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1106 /* st8.spill [rN] = rM, imm9 */
1107 spill_addr += imm9(instr);
1109 spill_addr = 0; /* Done spilling */
1110 last_prologue_pc = next_pc;
1122 /* Extract the size of the rotating portion of the stack
1123 frame and the register rename base from the current
1125 sor = ((frame->extra_info->cfm >> 14) & 0xf) * 8;
1126 rrb_gr = (frame->extra_info->cfm >> 18) & 0x7f;
1128 for (i = 0, addr = frame->extra_info->bsp;
1129 i < frame->extra_info->sof;
1132 if (IS_NaT_COLLECTION_ADDR (addr))
1137 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1140 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + i] = addr;
1142 if (i+32 == cfm_reg)
1143 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] = addr;
1144 if (i+32 == ret_reg)
1145 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] = addr;
1147 get_frame_saved_regs (frame)[IA64_VFP_REGNUM] = addr;
1151 if (frame && frame->extra_info) {
1152 frame->extra_info->after_prologue = last_prologue_pc;
1153 frame->extra_info->mem_stack_frame_size = mem_stack_frame_size;
1154 frame->extra_info->fp_reg = fp_reg;
1157 return last_prologue_pc;
1161 ia64_skip_prologue (CORE_ADDR pc)
1163 return examine_prologue (pc, pc+1024, 0);
1167 ia64_frame_init_saved_regs (struct frame_info *frame)
1169 if (get_frame_saved_regs (frame))
1172 if ((get_frame_type (frame) == SIGTRAMP_FRAME) && SIGCONTEXT_REGISTER_ADDRESS)
1176 frame_saved_regs_zalloc (frame);
1178 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] =
1179 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_IP_REGNUM);
1180 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] =
1181 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CFM_REGNUM);
1182 get_frame_saved_regs (frame)[IA64_PSR_REGNUM] =
1183 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PSR_REGNUM);
1185 get_frame_saved_regs (frame)[IA64_BSP_REGNUM] =
1186 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1188 get_frame_saved_regs (frame)[IA64_RNAT_REGNUM] =
1189 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_RNAT_REGNUM);
1190 get_frame_saved_regs (frame)[IA64_CCV_REGNUM] =
1191 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CCV_REGNUM);
1192 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] =
1193 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_UNAT_REGNUM);
1194 get_frame_saved_regs (frame)[IA64_FPSR_REGNUM] =
1195 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_FPSR_REGNUM);
1196 get_frame_saved_regs (frame)[IA64_PFS_REGNUM] =
1197 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PFS_REGNUM);
1198 get_frame_saved_regs (frame)[IA64_LC_REGNUM] =
1199 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_LC_REGNUM);
1200 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1201 if (regno != sp_regnum)
1202 get_frame_saved_regs (frame)[regno] =
1203 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
1204 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1205 get_frame_saved_regs (frame)[regno] =
1206 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
1207 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1208 get_frame_saved_regs (frame)[regno] =
1209 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
1213 CORE_ADDR func_start;
1215 func_start = get_pc_function_start (get_frame_pc (frame));
1216 examine_prologue (func_start, get_frame_pc (frame), frame);
1221 ia64_get_saved_register (char *raw_buffer,
1224 struct frame_info *frame,
1226 enum lval_type *lval)
1230 if (!target_has_registers)
1231 error ("No registers.");
1233 if (optimized != NULL)
1242 is_dummy_frame = DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
1243 get_frame_base (frame),
1244 get_frame_base (frame));
1246 if (regnum == SP_REGNUM && frame->next)
1248 /* Handle SP values for all frames but the topmost. */
1249 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1250 get_frame_base (frame));
1252 else if (regnum == IA64_BSP_REGNUM)
1254 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1255 frame->extra_info->bsp);
1257 else if (regnum == IA64_VFP_REGNUM)
1259 /* If the function in question uses an automatic register (r32-r127)
1260 for the frame pointer, it'll be found by ia64_find_saved_register()
1261 above. If the function lacks one of these frame pointers, we can
1262 still provide a value since we know the size of the frame */
1263 CORE_ADDR vfp = (get_frame_base (frame)
1264 + frame->extra_info->mem_stack_frame_size);
1265 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1267 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1269 char *pr_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
1271 enum lval_type pr_lval;
1274 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1275 frame, IA64_PR_REGNUM, &pr_lval);
1276 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1278 /* Fetch predicate register rename base from current frame
1279 marker for this frame. */
1280 int rrb_pr = (frame->extra_info->cfm >> 32) & 0x3f;
1282 /* Adjust the register number to account for register rotation. */
1283 regnum = IA64_PR16_REGNUM
1284 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1286 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1287 regnum - IA64_PR0_REGNUM, 1);
1288 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
1290 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1292 char *unat_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
1294 enum lval_type unat_lval;
1295 CORE_ADDR unat_addr;
1297 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1298 frame, IA64_UNAT_REGNUM, &unat_lval);
1299 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1300 regnum - IA64_NAT0_REGNUM, 1);
1301 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1304 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1307 /* Find address of general register corresponding to nat bit we're
1309 CORE_ADDR gr_addr = 0;
1311 if (!is_dummy_frame)
1313 FRAME_INIT_SAVED_REGS (frame);
1314 gr_addr = get_frame_saved_regs (frame)[ regnum - IA64_NAT0_REGNUM
1319 /* Compute address of nat collection bits */
1320 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1321 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1322 CORE_ADDR nat_collection;
1324 /* If our nat collection address is bigger than bsp, we have to get
1325 the nat collection from rnat. Otherwise, we fetch the nat
1326 collection from the computed address. */
1327 if (nat_addr >= bsp)
1328 nat_collection = read_register (IA64_RNAT_REGNUM);
1330 nat_collection = read_memory_integer (nat_addr, 8);
1331 nat_bit = (gr_addr >> 3) & 0x3f;
1332 natval = (nat_collection >> nat_bit) & 1;
1334 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
1336 else if (regnum == IA64_IP_REGNUM)
1341 /* FIXME: Set *addrp, *lval when possible. */
1342 pc = ia64_frame_saved_pc (frame->next);
1348 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1350 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1353 if (!is_dummy_frame)
1355 FRAME_INIT_SAVED_REGS (frame);
1356 addr = get_frame_saved_regs (frame)[regnum];
1362 *lval = lval_memory;
1365 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1369 /* r32 - r127 must be fetchable via memory. If they aren't,
1370 then the register is unavailable */
1371 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1376 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1378 /* Fetch floating point register rename base from current
1379 frame marker for this frame. */
1380 int rrb_fr = (frame->extra_info->cfm >> 25) & 0x7f;
1382 /* Adjust the floating point register number to account for
1383 register rotation. */
1384 regnum = IA64_FR32_REGNUM
1385 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1388 deprecated_generic_get_saved_register (raw_buffer, optimized, addrp,
1389 frame, regnum, lval);
1393 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1394 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1395 and TYPE is the type (which is known to be struct, union or array). */
1397 ia64_use_struct_convention (int gcc_p, struct type *type)
1399 struct type *float_elt_type;
1401 /* HFAs are structures (or arrays) consisting entirely of floating
1402 point values of the same length. Up to 8 of these are returned
1403 in registers. Don't use the struct convention when this is the
1405 float_elt_type = is_float_or_hfa_type (type);
1406 if (float_elt_type != NULL
1407 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1410 /* Other structs of length 32 or less are returned in r8-r11.
1411 Don't use the struct convention for those either. */
1412 return TYPE_LENGTH (type) > 32;
1416 ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1418 struct type *float_elt_type;
1420 float_elt_type = is_float_or_hfa_type (type);
1421 if (float_elt_type != NULL)
1424 int regnum = IA64_FR8_REGNUM;
1425 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1429 ia64_register_convert_to_virtual (regnum, float_elt_type,
1430 ®buf[REGISTER_BYTE (regnum)], valbuf + offset);
1431 offset += TYPE_LENGTH (float_elt_type);
1436 memcpy (valbuf, ®buf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1437 TYPE_LENGTH (type));
1440 /* FIXME: Turn this into a stack of some sort. Unfortunately, something
1441 like this is necessary though since the IA-64 calling conventions specify
1442 that r8 is not preserved. */
1443 static CORE_ADDR struct_return_address;
1446 ia64_extract_struct_value_address (char *regbuf)
1448 /* FIXME: See above. */
1449 return struct_return_address;
1453 ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1455 /* FIXME: See above. */
1456 /* Note that most of the work was done in ia64_push_arguments() */
1457 struct_return_address = addr;
1461 ia64_frameless_function_invocation (struct frame_info *frame)
1463 FRAME_INIT_SAVED_REGS (frame);
1464 return (frame->extra_info->mem_stack_frame_size == 0);
1468 ia64_saved_pc_after_call (struct frame_info *frame)
1470 return read_register (IA64_BR0_REGNUM);
1474 ia64_frame_args_address (struct frame_info *frame)
1476 /* frame->frame points at the SP for this frame; But we want the start
1477 of the frame, not the end. Calling frame chain will get his for us. */
1478 return ia64_frame_chain (frame);
1482 ia64_frame_locals_address (struct frame_info *frame)
1484 /* frame->frame points at the SP for this frame; But we want the start
1485 of the frame, not the end. Calling frame chain will get his for us. */
1486 return ia64_frame_chain (frame);
1490 ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1493 int next_frame_is_call_dummy = ((frame->next != NULL)
1494 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame->next),
1495 get_frame_base (frame->next),
1496 get_frame_base (frame->next)));
1498 frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info));
1500 if (frame->next == 0)
1502 bsp = read_register (IA64_BSP_REGNUM);
1503 cfm = read_register (IA64_CFM_REGNUM);
1506 else if ((get_frame_type (frame->next) == SIGTRAMP_FRAME))
1508 bsp = read_sigcontext_register (frame->next, IA64_BSP_REGNUM);
1509 cfm = read_sigcontext_register (frame->next, IA64_CFM_REGNUM);
1511 else if (next_frame_is_call_dummy)
1513 bsp = deprecated_read_register_dummy (get_frame_pc (frame->next),
1514 get_frame_base (frame->next),
1516 cfm = deprecated_read_register_dummy (get_frame_pc (frame->next),
1517 get_frame_base (frame->next),
1522 struct frame_info *frn = frame->next;
1524 FRAME_INIT_SAVED_REGS (frn);
1526 if (get_frame_saved_regs (frn)[IA64_CFM_REGNUM] != 0)
1527 cfm = read_memory_integer (get_frame_saved_regs (frn)[IA64_CFM_REGNUM], 8);
1528 else if (frn->next && (get_frame_type (frn->next) == SIGTRAMP_FRAME))
1529 cfm = read_sigcontext_register (frn->next, IA64_PFS_REGNUM);
1531 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frn->next),
1532 get_frame_base (frn->next),
1533 get_frame_base (frn->next)))
1534 cfm = deprecated_read_register_dummy (get_frame_pc (frn->next),
1535 get_frame_base (frn->next),
1538 cfm = read_register (IA64_PFS_REGNUM);
1540 bsp = frn->extra_info->bsp;
1542 frame->extra_info->cfm = cfm;
1543 frame->extra_info->sof = cfm & 0x7f;
1544 frame->extra_info->sol = (cfm >> 7) & 0x7f;
1545 if (frame->next == 0
1546 || (get_frame_type (frame->next) == SIGTRAMP_FRAME)
1547 || next_frame_is_call_dummy)
1548 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sof);
1550 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sol);
1552 frame->extra_info->after_prologue = 0;
1553 frame->extra_info->mem_stack_frame_size = -1; /* Not yet determined */
1554 frame->extra_info->fp_reg = 0;
1558 is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1560 switch (TYPE_CODE (t))
1564 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1571 case TYPE_CODE_ARRAY:
1573 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
1576 case TYPE_CODE_STRUCT:
1580 for (i = 0; i < TYPE_NFIELDS (t); i++)
1581 if (!is_float_or_hfa_type_recurse
1582 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
1593 /* Determine if the given type is one of the floating point types or
1594 and HFA (which is a struct, array, or combination thereof whose
1595 bottom-most elements are all of the same floating point type.) */
1597 static struct type *
1598 is_float_or_hfa_type (struct type *t)
1600 struct type *et = 0;
1602 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1606 /* Return 1 if the alignment of T is such that the next even slot
1607 should be used. Return 0, if the next available slot should
1608 be used. (See section 8.5.1 of the IA-64 Software Conventions
1609 and Runtime manual.) */
1612 slot_alignment_is_next_even (struct type *t)
1614 switch (TYPE_CODE (t))
1618 if (TYPE_LENGTH (t) > 8)
1622 case TYPE_CODE_ARRAY:
1624 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
1625 case TYPE_CODE_STRUCT:
1629 for (i = 0; i < TYPE_NFIELDS (t); i++)
1630 if (slot_alignment_is_next_even
1631 (check_typedef (TYPE_FIELD_TYPE (t, i))))
1640 /* Attempt to find (and return) the global pointer for the given
1643 This is a rather nasty bit of code searchs for the .dynamic section
1644 in the objfile corresponding to the pc of the function we're trying
1645 to call. Once it finds the addresses at which the .dynamic section
1646 lives in the child process, it scans the Elf64_Dyn entries for a
1647 DT_PLTGOT tag. If it finds one of these, the corresponding
1648 d_un.d_ptr value is the global pointer. */
1651 generic_elf_find_global_pointer (CORE_ADDR faddr)
1653 struct obj_section *faddr_sect;
1655 faddr_sect = find_pc_section (faddr);
1656 if (faddr_sect != NULL)
1658 struct obj_section *osect;
1660 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
1662 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1666 if (osect < faddr_sect->objfile->sections_end)
1671 while (addr < osect->endaddr)
1677 status = target_read_memory (addr, buf, sizeof (buf));
1680 tag = extract_signed_integer (buf, sizeof (buf));
1682 if (tag == DT_PLTGOT)
1684 CORE_ADDR global_pointer;
1686 status = target_read_memory (addr + 8, buf, sizeof (buf));
1689 global_pointer = extract_address (buf, sizeof (buf));
1692 return global_pointer;
1705 /* Given a function's address, attempt to find (and return) the
1706 corresponding (canonical) function descriptor. Return 0 if
1709 find_extant_func_descr (CORE_ADDR faddr)
1711 struct obj_section *faddr_sect;
1713 /* Return early if faddr is already a function descriptor */
1714 faddr_sect = find_pc_section (faddr);
1715 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
1718 if (faddr_sect != NULL)
1720 struct obj_section *osect;
1721 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
1723 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1727 if (osect < faddr_sect->objfile->sections_end)
1732 while (addr < osect->endaddr)
1738 status = target_read_memory (addr, buf, sizeof (buf));
1741 faddr2 = extract_signed_integer (buf, sizeof (buf));
1743 if (faddr == faddr2)
1753 /* Attempt to find a function descriptor corresponding to the
1754 given address. If none is found, construct one on the
1755 stack using the address at fdaptr */
1758 find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1762 fdesc = find_extant_func_descr (faddr);
1766 CORE_ADDR global_pointer;
1772 global_pointer = FIND_GLOBAL_POINTER (faddr);
1774 if (global_pointer == 0)
1775 global_pointer = read_register (IA64_GR1_REGNUM);
1777 store_address (buf, 8, faddr);
1778 store_address (buf + 8, 8, global_pointer);
1780 write_memory (fdesc, buf, 16);
1787 ia64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
1788 int struct_return, CORE_ADDR struct_addr)
1794 int nslots, rseslots, memslots, slotnum, nfuncargs;
1796 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
1800 /* Count the number of slots needed for the arguments */
1801 for (argno = 0; argno < nargs; argno++)
1804 type = check_typedef (VALUE_TYPE (arg));
1805 len = TYPE_LENGTH (type);
1807 if ((nslots & 1) && slot_alignment_is_next_even (type))
1810 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1813 nslots += (len + 7) / 8;
1816 /* Divvy up the slots between the RSE and the memory stack */
1817 rseslots = (nslots > 8) ? 8 : nslots;
1818 memslots = nslots - rseslots;
1820 /* Allocate a new RSE frame */
1821 cfm = read_register (IA64_CFM_REGNUM);
1823 bsp = read_register (IA64_BSP_REGNUM);
1824 bsp = rse_address_add (bsp, cfm & 0x7f);
1825 new_bsp = rse_address_add (bsp, rseslots);
1826 write_register (IA64_BSP_REGNUM, new_bsp);
1828 pfs = read_register (IA64_PFS_REGNUM);
1829 pfs &= 0xc000000000000000LL;
1830 pfs |= (cfm & 0xffffffffffffLL);
1831 write_register (IA64_PFS_REGNUM, pfs);
1833 cfm &= 0xc000000000000000LL;
1835 write_register (IA64_CFM_REGNUM, cfm);
1837 /* We will attempt to find function descriptors in the .opd segment,
1838 but if we can't we'll construct them ourselves. That being the
1839 case, we'll need to reserve space on the stack for them. */
1840 funcdescaddr = sp - nfuncargs * 16;
1841 funcdescaddr &= ~0xfLL;
1843 /* Adjust the stack pointer to it's new value. The calling conventions
1844 require us to have 16 bytes of scratch, plus whatever space is
1845 necessary for the memory slots and our function descriptors */
1846 sp = sp - 16 - (memslots + nfuncargs) * 8;
1847 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1849 /* Place the arguments where they belong. The arguments will be
1850 either placed in the RSE backing store or on the memory stack.
1851 In addition, floating point arguments or HFAs are placed in
1852 floating point registers. */
1854 floatreg = IA64_FR8_REGNUM;
1855 for (argno = 0; argno < nargs; argno++)
1857 struct type *float_elt_type;
1860 type = check_typedef (VALUE_TYPE (arg));
1861 len = TYPE_LENGTH (type);
1863 /* Special handling for function parameters */
1865 && TYPE_CODE (type) == TYPE_CODE_PTR
1866 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1870 store_address (val_buf, 8,
1871 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1873 if (slotnum < rseslots)
1874 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1876 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1883 /* Skip odd slot if necessary... */
1884 if ((slotnum & 1) && slot_alignment_is_next_even (type))
1892 memset (val_buf, 0, 8);
1893 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1895 if (slotnum < rseslots)
1896 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1898 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1905 /* Handle floating point types (including HFAs) */
1906 float_elt_type = is_float_or_hfa_type (type);
1907 if (float_elt_type != NULL)
1910 len = TYPE_LENGTH (type);
1911 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1913 ia64_register_convert_to_raw (
1916 VALUE_CONTENTS (arg) + argoffset,
1917 &deprecated_registers[REGISTER_BYTE (floatreg)]);
1919 argoffset += TYPE_LENGTH (float_elt_type);
1920 len -= TYPE_LENGTH (float_elt_type);
1925 /* Store the struct return value in r8 if necessary. */
1928 store_address (&deprecated_registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
1929 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1933 /* Sync gdb's idea of what the registers are with the target. */
1934 target_store_registers (-1);
1936 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1937 to be defined to call generic_save_dummy_frame_tos(). But at the
1938 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1939 I chose to put this call here instead of using the old mechanisms.
1940 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1943 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1945 to ia64_gdbarch_init() and remove the line below. */
1946 generic_save_dummy_frame_tos (sp);
1952 ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1954 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
1956 if (global_pointer != 0)
1957 write_register (IA64_GR1_REGNUM, global_pointer);
1959 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1964 ia64_store_return_value (struct type *type, char *valbuf)
1966 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1968 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
1969 &deprecated_registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
1970 target_store_registers (IA64_FR8_REGNUM);
1973 deprecated_write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1974 valbuf, TYPE_LENGTH (type));
1978 ia64_pop_frame (void)
1980 generic_pop_current_frame (ia64_pop_frame_regular);
1984 ia64_pop_frame_regular (struct frame_info *frame)
1987 CORE_ADDR bsp, cfm, pfs;
1989 FRAME_INIT_SAVED_REGS (frame);
1991 for (regno = 0; regno < ia64_num_regs; regno++)
1993 if (get_frame_saved_regs (frame)[regno]
1994 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1995 && regno != pc_regnum
1996 && regno != sp_regnum
1997 && regno != IA64_PFS_REGNUM
1998 && regno != IA64_CFM_REGNUM
1999 && regno != IA64_BSP_REGNUM
2000 && regno != IA64_BSPSTORE_REGNUM)
2002 write_register (regno,
2003 read_memory_integer (get_frame_saved_regs (frame)[regno],
2004 REGISTER_RAW_SIZE (regno)));
2008 write_register (sp_regnum, FRAME_CHAIN (frame));
2009 write_pc (FRAME_SAVED_PC (frame));
2011 cfm = read_register (IA64_CFM_REGNUM);
2013 if (get_frame_saved_regs (frame)[IA64_PFS_REGNUM])
2015 pfs = read_memory_integer (get_frame_saved_regs (frame)[IA64_PFS_REGNUM],
2016 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
2019 pfs = read_register (IA64_PFS_REGNUM);
2021 /* Compute the new bsp by *adding* the difference between the
2022 size of the frame and the size of the locals (both wrt the
2023 frame that we're going back to). This seems kind of strange,
2024 especially since it seems like we ought to be subtracting the
2025 size of the locals... and we should; but the Linux kernel
2026 wants bsp to be set at the end of all used registers. It's
2027 likely that this code will need to be revised to accomodate
2028 other operating systems. */
2029 bsp = rse_address_add (frame->extra_info->bsp,
2030 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
2031 write_register (IA64_BSP_REGNUM, bsp);
2033 /* FIXME: What becomes of the epilog count in the PFS? */
2034 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
2035 write_register (IA64_CFM_REGNUM, cfm);
2037 flush_cached_frames ();
2041 ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
2042 CORE_ADDR *targ_addr, int *targ_len)
2044 *targ_addr = memaddr;
2045 *targ_len = nr_bytes;
2049 process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
2051 int *os_ident_ptr = obj;
2053 unsigned int sectsize;
2055 name = bfd_get_section_name (abfd, sect);
2056 sectsize = bfd_section_size (abfd, sect);
2057 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
2059 unsigned int name_length, data_length, note_type;
2060 char *note = alloca (sectsize);
2062 bfd_get_section_contents (abfd, sect, note,
2063 (file_ptr) 0, (bfd_size_type) sectsize);
2065 name_length = bfd_h_get_32 (abfd, note);
2066 data_length = bfd_h_get_32 (abfd, note + 4);
2067 note_type = bfd_h_get_32 (abfd, note + 8);
2069 if (name_length == 4 && data_length == 16 && note_type == 1
2070 && strcmp (note + 12, "GNU") == 0)
2072 int os_number = bfd_h_get_32 (abfd, note + 16);
2074 /* The case numbers are from abi-tags in glibc */
2078 *os_ident_ptr = ELFOSABI_LINUX;
2081 *os_ident_ptr = ELFOSABI_HURD;
2084 *os_ident_ptr = ELFOSABI_SOLARIS;
2087 internal_error (__FILE__, __LINE__,
2088 "process_note_abi_sections: unknown OS number %d", os_number);
2095 static struct gdbarch *
2096 ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2098 struct gdbarch *gdbarch;
2099 struct gdbarch_tdep *tdep;
2102 if (info.abfd != NULL
2103 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
2105 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
2107 /* If os_ident is 0, it is not necessarily the case that we're
2108 on a SYSV system. (ELFOSABI_NONE is defined to be 0.)
2109 GNU/Linux uses a note section to record OS/ABI info, but
2110 leaves e_ident[EI_OSABI] zero. So we have to check for note
2114 bfd_map_over_sections (info.abfd,
2115 process_note_abi_tag_sections,
2122 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2124 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2126 tdep = gdbarch_tdep (arches->gdbarch);
2127 if (tdep &&tdep->os_ident == os_ident)
2128 return arches->gdbarch;
2131 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2132 gdbarch = gdbarch_alloc (&info, tdep);
2133 tdep->os_ident = os_ident;
2135 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2136 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2137 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
2139 /* Set the method of obtaining the sigcontext addresses at which
2140 registers are saved. The method of checking to see if
2141 native_find_global_pointer is nonzero to indicate that we're
2142 on AIX is kind of hokey, but I can't think of a better way
2144 if (os_ident == ELFOSABI_LINUX)
2145 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
2146 else if (native_find_global_pointer != 0)
2147 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
2149 tdep->sigcontext_register_address = 0;
2151 /* We know that GNU/Linux won't have to resort to the
2152 native_find_global_pointer hackery. But that's the only one we
2153 know about so far, so if native_find_global_pointer is set to
2154 something non-zero, then use it. Otherwise fall back to using
2155 generic_elf_find_global_pointer. This arrangement should (in
2156 theory) allow us to cross debug GNU/Linux binaries from an AIX
2158 if (os_ident == ELFOSABI_LINUX)
2159 tdep->find_global_pointer = generic_elf_find_global_pointer;
2160 else if (native_find_global_pointer != 0)
2161 tdep->find_global_pointer = native_find_global_pointer;
2163 tdep->find_global_pointer = generic_elf_find_global_pointer;
2165 set_gdbarch_short_bit (gdbarch, 16);
2166 set_gdbarch_int_bit (gdbarch, 32);
2167 set_gdbarch_long_bit (gdbarch, 64);
2168 set_gdbarch_long_long_bit (gdbarch, 64);
2169 set_gdbarch_float_bit (gdbarch, 32);
2170 set_gdbarch_double_bit (gdbarch, 64);
2171 set_gdbarch_long_double_bit (gdbarch, 64);
2172 set_gdbarch_ptr_bit (gdbarch, 64);
2174 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2175 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2176 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2177 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
2178 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
2180 set_gdbarch_register_name (gdbarch, ia64_register_name);
2181 set_gdbarch_register_size (gdbarch, 8);
2182 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2183 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2184 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
2185 set_gdbarch_max_register_raw_size (gdbarch, 16);
2186 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
2187 set_gdbarch_max_register_virtual_size (gdbarch, 16);
2188 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2190 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2192 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2193 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2195 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2197 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
2198 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
2200 set_gdbarch_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
2201 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
2203 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2204 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2205 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2207 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
2208 set_gdbarch_deprecated_extract_return_value (gdbarch, ia64_extract_return_value);
2210 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
2211 set_gdbarch_deprecated_store_return_value (gdbarch, ia64_store_return_value);
2212 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
2214 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2215 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2216 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2217 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2218 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2220 /* Settings for calling functions in the inferior. */
2221 set_gdbarch_call_dummy_length (gdbarch, 0);
2222 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2223 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
2224 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
2226 set_gdbarch_call_dummy_p (gdbarch, 1);
2227 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2228 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2229 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2230 set_gdbarch_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
2231 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2232 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2234 /* We won't necessarily have a frame pointer and even if we do,
2235 it winds up being extraordinarly messy when attempting to find
2236 the frame chain. So for the purposes of creating frames (which
2237 is all read_fp() is used for), simply use the stack pointer value
2239 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
2241 /* Settings that should be unnecessary. */
2242 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2244 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2245 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2247 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2248 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2249 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2250 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2251 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2252 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2254 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2255 set_gdbarch_function_start_offset (gdbarch, 0);
2256 set_gdbarch_frame_args_skip (gdbarch, 0);
2258 set_gdbarch_remote_translate_xfer_address (
2259 gdbarch, ia64_remote_translate_xfer_address);
2265 _initialize_ia64_tdep (void)
2267 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2269 tm_print_insn = print_insn_ia64;
2270 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;