1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "arch-utils.h"
25 #include "floatformat.h"
28 #include "reggroups.h"
30 #include "frame-base.h"
31 #include "frame-unwind.h"
34 #include "gdb_assert.h"
36 #include "elf/common.h" /* for DT_PLTGOT value */
41 #include "ia64-tdep.h"
44 #ifdef HAVE_LIBUNWIND_IA64_H
45 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
46 #include "libunwind-frame.h"
47 #include "libunwind-ia64.h"
49 /* Note: KERNEL_START is supposed to be an address which is not going
50 to ever contain any valid unwind info. For ia64 linux, the choice
51 of 0xc000000000000000 is fairly safe since that's uncached space.
53 We use KERNEL_START as follows: after obtaining the kernel's
54 unwind table via getunwind(), we project its unwind data into
55 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
56 when ia64_access_mem() sees a memory access to this
57 address-range, we redirect it to ktab instead.
59 None of this hackery is needed with a modern kernel/libcs
60 which uses the kernel virtual DSO to provide access to the
61 kernel's unwind info. In that case, ktab_size remains 0 and
62 hence the value of KERNEL_START doesn't matter. */
64 #define KERNEL_START 0xc000000000000000ULL
66 static size_t ktab_size = 0;
67 struct ia64_table_entry
69 uint64_t start_offset;
74 static struct ia64_table_entry *ktab = NULL;
78 /* An enumeration of the different IA-64 instruction types. */
80 typedef enum instruction_type
82 A, /* Integer ALU ; I-unit or M-unit */
83 I, /* Non-ALU integer; I-unit */
84 M, /* Memory ; M-unit */
85 F, /* Floating-point ; F-unit */
86 B, /* Branch ; B-unit */
87 L, /* Extended (L+X) ; I-unit */
88 X, /* Extended (L+X) ; I-unit */
89 undefined /* undefined or reserved */
92 /* We represent IA-64 PC addresses as the value of the instruction
93 pointer or'd with some bit combination in the low nibble which
94 represents the slot number in the bundle addressed by the
95 instruction pointer. The problem is that the Linux kernel
96 multiplies its slot numbers (for exceptions) by one while the
97 disassembler multiplies its slot numbers by 6. In addition, I've
98 heard it said that the simulator uses 1 as the multiplier.
100 I've fixed the disassembler so that the bytes_per_line field will
101 be the slot multiplier. If bytes_per_line comes in as zero, it
102 is set to six (which is how it was set up initially). -- objdump
103 displays pretty disassembly dumps with this value. For our purposes,
104 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
105 never want to also display the raw bytes the way objdump does. */
107 #define SLOT_MULTIPLIER 1
109 /* Length in bytes of an instruction bundle */
111 #define BUNDLE_LEN 16
113 static gdbarch_init_ftype ia64_gdbarch_init;
115 static gdbarch_register_name_ftype ia64_register_name;
116 static gdbarch_register_type_ftype ia64_register_type;
117 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
118 static gdbarch_skip_prologue_ftype ia64_skip_prologue;
119 static struct type *is_float_or_hfa_type (struct type *t);
120 static CORE_ADDR ia64_find_global_pointer (CORE_ADDR faddr);
122 static struct type *builtin_type_ia64_ext;
124 #define NUM_IA64_RAW_REGS 462
126 static int sp_regnum = IA64_GR12_REGNUM;
127 static int fp_regnum = IA64_VFP_REGNUM;
128 static int lr_regnum = IA64_VRAP_REGNUM;
130 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
131 they may not be accessible via the ptrace register get/set interfaces. */
132 enum pseudo_regs { FIRST_PSEUDO_REGNUM = NUM_IA64_RAW_REGS, VBOF_REGNUM = IA64_NAT127_REGNUM + 1, V32_REGNUM,
133 V127_REGNUM = V32_REGNUM + 95,
134 VP0_REGNUM, VP16_REGNUM = VP0_REGNUM + 16, VP63_REGNUM = VP0_REGNUM + 63, LAST_PSEUDO_REGNUM };
136 /* Array of register names; There should be ia64_num_regs strings in
139 static char *ia64_register_names[] =
140 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
141 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
142 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
143 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
144 "", "", "", "", "", "", "", "",
145 "", "", "", "", "", "", "", "",
146 "", "", "", "", "", "", "", "",
147 "", "", "", "", "", "", "", "",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
157 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
158 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
159 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
160 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
161 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
162 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
163 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
164 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
165 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
166 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
167 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
168 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
169 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
170 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
171 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
172 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
174 "", "", "", "", "", "", "", "",
175 "", "", "", "", "", "", "", "",
176 "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
183 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
187 "pr", "ip", "psr", "cfm",
189 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
190 "", "", "", "", "", "", "", "",
191 "rsc", "bsp", "bspstore", "rnat",
193 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
194 "ccv", "", "", "", "unat", "", "", "",
195 "fpsr", "", "", "", "itc",
196 "", "", "", "", "", "", "", "", "", "",
197 "", "", "", "", "", "", "", "", "",
199 "", "", "", "", "", "", "", "", "", "",
200 "", "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
206 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
207 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
208 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
209 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
210 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
211 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
212 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
213 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
214 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
215 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
216 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
217 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
218 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
219 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
220 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
221 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
225 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
226 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
227 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
228 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
229 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
230 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
231 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
232 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
233 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
234 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
235 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
236 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
238 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
239 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
240 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
241 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
242 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
243 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
244 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
245 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
248 struct ia64_frame_cache
250 CORE_ADDR base; /* frame pointer base for frame */
251 CORE_ADDR pc; /* function start pc for frame */
252 CORE_ADDR saved_sp; /* stack pointer for frame */
253 CORE_ADDR bsp; /* points at r32 for the current frame */
254 CORE_ADDR cfm; /* cfm value for current frame */
255 CORE_ADDR prev_cfm; /* cfm value for previous frame */
257 int sof; /* Size of frame (decoded from cfm value) */
258 int sol; /* Size of locals (decoded from cfm value) */
259 int sor; /* Number of rotating registers. (decoded from cfm value) */
260 CORE_ADDR after_prologue;
261 /* Address of first instruction after the last
262 prologue instruction; Note that there may
263 be instructions from the function's body
264 intermingled with the prologue. */
265 int mem_stack_frame_size;
266 /* Size of the memory stack frame (may be zero),
267 or -1 if it has not been determined yet. */
268 int fp_reg; /* Register number (if any) used a frame pointer
269 for this frame. 0 if no register is being used
270 as the frame pointer. */
272 /* Saved registers. */
273 CORE_ADDR saved_regs[NUM_IA64_RAW_REGS];
278 ia64_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
279 struct reggroup *group)
284 if (group == all_reggroup)
286 vector_p = TYPE_VECTOR (register_type (gdbarch, regnum));
287 float_p = TYPE_CODE (register_type (gdbarch, regnum)) == TYPE_CODE_FLT;
288 raw_p = regnum < NUM_IA64_RAW_REGS;
289 if (group == float_reggroup)
291 if (group == vector_reggroup)
293 if (group == general_reggroup)
294 return (!vector_p && !float_p);
295 if (group == save_reggroup || group == restore_reggroup)
301 ia64_register_name (struct gdbarch *gdbarch, int reg)
303 return ia64_register_names[reg];
307 ia64_register_type (struct gdbarch *arch, int reg)
309 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
310 return builtin_type_ia64_ext;
312 return builtin_type_long;
316 ia64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
318 if (reg >= IA64_GR32_REGNUM && reg <= IA64_GR127_REGNUM)
319 return V32_REGNUM + (reg - IA64_GR32_REGNUM);
324 floatformat_valid (const struct floatformat *fmt, const void *from)
329 const struct floatformat floatformat_ia64_ext =
331 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
332 floatformat_intbit_yes, "floatformat_ia64_ext", floatformat_valid, NULL
335 const struct floatformat *floatformats_ia64_ext[2] =
337 &floatformat_ia64_ext,
338 &floatformat_ia64_ext
342 /* Extract ``len'' bits from an instruction bundle starting at
346 extract_bit_field (char *bundle, int from, int len)
348 long long result = 0LL;
350 int from_byte = from / 8;
351 int to_byte = to / 8;
352 unsigned char *b = (unsigned char *) bundle;
358 if (from_byte == to_byte)
359 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
360 result = c >> (from % 8);
361 lshift = 8 - (from % 8);
363 for (i = from_byte+1; i < to_byte; i++)
365 result |= ((long long) b[i]) << lshift;
369 if (from_byte < to_byte && (to % 8 != 0))
372 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
373 result |= ((long long) c) << lshift;
379 /* Replace the specified bits in an instruction bundle */
382 replace_bit_field (char *bundle, long long val, int from, int len)
385 int from_byte = from / 8;
386 int to_byte = to / 8;
387 unsigned char *b = (unsigned char *) bundle;
390 if (from_byte == to_byte)
392 unsigned char left, right;
394 left = (c >> (to % 8)) << (to % 8);
395 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
396 c = (unsigned char) (val & 0xff);
397 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
405 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
406 c = c | (val << (from % 8));
408 val >>= 8 - from % 8;
410 for (i = from_byte+1; i < to_byte; i++)
419 unsigned char cv = (unsigned char) val;
421 c = c >> (to % 8) << (to % 8);
422 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
428 /* Return the contents of slot N (for N = 0, 1, or 2) in
429 and instruction bundle */
432 slotN_contents (char *bundle, int slotnum)
434 return extract_bit_field (bundle, 5+41*slotnum, 41);
437 /* Store an instruction in an instruction bundle */
440 replace_slotN_contents (char *bundle, long long instr, int slotnum)
442 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
445 static enum instruction_type template_encoding_table[32][3] =
447 { M, I, I }, /* 00 */
448 { M, I, I }, /* 01 */
449 { M, I, I }, /* 02 */
450 { M, I, I }, /* 03 */
451 { M, L, X }, /* 04 */
452 { M, L, X }, /* 05 */
453 { undefined, undefined, undefined }, /* 06 */
454 { undefined, undefined, undefined }, /* 07 */
455 { M, M, I }, /* 08 */
456 { M, M, I }, /* 09 */
457 { M, M, I }, /* 0A */
458 { M, M, I }, /* 0B */
459 { M, F, I }, /* 0C */
460 { M, F, I }, /* 0D */
461 { M, M, F }, /* 0E */
462 { M, M, F }, /* 0F */
463 { M, I, B }, /* 10 */
464 { M, I, B }, /* 11 */
465 { M, B, B }, /* 12 */
466 { M, B, B }, /* 13 */
467 { undefined, undefined, undefined }, /* 14 */
468 { undefined, undefined, undefined }, /* 15 */
469 { B, B, B }, /* 16 */
470 { B, B, B }, /* 17 */
471 { M, M, B }, /* 18 */
472 { M, M, B }, /* 19 */
473 { undefined, undefined, undefined }, /* 1A */
474 { undefined, undefined, undefined }, /* 1B */
475 { M, F, B }, /* 1C */
476 { M, F, B }, /* 1D */
477 { undefined, undefined, undefined }, /* 1E */
478 { undefined, undefined, undefined }, /* 1F */
481 /* Fetch and (partially) decode an instruction at ADDR and return the
482 address of the next instruction to fetch. */
485 fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
487 char bundle[BUNDLE_LEN];
488 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
492 /* Warn about slot numbers greater than 2. We used to generate
493 an error here on the assumption that the user entered an invalid
494 address. But, sometimes GDB itself requests an invalid address.
495 This can (easily) happen when execution stops in a function for
496 which there are no symbols. The prologue scanner will attempt to
497 find the beginning of the function - if the nearest symbol
498 happens to not be aligned on a bundle boundary (16 bytes), the
499 resulting starting address will cause GDB to think that the slot
502 So we warn about it and set the slot number to zero. It is
503 not necessarily a fatal condition, particularly if debugging
504 at the assembly language level. */
507 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
508 "Using slot 0 instead"));
514 val = target_read_memory (addr, bundle, BUNDLE_LEN);
519 *instr = slotN_contents (bundle, slotnum);
520 template = extract_bit_field (bundle, 0, 5);
521 *it = template_encoding_table[(int)template][slotnum];
523 if (slotnum == 2 || (slotnum == 1 && *it == L))
526 addr += (slotnum + 1) * SLOT_MULTIPLIER;
531 /* There are 5 different break instructions (break.i, break.b,
532 break.m, break.f, and break.x), but they all have the same
533 encoding. (The five bit template in the low five bits of the
534 instruction bundle distinguishes one from another.)
536 The runtime architecture manual specifies that break instructions
537 used for debugging purposes must have the upper two bits of the 21
538 bit immediate set to a 0 and a 1 respectively. A breakpoint
539 instruction encodes the most significant bit of its 21 bit
540 immediate at bit 36 of the 41 bit instruction. The penultimate msb
541 is at bit 25 which leads to the pattern below.
543 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
544 it turns out that 0x80000 was used as the syscall break in the early
545 simulators. So I changed the pattern slightly to do "break.i 0x080001"
546 instead. But that didn't work either (I later found out that this
547 pattern was used by the simulator that I was using.) So I ended up
548 using the pattern seen below. */
551 #define IA64_BREAKPOINT 0x00002000040LL
553 #define IA64_BREAKPOINT 0x00003333300LL
556 ia64_memory_insert_breakpoint (struct gdbarch *gdbarch,
557 struct bp_target_info *bp_tgt)
559 CORE_ADDR addr = bp_tgt->placed_address;
560 char bundle[BUNDLE_LEN];
561 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
567 error (_("Can't insert breakpoint for slot numbers greater than 2."));
571 val = target_read_memory (addr, bundle, BUNDLE_LEN);
573 /* Check for L type instruction in 2nd slot, if present then
574 bump up the slot number to the 3rd slot */
575 template = extract_bit_field (bundle, 0, 5);
576 if (slotnum == 1 && template_encoding_table[template][1] == L)
581 instr = slotN_contents (bundle, slotnum);
582 memcpy (bp_tgt->shadow_contents, &instr, sizeof (instr));
583 bp_tgt->placed_size = bp_tgt->shadow_len = sizeof (instr);
584 replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum);
586 target_write_memory (addr, bundle, BUNDLE_LEN);
592 ia64_memory_remove_breakpoint (struct gdbarch *gdbarch,
593 struct bp_target_info *bp_tgt)
595 CORE_ADDR addr = bp_tgt->placed_address;
596 char bundle[BUNDLE_LEN];
597 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
601 struct cleanup *cleanup;
605 /* Disable the automatic memory restoration from breakpoints while
606 we read our instruction bundle. Otherwise, the general restoration
607 mechanism kicks in and ends up corrupting our bundle, because it
608 is not aware of the concept of instruction bundles. */
609 cleanup = make_show_memory_breakpoints_cleanup (1);
610 val = target_read_memory (addr, bundle, BUNDLE_LEN);
612 /* Check for L type instruction in 2nd slot, if present then
613 bump up the slot number to the 3rd slot */
614 template = extract_bit_field (bundle, 0, 5);
615 if (slotnum == 1 && template_encoding_table[template][1] == L)
620 memcpy (&instr, bp_tgt->shadow_contents, sizeof instr);
621 replace_slotN_contents (bundle, instr, slotnum);
623 target_write_memory (addr, bundle, BUNDLE_LEN);
625 do_cleanups (cleanup);
629 /* We don't really want to use this, but remote.c needs to call it in order
630 to figure out if Z-packets are supported or not. Oh, well. */
631 const unsigned char *
632 ia64_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
634 static unsigned char breakpoint[] =
635 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
636 *lenptr = sizeof (breakpoint);
644 ia64_read_pc (struct regcache *regcache)
646 ULONGEST psr_value, pc_value;
649 regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value);
650 regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &pc_value);
651 slot_num = (psr_value >> 41) & 3;
653 return pc_value | (slot_num * SLOT_MULTIPLIER);
657 ia64_write_pc (struct regcache *regcache, CORE_ADDR new_pc)
659 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
662 regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value);
663 psr_value &= ~(3LL << 41);
664 psr_value |= (ULONGEST)(slot_num & 0x3) << 41;
668 regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr_value);
669 regcache_cooked_write_unsigned (regcache, IA64_IP_REGNUM, new_pc);
672 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
674 /* Returns the address of the slot that's NSLOTS slots away from
675 the address ADDR. NSLOTS may be positive or negative. */
677 rse_address_add(CORE_ADDR addr, int nslots)
680 int mandatory_nat_slots = nslots / 63;
681 int direction = nslots < 0 ? -1 : 1;
683 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
685 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
686 new_addr += 8 * direction;
688 if (IS_NaT_COLLECTION_ADDR(new_addr))
689 new_addr += 8 * direction;
695 ia64_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
696 int regnum, gdb_byte *buf)
698 if (regnum >= V32_REGNUM && regnum <= V127_REGNUM)
700 #ifdef HAVE_LIBUNWIND_IA64_H
701 /* First try and use the libunwind special reg accessor, otherwise fallback to
703 if (!libunwind_is_initialized ()
704 || libunwind_get_reg_special (gdbarch, regcache, regnum, buf) != 0)
707 /* The fallback position is to assume that r32-r127 are found sequentially
708 in memory starting at $bof. This isn't always true, but without libunwind,
709 this is the best we can do. */
713 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
714 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
716 /* The bsp points at the end of the register frame so we
717 subtract the size of frame from it to get start of register frame. */
718 bsp = rse_address_add (bsp, -(cfm & 0x7f));
720 if ((cfm & 0x7f) > regnum - V32_REGNUM)
722 ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
723 reg = read_memory_integer ((CORE_ADDR)reg_addr, 8);
724 store_unsigned_integer (buf, register_size (gdbarch, regnum), reg);
727 store_unsigned_integer (buf, register_size (gdbarch, regnum), 0);
730 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
734 regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat);
735 unatN_val = (unat & (1LL << (regnum - IA64_NAT0_REGNUM))) != 0;
736 store_unsigned_integer (buf, register_size (gdbarch, regnum), unatN_val);
738 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
740 ULONGEST natN_val = 0;
743 CORE_ADDR gr_addr = 0;
744 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
745 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
747 /* The bsp points at the end of the register frame so we
748 subtract the size of frame from it to get start of register frame. */
749 bsp = rse_address_add (bsp, -(cfm & 0x7f));
751 if ((cfm & 0x7f) > regnum - V32_REGNUM)
752 gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
756 /* Compute address of nat collection bits. */
757 CORE_ADDR nat_addr = gr_addr | 0x1f8;
758 CORE_ADDR nat_collection;
760 /* If our nat collection address is bigger than bsp, we have to get
761 the nat collection from rnat. Otherwise, we fetch the nat
762 collection from the computed address. */
764 regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection);
766 nat_collection = read_memory_integer (nat_addr, 8);
767 nat_bit = (gr_addr >> 3) & 0x3f;
768 natN_val = (nat_collection >> nat_bit) & 1;
771 store_unsigned_integer (buf, register_size (gdbarch, regnum), natN_val);
773 else if (regnum == VBOF_REGNUM)
775 /* A virtual register frame start is provided for user convenience.
776 It can be calculated as the bsp - sof (sizeof frame). */
780 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
781 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
783 /* The bsp points at the end of the register frame so we
784 subtract the size of frame from it to get beginning of frame. */
785 vbsp = rse_address_add (bsp, -(cfm & 0x7f));
786 store_unsigned_integer (buf, register_size (gdbarch, regnum), vbsp);
788 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
794 regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr);
795 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
797 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
799 /* Fetch predicate register rename base from current frame
800 marker for this frame. */
801 int rrb_pr = (cfm >> 32) & 0x3f;
803 /* Adjust the register number to account for register rotation. */
805 + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
807 prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0;
808 store_unsigned_integer (buf, register_size (gdbarch, regnum), prN_val);
811 memset (buf, 0, register_size (gdbarch, regnum));
815 ia64_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
816 int regnum, const gdb_byte *buf)
818 if (regnum >= V32_REGNUM && regnum <= V127_REGNUM)
823 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
824 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
826 bsp = rse_address_add (bsp, -(cfm & 0x7f));
828 if ((cfm & 0x7f) > regnum - V32_REGNUM)
830 ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
831 write_memory (reg_addr, (void *)buf, 8);
834 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
836 ULONGEST unatN_val, unat, unatN_mask;
837 regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat);
838 unatN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum));
839 unatN_mask = (1LL << (regnum - IA64_NAT0_REGNUM));
842 else if (unatN_val == 1)
844 regcache_cooked_write_unsigned (regcache, IA64_UNAT_REGNUM, unat);
846 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
851 CORE_ADDR gr_addr = 0;
852 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
853 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
855 /* The bsp points at the end of the register frame so we
856 subtract the size of frame from it to get start of register frame. */
857 bsp = rse_address_add (bsp, -(cfm & 0x7f));
859 if ((cfm & 0x7f) > regnum - V32_REGNUM)
860 gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
862 natN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum));
864 if (gr_addr != 0 && (natN_val == 0 || natN_val == 1))
866 /* Compute address of nat collection bits. */
867 CORE_ADDR nat_addr = gr_addr | 0x1f8;
868 CORE_ADDR nat_collection;
869 int natN_bit = (gr_addr >> 3) & 0x3f;
870 ULONGEST natN_mask = (1LL << natN_bit);
871 /* If our nat collection address is bigger than bsp, we have to get
872 the nat collection from rnat. Otherwise, we fetch the nat
873 collection from the computed address. */
876 regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection);
878 nat_collection |= natN_mask;
880 nat_collection &= ~natN_mask;
881 regcache_cooked_write_unsigned (regcache, IA64_RNAT_REGNUM, nat_collection);
886 nat_collection = read_memory_integer (nat_addr, 8);
888 nat_collection |= natN_mask;
890 nat_collection &= ~natN_mask;
891 store_unsigned_integer (nat_buf, register_size (gdbarch, regnum), nat_collection);
892 write_memory (nat_addr, nat_buf, 8);
896 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
903 regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr);
904 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
906 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
908 /* Fetch predicate register rename base from current frame
909 marker for this frame. */
910 int rrb_pr = (cfm >> 32) & 0x3f;
912 /* Adjust the register number to account for register rotation. */
914 + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
916 prN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum));
917 prN_mask = (1LL << (regnum - VP0_REGNUM));
920 else if (prN_val == 1)
922 regcache_cooked_write_unsigned (regcache, IA64_PR_REGNUM, pr);
926 /* The ia64 needs to convert between various ieee floating-point formats
927 and the special ia64 floating point register format. */
930 ia64_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
932 return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM
933 && type != builtin_type_ia64_ext);
937 ia64_register_to_value (struct frame_info *frame, int regnum,
938 struct type *valtype, gdb_byte *out)
940 char in[MAX_REGISTER_SIZE];
941 frame_register_read (frame, regnum, in);
942 convert_typed_floating (in, builtin_type_ia64_ext, out, valtype);
946 ia64_value_to_register (struct frame_info *frame, int regnum,
947 struct type *valtype, const gdb_byte *in)
949 char out[MAX_REGISTER_SIZE];
950 convert_typed_floating (in, valtype, out, builtin_type_ia64_ext);
951 put_frame_register (frame, regnum, out);
955 /* Limit the number of skipped non-prologue instructions since examining
956 of the prologue is expensive. */
957 static int max_skip_non_prologue_insns = 40;
959 /* Given PC representing the starting address of a function, and
960 LIM_PC which is the (sloppy) limit to which to scan when looking
961 for a prologue, attempt to further refine this limit by using
962 the line data in the symbol table. If successful, a better guess
963 on where the prologue ends is returned, otherwise the previous
964 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
965 which will be set to indicate whether the returned limit may be
966 used with no further scanning in the event that the function is
969 /* FIXME: cagney/2004-02-14: This function and logic have largely been
970 superseded by skip_prologue_using_sal. */
973 refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
975 struct symtab_and_line prologue_sal;
976 CORE_ADDR start_pc = pc;
979 /* The prologue can not possibly go past the function end itself,
980 so we can already adjust LIM_PC accordingly. */
981 if (find_pc_partial_function (pc, NULL, NULL, &end_pc) && end_pc < lim_pc)
984 /* Start off not trusting the limit. */
987 prologue_sal = find_pc_line (pc, 0);
988 if (prologue_sal.line != 0)
991 CORE_ADDR addr = prologue_sal.end;
993 /* Handle the case in which compiler's optimizer/scheduler
994 has moved instructions into the prologue. We scan ahead
995 in the function looking for address ranges whose corresponding
996 line number is less than or equal to the first one that we
997 found for the function. (It can be less than when the
998 scheduler puts a body instruction before the first prologue
1000 for (i = 2 * max_skip_non_prologue_insns;
1001 i > 0 && (lim_pc == 0 || addr < lim_pc);
1004 struct symtab_and_line sal;
1006 sal = find_pc_line (addr, 0);
1009 if (sal.line <= prologue_sal.line
1010 && sal.symtab == prologue_sal.symtab)
1017 if (lim_pc == 0 || prologue_sal.end < lim_pc)
1019 lim_pc = prologue_sal.end;
1020 if (start_pc == get_pc_function_start (lim_pc))
1027 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1028 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1029 || (14 <= (_regnum_) && (_regnum_) <= 31))
1030 #define imm9(_instr_) \
1031 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1032 | (((_instr_) & 0x00008000000LL) >> 20) \
1033 | (((_instr_) & 0x00000001fc0LL) >> 6))
1035 /* Allocate and initialize a frame cache. */
1037 static struct ia64_frame_cache *
1038 ia64_alloc_frame_cache (void)
1040 struct ia64_frame_cache *cache;
1043 cache = FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache);
1049 cache->prev_cfm = 0;
1055 cache->frameless = 1;
1057 for (i = 0; i < NUM_IA64_RAW_REGS; i++)
1058 cache->saved_regs[i] = 0;
1064 examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *next_frame, struct ia64_frame_cache *cache)
1067 CORE_ADDR last_prologue_pc = pc;
1068 instruction_type it;
1073 int unat_save_reg = 0;
1074 int pr_save_reg = 0;
1075 int mem_stack_frame_size = 0;
1077 CORE_ADDR spill_addr = 0;
1080 char reg_contents[256];
1086 CORE_ADDR bof, sor, sol, sof, cfm, rrb_gr;
1088 memset (instores, 0, sizeof instores);
1089 memset (infpstores, 0, sizeof infpstores);
1090 memset (reg_contents, 0, sizeof reg_contents);
1092 if (cache->after_prologue != 0
1093 && cache->after_prologue <= lim_pc)
1094 return cache->after_prologue;
1096 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
1097 next_pc = fetch_instruction (pc, &it, &instr);
1099 /* We want to check if we have a recognizable function start before we
1100 look ahead for a prologue. */
1101 if (pc < lim_pc && next_pc
1102 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
1104 /* alloc - start of a regular function. */
1105 int sor = (int) ((instr & 0x00078000000LL) >> 27);
1106 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
1107 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
1108 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1110 /* Verify that the current cfm matches what we think is the
1111 function start. If we have somehow jumped within a function,
1112 we do not want to interpret the prologue and calculate the
1113 addresses of various registers such as the return address.
1114 We will instead treat the frame as frameless. */
1116 (sof == (cache->cfm & 0x7f) &&
1117 sol == ((cache->cfm >> 7) & 0x7f)))
1121 last_prologue_pc = next_pc;
1126 /* Look for a leaf routine. */
1127 if (pc < lim_pc && next_pc
1128 && (it == I || it == M)
1129 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
1131 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1132 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
1133 | ((instr & 0x001f8000000LL) >> 20)
1134 | ((instr & 0x000000fe000LL) >> 13));
1135 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
1136 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1137 int qp = (int) (instr & 0x0000000003fLL);
1138 if (qp == 0 && rN == 2 && imm == 0 && rM == 12 && fp_reg == 0)
1140 /* mov r2, r12 - beginning of leaf routine */
1142 last_prologue_pc = next_pc;
1146 /* If we don't recognize a regular function or leaf routine, we are
1152 last_prologue_pc = lim_pc;
1156 /* Loop, looking for prologue instructions, keeping track of
1157 where preserved registers were spilled. */
1160 next_pc = fetch_instruction (pc, &it, &instr);
1164 if (it == B && ((instr & 0x1e1f800003fLL) != 0x04000000000LL))
1166 /* Exit loop upon hitting a non-nop branch instruction. */
1171 else if (((instr & 0x3fLL) != 0LL) &&
1172 (frameless || ret_reg != 0))
1174 /* Exit loop upon hitting a predicated instruction if
1175 we already have the return register or if we are frameless. */
1180 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
1183 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
1184 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1185 int qp = (int) (instr & 0x0000000003f);
1187 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
1190 last_prologue_pc = next_pc;
1193 else if ((it == I || it == M)
1194 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
1196 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1197 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
1198 | ((instr & 0x001f8000000LL) >> 20)
1199 | ((instr & 0x000000fe000LL) >> 13));
1200 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
1201 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1202 int qp = (int) (instr & 0x0000000003fLL);
1204 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
1208 last_prologue_pc = next_pc;
1210 else if (qp == 0 && rN == 12 && rM == 12)
1212 /* adds r12, -mem_stack_frame_size, r12 */
1213 mem_stack_frame_size -= imm;
1214 last_prologue_pc = next_pc;
1216 else if (qp == 0 && rN == 2
1217 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
1219 char buf[MAX_REGISTER_SIZE];
1220 CORE_ADDR saved_sp = 0;
1221 /* adds r2, spilloffset, rFramePointer
1223 adds r2, spilloffset, r12
1225 Get ready for stf.spill or st8.spill instructions.
1226 The address to start spilling at is loaded into r2.
1227 FIXME: Why r2? That's what gcc currently uses; it
1228 could well be different for other compilers. */
1230 /* Hmm... whether or not this will work will depend on
1231 where the pc is. If it's still early in the prologue
1232 this'll be wrong. FIXME */
1235 frame_unwind_register (next_frame, sp_regnum, buf);
1236 saved_sp = extract_unsigned_integer (buf, 8);
1238 spill_addr = saved_sp
1239 + (rM == 12 ? 0 : mem_stack_frame_size)
1242 last_prologue_pc = next_pc;
1244 else if (qp == 0 && rM >= 32 && rM < 40 && !instores[rM-32] &&
1245 rN < 256 && imm == 0)
1247 /* mov rN, rM where rM is an input register */
1248 reg_contents[rN] = rM;
1249 last_prologue_pc = next_pc;
1251 else if (frameless && qp == 0 && rN == fp_reg && imm == 0 &&
1255 last_prologue_pc = next_pc;
1260 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
1261 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
1263 /* stf.spill [rN] = fM, imm9
1265 stf.spill [rN] = fM */
1267 int imm = imm9(instr);
1268 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1269 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1270 int qp = (int) (instr & 0x0000000003fLL);
1271 if (qp == 0 && rN == spill_reg && spill_addr != 0
1272 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
1274 cache->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
1276 if ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
1279 spill_addr = 0; /* last one; must be done */
1280 last_prologue_pc = next_pc;
1283 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
1284 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
1290 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
1291 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1292 int qp = (int) (instr & 0x0000000003fLL);
1293 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
1295 /* We have something like "mov.m r3 = ar.unat". Remember the
1296 r3 (or whatever) and watch for a store of this register... */
1298 last_prologue_pc = next_pc;
1301 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
1304 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1305 int qp = (int) (instr & 0x0000000003fLL);
1306 if (qp == 0 && isScratch (rN))
1309 last_prologue_pc = next_pc;
1313 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1314 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1318 st8 [rN] = rM, imm9 */
1319 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1320 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1321 int qp = (int) (instr & 0x0000000003fLL);
1322 int indirect = rM < 256 ? reg_contents[rM] : 0;
1323 if (qp == 0 && rN == spill_reg && spill_addr != 0
1324 && (rM == unat_save_reg || rM == pr_save_reg))
1326 /* We've found a spill of either the UNAT register or the PR
1327 register. (Well, not exactly; what we've actually found is
1328 a spill of the register that UNAT or PR was moved to).
1329 Record that fact and move on... */
1330 if (rM == unat_save_reg)
1332 /* Track UNAT register */
1333 cache->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
1338 /* Track PR register */
1339 cache->saved_regs[IA64_PR_REGNUM] = spill_addr;
1342 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1343 /* st8 [rN] = rM, imm9 */
1344 spill_addr += imm9(instr);
1346 spill_addr = 0; /* must be done spilling */
1347 last_prologue_pc = next_pc;
1349 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1351 /* Allow up to one store of each input register. */
1352 instores[rM-32] = 1;
1353 last_prologue_pc = next_pc;
1355 else if (qp == 0 && 32 <= indirect && indirect < 40 &&
1356 !instores[indirect-32])
1358 /* Allow an indirect store of an input register. */
1359 instores[indirect-32] = 1;
1360 last_prologue_pc = next_pc;
1363 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1370 Note that the st8 case is handled in the clause above.
1372 Advance over stores of input registers. One store per input
1373 register is permitted. */
1374 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1375 int qp = (int) (instr & 0x0000000003fLL);
1376 int indirect = rM < 256 ? reg_contents[rM] : 0;
1377 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1379 instores[rM-32] = 1;
1380 last_prologue_pc = next_pc;
1382 else if (qp == 0 && 32 <= indirect && indirect < 40 &&
1383 !instores[indirect-32])
1385 /* Allow an indirect store of an input register. */
1386 instores[indirect-32] = 1;
1387 last_prologue_pc = next_pc;
1390 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1397 Advance over stores of floating point input registers. Again
1398 one store per register is permitted */
1399 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1400 int qp = (int) (instr & 0x0000000003fLL);
1401 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1403 infpstores[fM-8] = 1;
1404 last_prologue_pc = next_pc;
1408 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1409 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1411 /* st8.spill [rN] = rM
1413 st8.spill [rN] = rM, imm9 */
1414 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1415 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1416 int qp = (int) (instr & 0x0000000003fLL);
1417 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1419 /* We've found a spill of one of the preserved general purpose
1420 regs. Record the spill address and advance the spill
1421 register if appropriate. */
1422 cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
1423 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1424 /* st8.spill [rN] = rM, imm9 */
1425 spill_addr += imm9(instr);
1427 spill_addr = 0; /* Done spilling */
1428 last_prologue_pc = next_pc;
1435 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1436 registers for the previous frame which will be needed later. */
1438 if (!frameless && next_frame)
1440 /* Extract the size of the rotating portion of the stack
1441 frame and the register rename base from the current
1447 rrb_gr = (cfm >> 18) & 0x7f;
1449 /* Find the bof (beginning of frame). */
1450 bof = rse_address_add (cache->bsp, -sof);
1452 for (i = 0, addr = bof;
1456 if (IS_NaT_COLLECTION_ADDR (addr))
1460 if (i+32 == cfm_reg)
1461 cache->saved_regs[IA64_CFM_REGNUM] = addr;
1462 if (i+32 == ret_reg)
1463 cache->saved_regs[IA64_VRAP_REGNUM] = addr;
1465 cache->saved_regs[IA64_VFP_REGNUM] = addr;
1468 /* For the previous argument registers we require the previous bof.
1469 If we can't find the previous cfm, then we can do nothing. */
1471 if (cache->saved_regs[IA64_CFM_REGNUM] != 0)
1473 cfm = read_memory_integer (cache->saved_regs[IA64_CFM_REGNUM], 8);
1475 else if (cfm_reg != 0)
1477 frame_unwind_register (next_frame, cfm_reg, buf);
1478 cfm = extract_unsigned_integer (buf, 8);
1480 cache->prev_cfm = cfm;
1484 sor = ((cfm >> 14) & 0xf) * 8;
1486 sol = (cfm >> 7) & 0x7f;
1487 rrb_gr = (cfm >> 18) & 0x7f;
1489 /* The previous bof only requires subtraction of the sol (size of locals)
1490 due to the overlap between output and input of subsequent frames. */
1491 bof = rse_address_add (bof, -sol);
1493 for (i = 0, addr = bof;
1497 if (IS_NaT_COLLECTION_ADDR (addr))
1502 cache->saved_regs[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1505 cache->saved_regs[IA64_GR32_REGNUM + i] = addr;
1511 /* Try and trust the lim_pc value whenever possible. */
1512 if (trust_limit && lim_pc >= last_prologue_pc)
1513 last_prologue_pc = lim_pc;
1515 cache->frameless = frameless;
1516 cache->after_prologue = last_prologue_pc;
1517 cache->mem_stack_frame_size = mem_stack_frame_size;
1518 cache->fp_reg = fp_reg;
1520 return last_prologue_pc;
1524 ia64_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1526 struct ia64_frame_cache cache;
1528 cache.after_prologue = 0;
1532 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1533 return examine_prologue (pc, pc+1024, 0, &cache);
1537 /* Normal frames. */
1539 static struct ia64_frame_cache *
1540 ia64_frame_cache (struct frame_info *next_frame, void **this_cache)
1542 struct ia64_frame_cache *cache;
1544 CORE_ADDR cfm, sof, sol, bsp, psr;
1550 cache = ia64_alloc_frame_cache ();
1551 *this_cache = cache;
1553 frame_unwind_register (next_frame, sp_regnum, buf);
1554 cache->saved_sp = extract_unsigned_integer (buf, 8);
1556 /* We always want the bsp to point to the end of frame.
1557 This way, we can always get the beginning of frame (bof)
1558 by subtracting frame size. */
1559 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
1560 cache->bsp = extract_unsigned_integer (buf, 8);
1562 frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf);
1563 psr = extract_unsigned_integer (buf, 8);
1565 frame_unwind_register (next_frame, IA64_CFM_REGNUM, buf);
1566 cfm = extract_unsigned_integer (buf, 8);
1568 cache->sof = (cfm & 0x7f);
1569 cache->sol = (cfm >> 7) & 0x7f;
1570 cache->sor = ((cfm >> 14) & 0xf) * 8;
1574 cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
1577 examine_prologue (cache->pc, frame_pc_unwind (next_frame), next_frame, cache);
1579 cache->base = cache->saved_sp + cache->mem_stack_frame_size;
1585 ia64_frame_this_id (struct frame_info *next_frame, void **this_cache,
1586 struct frame_id *this_id)
1588 struct ia64_frame_cache *cache =
1589 ia64_frame_cache (next_frame, this_cache);
1591 /* If outermost frame, mark with null frame id. */
1592 if (cache->base == 0)
1593 (*this_id) = null_frame_id;
1595 (*this_id) = frame_id_build_special (cache->base, cache->pc, cache->bsp);
1596 if (gdbarch_debug >= 1)
1597 fprintf_unfiltered (gdb_stdlog,
1598 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1599 paddr_nz (this_id->code_addr),
1600 paddr_nz (this_id->stack_addr),
1601 paddr_nz (cache->bsp), next_frame);
1605 ia64_frame_prev_register (struct frame_info *next_frame, void **this_cache,
1606 int regnum, int *optimizedp,
1607 enum lval_type *lvalp, CORE_ADDR *addrp,
1608 int *realnump, gdb_byte *valuep)
1610 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1611 struct ia64_frame_cache *cache =
1612 ia64_frame_cache (next_frame, this_cache);
1613 char dummy_valp[MAX_REGISTER_SIZE];
1616 gdb_assert (regnum >= 0);
1618 if (!target_has_registers)
1619 error (_("No registers."));
1626 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1627 when valuep is not supplied. */
1629 valuep = dummy_valp;
1631 memset (valuep, 0, register_size (gdbarch, regnum));
1633 if (regnum == gdbarch_sp_regnum (gdbarch))
1635 /* Handle SP values for all frames but the topmost. */
1636 store_unsigned_integer (valuep, register_size (gdbarch, regnum),
1639 else if (regnum == IA64_BSP_REGNUM)
1641 char cfm_valuep[MAX_REGISTER_SIZE];
1644 enum lval_type cfm_lval;
1646 CORE_ADDR bsp, prev_cfm, prev_bsp;
1648 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1649 This corresponds to what the hardware bsp register will be if we pop the frame
1650 back which is why we might have been called. We know the beginning of the current
1651 frame is cache->bsp - cache->sof. This value in the previous frame points to
1652 the start of the output registers. We can calculate the end of that frame by adding
1653 the size of output (sof (size of frame) - sol (size of locals)). */
1654 ia64_frame_prev_register (next_frame, this_cache, IA64_CFM_REGNUM,
1655 &cfm_optim, &cfm_lval, &cfm_addr, &cfm_realnum, cfm_valuep);
1656 prev_cfm = extract_unsigned_integer (cfm_valuep, 8);
1658 bsp = rse_address_add (cache->bsp, -(cache->sof));
1659 prev_bsp = rse_address_add (bsp, (prev_cfm & 0x7f) - ((prev_cfm >> 7) & 0x7f));
1661 store_unsigned_integer (valuep, register_size (gdbarch, regnum),
1664 else if (regnum == IA64_CFM_REGNUM)
1666 CORE_ADDR addr = cache->saved_regs[IA64_CFM_REGNUM];
1670 *lvalp = lval_memory;
1672 read_memory (addr, valuep, register_size (gdbarch, regnum));
1674 else if (cache->prev_cfm)
1675 store_unsigned_integer (valuep, register_size (gdbarch, regnum), cache->prev_cfm);
1676 else if (cache->frameless)
1679 frame_unwind_register (next_frame, IA64_PFS_REGNUM, valuep);
1682 else if (regnum == IA64_VFP_REGNUM)
1684 /* If the function in question uses an automatic register (r32-r127)
1685 for the frame pointer, it'll be found by ia64_find_saved_register()
1686 above. If the function lacks one of these frame pointers, we can
1687 still provide a value since we know the size of the frame. */
1688 CORE_ADDR vfp = cache->base;
1689 store_unsigned_integer (valuep, register_size (gdbarch, IA64_VFP_REGNUM), vfp);
1691 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
1693 char pr_valuep[MAX_REGISTER_SIZE];
1696 enum lval_type pr_lval;
1699 ia64_frame_prev_register (next_frame, this_cache, IA64_PR_REGNUM,
1700 &pr_optim, &pr_lval, &pr_addr, &pr_realnum, pr_valuep);
1701 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
1703 /* Fetch predicate register rename base from current frame
1704 marker for this frame. */
1705 int rrb_pr = (cache->cfm >> 32) & 0x3f;
1707 /* Adjust the register number to account for register rotation. */
1708 regnum = VP16_REGNUM
1709 + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
1711 prN_val = extract_bit_field ((unsigned char *) pr_valuep,
1712 regnum - VP0_REGNUM, 1);
1713 store_unsigned_integer (valuep, register_size (gdbarch, regnum), prN_val);
1715 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1717 char unat_valuep[MAX_REGISTER_SIZE];
1720 enum lval_type unat_lval;
1721 CORE_ADDR unat_addr;
1723 ia64_frame_prev_register (next_frame, this_cache, IA64_UNAT_REGNUM,
1724 &unat_optim, &unat_lval, &unat_addr, &unat_realnum, unat_valuep);
1725 unatN_val = extract_bit_field ((unsigned char *) unat_valuep,
1726 regnum - IA64_NAT0_REGNUM, 1);
1727 store_unsigned_integer (valuep, register_size (gdbarch, regnum),
1730 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1733 /* Find address of general register corresponding to nat bit we're
1737 gr_addr = cache->saved_regs[regnum - IA64_NAT0_REGNUM
1741 /* Compute address of nat collection bits. */
1742 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1744 CORE_ADDR nat_collection;
1746 /* If our nat collection address is bigger than bsp, we have to get
1747 the nat collection from rnat. Otherwise, we fetch the nat
1748 collection from the computed address. */
1749 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
1750 bsp = extract_unsigned_integer (buf, 8);
1751 if (nat_addr >= bsp)
1753 frame_unwind_register (next_frame, IA64_RNAT_REGNUM, buf);
1754 nat_collection = extract_unsigned_integer (buf, 8);
1757 nat_collection = read_memory_integer (nat_addr, 8);
1758 nat_bit = (gr_addr >> 3) & 0x3f;
1759 natval = (nat_collection >> nat_bit) & 1;
1762 store_unsigned_integer (valuep, register_size (gdbarch, regnum), natval);
1764 else if (regnum == IA64_IP_REGNUM)
1767 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
1771 *lvalp = lval_memory;
1773 read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
1774 pc = extract_unsigned_integer (buf, 8);
1776 else if (cache->frameless)
1778 frame_unwind_register (next_frame, IA64_BR0_REGNUM, buf);
1779 pc = extract_unsigned_integer (buf, 8);
1782 store_unsigned_integer (valuep, 8, pc);
1784 else if (regnum == IA64_PSR_REGNUM)
1786 /* We don't know how to get the complete previous PSR, but we need it for
1787 the slot information when we unwind the pc (pc is formed of IP register
1788 plus slot information from PSR). To get the previous slot information,
1789 we mask it off the return address. */
1790 ULONGEST slot_num = 0;
1793 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
1795 frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf);
1796 psr = extract_unsigned_integer (buf, 8);
1800 *lvalp = lval_memory;
1802 read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
1803 pc = extract_unsigned_integer (buf, 8);
1805 else if (cache->frameless)
1808 frame_unwind_register (next_frame, IA64_BR0_REGNUM, buf);
1809 pc = extract_unsigned_integer (buf, 8);
1811 psr &= ~(3LL << 41);
1812 slot_num = pc & 0x3LL;
1813 psr |= (CORE_ADDR)slot_num << 41;
1814 store_unsigned_integer (valuep, 8, psr);
1816 else if (regnum == IA64_BR0_REGNUM)
1819 CORE_ADDR addr = cache->saved_regs[IA64_BR0_REGNUM];
1822 *lvalp = lval_memory;
1824 read_memory (addr, buf, register_size (gdbarch, IA64_BR0_REGNUM));
1825 br0 = extract_unsigned_integer (buf, 8);
1827 store_unsigned_integer (valuep, 8, br0);
1829 else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM) ||
1830 (regnum >= V32_REGNUM && regnum <= V127_REGNUM))
1833 if (regnum >= V32_REGNUM)
1834 regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
1835 addr = cache->saved_regs[regnum];
1838 *lvalp = lval_memory;
1840 read_memory (addr, valuep, register_size (gdbarch, regnum));
1842 else if (cache->frameless)
1844 char r_valuep[MAX_REGISTER_SIZE];
1847 enum lval_type r_lval;
1849 CORE_ADDR prev_cfm, prev_bsp, prev_bof;
1851 if (regnum >= V32_REGNUM)
1852 regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
1853 ia64_frame_prev_register (next_frame, this_cache, IA64_CFM_REGNUM,
1854 &r_optim, &r_lval, &r_addr, &r_realnum, r_valuep);
1855 prev_cfm = extract_unsigned_integer (r_valuep, 8);
1856 ia64_frame_prev_register (next_frame, this_cache, IA64_BSP_REGNUM,
1857 &r_optim, &r_lval, &r_addr, &r_realnum, r_valuep);
1858 prev_bsp = extract_unsigned_integer (r_valuep, 8);
1859 prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f));
1861 addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM));
1862 *lvalp = lval_memory;
1864 read_memory (addr, valuep, register_size (gdbarch, regnum));
1870 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1872 /* Fetch floating point register rename base from current
1873 frame marker for this frame. */
1874 int rrb_fr = (cache->cfm >> 25) & 0x7f;
1876 /* Adjust the floating point register number to account for
1877 register rotation. */
1878 regnum = IA64_FR32_REGNUM
1879 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1882 /* If we have stored a memory address, access the register. */
1883 addr = cache->saved_regs[regnum];
1886 *lvalp = lval_memory;
1888 read_memory (addr, valuep, register_size (gdbarch, regnum));
1890 /* Otherwise, punt and get the current value of the register. */
1892 frame_unwind_register (next_frame, regnum, valuep);
1895 if (gdbarch_debug >= 1)
1896 fprintf_unfiltered (gdb_stdlog,
1897 "regular prev register <%d> <%s> is 0x%s\n", regnum,
1898 (((unsigned) regnum <= IA64_NAT127_REGNUM)
1899 ? ia64_register_names[regnum] : "r??"),
1900 paddr_nz (extract_unsigned_integer (valuep, 8)));
1903 static const struct frame_unwind ia64_frame_unwind =
1906 &ia64_frame_this_id,
1907 &ia64_frame_prev_register
1910 static const struct frame_unwind *
1911 ia64_frame_sniffer (struct frame_info *next_frame)
1913 return &ia64_frame_unwind;
1916 /* Signal trampolines. */
1919 ia64_sigtramp_frame_init_saved_regs (struct frame_info *next_frame,
1920 struct ia64_frame_cache *cache)
1922 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (next_frame));
1924 if (tdep->sigcontext_register_address)
1928 cache->saved_regs[IA64_VRAP_REGNUM] =
1929 tdep->sigcontext_register_address (cache->base, IA64_IP_REGNUM);
1930 cache->saved_regs[IA64_CFM_REGNUM] =
1931 tdep->sigcontext_register_address (cache->base, IA64_CFM_REGNUM);
1932 cache->saved_regs[IA64_PSR_REGNUM] =
1933 tdep->sigcontext_register_address (cache->base, IA64_PSR_REGNUM);
1934 cache->saved_regs[IA64_BSP_REGNUM] =
1935 tdep->sigcontext_register_address (cache->base, IA64_BSP_REGNUM);
1936 cache->saved_regs[IA64_RNAT_REGNUM] =
1937 tdep->sigcontext_register_address (cache->base, IA64_RNAT_REGNUM);
1938 cache->saved_regs[IA64_CCV_REGNUM] =
1939 tdep->sigcontext_register_address (cache->base, IA64_CCV_REGNUM);
1940 cache->saved_regs[IA64_UNAT_REGNUM] =
1941 tdep->sigcontext_register_address (cache->base, IA64_UNAT_REGNUM);
1942 cache->saved_regs[IA64_FPSR_REGNUM] =
1943 tdep->sigcontext_register_address (cache->base, IA64_FPSR_REGNUM);
1944 cache->saved_regs[IA64_PFS_REGNUM] =
1945 tdep->sigcontext_register_address (cache->base, IA64_PFS_REGNUM);
1946 cache->saved_regs[IA64_LC_REGNUM] =
1947 tdep->sigcontext_register_address (cache->base, IA64_LC_REGNUM);
1948 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1949 cache->saved_regs[regno] =
1950 tdep->sigcontext_register_address (cache->base, regno);
1951 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1952 cache->saved_regs[regno] =
1953 tdep->sigcontext_register_address (cache->base, regno);
1954 for (regno = IA64_FR2_REGNUM; regno <= IA64_FR31_REGNUM; regno++)
1955 cache->saved_regs[regno] =
1956 tdep->sigcontext_register_address (cache->base, regno);
1960 static struct ia64_frame_cache *
1961 ia64_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache)
1963 struct ia64_frame_cache *cache;
1971 cache = ia64_alloc_frame_cache ();
1973 frame_unwind_register (next_frame, sp_regnum, buf);
1974 /* Note that frame size is hard-coded below. We cannot calculate it
1975 via prologue examination. */
1976 cache->base = extract_unsigned_integer (buf, 8) + 16;
1978 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
1979 cache->bsp = extract_unsigned_integer (buf, 8);
1981 frame_unwind_register (next_frame, IA64_CFM_REGNUM, buf);
1982 cache->cfm = extract_unsigned_integer (buf, 8);
1983 cache->sof = cache->cfm & 0x7f;
1985 ia64_sigtramp_frame_init_saved_regs (next_frame, cache);
1987 *this_cache = cache;
1992 ia64_sigtramp_frame_this_id (struct frame_info *next_frame,
1993 void **this_cache, struct frame_id *this_id)
1995 struct ia64_frame_cache *cache =
1996 ia64_sigtramp_frame_cache (next_frame, this_cache);
1998 (*this_id) = frame_id_build_special (cache->base, frame_pc_unwind (next_frame), cache->bsp);
1999 if (gdbarch_debug >= 1)
2000 fprintf_unfiltered (gdb_stdlog,
2001 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2002 paddr_nz (this_id->code_addr),
2003 paddr_nz (this_id->stack_addr),
2004 paddr_nz (cache->bsp), next_frame);
2008 ia64_sigtramp_frame_prev_register (struct frame_info *next_frame,
2010 int regnum, int *optimizedp,
2011 enum lval_type *lvalp, CORE_ADDR *addrp,
2012 int *realnump, gdb_byte *valuep)
2014 char dummy_valp[MAX_REGISTER_SIZE];
2015 char buf[MAX_REGISTER_SIZE];
2017 struct gdbarch *gdbarch = get_frame_arch (next_frame);
2018 struct ia64_frame_cache *cache =
2019 ia64_sigtramp_frame_cache (next_frame, this_cache);
2021 gdb_assert (regnum >= 0);
2023 if (!target_has_registers)
2024 error (_("No registers."));
2031 /* Rather than check each time if valuep is non-null, supply a dummy buffer
2032 when valuep is not supplied. */
2034 valuep = dummy_valp;
2036 memset (valuep, 0, register_size (gdbarch, regnum));
2038 if (regnum == IA64_IP_REGNUM)
2041 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
2045 *lvalp = lval_memory;
2047 read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
2048 pc = extract_unsigned_integer (buf, 8);
2051 store_unsigned_integer (valuep, 8, pc);
2053 else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM) ||
2054 (regnum >= V32_REGNUM && regnum <= V127_REGNUM))
2057 if (regnum >= V32_REGNUM)
2058 regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
2059 addr = cache->saved_regs[regnum];
2062 *lvalp = lval_memory;
2064 read_memory (addr, valuep, register_size (gdbarch, regnum));
2069 /* All other registers not listed above. */
2070 CORE_ADDR addr = cache->saved_regs[regnum];
2073 *lvalp = lval_memory;
2075 read_memory (addr, valuep, register_size (gdbarch, regnum));
2079 if (gdbarch_debug >= 1)
2080 fprintf_unfiltered (gdb_stdlog,
2081 "sigtramp prev register <%s> is 0x%s\n",
2082 (regnum < IA64_GR32_REGNUM
2083 || (regnum > IA64_GR127_REGNUM
2084 && regnum < LAST_PSEUDO_REGNUM))
2085 ? ia64_register_names[regnum]
2086 : (regnum < LAST_PSEUDO_REGNUM
2087 ? ia64_register_names[regnum-IA64_GR32_REGNUM+V32_REGNUM]
2089 paddr_nz (extract_unsigned_integer (valuep, 8)));
2092 static const struct frame_unwind ia64_sigtramp_frame_unwind =
2095 ia64_sigtramp_frame_this_id,
2096 ia64_sigtramp_frame_prev_register
2099 static const struct frame_unwind *
2100 ia64_sigtramp_frame_sniffer (struct frame_info *next_frame)
2102 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (next_frame));
2103 if (tdep->pc_in_sigtramp)
2105 CORE_ADDR pc = frame_pc_unwind (next_frame);
2107 if (tdep->pc_in_sigtramp (pc))
2108 return &ia64_sigtramp_frame_unwind;
2116 ia64_frame_base_address (struct frame_info *next_frame, void **this_cache)
2118 struct ia64_frame_cache *cache =
2119 ia64_frame_cache (next_frame, this_cache);
2124 static const struct frame_base ia64_frame_base =
2127 ia64_frame_base_address,
2128 ia64_frame_base_address,
2129 ia64_frame_base_address
2132 #ifdef HAVE_LIBUNWIND_IA64_H
2134 struct ia64_unwind_table_entry
2136 unw_word_t start_offset;
2137 unw_word_t end_offset;
2138 unw_word_t info_offset;
2141 static __inline__ uint64_t
2142 ia64_rse_slot_num (uint64_t addr)
2144 return (addr >> 3) & 0x3f;
2147 /* Skip over a designated number of registers in the backing
2148 store, remembering every 64th position is for NAT. */
2149 static __inline__ uint64_t
2150 ia64_rse_skip_regs (uint64_t addr, long num_regs)
2152 long delta = ia64_rse_slot_num(addr) + num_regs;
2156 return addr + ((num_regs + delta/0x3f) << 3);
2159 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2160 number to a libunwind register number. */
2162 ia64_gdb2uw_regnum (int regnum)
2164 if (regnum == sp_regnum)
2166 else if (regnum == IA64_BSP_REGNUM)
2167 return UNW_IA64_BSP;
2168 else if ((unsigned) (regnum - IA64_GR0_REGNUM) < 128)
2169 return UNW_IA64_GR + (regnum - IA64_GR0_REGNUM);
2170 else if ((unsigned) (regnum - V32_REGNUM) < 95)
2171 return UNW_IA64_GR + 32 + (regnum - V32_REGNUM);
2172 else if ((unsigned) (regnum - IA64_FR0_REGNUM) < 128)
2173 return UNW_IA64_FR + (regnum - IA64_FR0_REGNUM);
2174 else if ((unsigned) (regnum - IA64_PR0_REGNUM) < 64)
2176 else if ((unsigned) (regnum - IA64_BR0_REGNUM) < 8)
2177 return UNW_IA64_BR + (regnum - IA64_BR0_REGNUM);
2178 else if (regnum == IA64_PR_REGNUM)
2180 else if (regnum == IA64_IP_REGNUM)
2182 else if (regnum == IA64_CFM_REGNUM)
2183 return UNW_IA64_CFM;
2184 else if ((unsigned) (regnum - IA64_AR0_REGNUM) < 128)
2185 return UNW_IA64_AR + (regnum - IA64_AR0_REGNUM);
2186 else if ((unsigned) (regnum - IA64_NAT0_REGNUM) < 128)
2187 return UNW_IA64_NAT + (regnum - IA64_NAT0_REGNUM);
2192 /* Gdb libunwind-frame callback function to convert from a libunwind register
2193 number to a ia64 gdb register number. */
2195 ia64_uw2gdb_regnum (int uw_regnum)
2197 if (uw_regnum == UNW_IA64_SP)
2199 else if (uw_regnum == UNW_IA64_BSP)
2200 return IA64_BSP_REGNUM;
2201 else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 32)
2202 return IA64_GR0_REGNUM + (uw_regnum - UNW_IA64_GR);
2203 else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 128)
2204 return V32_REGNUM + (uw_regnum - (IA64_GR0_REGNUM + 32));
2205 else if ((unsigned) (uw_regnum - UNW_IA64_FR) < 128)
2206 return IA64_FR0_REGNUM + (uw_regnum - UNW_IA64_FR);
2207 else if ((unsigned) (uw_regnum - UNW_IA64_BR) < 8)
2208 return IA64_BR0_REGNUM + (uw_regnum - UNW_IA64_BR);
2209 else if (uw_regnum == UNW_IA64_PR)
2210 return IA64_PR_REGNUM;
2211 else if (uw_regnum == UNW_REG_IP)
2212 return IA64_IP_REGNUM;
2213 else if (uw_regnum == UNW_IA64_CFM)
2214 return IA64_CFM_REGNUM;
2215 else if ((unsigned) (uw_regnum - UNW_IA64_AR) < 128)
2216 return IA64_AR0_REGNUM + (uw_regnum - UNW_IA64_AR);
2217 else if ((unsigned) (uw_regnum - UNW_IA64_NAT) < 128)
2218 return IA64_NAT0_REGNUM + (uw_regnum - UNW_IA64_NAT);
2223 /* Gdb libunwind-frame callback function to reveal if register is a float
2226 ia64_is_fpreg (int uw_regnum)
2228 return unw_is_fpreg (uw_regnum);
2231 /* Libunwind callback accessor function for general registers. */
2233 ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val,
2234 int write, void *arg)
2236 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2237 unw_word_t bsp, sof, sol, cfm, psr, ip;
2238 struct frame_info *next_frame = arg;
2239 long new_sof, old_sof;
2240 char buf[MAX_REGISTER_SIZE];
2242 /* We never call any libunwind routines that need to write registers. */
2243 gdb_assert (!write);
2248 /* Libunwind expects to see the pc value which means the slot number
2249 from the psr must be merged with the ip word address. */
2250 frame_unwind_register (next_frame, IA64_IP_REGNUM, buf);
2251 ip = extract_unsigned_integer (buf, 8);
2252 frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf);
2253 psr = extract_unsigned_integer (buf, 8);
2254 *val = ip | ((psr >> 41) & 0x3);
2257 case UNW_IA64_AR_BSP:
2258 /* Libunwind expects to see the beginning of the current register
2259 frame so we must account for the fact that ptrace() will return a value
2260 for bsp that points *after* the current register frame. */
2261 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
2262 bsp = extract_unsigned_integer (buf, 8);
2263 frame_unwind_register (next_frame, IA64_CFM_REGNUM, buf);
2264 cfm = extract_unsigned_integer (buf, 8);
2266 *val = ia64_rse_skip_regs (bsp, -sof);
2269 case UNW_IA64_AR_BSPSTORE:
2270 /* Libunwind wants bspstore to be after the current register frame.
2271 This is what ptrace() and gdb treats as the regular bsp value. */
2272 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
2273 *val = extract_unsigned_integer (buf, 8);
2277 /* For all other registers, just unwind the value directly. */
2278 frame_unwind_register (next_frame, regnum, buf);
2279 *val = extract_unsigned_integer (buf, 8);
2283 if (gdbarch_debug >= 1)
2284 fprintf_unfiltered (gdb_stdlog,
2285 " access_reg: from cache: %4s=0x%s\n",
2286 (((unsigned) regnum <= IA64_NAT127_REGNUM)
2287 ? ia64_register_names[regnum] : "r??"),
2292 /* Libunwind callback accessor function for floating-point registers. */
2294 ia64_access_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_fpreg_t *val,
2295 int write, void *arg)
2297 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2298 struct frame_info *next_frame = arg;
2300 /* We never call any libunwind routines that need to write registers. */
2301 gdb_assert (!write);
2303 frame_unwind_register (next_frame, regnum, (char *) val);
2308 /* Libunwind callback accessor function for top-level rse registers. */
2310 ia64_access_rse_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val,
2311 int write, void *arg)
2313 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2314 unw_word_t bsp, sof, sol, cfm, psr, ip;
2315 struct regcache *regcache = arg;
2316 long new_sof, old_sof;
2317 char buf[MAX_REGISTER_SIZE];
2319 /* We never call any libunwind routines that need to write registers. */
2320 gdb_assert (!write);
2325 /* Libunwind expects to see the pc value which means the slot number
2326 from the psr must be merged with the ip word address. */
2327 regcache_cooked_read (regcache, IA64_IP_REGNUM, buf);
2328 ip = extract_unsigned_integer (buf, 8);
2329 regcache_cooked_read (regcache, IA64_PSR_REGNUM, buf);
2330 psr = extract_unsigned_integer (buf, 8);
2331 *val = ip | ((psr >> 41) & 0x3);
2334 case UNW_IA64_AR_BSP:
2335 /* Libunwind expects to see the beginning of the current register
2336 frame so we must account for the fact that ptrace() will return a value
2337 for bsp that points *after* the current register frame. */
2338 regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf);
2339 bsp = extract_unsigned_integer (buf, 8);
2340 regcache_cooked_read (regcache, IA64_CFM_REGNUM, buf);
2341 cfm = extract_unsigned_integer (buf, 8);
2343 *val = ia64_rse_skip_regs (bsp, -sof);
2346 case UNW_IA64_AR_BSPSTORE:
2347 /* Libunwind wants bspstore to be after the current register frame.
2348 This is what ptrace() and gdb treats as the regular bsp value. */
2349 regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf);
2350 *val = extract_unsigned_integer (buf, 8);
2354 /* For all other registers, just unwind the value directly. */
2355 regcache_cooked_read (regcache, regnum, buf);
2356 *val = extract_unsigned_integer (buf, 8);
2360 if (gdbarch_debug >= 1)
2361 fprintf_unfiltered (gdb_stdlog,
2362 " access_rse_reg: from cache: %4s=0x%s\n",
2363 (((unsigned) regnum <= IA64_NAT127_REGNUM)
2364 ? ia64_register_names[regnum] : "r??"),
2370 /* Libunwind callback accessor function for top-level fp registers. */
2372 ia64_access_rse_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum,
2373 unw_fpreg_t *val, int write, void *arg)
2375 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2376 struct regcache *regcache = arg;
2378 /* We never call any libunwind routines that need to write registers. */
2379 gdb_assert (!write);
2381 regcache_cooked_read (regcache, regnum, (char *) val);
2386 /* Libunwind callback accessor function for accessing memory. */
2388 ia64_access_mem (unw_addr_space_t as,
2389 unw_word_t addr, unw_word_t *val,
2390 int write, void *arg)
2392 if (addr - KERNEL_START < ktab_size)
2394 unw_word_t *laddr = (unw_word_t*) ((char *) ktab
2395 + (addr - KERNEL_START));
2404 /* XXX do we need to normalize byte-order here? */
2406 return target_write_memory (addr, (char *) val, sizeof (unw_word_t));
2408 return target_read_memory (addr, (char *) val, sizeof (unw_word_t));
2411 /* Call low-level function to access the kernel unwind table. */
2413 getunwind_table (gdb_byte **buf_p)
2417 /* FIXME drow/2005-09-10: This code used to call
2418 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2419 for the currently running ia64-linux kernel. That data should
2420 come from the core file and be accessed via the auxv vector; if
2421 we want to preserve fall back to the running kernel's table, then
2422 we should find a way to override the corefile layer's
2423 xfer_partial method. */
2425 x = target_read_alloc (¤t_target, TARGET_OBJECT_UNWIND_TABLE,
2431 /* Get the kernel unwind table. */
2433 get_kernel_table (unw_word_t ip, unw_dyn_info_t *di)
2435 static struct ia64_table_entry *etab;
2442 size = getunwind_table (&ktab_buf);
2444 return -UNW_ENOINFO;
2446 ktab = (struct ia64_table_entry *) ktab_buf;
2449 for (etab = ktab; etab->start_offset; ++etab)
2450 etab->info_offset += KERNEL_START;
2453 if (ip < ktab[0].start_offset || ip >= etab[-1].end_offset)
2454 return -UNW_ENOINFO;
2456 di->format = UNW_INFO_FORMAT_TABLE;
2458 di->start_ip = ktab[0].start_offset;
2459 di->end_ip = etab[-1].end_offset;
2460 di->u.ti.name_ptr = (unw_word_t) "<kernel>";
2461 di->u.ti.segbase = 0;
2462 di->u.ti.table_len = ((char *) etab - (char *) ktab) / sizeof (unw_word_t);
2463 di->u.ti.table_data = (unw_word_t *) ktab;
2465 if (gdbarch_debug >= 1)
2466 fprintf_unfiltered (gdb_stdlog, "get_kernel_table: found table `%s': "
2467 "segbase=0x%s, length=%s, gp=0x%s\n",
2468 (char *) di->u.ti.name_ptr,
2469 paddr_nz (di->u.ti.segbase),
2470 paddr_u (di->u.ti.table_len),
2475 /* Find the unwind table entry for a specified address. */
2477 ia64_find_unwind_table (struct objfile *objfile, unw_word_t ip,
2478 unw_dyn_info_t *dip, void **buf)
2480 Elf_Internal_Phdr *phdr, *p_text = NULL, *p_unwind = NULL;
2481 Elf_Internal_Ehdr *ehdr;
2482 unw_word_t segbase = 0;
2483 CORE_ADDR load_base;
2487 bfd = objfile->obfd;
2489 ehdr = elf_tdata (bfd)->elf_header;
2490 phdr = elf_tdata (bfd)->phdr;
2492 load_base = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile));
2494 for (i = 0; i < ehdr->e_phnum; ++i)
2496 switch (phdr[i].p_type)
2499 if ((unw_word_t) (ip - load_base - phdr[i].p_vaddr)
2504 case PT_IA_64_UNWIND:
2505 p_unwind = phdr + i;
2513 if (!p_text || !p_unwind)
2514 return -UNW_ENOINFO;
2516 /* Verify that the segment that contains the IP also contains
2517 the static unwind table. If not, we may be in the Linux kernel's
2518 DSO gate page in which case the unwind table is another segment.
2519 Otherwise, we are dealing with runtime-generated code, for which we
2520 have no info here. */
2521 segbase = p_text->p_vaddr + load_base;
2523 if ((p_unwind->p_vaddr - p_text->p_vaddr) >= p_text->p_memsz)
2526 for (i = 0; i < ehdr->e_phnum; ++i)
2528 if (phdr[i].p_type == PT_LOAD
2529 && (p_unwind->p_vaddr - phdr[i].p_vaddr) < phdr[i].p_memsz)
2532 /* Get the segbase from the section containing the
2534 segbase = phdr[i].p_vaddr + load_base;
2538 return -UNW_ENOINFO;
2541 dip->start_ip = p_text->p_vaddr + load_base;
2542 dip->end_ip = dip->start_ip + p_text->p_memsz;
2543 dip->gp = ia64_find_global_pointer (ip);
2544 dip->format = UNW_INFO_FORMAT_REMOTE_TABLE;
2545 dip->u.rti.name_ptr = (unw_word_t) bfd_get_filename (bfd);
2546 dip->u.rti.segbase = segbase;
2547 dip->u.rti.table_len = p_unwind->p_memsz / sizeof (unw_word_t);
2548 dip->u.rti.table_data = p_unwind->p_vaddr + load_base;
2553 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2555 ia64_find_proc_info_x (unw_addr_space_t as, unw_word_t ip, unw_proc_info_t *pi,
2556 int need_unwind_info, void *arg)
2558 struct obj_section *sec = find_pc_section (ip);
2565 /* XXX This only works if the host and the target architecture are
2566 both ia64 and if the have (more or less) the same kernel
2568 if (get_kernel_table (ip, &di) < 0)
2569 return -UNW_ENOINFO;
2571 if (gdbarch_debug >= 1)
2572 fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: 0x%s -> "
2573 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2574 "length=%s,data=0x%s)\n",
2575 paddr_nz (ip), (char *)di.u.ti.name_ptr,
2576 paddr_nz (di.u.ti.segbase),
2577 paddr_nz (di.start_ip), paddr_nz (di.end_ip),
2579 paddr_u (di.u.ti.table_len),
2580 paddr_nz ((CORE_ADDR)di.u.ti.table_data));
2584 ret = ia64_find_unwind_table (sec->objfile, ip, &di, &buf);
2588 if (gdbarch_debug >= 1)
2589 fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: 0x%s -> "
2590 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2591 "length=%s,data=0x%s)\n",
2592 paddr_nz (ip), (char *)di.u.rti.name_ptr,
2593 paddr_nz (di.u.rti.segbase),
2594 paddr_nz (di.start_ip), paddr_nz (di.end_ip),
2596 paddr_u (di.u.rti.table_len),
2597 paddr_nz (di.u.rti.table_data));
2600 ret = libunwind_search_unwind_table (&as, ip, &di, pi, need_unwind_info,
2603 /* We no longer need the dyn info storage so free it. */
2609 /* Libunwind callback accessor function for cleanup. */
2611 ia64_put_unwind_info (unw_addr_space_t as,
2612 unw_proc_info_t *pip, void *arg)
2614 /* Nothing required for now. */
2617 /* Libunwind callback accessor function to get head of the dynamic
2618 unwind-info registration list. */
2620 ia64_get_dyn_info_list (unw_addr_space_t as,
2621 unw_word_t *dilap, void *arg)
2623 struct obj_section *text_sec;
2624 struct objfile *objfile;
2625 unw_word_t ip, addr;
2629 if (!libunwind_is_initialized ())
2630 return -UNW_ENOINFO;
2632 for (objfile = object_files; objfile; objfile = objfile->next)
2636 text_sec = objfile->sections + SECT_OFF_TEXT (objfile);
2637 ip = text_sec->addr;
2638 ret = ia64_find_unwind_table (objfile, ip, &di, &buf);
2641 addr = libunwind_find_dyn_list (as, &di, arg);
2642 /* We no longer need the dyn info storage so free it. */
2647 if (gdbarch_debug >= 1)
2648 fprintf_unfiltered (gdb_stdlog,
2649 "dynamic unwind table in objfile %s "
2650 "at 0x%s (gp=0x%s)\n",
2651 bfd_get_filename (objfile->obfd),
2652 paddr_nz (addr), paddr_nz (di.gp));
2658 return -UNW_ENOINFO;
2662 /* Frame interface functions for libunwind. */
2665 ia64_libunwind_frame_this_id (struct frame_info *next_frame, void **this_cache,
2666 struct frame_id *this_id)
2671 CORE_ADDR prev_ip, addr;
2672 int realnum, optimized;
2673 enum lval_type lval;
2676 libunwind_frame_this_id (next_frame, this_cache, &id);
2677 if (frame_id_eq (id, null_frame_id))
2679 (*this_id) = null_frame_id;
2683 /* We must add the bsp as the special address for frame comparison
2685 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
2686 bsp = extract_unsigned_integer (buf, 8);
2688 /* If the previous frame pc value is 0, then we are at the end of the stack
2689 and don't want to unwind past this frame. We return a null frame_id to
2691 libunwind_frame_prev_register (next_frame, this_cache, IA64_IP_REGNUM,
2692 &optimized, &lval, &addr, &realnum, buf);
2693 prev_ip = extract_unsigned_integer (buf, 8);
2696 (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp);
2698 (*this_id) = null_frame_id;
2700 if (gdbarch_debug >= 1)
2701 fprintf_unfiltered (gdb_stdlog,
2702 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2703 paddr_nz (id.code_addr), paddr_nz (id.stack_addr),
2704 paddr_nz (bsp), next_frame);
2708 ia64_libunwind_frame_prev_register (struct frame_info *next_frame,
2710 int regnum, int *optimizedp,
2711 enum lval_type *lvalp, CORE_ADDR *addrp,
2712 int *realnump, gdb_byte *valuep)
2716 struct gdbarch *gdbarch = get_frame_arch (next_frame);
2717 if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
2718 reg = IA64_PR_REGNUM;
2719 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
2720 reg = IA64_UNAT_REGNUM;
2722 /* Let libunwind do most of the work. */
2723 libunwind_frame_prev_register (next_frame, this_cache, reg,
2724 optimizedp, lvalp, addrp, realnump, valuep);
2726 /* No more to do if the value is not supposed to be supplied. */
2730 if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
2734 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
2738 unsigned char buf[MAX_REGISTER_SIZE];
2740 /* Fetch predicate register rename base from current frame
2741 marker for this frame. */
2742 frame_unwind_register (next_frame, IA64_CFM_REGNUM, buf);
2743 cfm = extract_unsigned_integer (buf, 8);
2744 rrb_pr = (cfm >> 32) & 0x3f;
2746 /* Adjust the register number to account for register rotation. */
2747 regnum = VP16_REGNUM
2748 + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
2750 prN_val = extract_bit_field ((unsigned char *) valuep,
2751 regnum - VP0_REGNUM, 1);
2752 store_unsigned_integer (valuep, register_size (gdbarch, regnum), prN_val);
2754 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
2758 unatN_val = extract_bit_field ((unsigned char *) valuep,
2759 regnum - IA64_NAT0_REGNUM, 1);
2760 store_unsigned_integer (valuep, register_size (gdbarch, regnum),
2763 else if (regnum == IA64_BSP_REGNUM)
2765 char cfm_valuep[MAX_REGISTER_SIZE];
2768 enum lval_type cfm_lval;
2770 CORE_ADDR bsp, prev_cfm, prev_bsp;
2772 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2773 This corresponds to what the hardware bsp register will be if we pop the frame
2774 back which is why we might have been called. We know that libunwind will pass us back
2775 the beginning of the current frame so we should just add sof to it. */
2776 prev_bsp = extract_unsigned_integer (valuep, 8);
2777 libunwind_frame_prev_register (next_frame, this_cache, IA64_CFM_REGNUM,
2778 &cfm_optim, &cfm_lval, &cfm_addr, &cfm_realnum, cfm_valuep);
2779 prev_cfm = extract_unsigned_integer (cfm_valuep, 8);
2780 prev_bsp = rse_address_add (prev_bsp, (prev_cfm & 0x7f));
2782 store_unsigned_integer (valuep, register_size (gdbarch, regnum),
2786 if (gdbarch_debug >= 1)
2787 fprintf_unfiltered (gdb_stdlog,
2788 "libunwind prev register <%s> is 0x%s\n",
2789 (regnum < IA64_GR32_REGNUM
2790 || (regnum > IA64_GR127_REGNUM
2791 && regnum < LAST_PSEUDO_REGNUM))
2792 ? ia64_register_names[regnum]
2793 : (regnum < LAST_PSEUDO_REGNUM
2794 ? ia64_register_names[regnum-IA64_GR32_REGNUM+V32_REGNUM]
2796 paddr_nz (extract_unsigned_integer (valuep, 8)));
2799 static const struct frame_unwind ia64_libunwind_frame_unwind =
2802 ia64_libunwind_frame_this_id,
2803 ia64_libunwind_frame_prev_register,
2806 libunwind_frame_dealloc_cache
2809 static const struct frame_unwind *
2810 ia64_libunwind_frame_sniffer (struct frame_info *next_frame)
2812 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame))
2813 return &ia64_libunwind_frame_unwind;
2819 ia64_libunwind_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache,
2820 struct frame_id *this_id)
2827 libunwind_frame_this_id (next_frame, this_cache, &id);
2828 if (frame_id_eq (id, null_frame_id))
2830 (*this_id) = null_frame_id;
2834 /* We must add the bsp as the special address for frame comparison
2836 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
2837 bsp = extract_unsigned_integer (buf, 8);
2839 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2840 (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp);
2842 if (gdbarch_debug >= 1)
2843 fprintf_unfiltered (gdb_stdlog,
2844 "libunwind sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2845 paddr_nz (id.code_addr), paddr_nz (id.stack_addr),
2846 paddr_nz (bsp), next_frame);
2850 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info *next_frame,
2852 int regnum, int *optimizedp,
2853 enum lval_type *lvalp, CORE_ADDR *addrp,
2854 int *realnump, gdb_byte *valuep)
2858 CORE_ADDR prev_ip, addr;
2859 int realnum, optimized;
2860 enum lval_type lval;
2863 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2864 method of getting previous registers. */
2865 libunwind_frame_prev_register (next_frame, this_cache, IA64_IP_REGNUM,
2866 &optimized, &lval, &addr, &realnum, buf);
2867 prev_ip = extract_unsigned_integer (buf, 8);
2871 void *tmp_cache = NULL;
2872 ia64_sigtramp_frame_prev_register (next_frame, &tmp_cache, regnum, optimizedp, lvalp,
2873 addrp, realnump, valuep);
2876 ia64_libunwind_frame_prev_register (next_frame, this_cache, regnum, optimizedp, lvalp,
2877 addrp, realnump, valuep);
2880 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind =
2883 ia64_libunwind_sigtramp_frame_this_id,
2884 ia64_libunwind_sigtramp_frame_prev_register
2887 static const struct frame_unwind *
2888 ia64_libunwind_sigtramp_frame_sniffer (struct frame_info *next_frame)
2890 if (libunwind_is_initialized ())
2892 if (libunwind_sigtramp_frame_sniffer (next_frame))
2893 return &ia64_libunwind_sigtramp_frame_unwind;
2897 return ia64_sigtramp_frame_sniffer (next_frame);
2900 /* Set of libunwind callback acccessor functions. */
2901 static unw_accessors_t ia64_unw_accessors =
2903 ia64_find_proc_info_x,
2904 ia64_put_unwind_info,
2905 ia64_get_dyn_info_list,
2913 /* Set of special libunwind callback acccessor functions specific for accessing
2914 the rse registers. At the top of the stack, we want libunwind to figure out
2915 how to read r32 - r127. Though usually they are found sequentially in memory
2916 starting from $bof, this is not always true. */
2917 static unw_accessors_t ia64_unw_rse_accessors =
2919 ia64_find_proc_info_x,
2920 ia64_put_unwind_info,
2921 ia64_get_dyn_info_list,
2923 ia64_access_rse_reg,
2924 ia64_access_rse_fpreg,
2929 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2930 static struct libunwind_descr ia64_libunwind_descr =
2935 &ia64_unw_accessors,
2936 &ia64_unw_rse_accessors,
2939 #endif /* HAVE_LIBUNWIND_IA64_H */
2942 ia64_use_struct_convention (struct type *type)
2944 struct type *float_elt_type;
2946 /* Don't use the struct convention for anything but structure,
2947 union, or array types. */
2948 if (!(TYPE_CODE (type) == TYPE_CODE_STRUCT
2949 || TYPE_CODE (type) == TYPE_CODE_UNION
2950 || TYPE_CODE (type) == TYPE_CODE_ARRAY))
2953 /* HFAs are structures (or arrays) consisting entirely of floating
2954 point values of the same length. Up to 8 of these are returned
2955 in registers. Don't use the struct convention when this is the
2957 float_elt_type = is_float_or_hfa_type (type);
2958 if (float_elt_type != NULL
2959 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
2962 /* Other structs of length 32 or less are returned in r8-r11.
2963 Don't use the struct convention for those either. */
2964 return TYPE_LENGTH (type) > 32;
2968 ia64_extract_return_value (struct type *type, struct regcache *regcache,
2971 struct type *float_elt_type;
2973 float_elt_type = is_float_or_hfa_type (type);
2974 if (float_elt_type != NULL)
2976 char from[MAX_REGISTER_SIZE];
2978 int regnum = IA64_FR8_REGNUM;
2979 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
2983 regcache_cooked_read (regcache, regnum, from);
2984 convert_typed_floating (from, builtin_type_ia64_ext,
2985 (char *)valbuf + offset, float_elt_type);
2986 offset += TYPE_LENGTH (float_elt_type);
2994 int regnum = IA64_GR8_REGNUM;
2995 int reglen = TYPE_LENGTH (register_type (get_regcache_arch (regcache),
2997 int n = TYPE_LENGTH (type) / reglen;
2998 int m = TYPE_LENGTH (type) % reglen;
3003 regcache_cooked_read_unsigned (regcache, regnum, &val);
3004 memcpy ((char *)valbuf + offset, &val, reglen);
3011 regcache_cooked_read_unsigned (regcache, regnum, &val);
3012 memcpy ((char *)valbuf + offset, &val, m);
3018 ia64_store_return_value (struct type *type, struct regcache *regcache,
3019 const gdb_byte *valbuf)
3021 struct type *float_elt_type;
3023 float_elt_type = is_float_or_hfa_type (type);
3024 if (float_elt_type != NULL)
3026 char to[MAX_REGISTER_SIZE];
3028 int regnum = IA64_FR8_REGNUM;
3029 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
3033 convert_typed_floating ((char *)valbuf + offset, float_elt_type,
3034 to, builtin_type_ia64_ext);
3035 regcache_cooked_write (regcache, regnum, to);
3036 offset += TYPE_LENGTH (float_elt_type);
3044 int regnum = IA64_GR8_REGNUM;
3045 int reglen = TYPE_LENGTH (register_type (get_regcache_arch (regcache),
3047 int n = TYPE_LENGTH (type) / reglen;
3048 int m = TYPE_LENGTH (type) % reglen;
3053 memcpy (&val, (char *)valbuf + offset, reglen);
3054 regcache_cooked_write_unsigned (regcache, regnum, val);
3061 memcpy (&val, (char *)valbuf + offset, m);
3062 regcache_cooked_write_unsigned (regcache, regnum, val);
3067 static enum return_value_convention
3068 ia64_return_value (struct gdbarch *gdbarch, struct type *func_type,
3069 struct type *valtype, struct regcache *regcache,
3070 gdb_byte *readbuf, const gdb_byte *writebuf)
3072 int struct_return = ia64_use_struct_convention (valtype);
3074 if (writebuf != NULL)
3076 gdb_assert (!struct_return);
3077 ia64_store_return_value (valtype, regcache, writebuf);
3080 if (readbuf != NULL)
3082 gdb_assert (!struct_return);
3083 ia64_extract_return_value (valtype, regcache, readbuf);
3087 return RETURN_VALUE_STRUCT_CONVENTION;
3089 return RETURN_VALUE_REGISTER_CONVENTION;
3093 is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
3095 switch (TYPE_CODE (t))
3099 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
3106 case TYPE_CODE_ARRAY:
3108 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
3111 case TYPE_CODE_STRUCT:
3115 for (i = 0; i < TYPE_NFIELDS (t); i++)
3116 if (!is_float_or_hfa_type_recurse
3117 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
3128 /* Determine if the given type is one of the floating point types or
3129 and HFA (which is a struct, array, or combination thereof whose
3130 bottom-most elements are all of the same floating point type). */
3132 static struct type *
3133 is_float_or_hfa_type (struct type *t)
3135 struct type *et = 0;
3137 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
3141 /* Return 1 if the alignment of T is such that the next even slot
3142 should be used. Return 0, if the next available slot should
3143 be used. (See section 8.5.1 of the IA-64 Software Conventions
3144 and Runtime manual). */
3147 slot_alignment_is_next_even (struct type *t)
3149 switch (TYPE_CODE (t))
3153 if (TYPE_LENGTH (t) > 8)
3157 case TYPE_CODE_ARRAY:
3159 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
3160 case TYPE_CODE_STRUCT:
3164 for (i = 0; i < TYPE_NFIELDS (t); i++)
3165 if (slot_alignment_is_next_even
3166 (check_typedef (TYPE_FIELD_TYPE (t, i))))
3175 /* Attempt to find (and return) the global pointer for the given
3178 This is a rather nasty bit of code searchs for the .dynamic section
3179 in the objfile corresponding to the pc of the function we're trying
3180 to call. Once it finds the addresses at which the .dynamic section
3181 lives in the child process, it scans the Elf64_Dyn entries for a
3182 DT_PLTGOT tag. If it finds one of these, the corresponding
3183 d_un.d_ptr value is the global pointer. */
3186 ia64_find_global_pointer (CORE_ADDR faddr)
3188 struct obj_section *faddr_sect;
3190 faddr_sect = find_pc_section (faddr);
3191 if (faddr_sect != NULL)
3193 struct obj_section *osect;
3195 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
3197 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
3201 if (osect < faddr_sect->objfile->sections_end)
3206 while (addr < osect->endaddr)
3212 status = target_read_memory (addr, buf, sizeof (buf));
3215 tag = extract_signed_integer (buf, sizeof (buf));
3217 if (tag == DT_PLTGOT)
3219 CORE_ADDR global_pointer;
3221 status = target_read_memory (addr + 8, buf, sizeof (buf));
3224 global_pointer = extract_unsigned_integer (buf, sizeof (buf));
3227 return global_pointer;
3240 /* Given a function's address, attempt to find (and return) the
3241 corresponding (canonical) function descriptor. Return 0 if
3244 find_extant_func_descr (CORE_ADDR faddr)
3246 struct obj_section *faddr_sect;
3248 /* Return early if faddr is already a function descriptor. */
3249 faddr_sect = find_pc_section (faddr);
3250 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
3253 if (faddr_sect != NULL)
3255 struct obj_section *osect;
3256 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
3258 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
3262 if (osect < faddr_sect->objfile->sections_end)
3267 while (addr < osect->endaddr)
3273 status = target_read_memory (addr, buf, sizeof (buf));
3276 faddr2 = extract_signed_integer (buf, sizeof (buf));
3278 if (faddr == faddr2)
3288 /* Attempt to find a function descriptor corresponding to the
3289 given address. If none is found, construct one on the
3290 stack using the address at fdaptr. */
3293 find_func_descr (struct regcache *regcache, CORE_ADDR faddr, CORE_ADDR *fdaptr)
3297 fdesc = find_extant_func_descr (faddr);
3301 ULONGEST global_pointer;
3307 global_pointer = ia64_find_global_pointer (faddr);
3309 if (global_pointer == 0)
3310 regcache_cooked_read_unsigned (regcache,
3311 IA64_GR1_REGNUM, &global_pointer);
3313 store_unsigned_integer (buf, 8, faddr);
3314 store_unsigned_integer (buf + 8, 8, global_pointer);
3316 write_memory (fdesc, buf, 16);
3322 /* Use the following routine when printing out function pointers
3323 so the user can see the function address rather than just the
3324 function descriptor. */
3326 ia64_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
3327 struct target_ops *targ)
3329 struct obj_section *s;
3331 s = find_pc_section (addr);
3333 /* check if ADDR points to a function descriptor. */
3334 if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
3335 return read_memory_unsigned_integer (addr, 8);
3337 /* There are also descriptors embedded in vtables. */
3340 struct minimal_symbol *minsym;
3342 minsym = lookup_minimal_symbol_by_pc (addr);
3344 if (minsym && is_vtable_name (SYMBOL_LINKAGE_NAME (minsym)))
3345 return read_memory_unsigned_integer (addr, 8);
3352 ia64_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
3358 ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
3359 struct regcache *regcache, CORE_ADDR bp_addr,
3360 int nargs, struct value **args, CORE_ADDR sp,
3361 int struct_return, CORE_ADDR struct_addr)
3367 int nslots, rseslots, memslots, slotnum, nfuncargs;
3369 ULONGEST bsp, cfm, pfs, new_bsp;
3370 CORE_ADDR funcdescaddr, pc, global_pointer;
3371 CORE_ADDR func_addr = find_function_addr (function, NULL);
3375 /* Count the number of slots needed for the arguments. */
3376 for (argno = 0; argno < nargs; argno++)
3379 type = check_typedef (value_type (arg));
3380 len = TYPE_LENGTH (type);
3382 if ((nslots & 1) && slot_alignment_is_next_even (type))
3385 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
3388 nslots += (len + 7) / 8;
3391 /* Divvy up the slots between the RSE and the memory stack. */
3392 rseslots = (nslots > 8) ? 8 : nslots;
3393 memslots = nslots - rseslots;
3395 /* Allocate a new RSE frame. */
3396 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
3398 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
3399 new_bsp = rse_address_add (bsp, rseslots);
3400 regcache_cooked_write_unsigned (regcache, IA64_BSP_REGNUM, new_bsp);
3402 regcache_cooked_read_unsigned (regcache, IA64_PFS_REGNUM, &pfs);
3403 pfs &= 0xc000000000000000LL;
3404 pfs |= (cfm & 0xffffffffffffLL);
3405 regcache_cooked_write_unsigned (regcache, IA64_PFS_REGNUM, pfs);
3407 cfm &= 0xc000000000000000LL;
3409 regcache_cooked_write_unsigned (regcache, IA64_CFM_REGNUM, cfm);
3411 /* We will attempt to find function descriptors in the .opd segment,
3412 but if we can't we'll construct them ourselves. That being the
3413 case, we'll need to reserve space on the stack for them. */
3414 funcdescaddr = sp - nfuncargs * 16;
3415 funcdescaddr &= ~0xfLL;
3417 /* Adjust the stack pointer to it's new value. The calling conventions
3418 require us to have 16 bytes of scratch, plus whatever space is
3419 necessary for the memory slots and our function descriptors. */
3420 sp = sp - 16 - (memslots + nfuncargs) * 8;
3421 sp &= ~0xfLL; /* Maintain 16 byte alignment. */
3423 /* Place the arguments where they belong. The arguments will be
3424 either placed in the RSE backing store or on the memory stack.
3425 In addition, floating point arguments or HFAs are placed in
3426 floating point registers. */
3428 floatreg = IA64_FR8_REGNUM;
3429 for (argno = 0; argno < nargs; argno++)
3431 struct type *float_elt_type;
3434 type = check_typedef (value_type (arg));
3435 len = TYPE_LENGTH (type);
3437 /* Special handling for function parameters. */
3439 && TYPE_CODE (type) == TYPE_CODE_PTR
3440 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
3443 ULONGEST faddr = extract_unsigned_integer (value_contents (arg), 8);
3444 store_unsigned_integer (val_buf, 8,
3445 find_func_descr (regcache, faddr,
3447 if (slotnum < rseslots)
3448 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
3450 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
3457 /* Skip odd slot if necessary... */
3458 if ((slotnum & 1) && slot_alignment_is_next_even (type))
3466 memset (val_buf, 0, 8);
3467 memcpy (val_buf, value_contents (arg) + argoffset, (len > 8) ? 8 : len);
3469 if (slotnum < rseslots)
3470 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
3472 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
3479 /* Handle floating point types (including HFAs). */
3480 float_elt_type = is_float_or_hfa_type (type);
3481 if (float_elt_type != NULL)
3484 len = TYPE_LENGTH (type);
3485 while (len > 0 && floatreg < IA64_FR16_REGNUM)
3487 char to[MAX_REGISTER_SIZE];
3488 convert_typed_floating (value_contents (arg) + argoffset, float_elt_type,
3489 to, builtin_type_ia64_ext);
3490 regcache_cooked_write (regcache, floatreg, (void *)to);
3492 argoffset += TYPE_LENGTH (float_elt_type);
3493 len -= TYPE_LENGTH (float_elt_type);
3498 /* Store the struct return value in r8 if necessary. */
3501 regcache_cooked_write_unsigned (regcache, IA64_GR8_REGNUM, (ULONGEST)struct_addr);
3504 global_pointer = ia64_find_global_pointer (func_addr);
3506 if (global_pointer != 0)
3507 regcache_cooked_write_unsigned (regcache, IA64_GR1_REGNUM, global_pointer);
3509 regcache_cooked_write_unsigned (regcache, IA64_BR0_REGNUM, bp_addr);
3511 regcache_cooked_write_unsigned (regcache, sp_regnum, sp);
3516 static struct frame_id
3517 ia64_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
3522 frame_unwind_register (next_frame, sp_regnum, buf);
3523 sp = extract_unsigned_integer (buf, 8);
3525 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
3526 bsp = extract_unsigned_integer (buf, 8);
3528 if (gdbarch_debug >= 1)
3529 fprintf_unfiltered (gdb_stdlog,
3530 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3531 paddr_nz (frame_pc_unwind (next_frame)),
3532 paddr_nz (sp), paddr_nz (bsp));
3534 return frame_id_build_special (sp, frame_pc_unwind (next_frame), bsp);
3538 ia64_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
3541 CORE_ADDR ip, psr, pc;
3543 frame_unwind_register (next_frame, IA64_IP_REGNUM, buf);
3544 ip = extract_unsigned_integer (buf, 8);
3545 frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf);
3546 psr = extract_unsigned_integer (buf, 8);
3548 pc = (ip & ~0xf) | ((psr >> 41) & 3);
3553 ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info)
3555 info->bytes_per_line = SLOT_MULTIPLIER;
3556 return print_insn_ia64 (memaddr, info);
3559 static struct gdbarch *
3560 ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3562 struct gdbarch *gdbarch;
3563 struct gdbarch_tdep *tdep;
3565 /* If there is already a candidate, use it. */
3566 arches = gdbarch_list_lookup_by_info (arches, &info);
3568 return arches->gdbarch;
3570 tdep = xmalloc (sizeof (struct gdbarch_tdep));
3571 gdbarch = gdbarch_alloc (&info, tdep);
3573 tdep->sigcontext_register_address = 0;
3574 tdep->pc_in_sigtramp = 0;
3576 /* According to the ia64 specs, instructions that store long double
3577 floats in memory use a long-double format different than that
3578 used in the floating registers. The memory format matches the
3579 x86 extended float format which is 80 bits. An OS may choose to
3580 use this format (e.g. GNU/Linux) or choose to use a different
3581 format for storing long doubles (e.g. HPUX). In the latter case,
3582 the setting of the format may be moved/overridden in an
3583 OS-specific tdep file. */
3584 set_gdbarch_long_double_format (gdbarch, floatformats_i387_ext);
3586 set_gdbarch_short_bit (gdbarch, 16);
3587 set_gdbarch_int_bit (gdbarch, 32);
3588 set_gdbarch_long_bit (gdbarch, 64);
3589 set_gdbarch_long_long_bit (gdbarch, 64);
3590 set_gdbarch_float_bit (gdbarch, 32);
3591 set_gdbarch_double_bit (gdbarch, 64);
3592 set_gdbarch_long_double_bit (gdbarch, 128);
3593 set_gdbarch_ptr_bit (gdbarch, 64);
3595 set_gdbarch_num_regs (gdbarch, NUM_IA64_RAW_REGS);
3596 set_gdbarch_num_pseudo_regs (gdbarch, LAST_PSEUDO_REGNUM - FIRST_PSEUDO_REGNUM);
3597 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
3598 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
3600 set_gdbarch_register_name (gdbarch, ia64_register_name);
3601 set_gdbarch_register_type (gdbarch, ia64_register_type);
3603 set_gdbarch_pseudo_register_read (gdbarch, ia64_pseudo_register_read);
3604 set_gdbarch_pseudo_register_write (gdbarch, ia64_pseudo_register_write);
3605 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, ia64_dwarf_reg_to_regnum);
3606 set_gdbarch_register_reggroup_p (gdbarch, ia64_register_reggroup_p);
3607 set_gdbarch_convert_register_p (gdbarch, ia64_convert_register_p);
3608 set_gdbarch_register_to_value (gdbarch, ia64_register_to_value);
3609 set_gdbarch_value_to_register (gdbarch, ia64_value_to_register);
3611 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
3613 set_gdbarch_return_value (gdbarch, ia64_return_value);
3615 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
3616 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
3617 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
3618 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
3619 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
3621 /* Settings for calling functions in the inferior. */
3622 set_gdbarch_push_dummy_call (gdbarch, ia64_push_dummy_call);
3623 set_gdbarch_frame_align (gdbarch, ia64_frame_align);
3624 set_gdbarch_unwind_dummy_id (gdbarch, ia64_unwind_dummy_id);
3626 set_gdbarch_unwind_pc (gdbarch, ia64_unwind_pc);
3627 #ifdef HAVE_LIBUNWIND_IA64_H
3628 frame_unwind_append_sniffer (gdbarch, ia64_libunwind_sigtramp_frame_sniffer);
3629 frame_unwind_append_sniffer (gdbarch, ia64_libunwind_frame_sniffer);
3630 libunwind_frame_set_descr (gdbarch, &ia64_libunwind_descr);
3632 frame_unwind_append_sniffer (gdbarch, ia64_sigtramp_frame_sniffer);
3634 frame_unwind_append_sniffer (gdbarch, ia64_frame_sniffer);
3635 frame_base_set_default (gdbarch, &ia64_frame_base);
3637 /* Settings that should be unnecessary. */
3638 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
3640 set_gdbarch_print_insn (gdbarch, ia64_print_insn);
3641 set_gdbarch_convert_from_func_ptr_addr (gdbarch, ia64_convert_from_func_ptr_addr);
3643 /* The virtual table contains 16-byte descriptors, not pointers to
3645 set_gdbarch_vtable_function_descriptors (gdbarch, 1);
3647 /* Hook in ABI-specific overrides, if they have been registered. */
3648 gdbarch_init_osabi (info, gdbarch);
3653 extern initialize_file_ftype _initialize_ia64_tdep; /* -Wmissing-prototypes */
3656 _initialize_ia64_tdep (void)
3658 /* Define the ia64 floating-point format to gdb. */
3659 builtin_type_ia64_ext =
3660 init_type (TYPE_CODE_FLT, 128 / 8,
3661 0, "builtin_type_ia64_ext", NULL);
3662 TYPE_FLOATFORMAT (builtin_type_ia64_ext) = floatformats_ia64_ext;
3664 gdbarch_register (bfd_arch_ia64, ia64_gdbarch_init, NULL);