1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 #include "symfile.h" /* for entry_point_address */
26 #include "floatformat.h"
29 #include "elf/common.h" /* for DT_PLTGOT value */
31 typedef enum instruction_type
33 A, /* Integer ALU ; I-unit or M-unit */
34 I, /* Non-ALU integer; I-unit */
35 M, /* Memory ; M-unit */
36 F, /* Floating-point ; F-unit */
37 B, /* Branch ; B-unit */
38 L, /* Extended (L+X) ; I-unit */
39 X, /* Extended (L+X) ; I-unit */
40 undefined /* undefined or reserved */
43 /* We represent IA-64 PC addresses as the value of the instruction
44 pointer or'd with some bit combination in the low nibble which
45 represents the slot number in the bundle addressed by the
46 instruction pointer. The problem is that the Linux kernel
47 multiplies its slot numbers (for exceptions) by one while the
48 disassembler multiplies its slot numbers by 6. In addition, I've
49 heard it said that the simulator uses 1 as the multiplier.
51 I've fixed the disassembler so that the bytes_per_line field will
52 be the slot multiplier. If bytes_per_line comes in as zero, it
53 is set to six (which is how it was set up initially). -- objdump
54 displays pretty disassembly dumps with this value. For our purposes,
55 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
56 never want to also display the raw bytes the way objdump does. */
58 #define SLOT_MULTIPLIER 1
60 /* Length in bytes of an instruction bundle */
64 extern void _initialize_ia64_tdep (void);
66 static gdbarch_init_ftype ia64_gdbarch_init;
68 static gdbarch_register_name_ftype ia64_register_name;
69 static gdbarch_register_raw_size_ftype ia64_register_raw_size;
70 static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
71 static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
72 static gdbarch_register_byte_ftype ia64_register_byte;
73 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
74 static gdbarch_frame_chain_ftype ia64_frame_chain;
75 static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
76 static gdbarch_skip_prologue_ftype ia64_skip_prologue;
77 static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs;
78 static gdbarch_get_saved_register_ftype ia64_get_saved_register;
79 static gdbarch_extract_return_value_ftype ia64_extract_return_value;
80 static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address;
81 static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
82 static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
83 static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info;
84 static gdbarch_store_return_value_ftype ia64_store_return_value;
85 static gdbarch_store_struct_return_ftype ia64_store_struct_return;
86 static gdbarch_push_arguments_ftype ia64_push_arguments;
87 static gdbarch_push_return_address_ftype ia64_push_return_address;
88 static gdbarch_pop_frame_ftype ia64_pop_frame;
89 static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
91 static void ia64_pop_frame_regular (struct frame_info *frame);
93 static int ia64_num_regs = 590;
95 static int pc_regnum = IA64_IP_REGNUM;
96 static int sp_regnum = IA64_GR12_REGNUM;
97 static int fp_regnum = IA64_VFP_REGNUM;
98 static int lr_regnum = IA64_VRAP_REGNUM;
100 static LONGEST ia64_call_dummy_words[] = {0};
102 /* Array of register names; There should be ia64_num_regs strings in
105 static char *ia64_register_names[] =
106 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
107 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
108 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
109 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
110 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
111 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
112 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
113 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
114 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
115 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
116 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
117 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
118 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
119 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
120 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
121 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
123 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
124 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
125 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
126 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
127 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
128 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
129 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
130 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
131 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
132 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
133 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
134 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
135 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
136 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
137 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
138 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
140 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
141 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
142 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
143 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
144 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
145 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
146 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
147 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
149 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
153 "pr", "ip", "psr", "cfm",
155 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
156 "", "", "", "", "", "", "", "",
157 "rsc", "bsp", "bspstore", "rnat",
159 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
160 "ccv", "", "", "", "unat", "", "", "",
161 "fpsr", "", "", "", "itc",
162 "", "", "", "", "", "", "", "", "", "",
163 "", "", "", "", "", "", "", "", "",
165 "", "", "", "", "", "", "", "", "", "",
166 "", "", "", "", "", "", "", "", "", "",
167 "", "", "", "", "", "", "", "", "", "",
168 "", "", "", "", "", "", "", "", "", "",
169 "", "", "", "", "", "", "", "", "", "",
170 "", "", "", "", "", "", "", "", "", "",
172 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
173 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
174 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
175 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
176 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
177 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
178 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
179 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
180 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
181 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
182 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
183 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
184 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
185 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
186 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
187 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
190 struct frame_extra_info
192 CORE_ADDR bsp; /* points at r32 for the current frame */
193 CORE_ADDR cfm; /* cfm value for current frame */
194 int sof; /* Size of frame (decoded from cfm value) */
195 int sol; /* Size of locals (decoded from cfm value) */
196 CORE_ADDR after_prologue;
197 /* Address of first instruction after the last
198 prologue instruction; Note that there may
199 be instructions from the function's body
200 intermingled with the prologue. */
201 int mem_stack_frame_size;
202 /* Size of the memory stack frame (may be zero),
203 or -1 if it has not been determined yet. */
204 int fp_reg; /* Register number (if any) used a frame pointer
205 for this frame. 0 if no register is being used
206 as the frame pointer. */
210 ia64_register_name (int reg)
212 return ia64_register_names[reg];
216 ia64_register_raw_size (int reg)
218 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
222 ia64_register_virtual_size (int reg)
224 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
227 /* Return true iff register N's virtual format is different from
230 ia64_register_convertible (int nr)
232 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
235 const struct floatformat floatformat_ia64_ext =
237 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
238 floatformat_intbit_yes
242 ia64_register_convert_to_virtual (int regnum, struct type *type,
243 char *from, char *to)
245 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
248 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
249 store_floating(to, TYPE_LENGTH(type), val);
252 error("ia64_register_convert_to_virtual called with non floating point register number");
256 ia64_register_convert_to_raw (struct type *type, int regnum,
257 char *from, char *to)
259 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
261 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
262 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
265 error("ia64_register_convert_to_raw called with non floating point register number");
269 ia64_register_virtual_type (int reg)
271 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
272 return builtin_type_long_double;
274 return builtin_type_long;
278 ia64_register_byte (int reg)
281 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
284 /* Extract ``len'' bits from an instruction bundle starting at
288 extract_bit_field (char *bundle, int from, int len)
290 long long result = 0LL;
292 int from_byte = from / 8;
293 int to_byte = to / 8;
294 unsigned char *b = (unsigned char *) bundle;
300 if (from_byte == to_byte)
301 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
302 result = c >> (from % 8);
303 lshift = 8 - (from % 8);
305 for (i = from_byte+1; i < to_byte; i++)
307 result |= ((long long) b[i]) << lshift;
311 if (from_byte < to_byte && (to % 8 != 0))
314 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
315 result |= ((long long) c) << lshift;
321 /* Replace the specified bits in an instruction bundle */
324 replace_bit_field (char *bundle, long long val, int from, int len)
327 int from_byte = from / 8;
328 int to_byte = to / 8;
329 unsigned char *b = (unsigned char *) bundle;
332 if (from_byte == to_byte)
334 unsigned char left, right;
336 left = (c >> (to % 8)) << (to % 8);
337 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
338 c = (unsigned char) (val & 0xff);
339 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
347 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
348 c = c | (val << (from % 8));
350 val >>= 8 - from % 8;
352 for (i = from_byte+1; i < to_byte; i++)
361 unsigned char cv = (unsigned char) val;
363 c = c >> (to % 8) << (to % 8);
364 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
370 /* Return the contents of slot N (for N = 0, 1, or 2) in
371 and instruction bundle */
374 slotN_contents (unsigned char *bundle, int slotnum)
376 return extract_bit_field (bundle, 5+41*slotnum, 41);
379 /* Store an instruction in an instruction bundle */
382 replace_slotN_contents (unsigned char *bundle, long long instr, int slotnum)
384 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
387 static template_encoding_table[32][3] =
389 { M, I, I }, /* 00 */
390 { M, I, I }, /* 01 */
391 { M, I, I }, /* 02 */
392 { M, I, I }, /* 03 */
393 { M, L, X }, /* 04 */
394 { M, L, X }, /* 05 */
395 { undefined, undefined, undefined }, /* 06 */
396 { undefined, undefined, undefined }, /* 07 */
397 { M, M, I }, /* 08 */
398 { M, M, I }, /* 09 */
399 { M, M, I }, /* 0A */
400 { M, M, I }, /* 0B */
401 { M, F, I }, /* 0C */
402 { M, F, I }, /* 0D */
403 { M, M, F }, /* 0E */
404 { M, M, F }, /* 0F */
405 { M, I, B }, /* 10 */
406 { M, I, B }, /* 11 */
407 { M, B, B }, /* 12 */
408 { M, B, B }, /* 13 */
409 { undefined, undefined, undefined }, /* 14 */
410 { undefined, undefined, undefined }, /* 15 */
411 { B, B, B }, /* 16 */
412 { B, B, B }, /* 17 */
413 { M, M, B }, /* 18 */
414 { M, M, B }, /* 19 */
415 { undefined, undefined, undefined }, /* 1A */
416 { undefined, undefined, undefined }, /* 1B */
417 { M, F, B }, /* 1C */
418 { M, F, B }, /* 1D */
419 { undefined, undefined, undefined }, /* 1E */
420 { undefined, undefined, undefined }, /* 1F */
423 /* Fetch and (partially) decode an instruction at ADDR and return the
424 address of the next instruction to fetch. */
427 fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
429 char bundle[BUNDLE_LEN];
430 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
435 error("Can't fetch instructions for slot numbers greater than 2.");
439 val = target_read_memory (addr, bundle, BUNDLE_LEN);
444 *instr = slotN_contents (bundle, slotnum);
445 template = extract_bit_field (bundle, 0, 5);
446 *it = template_encoding_table[(int)template][slotnum];
448 if (slotnum == 2 || slotnum == 1 && *it == L)
451 addr += (slotnum + 1) * SLOT_MULTIPLIER;
456 /* There are 5 different break instructions (break.i, break.b,
457 break.m, break.f, and break.x), but they all have the same
458 encoding. (The five bit template in the low five bits of the
459 instruction bundle distinguishes one from another.)
461 The runtime architecture manual specifies that break instructions
462 used for debugging purposes must have the upper two bits of the 21
463 bit immediate set to a 0 and a 1 respectively. A breakpoint
464 instruction encodes the most significant bit of its 21 bit
465 immediate at bit 36 of the 41 bit instruction. The penultimate msb
466 is at bit 25 which leads to the pattern below.
468 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
469 it turns out that 0x80000 was used as the syscall break in the early
470 simulators. So I changed the pattern slightly to do "break.i 0x080001"
471 instead. But that didn't work either (I later found out that this
472 pattern was used by the simulator that I was using.) So I ended up
473 using the pattern seen below. */
476 #define BREAKPOINT 0x00002000040LL
478 #define BREAKPOINT 0x00003333300LL
481 ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
483 char bundle[BUNDLE_LEN];
484 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
489 error("Can't insert breakpoint for slot numbers greater than 2.");
493 val = target_read_memory (addr, bundle, BUNDLE_LEN);
494 instr = slotN_contents (bundle, slotnum);
495 memcpy(contents_cache, &instr, sizeof(instr));
496 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
498 target_write_memory (addr, bundle, BUNDLE_LEN);
504 ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
506 char bundle[BUNDLE_LEN];
507 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
513 val = target_read_memory (addr, bundle, BUNDLE_LEN);
514 memcpy (&instr, contents_cache, sizeof instr);
515 replace_slotN_contents (bundle, instr, slotnum);
517 target_write_memory (addr, bundle, BUNDLE_LEN);
522 /* We don't really want to use this, but remote.c needs to call it in order
523 to figure out if Z-packets are supported or not. Oh, well. */
525 ia64_breakpoint_from_pc (pcptr, lenptr)
529 static unsigned char breakpoint[] =
530 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
531 *lenptr = sizeof (breakpoint);
539 ia64_read_pc (int pid)
541 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, pid);
542 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, pid);
543 int slot_num = (psr_value >> 41) & 3;
545 return pc_value | (slot_num * SLOT_MULTIPLIER);
549 ia64_write_pc (CORE_ADDR new_pc, int pid)
551 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
552 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, pid);
553 psr_value &= ~(3LL << 41);
554 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
558 write_register_pid (IA64_PSR_REGNUM, psr_value, pid);
559 write_register_pid (IA64_IP_REGNUM, new_pc, pid);
562 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
564 /* Returns the address of the slot that's NSLOTS slots away from
565 the address ADDR. NSLOTS may be positive or negative. */
567 rse_address_add(CORE_ADDR addr, int nslots)
570 int mandatory_nat_slots = nslots / 63;
571 int direction = nslots < 0 ? -1 : 1;
573 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
575 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
576 new_addr += 8 * direction;
578 if (IS_NaT_COLLECTION_ADDR(new_addr))
579 new_addr += 8 * direction;
584 /* The IA-64 frame chain is a bit odd. We won't always have a frame
585 pointer, so we use the SP value as the FP for the purpose of
586 creating a frame. There is sometimes a register (not fixed) which
587 is used as a frame pointer. When this register exists, it is not
588 especially hard to determine which one is being used. It isn't
589 even really hard to compute the frame chain, but it can be
590 computationally expensive. So, instead of making life difficult
591 (and slow), we pick a more convenient representation of the frame
592 chain, knowing that we'll have to make some small adjustments
593 in other places. (E.g, note that read_fp() and write_fp() are
594 actually read_sp() and write_sp() below in ia64_gdbarch_init()
597 Okay, so what is the frame chain exactly? It'll be the SP value
598 at the time that the function in question was entered.
600 Note that this *should* actually the frame pointer for the current
601 function! But as I note above, if we were to attempt to find the
602 address of the beginning of the previous frame, we'd waste a lot
603 of cycles for no good reason. So instead, we simply choose to
604 represent the frame chain as the end of the previous frame instead
608 ia64_frame_chain (struct frame_info *frame)
610 FRAME_INIT_SAVED_REGS (frame);
612 if (frame->saved_regs[IA64_VFP_REGNUM])
613 return read_memory_integer (frame->saved_regs[IA64_VFP_REGNUM], 8);
615 return frame->frame + frame->extra_info->mem_stack_frame_size;
619 ia64_frame_saved_pc (struct frame_info *frame)
621 FRAME_INIT_SAVED_REGS (frame);
623 if (frame->saved_regs[IA64_VRAP_REGNUM])
624 return read_memory_integer (frame->saved_regs[IA64_VRAP_REGNUM], 8);
625 else /* either frameless, or not far enough along in the prologue... */
626 return ia64_saved_pc_after_call (frame);
629 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
630 || (8 <= (_regnum_) && (_regnum_) <= 11) \
631 || (14 <= (_regnum_) && (_regnum_) <= 31))
632 #define imm9(_instr_) \
633 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
634 | (((_instr_) & 0x00008000000LL) >> 20) \
635 | (((_instr_) & 0x00000001fc0LL) >> 6))
638 examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
641 CORE_ADDR last_prologue_pc = pc;
645 int do_fsr_stuff = 0;
650 int unat_save_reg = 0;
652 int mem_stack_frame_size = 0;
654 CORE_ADDR spill_addr = 0;
656 if (frame && !frame->saved_regs)
658 frame_saved_regs_zalloc (frame);
664 && frame->extra_info->after_prologue != 0
665 && frame->extra_info->after_prologue <= lim_pc)
666 return frame->extra_info->after_prologue;
668 /* Must start with an alloc instruction */
669 next_pc = fetch_instruction (pc, &it, &instr);
670 if (pc < lim_pc && next_pc
671 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
674 int sor = (int) ((instr & 0x00078000000LL) >> 27);
675 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
676 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
677 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
678 we could compare against the size given to us via the cfm as
679 either a sanity check or possibly to see if the frame has been
680 changed by a later alloc instruction... */
681 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
683 last_prologue_pc = next_pc;
687 pc = lim_pc; /* We're done early */
689 /* Loop, looking for prologue instructions, keeping track of
690 where preserved registers were spilled. */
693 next_pc = fetch_instruction (pc, &it, &instr);
697 if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
700 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
701 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
702 int qp = (int) (instr & 0x0000000003f);
704 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
707 last_prologue_pc = next_pc;
710 else if ((it == I || it == M)
711 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
713 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
714 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
715 | ((instr & 0x001f8000000LL) >> 20)
716 | ((instr & 0x000000fe000LL) >> 13));
717 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
718 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
719 int qp = (int) (instr & 0x0000000003fLL);
721 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
725 last_prologue_pc = next_pc;
727 else if (qp == 0 && rN == 12 && rM == 12)
729 /* adds r12, -mem_stack_frame_size, r12 */
730 mem_stack_frame_size -= imm;
731 last_prologue_pc = next_pc;
733 else if (qp == 0 && rN == 2
734 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
736 /* adds r2, spilloffset, rFramePointer
738 adds r2, spilloffset, r12
740 Get ready for stf.spill or st8.spill instructions.
741 The address to start spilling at is loaded into r2.
742 FIXME: Why r2? That's what gcc currently uses; it
743 could well be different for other compilers. */
745 /* Hmm... whether or not this will work will depend on
746 where the pc is. If it's still early in the prologue
747 this'll be wrong. FIXME */
748 spill_addr = (frame ? frame->frame : 0)
749 + (rM == 12 ? 0 : mem_stack_frame_size)
752 last_prologue_pc = next_pc;
756 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
757 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
759 /* stf.spill [rN] = fM, imm9
761 stf.spill [rN] = fM */
763 int imm = imm9(instr);
764 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
765 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
766 int qp = (int) (instr & 0x0000000003fLL);
767 if (qp == 0 && rN == spill_reg && spill_addr != 0
768 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
771 frame->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
773 if ((instr & 0x1efc0000000) == 0x0eec0000000)
776 spill_addr = 0; /* last one; must be done */
777 last_prologue_pc = next_pc;
780 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
781 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
787 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
788 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
789 int qp = (int) (instr & 0x0000000003fLL);
790 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
792 /* We have something like "mov.m r3 = ar.unat". Remember the
793 r3 (or whatever) and watch for a store of this register... */
795 last_prologue_pc = next_pc;
798 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
801 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
802 int qp = (int) (instr & 0x0000000003fLL);
803 if (qp == 0 && isScratch (rN))
806 last_prologue_pc = next_pc;
810 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
811 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
815 st8 [rN] = rM, imm9 */
816 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
817 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
818 int qp = (int) (instr & 0x0000000003fLL);
819 if (qp == 0 && rN == spill_reg && spill_addr != 0
820 && (rM == unat_save_reg || rM == pr_save_reg))
822 /* We've found a spill of either the UNAT register or the PR
823 register. (Well, not exactly; what we've actually found is
824 a spill of the register that UNAT or PR was moved to).
825 Record that fact and move on... */
826 if (rM == unat_save_reg)
828 /* Track UNAT register */
830 frame->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
835 /* Track PR register */
837 frame->saved_regs[IA64_PR_REGNUM] = spill_addr;
840 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
841 /* st8 [rN] = rM, imm9 */
842 spill_addr += imm9(instr);
844 spill_addr = 0; /* must be done spilling */
845 last_prologue_pc = next_pc;
849 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
850 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
852 /* st8.spill [rN] = rM
854 st8.spill [rN] = rM, imm9 */
855 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
856 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
857 int qp = (int) (instr & 0x0000000003fLL);
858 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
860 /* We've found a spill of one of the preserved general purpose
861 regs. Record the spill address and advance the spill
862 register if appropriate. */
864 frame->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
865 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
866 /* st8.spill [rN] = rM, imm9 */
867 spill_addr += imm9(instr);
869 spill_addr = 0; /* Done spilling */
870 last_prologue_pc = next_pc;
873 else if (it == B || ((instr & 0x3fLL) != 0LL))
883 for (i = 0, addr = frame->extra_info->bsp;
884 i < frame->extra_info->sof;
887 if (IS_NaT_COLLECTION_ADDR (addr))
891 frame->saved_regs[IA64_GR32_REGNUM + i] = addr;
894 frame->saved_regs[IA64_CFM_REGNUM] = addr;
896 frame->saved_regs[IA64_VRAP_REGNUM] = addr;
898 frame->saved_regs[IA64_VFP_REGNUM] = addr;
902 if (frame && frame->extra_info) {
903 frame->extra_info->after_prologue = last_prologue_pc;
904 frame->extra_info->mem_stack_frame_size = mem_stack_frame_size;
905 frame->extra_info->fp_reg = fp_reg;
908 return last_prologue_pc;
912 ia64_skip_prologue (CORE_ADDR pc)
914 return examine_prologue (pc, pc+1024, 0);
918 ia64_frame_init_saved_regs (struct frame_info *frame)
920 CORE_ADDR func_start;
922 if (frame->saved_regs)
925 func_start = get_pc_function_start (frame->pc);
926 examine_prologue (func_start, frame->pc, frame);
930 ia64_find_saved_register (frame, regnum)
931 struct frame_info *frame;
934 register CORE_ADDR addr = 0;
936 if ((IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
937 || regnum == IA64_VFP_REGNUM
938 || regnum == IA64_VRAP_REGNUM)
940 FRAME_INIT_SAVED_REGS (frame);
941 return frame->saved_regs[regnum];
943 else if (regnum == IA64_IP_REGNUM && frame->next)
945 FRAME_INIT_SAVED_REGS (frame->next);
946 return frame->next->saved_regs[IA64_VRAP_REGNUM];
950 struct frame_info *frame1 = NULL;
954 frame1 = get_prev_frame (frame1);
955 if (frame1 == 0 || frame1 == frame)
957 FRAME_INIT_SAVED_REGS (frame1);
958 if (frame1->saved_regs[regnum])
959 addr = frame1->saved_regs[regnum];
967 ia64_get_saved_register (char *raw_buffer,
970 struct frame_info *frame,
972 enum lval_type *lval)
976 if (!target_has_registers)
977 error ("No registers.");
979 if (optimized != NULL)
981 addr = ia64_find_saved_register (frame, regnum);
986 if (regnum == SP_REGNUM)
988 if (raw_buffer != NULL)
990 /* Put it back in target format. */
991 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), (LONGEST) addr);
997 if (raw_buffer != NULL)
998 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1000 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1002 /* r32 - r127 must be fetchable via memory. If they aren't,
1003 then the register is unavailable */
1007 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1009 else if (regnum == IA64_IP_REGNUM)
1014 /* This case will normally be handled above, except when it's
1015 frameless or we haven't advanced far enough into the prologue
1016 of the top frame to save the register. */
1017 addr = REGISTER_BYTE (regnum);
1019 *lval = lval_register;
1020 pc = ia64_saved_pc_after_call (frame);
1029 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1031 else if (regnum == SP_REGNUM && frame->next)
1033 /* Handle SP values for all frames but the topmost. */
1037 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
1039 else if (regnum == IA64_BSP_REGNUM)
1044 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1045 frame->extra_info->bsp);
1047 else if (regnum == IA64_VFP_REGNUM)
1049 /* If the function in question uses an automatic register (r32-r127)
1050 for the frame pointer, it'll be found by ia64_find_saved_register()
1051 above. If the function lacks one of these frame pointers, we can
1052 still provide a value since we know the size of the frame */
1053 CORE_ADDR vfp = frame->frame + frame->extra_info->mem_stack_frame_size;
1057 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1059 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1061 char pr_raw_buffer[MAX_REGISTER_RAW_SIZE];
1063 enum lval_type pr_lval;
1066 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1067 frame, IA64_PR_REGNUM, &pr_lval);
1068 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1069 regnum - IA64_PR0_REGNUM, 1);
1070 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
1075 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1077 char unat_raw_buffer[MAX_REGISTER_RAW_SIZE];
1079 enum lval_type unat_lval;
1080 CORE_ADDR unat_addr;
1082 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1083 frame, IA64_UNAT_REGNUM, &unat_lval);
1084 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1085 regnum - IA64_NAT0_REGNUM, 1);
1086 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1092 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1095 /* Find address of general register corresponding to nat bit we're
1098 ia64_find_saved_register (frame,
1099 regnum - IA64_NAT0_REGNUM + IA64_GR0_REGNUM);
1102 /* Compute address of nat collection bits */
1103 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1104 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1105 CORE_ADDR nat_collection;
1107 /* If our nat collection address is bigger than bsp, we have to get
1108 the nat collection from rnat. Otherwise, we fetch the nat
1109 collection from the computed address. */
1110 if (nat_addr >= bsp)
1111 nat_collection = read_register (IA64_RNAT_REGNUM);
1113 nat_collection = read_memory_integer (nat_addr, 8);
1114 nat_bit = (gr_addr >> 3) & 0x3f;
1115 natval = (nat_collection >> nat_bit) & 1;
1117 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
1125 *lval = lval_register;
1126 addr = REGISTER_BYTE (regnum);
1127 if (raw_buffer != NULL)
1128 read_register_gen (regnum, raw_buffer);
1134 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1135 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1136 and TYPE is the type (which is known to be struct, union or array). */
1138 ia64_use_struct_convention (int gcc_p, struct type *type)
1140 /* FIXME: Need to check for HFAs; structures containing (only) up to 8
1141 floating point values of the same size are returned in floating point
1143 return TYPE_LENGTH (type) > 32;
1147 ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1149 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1150 ia64_register_convert_to_virtual (IA64_FR8_REGNUM, type,
1151 ®buf[REGISTER_BYTE (IA64_FR8_REGNUM)], valbuf);
1153 memcpy (valbuf, ®buf[REGISTER_BYTE (IA64_GR8_REGNUM)], TYPE_LENGTH (type));
1156 /* FIXME: Turn this into a stack of some sort. Unfortunately, something
1157 like this is necessary though since the IA-64 calling conventions specify
1158 that r8 is not preserved. */
1159 static CORE_ADDR struct_return_address;
1162 ia64_extract_struct_value_address (char *regbuf)
1164 /* FIXME: See above. */
1165 return struct_return_address;
1169 ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1171 /* FIXME: See above. */
1172 /* Note that most of the work was done in ia64_push_arguments() */
1173 struct_return_address = addr;
1177 ia64_frameless_function_invocation (struct frame_info *frame)
1179 /* FIXME: Implement */
1184 ia64_saved_pc_after_call (struct frame_info *frame)
1186 return read_register (IA64_BR0_REGNUM);
1190 ia64_frame_args_address (struct frame_info *frame)
1192 /* frame->frame points at the SP for this frame; But we want the start
1193 of the frame, not the end. Calling frame chain will get his for us. */
1194 return ia64_frame_chain (frame);
1198 ia64_frame_locals_address (struct frame_info *frame)
1200 /* frame->frame points at the SP for this frame; But we want the start
1201 of the frame, not the end. Calling frame chain will get his for us. */
1202 return ia64_frame_chain (frame);
1206 ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1210 frame->extra_info = (struct frame_extra_info *)
1211 frame_obstack_alloc (sizeof (struct frame_extra_info));
1213 if (frame->next == 0)
1215 bsp = read_register (IA64_BSP_REGNUM);
1216 cfm = read_register (IA64_CFM_REGNUM);
1221 struct frame_info *frn = frame->next;
1224 FRAME_INIT_SAVED_REGS (frn);
1226 if (frn->saved_regs[IA64_CFM_REGNUM] != 0)
1227 cfm = read_memory_integer (frn->saved_regs[IA64_CFM_REGNUM], 8);
1229 cfm = read_register (IA64_CFM_REGNUM);
1231 bsp = frn->extra_info->bsp;
1233 frame->extra_info->cfm = cfm;
1234 frame->extra_info->sof = cfm & 0x7f;
1235 frame->extra_info->sol = (cfm >> 7) & 0x7f;
1236 if (frame->next == 0)
1237 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sof);
1239 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sol);
1241 frame->extra_info->after_prologue = 0;
1242 frame->extra_info->mem_stack_frame_size = -1; /* Not yet determined */
1243 frame->extra_info->fp_reg = 0;
1246 #define ROUND_UP(n,a) (((n)+(a)-1) & ~((a)-1))
1249 ia64_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
1250 int struct_return, CORE_ADDR struct_addr)
1256 int nslots, rseslots, memslots, slotnum;
1258 CORE_ADDR bsp, cfm, pfs, new_bsp;
1261 /* Count the number of slots needed for the arguments */
1262 for (argno = 0; argno < nargs; argno++)
1265 type = check_typedef (VALUE_TYPE (arg));
1266 len = TYPE_LENGTH (type);
1268 /* FIXME: This is crude and it is wrong (IMO), but it matches
1269 what gcc does, I think. */
1270 if (len > 8 && (nslots & 1))
1273 nslots += (len + 7) / 8;
1276 rseslots = (nslots > 8) ? 8 : nslots;
1277 memslots = nslots - rseslots;
1279 cfm = read_register (IA64_CFM_REGNUM);
1281 bsp = read_register (IA64_BSP_REGNUM);
1282 bsp = rse_address_add (bsp, cfm & 0x7f);
1283 new_bsp = rse_address_add (bsp, rseslots);
1284 write_register (IA64_BSP_REGNUM, new_bsp);
1286 pfs = read_register (IA64_PFS_REGNUM);
1287 pfs &= 0xc000000000000000LL;
1288 pfs |= (cfm & 0xffffffffffffLL);
1289 write_register (IA64_PFS_REGNUM, pfs);
1291 cfm &= 0xc000000000000000LL;
1293 write_register (IA64_CFM_REGNUM, cfm);
1297 sp = sp - 16 - memslots * 8;
1298 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1301 floatreg = IA64_FR8_REGNUM;
1302 for (argno = 0; argno < nargs; argno++)
1305 type = check_typedef (VALUE_TYPE (arg));
1306 len = TYPE_LENGTH (type);
1307 if (len > 8 && (slotnum & 1))
1314 memset (val_buf, 0, 8);
1315 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1317 if (slotnum < rseslots)
1318 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1320 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1326 if (TYPE_CODE (type) == TYPE_CODE_FLT && floatreg < IA64_FR16_REGNUM)
1328 ia64_register_convert_to_raw (type, floatreg, VALUE_CONTENTS (arg),
1329 ®isters[REGISTER_BYTE (floatreg)]);
1336 store_address (®isters[REGISTER_BYTE (IA64_GR8_REGNUM)],
1337 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1342 target_store_registers (-1);
1344 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1345 to be defined to call generic_save_dummy_frame_tos(). But at the
1346 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1347 I chose to put this call here instead of using the old mechanisms.
1348 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1351 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1353 to ia64_gdbarch_init() and remove the line below. */
1354 generic_save_dummy_frame_tos (sp);
1360 ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1362 struct partial_symtab *pst;
1364 /* Attempt to determine and set global pointer (r1) for this pc.
1366 This rather nasty bit of code searchs for the .dynamic section
1367 in the objfile corresponding to the pc of the function we're
1368 trying to call. Once it finds the addresses at which the .dynamic
1369 section lives in the child process, it scans the Elf64_Dyn entries
1370 for a DT_PLTGOT tag. If it finds one of these, the corresponding
1371 d_un.d_ptr value is the global pointer. */
1372 pst = find_pc_psymtab (pc);
1375 struct obj_section *osect;
1377 ALL_OBJFILE_OSECTIONS (pst->objfile, osect)
1379 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1383 if (osect < pst->objfile->sections_end)
1388 while (addr < osect->endaddr)
1394 status = target_read_memory (addr, buf, sizeof (buf));
1397 tag = extract_signed_integer (buf, sizeof (buf));
1399 if (tag == DT_PLTGOT)
1401 CORE_ADDR global_pointer;
1403 status = target_read_memory (addr + 8, buf, sizeof (buf));
1406 global_pointer = extract_address (buf, sizeof (buf));
1409 write_register (IA64_GR1_REGNUM, global_pointer);
1421 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1426 ia64_store_return_value (struct type *type, char *valbuf)
1428 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1430 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
1431 ®isters[REGISTER_BYTE (IA64_FR8_REGNUM)]);
1432 target_store_registers (IA64_FR8_REGNUM);
1435 write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1436 valbuf, TYPE_LENGTH (type));
1440 ia64_pop_frame (void)
1442 generic_pop_current_frame (ia64_pop_frame_regular);
1446 ia64_pop_frame_regular (struct frame_info *frame)
1449 CORE_ADDR bsp, cfm, pfs;
1451 FRAME_INIT_SAVED_REGS (frame);
1453 for (regno = 0; regno < ia64_num_regs; regno++)
1455 if (frame->saved_regs[regno]
1456 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1457 && regno != pc_regnum
1458 && regno != sp_regnum
1459 && regno != IA64_PFS_REGNUM
1460 && regno != IA64_CFM_REGNUM
1461 && regno != IA64_BSP_REGNUM
1462 && regno != IA64_BSPSTORE_REGNUM)
1464 write_register (regno,
1465 read_memory_integer (frame->saved_regs[regno],
1466 REGISTER_RAW_SIZE (regno)));
1470 write_register (sp_regnum, FRAME_CHAIN (frame));
1471 write_pc (FRAME_SAVED_PC (frame));
1473 cfm = read_register (IA64_CFM_REGNUM);
1475 if (frame->saved_regs[IA64_PFS_REGNUM])
1477 pfs = read_memory_integer (frame->saved_regs[IA64_PFS_REGNUM],
1478 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
1481 pfs = read_register (IA64_PFS_REGNUM);
1483 /* Compute the new bsp by *adding* the difference between the
1484 size of the frame and the size of the locals (both wrt the
1485 frame that we're going back to). This seems kind of strange,
1486 especially since it seems like we ought to be subtracting the
1487 size of the locals... and we should; but the linux kernel
1488 wants bsp to be set at the end of all used registers. It's
1489 likely that this code will need to be revised to accomodate
1490 other operating systems. */
1491 bsp = rse_address_add (frame->extra_info->bsp,
1492 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
1493 write_register (IA64_BSP_REGNUM, bsp);
1495 /* FIXME: What becomes of the epilog count in the PFS? */
1496 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
1497 write_register (IA64_CFM_REGNUM, cfm);
1499 flush_cached_frames ();
1503 ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
1504 CORE_ADDR *targ_addr, int *targ_len)
1506 *targ_addr = memaddr;
1507 *targ_len = nr_bytes;
1510 static struct gdbarch *
1511 ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1513 struct gdbarch *gdbarch;
1515 arches = gdbarch_list_lookup_by_info (arches, &info);
1517 return arches->gdbarch;
1519 gdbarch = gdbarch_alloc (&info, NULL);
1521 set_gdbarch_short_bit (gdbarch, 16);
1522 set_gdbarch_int_bit (gdbarch, 32);
1523 set_gdbarch_long_bit (gdbarch, 64);
1524 set_gdbarch_long_long_bit (gdbarch, 64);
1525 set_gdbarch_float_bit (gdbarch, 32);
1526 set_gdbarch_double_bit (gdbarch, 64);
1527 set_gdbarch_long_double_bit (gdbarch, 64);
1528 set_gdbarch_ptr_bit (gdbarch, 64);
1530 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
1531 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
1532 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
1533 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
1535 set_gdbarch_register_name (gdbarch, ia64_register_name);
1536 set_gdbarch_register_size (gdbarch, 8);
1537 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
1538 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
1539 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
1540 set_gdbarch_max_register_raw_size (gdbarch, 16);
1541 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
1542 set_gdbarch_max_register_virtual_size (gdbarch, 16);
1543 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
1545 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
1547 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1548 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
1550 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
1552 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
1553 set_gdbarch_frame_chain_valid (gdbarch, func_frame_chain_valid);
1554 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
1556 set_gdbarch_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
1557 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
1559 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
1560 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
1561 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
1563 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
1564 set_gdbarch_extract_return_value (gdbarch, ia64_extract_return_value);
1566 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
1567 set_gdbarch_store_return_value (gdbarch, ia64_store_return_value);
1568 set_gdbarch_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
1570 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
1571 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
1572 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
1573 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
1574 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
1576 /* Settings for calling functions in the inferior. */
1577 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1578 set_gdbarch_call_dummy_length (gdbarch, 0);
1579 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
1580 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
1581 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
1583 set_gdbarch_call_dummy_p (gdbarch, 1);
1584 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
1585 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
1586 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1587 set_gdbarch_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
1588 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
1589 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
1591 /* We won't necessarily have a frame pointer and even if we do,
1592 it winds up being extraordinarly messy when attempting to find
1593 the frame chain. So for the purposes of creating frames (which
1594 is all read_fp() is used for), simply use the stack pointer value
1596 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
1597 set_gdbarch_write_fp (gdbarch, generic_target_write_sp);
1599 /* Settings that should be unnecessary. */
1600 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1602 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
1603 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
1605 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1606 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
1607 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1608 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1609 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
1610 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1611 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1612 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1614 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1615 set_gdbarch_function_start_offset (gdbarch, 0);
1617 set_gdbarch_remote_translate_xfer_address (
1618 gdbarch, ia64_remote_translate_xfer_address);
1624 _initialize_ia64_tdep (void)
1626 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
1628 tm_print_insn = print_insn_ia64;
1629 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;