1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "arch-utils.h"
25 #include "floatformat.h"
28 #include "reggroups.h"
30 #include "frame-base.h"
31 #include "frame-unwind.h"
34 #include "gdb_assert.h"
36 #include "elf/common.h" /* for DT_PLTGOT value */
41 #include "ia64-tdep.h"
44 #ifdef HAVE_LIBUNWIND_IA64_H
45 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
46 #include "libunwind-frame.h"
47 #include "libunwind-ia64.h"
49 /* Note: KERNEL_START is supposed to be an address which is not going
50 to ever contain any valid unwind info. For ia64 linux, the choice
51 of 0xc000000000000000 is fairly safe since that's uncached space.
53 We use KERNEL_START as follows: after obtaining the kernel's
54 unwind table via getunwind(), we project its unwind data into
55 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
56 when ia64_access_mem() sees a memory access to this
57 address-range, we redirect it to ktab instead.
59 None of this hackery is needed with a modern kernel/libcs
60 which uses the kernel virtual DSO to provide access to the
61 kernel's unwind info. In that case, ktab_size remains 0 and
62 hence the value of KERNEL_START doesn't matter. */
64 #define KERNEL_START 0xc000000000000000ULL
66 static size_t ktab_size = 0;
67 struct ia64_table_entry
69 uint64_t start_offset;
74 static struct ia64_table_entry *ktab = NULL;
78 /* An enumeration of the different IA-64 instruction types. */
80 typedef enum instruction_type
82 A, /* Integer ALU ; I-unit or M-unit */
83 I, /* Non-ALU integer; I-unit */
84 M, /* Memory ; M-unit */
85 F, /* Floating-point ; F-unit */
86 B, /* Branch ; B-unit */
87 L, /* Extended (L+X) ; I-unit */
88 X, /* Extended (L+X) ; I-unit */
89 undefined /* undefined or reserved */
92 /* We represent IA-64 PC addresses as the value of the instruction
93 pointer or'd with some bit combination in the low nibble which
94 represents the slot number in the bundle addressed by the
95 instruction pointer. The problem is that the Linux kernel
96 multiplies its slot numbers (for exceptions) by one while the
97 disassembler multiplies its slot numbers by 6. In addition, I've
98 heard it said that the simulator uses 1 as the multiplier.
100 I've fixed the disassembler so that the bytes_per_line field will
101 be the slot multiplier. If bytes_per_line comes in as zero, it
102 is set to six (which is how it was set up initially). -- objdump
103 displays pretty disassembly dumps with this value. For our purposes,
104 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
105 never want to also display the raw bytes the way objdump does. */
107 #define SLOT_MULTIPLIER 1
109 /* Length in bytes of an instruction bundle */
111 #define BUNDLE_LEN 16
113 /* See the saved memory layout comment for ia64_memory_insert_breakpoint. */
115 #if BREAKPOINT_MAX < BUNDLE_LEN - 2
116 # error "BREAKPOINT_MAX < BUNDLE_LEN - 2"
119 static gdbarch_init_ftype ia64_gdbarch_init;
121 static gdbarch_register_name_ftype ia64_register_name;
122 static gdbarch_register_type_ftype ia64_register_type;
123 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
124 static gdbarch_skip_prologue_ftype ia64_skip_prologue;
125 static struct type *is_float_or_hfa_type (struct type *t);
126 static CORE_ADDR ia64_find_global_pointer (struct gdbarch *gdbarch,
129 #define NUM_IA64_RAW_REGS 462
131 static int sp_regnum = IA64_GR12_REGNUM;
132 static int fp_regnum = IA64_VFP_REGNUM;
133 static int lr_regnum = IA64_VRAP_REGNUM;
135 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
136 they may not be accessible via the ptrace register get/set interfaces. */
137 enum pseudo_regs { FIRST_PSEUDO_REGNUM = NUM_IA64_RAW_REGS, VBOF_REGNUM = IA64_NAT127_REGNUM + 1, V32_REGNUM,
138 V127_REGNUM = V32_REGNUM + 95,
139 VP0_REGNUM, VP16_REGNUM = VP0_REGNUM + 16, VP63_REGNUM = VP0_REGNUM + 63, LAST_PSEUDO_REGNUM };
141 /* Array of register names; There should be ia64_num_regs strings in
144 static char *ia64_register_names[] =
145 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
146 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
147 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
148 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
156 "", "", "", "", "", "", "", "",
157 "", "", "", "", "", "", "", "",
158 "", "", "", "", "", "", "", "",
159 "", "", "", "", "", "", "", "",
160 "", "", "", "", "", "", "", "",
162 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
163 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
164 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
165 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
166 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
167 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
168 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
169 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
170 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
171 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
172 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
173 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
174 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
175 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
176 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
177 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "",
188 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
192 "pr", "ip", "psr", "cfm",
194 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
195 "", "", "", "", "", "", "", "",
196 "rsc", "bsp", "bspstore", "rnat",
198 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
199 "ccv", "", "", "", "unat", "", "", "",
200 "fpsr", "", "", "", "itc",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
205 "", "", "", "", "", "", "", "", "", "",
206 "", "", "", "", "", "", "", "", "", "",
207 "", "", "", "", "", "", "", "", "", "",
208 "", "", "", "", "", "", "", "", "", "",
209 "", "", "", "", "", "", "", "", "", "",
211 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
212 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
213 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
214 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
215 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
216 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
217 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
218 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
219 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
220 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
221 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
222 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
223 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
224 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
225 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
226 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
230 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
231 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
232 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
233 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
234 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
235 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
236 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
237 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
238 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
239 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
240 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
241 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
243 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
244 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
245 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
246 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
247 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
248 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
249 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
250 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
253 struct ia64_frame_cache
255 CORE_ADDR base; /* frame pointer base for frame */
256 CORE_ADDR pc; /* function start pc for frame */
257 CORE_ADDR saved_sp; /* stack pointer for frame */
258 CORE_ADDR bsp; /* points at r32 for the current frame */
259 CORE_ADDR cfm; /* cfm value for current frame */
260 CORE_ADDR prev_cfm; /* cfm value for previous frame */
262 int sof; /* Size of frame (decoded from cfm value) */
263 int sol; /* Size of locals (decoded from cfm value) */
264 int sor; /* Number of rotating registers. (decoded from cfm value) */
265 CORE_ADDR after_prologue;
266 /* Address of first instruction after the last
267 prologue instruction; Note that there may
268 be instructions from the function's body
269 intermingled with the prologue. */
270 int mem_stack_frame_size;
271 /* Size of the memory stack frame (may be zero),
272 or -1 if it has not been determined yet. */
273 int fp_reg; /* Register number (if any) used a frame pointer
274 for this frame. 0 if no register is being used
275 as the frame pointer. */
277 /* Saved registers. */
278 CORE_ADDR saved_regs[NUM_IA64_RAW_REGS];
283 floatformat_valid (const struct floatformat *fmt, const void *from)
288 static const struct floatformat floatformat_ia64_ext =
290 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
291 floatformat_intbit_yes, "floatformat_ia64_ext", floatformat_valid, NULL
294 static const struct floatformat *floatformats_ia64_ext[2] =
296 &floatformat_ia64_ext,
297 &floatformat_ia64_ext
301 ia64_ext_type (struct gdbarch *gdbarch)
303 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
305 if (!tdep->ia64_ext_type)
307 = arch_float_type (gdbarch, 128, "builtin_type_ia64_ext",
308 floatformats_ia64_ext);
310 return tdep->ia64_ext_type;
314 ia64_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
315 struct reggroup *group)
320 if (group == all_reggroup)
322 vector_p = TYPE_VECTOR (register_type (gdbarch, regnum));
323 float_p = TYPE_CODE (register_type (gdbarch, regnum)) == TYPE_CODE_FLT;
324 raw_p = regnum < NUM_IA64_RAW_REGS;
325 if (group == float_reggroup)
327 if (group == vector_reggroup)
329 if (group == general_reggroup)
330 return (!vector_p && !float_p);
331 if (group == save_reggroup || group == restore_reggroup)
337 ia64_register_name (struct gdbarch *gdbarch, int reg)
339 return ia64_register_names[reg];
343 ia64_register_type (struct gdbarch *arch, int reg)
345 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
346 return ia64_ext_type (arch);
348 return builtin_type (arch)->builtin_long;
352 ia64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
354 if (reg >= IA64_GR32_REGNUM && reg <= IA64_GR127_REGNUM)
355 return V32_REGNUM + (reg - IA64_GR32_REGNUM);
360 /* Extract ``len'' bits from an instruction bundle starting at
364 extract_bit_field (const char *bundle, int from, int len)
366 long long result = 0LL;
368 int from_byte = from / 8;
369 int to_byte = to / 8;
370 unsigned char *b = (unsigned char *) bundle;
376 if (from_byte == to_byte)
377 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
378 result = c >> (from % 8);
379 lshift = 8 - (from % 8);
381 for (i = from_byte+1; i < to_byte; i++)
383 result |= ((long long) b[i]) << lshift;
387 if (from_byte < to_byte && (to % 8 != 0))
390 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
391 result |= ((long long) c) << lshift;
397 /* Replace the specified bits in an instruction bundle */
400 replace_bit_field (char *bundle, long long val, int from, int len)
403 int from_byte = from / 8;
404 int to_byte = to / 8;
405 unsigned char *b = (unsigned char *) bundle;
408 if (from_byte == to_byte)
410 unsigned char left, right;
412 left = (c >> (to % 8)) << (to % 8);
413 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
414 c = (unsigned char) (val & 0xff);
415 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
423 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
424 c = c | (val << (from % 8));
426 val >>= 8 - from % 8;
428 for (i = from_byte+1; i < to_byte; i++)
437 unsigned char cv = (unsigned char) val;
439 c = c >> (to % 8) << (to % 8);
440 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
446 /* Return the contents of slot N (for N = 0, 1, or 2) in
447 and instruction bundle */
450 slotN_contents (char *bundle, int slotnum)
452 return extract_bit_field (bundle, 5+41*slotnum, 41);
455 /* Store an instruction in an instruction bundle */
458 replace_slotN_contents (char *bundle, long long instr, int slotnum)
460 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
463 static const enum instruction_type template_encoding_table[32][3] =
465 { M, I, I }, /* 00 */
466 { M, I, I }, /* 01 */
467 { M, I, I }, /* 02 */
468 { M, I, I }, /* 03 */
469 { M, L, X }, /* 04 */
470 { M, L, X }, /* 05 */
471 { undefined, undefined, undefined }, /* 06 */
472 { undefined, undefined, undefined }, /* 07 */
473 { M, M, I }, /* 08 */
474 { M, M, I }, /* 09 */
475 { M, M, I }, /* 0A */
476 { M, M, I }, /* 0B */
477 { M, F, I }, /* 0C */
478 { M, F, I }, /* 0D */
479 { M, M, F }, /* 0E */
480 { M, M, F }, /* 0F */
481 { M, I, B }, /* 10 */
482 { M, I, B }, /* 11 */
483 { M, B, B }, /* 12 */
484 { M, B, B }, /* 13 */
485 { undefined, undefined, undefined }, /* 14 */
486 { undefined, undefined, undefined }, /* 15 */
487 { B, B, B }, /* 16 */
488 { B, B, B }, /* 17 */
489 { M, M, B }, /* 18 */
490 { M, M, B }, /* 19 */
491 { undefined, undefined, undefined }, /* 1A */
492 { undefined, undefined, undefined }, /* 1B */
493 { M, F, B }, /* 1C */
494 { M, F, B }, /* 1D */
495 { undefined, undefined, undefined }, /* 1E */
496 { undefined, undefined, undefined }, /* 1F */
499 /* Fetch and (partially) decode an instruction at ADDR and return the
500 address of the next instruction to fetch. */
503 fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
505 char bundle[BUNDLE_LEN];
506 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
510 /* Warn about slot numbers greater than 2. We used to generate
511 an error here on the assumption that the user entered an invalid
512 address. But, sometimes GDB itself requests an invalid address.
513 This can (easily) happen when execution stops in a function for
514 which there are no symbols. The prologue scanner will attempt to
515 find the beginning of the function - if the nearest symbol
516 happens to not be aligned on a bundle boundary (16 bytes), the
517 resulting starting address will cause GDB to think that the slot
520 So we warn about it and set the slot number to zero. It is
521 not necessarily a fatal condition, particularly if debugging
522 at the assembly language level. */
525 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
526 "Using slot 0 instead"));
532 val = target_read_memory (addr, bundle, BUNDLE_LEN);
537 *instr = slotN_contents (bundle, slotnum);
538 template = extract_bit_field (bundle, 0, 5);
539 *it = template_encoding_table[(int)template][slotnum];
541 if (slotnum == 2 || (slotnum == 1 && *it == L))
544 addr += (slotnum + 1) * SLOT_MULTIPLIER;
549 /* There are 5 different break instructions (break.i, break.b,
550 break.m, break.f, and break.x), but they all have the same
551 encoding. (The five bit template in the low five bits of the
552 instruction bundle distinguishes one from another.)
554 The runtime architecture manual specifies that break instructions
555 used for debugging purposes must have the upper two bits of the 21
556 bit immediate set to a 0 and a 1 respectively. A breakpoint
557 instruction encodes the most significant bit of its 21 bit
558 immediate at bit 36 of the 41 bit instruction. The penultimate msb
559 is at bit 25 which leads to the pattern below.
561 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
562 it turns out that 0x80000 was used as the syscall break in the early
563 simulators. So I changed the pattern slightly to do "break.i 0x080001"
564 instead. But that didn't work either (I later found out that this
565 pattern was used by the simulator that I was using.) So I ended up
566 using the pattern seen below.
568 SHADOW_CONTENTS has byte-based addressing (PLACED_ADDRESS and SHADOW_LEN)
569 while we need bit-based addressing as the instructions length is 41 bits and
570 we must not modify/corrupt the adjacent slots in the same bundle.
571 Fortunately we may store larger memory incl. the adjacent bits with the
572 original memory content (not the possibly already stored breakpoints there).
573 We need to be careful in ia64_memory_remove_breakpoint to always restore
574 only the specific bits of this instruction ignoring any adjacent stored
577 We use the original addressing with the low nibble in the range <0..2> which
578 gets incorrectly interpreted by generic non-ia64 breakpoint_restore_shadows
579 as the direct byte offset of SHADOW_CONTENTS. We store whole BUNDLE_LEN
580 bytes just without these two possibly skipped bytes to not to exceed to the
583 If we would like to store the whole bundle to SHADOW_CONTENTS we would have
584 to store already the base address (`address & ~0x0f') into PLACED_ADDRESS.
585 In such case there is no other place where to store
586 SLOTNUM (`adress & 0x0f', value in the range <0..2>). We need to know
587 SLOTNUM in ia64_memory_remove_breakpoint.
589 ia64 16-byte bundle layout:
590 | 5 bits | slot 0 with 41 bits | slot 1 with 41 bits | slot 2 with 41 bits |
592 The current addressing used by the code below:
593 original PC placed_address placed_size required covered
594 == bp_tgt->shadow_len reqd \subset covered
595 0xABCDE0 0xABCDE0 0xE <0x0...0x5> <0x0..0xD>
596 0xABCDE1 0xABCDE1 0xE <0x5...0xA> <0x1..0xE>
597 0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF>
599 `objdump -d' and some other tools show a bit unjustified offsets:
600 original PC byte where starts the instruction objdump offset
601 0xABCDE0 0xABCDE0 0xABCDE0
602 0xABCDE1 0xABCDE5 0xABCDE6
603 0xABCDE2 0xABCDEA 0xABCDEC
606 #define IA64_BREAKPOINT 0x00003333300LL
609 ia64_memory_insert_breakpoint (struct gdbarch *gdbarch,
610 struct bp_target_info *bp_tgt)
612 CORE_ADDR addr = bp_tgt->placed_address;
613 gdb_byte bundle[BUNDLE_LEN];
614 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
615 long long instr_breakpoint;
618 struct cleanup *cleanup;
621 error (_("Can't insert breakpoint for slot numbers greater than 2."));
625 /* Disable the automatic memory restoration from breakpoints while
626 we read our instruction bundle. Otherwise, the general restoration
627 mechanism kicks in and we would possibly remove parts of the adjacent
628 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
629 breakpoint instruction bits region. */
630 cleanup = make_show_memory_breakpoints_cleanup (1);
631 val = target_read_memory (addr, bundle, BUNDLE_LEN);
633 /* Check for L type instruction in slot 1, if present then bump up the slot
634 number to the slot 2. */
635 template = extract_bit_field (bundle, 0, 5);
636 if (slotnum == 1 && template_encoding_table[template][slotnum] == L)
639 /* Slot number 2 may skip at most 2 bytes at the beginning. */
640 bp_tgt->placed_size = bp_tgt->shadow_len = BUNDLE_LEN - 2;
642 /* Store the whole bundle, except for the initial skipped bytes by the slot
643 number interpreted as bytes offset in PLACED_ADDRESS. */
644 memcpy (bp_tgt->shadow_contents, bundle + slotnum, bp_tgt->shadow_len);
646 /* Breakpoints already present in the code will get deteacted and not get
647 reinserted by bp_loc_is_permanent. Multiple breakpoints at the same
648 location cannot induce the internal error as they are optimized into
649 a single instance by update_global_location_list. */
650 instr_breakpoint = slotN_contents (bundle, slotnum);
651 if (instr_breakpoint == IA64_BREAKPOINT)
652 internal_error (__FILE__, __LINE__,
653 _("Address %s already contains a breakpoint."),
654 paddress (gdbarch, bp_tgt->placed_address));
655 replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum);
658 val = target_write_memory (addr + slotnum, bundle + slotnum,
661 do_cleanups (cleanup);
666 ia64_memory_remove_breakpoint (struct gdbarch *gdbarch,
667 struct bp_target_info *bp_tgt)
669 CORE_ADDR addr = bp_tgt->placed_address;
670 gdb_byte bundle_mem[BUNDLE_LEN], bundle_saved[BUNDLE_LEN];
671 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
672 long long instr_breakpoint, instr_saved;
675 struct cleanup *cleanup;
679 /* Disable the automatic memory restoration from breakpoints while
680 we read our instruction bundle. Otherwise, the general restoration
681 mechanism kicks in and we would possibly remove parts of the adjacent
682 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
683 breakpoint instruction bits region. */
684 cleanup = make_show_memory_breakpoints_cleanup (1);
685 val = target_read_memory (addr, bundle_mem, BUNDLE_LEN);
687 /* Check for L type instruction in slot 1, if present then bump up the slot
688 number to the slot 2. */
689 template = extract_bit_field (bundle_mem, 0, 5);
690 if (slotnum == 1 && template_encoding_table[template][slotnum] == L)
693 gdb_assert (bp_tgt->placed_size == BUNDLE_LEN - 2);
694 gdb_assert (bp_tgt->placed_size == bp_tgt->shadow_len);
696 instr_breakpoint = slotN_contents (bundle_mem, slotnum);
697 if (instr_breakpoint != IA64_BREAKPOINT)
699 warning (_("Cannot remove breakpoint at address %s, "
700 "no break instruction at such address."),
701 paddress (gdbarch, bp_tgt->placed_address));
705 /* Extract the original saved instruction from SLOTNUM normalizing its
706 bit-shift for INSTR_SAVED. */
707 memcpy (bundle_saved, bundle_mem, BUNDLE_LEN);
708 memcpy (bundle_saved + slotnum, bp_tgt->shadow_contents, bp_tgt->shadow_len);
709 instr_saved = slotN_contents (bundle_saved, slotnum);
711 /* In BUNDLE_MEM be careful to modify only the bits belonging to SLOTNUM and
712 never any other possibly also stored in SHADOW_CONTENTS. */
713 replace_slotN_contents (bundle_mem, instr_saved, slotnum);
715 val = target_write_memory (addr, bundle_mem, BUNDLE_LEN);
717 do_cleanups (cleanup);
721 /* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
722 instruction slots ranges are bit-granular (41 bits) we have to provide an
723 extended range as described for ia64_memory_insert_breakpoint. We also take
724 care of preserving the `break' instruction 21-bit (or 62-bit) parameter to
725 make a match for permanent breakpoints. */
727 static const gdb_byte *
728 ia64_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
730 CORE_ADDR addr = *pcptr;
731 static gdb_byte bundle[BUNDLE_LEN];
732 int slotnum = (int) (*pcptr & 0x0f) / SLOT_MULTIPLIER;
733 long long instr_fetched;
736 struct cleanup *cleanup;
739 error (_("Can't insert breakpoint for slot numbers greater than 2."));
743 /* Enable the automatic memory restoration from breakpoints while
744 we read our instruction bundle to match bp_loc_is_permanent. */
745 cleanup = make_show_memory_breakpoints_cleanup (0);
746 val = target_read_memory (addr, bundle, BUNDLE_LEN);
747 do_cleanups (cleanup);
749 /* The memory might be unreachable. This can happen, for instance,
750 when the user inserts a breakpoint at an invalid address. */
754 /* Check for L type instruction in slot 1, if present then bump up the slot
755 number to the slot 2. */
756 template = extract_bit_field (bundle, 0, 5);
757 if (slotnum == 1 && template_encoding_table[template][slotnum] == L)
760 /* A break instruction has its all its opcode bits cleared except for
761 the parameter value. For L+X slot pair we are at the X slot (slot 2) so
762 we should not touch the L slot - the upper 41 bits of the parameter. */
763 instr_fetched = slotN_contents (bundle, slotnum);
764 instr_fetched &= 0x1003ffffc0LL;
765 replace_slotN_contents (bundle, instr_fetched, slotnum);
767 *lenptr = BUNDLE_LEN - 2;
769 /* SLOTNUM is possibly already locally modified - use caller's *PCPTR. */
770 return bundle + (*pcptr & 0x0f);
774 ia64_read_pc (struct regcache *regcache)
776 ULONGEST psr_value, pc_value;
779 regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value);
780 regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &pc_value);
781 slot_num = (psr_value >> 41) & 3;
783 return pc_value | (slot_num * SLOT_MULTIPLIER);
787 ia64_write_pc (struct regcache *regcache, CORE_ADDR new_pc)
789 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
792 regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value);
793 psr_value &= ~(3LL << 41);
794 psr_value |= (ULONGEST)(slot_num & 0x3) << 41;
798 regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr_value);
799 regcache_cooked_write_unsigned (regcache, IA64_IP_REGNUM, new_pc);
802 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
804 /* Returns the address of the slot that's NSLOTS slots away from
805 the address ADDR. NSLOTS may be positive or negative. */
807 rse_address_add(CORE_ADDR addr, int nslots)
810 int mandatory_nat_slots = nslots / 63;
811 int direction = nslots < 0 ? -1 : 1;
813 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
815 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
816 new_addr += 8 * direction;
818 if (IS_NaT_COLLECTION_ADDR(new_addr))
819 new_addr += 8 * direction;
825 ia64_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
826 int regnum, gdb_byte *buf)
828 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
830 if (regnum >= V32_REGNUM && regnum <= V127_REGNUM)
832 #ifdef HAVE_LIBUNWIND_IA64_H
833 /* First try and use the libunwind special reg accessor, otherwise fallback to
835 if (!libunwind_is_initialized ()
836 || libunwind_get_reg_special (gdbarch, regcache, regnum, buf) != 0)
839 /* The fallback position is to assume that r32-r127 are found sequentially
840 in memory starting at $bof. This isn't always true, but without libunwind,
841 this is the best we can do. */
845 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
846 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
848 /* The bsp points at the end of the register frame so we
849 subtract the size of frame from it to get start of register frame. */
850 bsp = rse_address_add (bsp, -(cfm & 0x7f));
852 if ((cfm & 0x7f) > regnum - V32_REGNUM)
854 ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
855 reg = read_memory_integer ((CORE_ADDR)reg_addr, 8, byte_order);
856 store_unsigned_integer (buf, register_size (gdbarch, regnum),
860 store_unsigned_integer (buf, register_size (gdbarch, regnum),
864 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
868 regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat);
869 unatN_val = (unat & (1LL << (regnum - IA64_NAT0_REGNUM))) != 0;
870 store_unsigned_integer (buf, register_size (gdbarch, regnum),
871 byte_order, unatN_val);
873 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
875 ULONGEST natN_val = 0;
878 CORE_ADDR gr_addr = 0;
879 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
880 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
882 /* The bsp points at the end of the register frame so we
883 subtract the size of frame from it to get start of register frame. */
884 bsp = rse_address_add (bsp, -(cfm & 0x7f));
886 if ((cfm & 0x7f) > regnum - V32_REGNUM)
887 gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
891 /* Compute address of nat collection bits. */
892 CORE_ADDR nat_addr = gr_addr | 0x1f8;
893 CORE_ADDR nat_collection;
895 /* If our nat collection address is bigger than bsp, we have to get
896 the nat collection from rnat. Otherwise, we fetch the nat
897 collection from the computed address. */
899 regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection);
901 nat_collection = read_memory_integer (nat_addr, 8, byte_order);
902 nat_bit = (gr_addr >> 3) & 0x3f;
903 natN_val = (nat_collection >> nat_bit) & 1;
906 store_unsigned_integer (buf, register_size (gdbarch, regnum),
907 byte_order, natN_val);
909 else if (regnum == VBOF_REGNUM)
911 /* A virtual register frame start is provided for user convenience.
912 It can be calculated as the bsp - sof (sizeof frame). */
916 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
917 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
919 /* The bsp points at the end of the register frame so we
920 subtract the size of frame from it to get beginning of frame. */
921 vbsp = rse_address_add (bsp, -(cfm & 0x7f));
922 store_unsigned_integer (buf, register_size (gdbarch, regnum),
925 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
931 regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr);
932 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
934 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
936 /* Fetch predicate register rename base from current frame
937 marker for this frame. */
938 int rrb_pr = (cfm >> 32) & 0x3f;
940 /* Adjust the register number to account for register rotation. */
942 + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
944 prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0;
945 store_unsigned_integer (buf, register_size (gdbarch, regnum),
946 byte_order, prN_val);
949 memset (buf, 0, register_size (gdbarch, regnum));
953 ia64_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
954 int regnum, const gdb_byte *buf)
956 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
958 if (regnum >= V32_REGNUM && regnum <= V127_REGNUM)
963 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
964 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
966 bsp = rse_address_add (bsp, -(cfm & 0x7f));
968 if ((cfm & 0x7f) > regnum - V32_REGNUM)
970 ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
971 write_memory (reg_addr, (void *)buf, 8);
974 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
976 ULONGEST unatN_val, unat, unatN_mask;
977 regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat);
978 unatN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum),
980 unatN_mask = (1LL << (regnum - IA64_NAT0_REGNUM));
983 else if (unatN_val == 1)
985 regcache_cooked_write_unsigned (regcache, IA64_UNAT_REGNUM, unat);
987 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
992 CORE_ADDR gr_addr = 0;
993 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
994 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
996 /* The bsp points at the end of the register frame so we
997 subtract the size of frame from it to get start of register frame. */
998 bsp = rse_address_add (bsp, -(cfm & 0x7f));
1000 if ((cfm & 0x7f) > regnum - V32_REGNUM)
1001 gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
1003 natN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum),
1006 if (gr_addr != 0 && (natN_val == 0 || natN_val == 1))
1008 /* Compute address of nat collection bits. */
1009 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1010 CORE_ADDR nat_collection;
1011 int natN_bit = (gr_addr >> 3) & 0x3f;
1012 ULONGEST natN_mask = (1LL << natN_bit);
1013 /* If our nat collection address is bigger than bsp, we have to get
1014 the nat collection from rnat. Otherwise, we fetch the nat
1015 collection from the computed address. */
1016 if (nat_addr >= bsp)
1018 regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection);
1020 nat_collection |= natN_mask;
1022 nat_collection &= ~natN_mask;
1023 regcache_cooked_write_unsigned (regcache, IA64_RNAT_REGNUM, nat_collection);
1028 nat_collection = read_memory_integer (nat_addr, 8, byte_order);
1030 nat_collection |= natN_mask;
1032 nat_collection &= ~natN_mask;
1033 store_unsigned_integer (nat_buf, register_size (gdbarch, regnum),
1034 byte_order, nat_collection);
1035 write_memory (nat_addr, nat_buf, 8);
1039 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
1046 regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr);
1047 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
1049 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
1051 /* Fetch predicate register rename base from current frame
1052 marker for this frame. */
1053 int rrb_pr = (cfm >> 32) & 0x3f;
1055 /* Adjust the register number to account for register rotation. */
1056 regnum = VP16_REGNUM
1057 + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
1059 prN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum),
1061 prN_mask = (1LL << (regnum - VP0_REGNUM));
1064 else if (prN_val == 1)
1066 regcache_cooked_write_unsigned (regcache, IA64_PR_REGNUM, pr);
1070 /* The ia64 needs to convert between various ieee floating-point formats
1071 and the special ia64 floating point register format. */
1074 ia64_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
1076 return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM
1077 && type != ia64_ext_type (gdbarch));
1081 ia64_register_to_value (struct frame_info *frame, int regnum,
1082 struct type *valtype, gdb_byte *out)
1084 struct gdbarch *gdbarch = get_frame_arch (frame);
1085 char in[MAX_REGISTER_SIZE];
1086 frame_register_read (frame, regnum, in);
1087 convert_typed_floating (in, ia64_ext_type (gdbarch), out, valtype);
1091 ia64_value_to_register (struct frame_info *frame, int regnum,
1092 struct type *valtype, const gdb_byte *in)
1094 struct gdbarch *gdbarch = get_frame_arch (frame);
1095 char out[MAX_REGISTER_SIZE];
1096 convert_typed_floating (in, valtype, out, ia64_ext_type (gdbarch));
1097 put_frame_register (frame, regnum, out);
1101 /* Limit the number of skipped non-prologue instructions since examining
1102 of the prologue is expensive. */
1103 static int max_skip_non_prologue_insns = 40;
1105 /* Given PC representing the starting address of a function, and
1106 LIM_PC which is the (sloppy) limit to which to scan when looking
1107 for a prologue, attempt to further refine this limit by using
1108 the line data in the symbol table. If successful, a better guess
1109 on where the prologue ends is returned, otherwise the previous
1110 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
1111 which will be set to indicate whether the returned limit may be
1112 used with no further scanning in the event that the function is
1115 /* FIXME: cagney/2004-02-14: This function and logic have largely been
1116 superseded by skip_prologue_using_sal. */
1119 refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
1121 struct symtab_and_line prologue_sal;
1122 CORE_ADDR start_pc = pc;
1125 /* The prologue can not possibly go past the function end itself,
1126 so we can already adjust LIM_PC accordingly. */
1127 if (find_pc_partial_function (pc, NULL, NULL, &end_pc) && end_pc < lim_pc)
1130 /* Start off not trusting the limit. */
1133 prologue_sal = find_pc_line (pc, 0);
1134 if (prologue_sal.line != 0)
1137 CORE_ADDR addr = prologue_sal.end;
1139 /* Handle the case in which compiler's optimizer/scheduler
1140 has moved instructions into the prologue. We scan ahead
1141 in the function looking for address ranges whose corresponding
1142 line number is less than or equal to the first one that we
1143 found for the function. (It can be less than when the
1144 scheduler puts a body instruction before the first prologue
1146 for (i = 2 * max_skip_non_prologue_insns;
1147 i > 0 && (lim_pc == 0 || addr < lim_pc);
1150 struct symtab_and_line sal;
1152 sal = find_pc_line (addr, 0);
1155 if (sal.line <= prologue_sal.line
1156 && sal.symtab == prologue_sal.symtab)
1163 if (lim_pc == 0 || prologue_sal.end < lim_pc)
1165 lim_pc = prologue_sal.end;
1166 if (start_pc == get_pc_function_start (lim_pc))
1173 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1174 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1175 || (14 <= (_regnum_) && (_regnum_) <= 31))
1176 #define imm9(_instr_) \
1177 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1178 | (((_instr_) & 0x00008000000LL) >> 20) \
1179 | (((_instr_) & 0x00000001fc0LL) >> 6))
1181 /* Allocate and initialize a frame cache. */
1183 static struct ia64_frame_cache *
1184 ia64_alloc_frame_cache (void)
1186 struct ia64_frame_cache *cache;
1189 cache = FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache);
1195 cache->prev_cfm = 0;
1201 cache->frameless = 1;
1203 for (i = 0; i < NUM_IA64_RAW_REGS; i++)
1204 cache->saved_regs[i] = 0;
1210 examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc,
1211 struct frame_info *this_frame,
1212 struct ia64_frame_cache *cache)
1215 CORE_ADDR last_prologue_pc = pc;
1216 instruction_type it;
1221 int unat_save_reg = 0;
1222 int pr_save_reg = 0;
1223 int mem_stack_frame_size = 0;
1225 CORE_ADDR spill_addr = 0;
1228 char reg_contents[256];
1234 CORE_ADDR bof, sor, sol, sof, cfm, rrb_gr;
1236 memset (instores, 0, sizeof instores);
1237 memset (infpstores, 0, sizeof infpstores);
1238 memset (reg_contents, 0, sizeof reg_contents);
1240 if (cache->after_prologue != 0
1241 && cache->after_prologue <= lim_pc)
1242 return cache->after_prologue;
1244 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
1245 next_pc = fetch_instruction (pc, &it, &instr);
1247 /* We want to check if we have a recognizable function start before we
1248 look ahead for a prologue. */
1249 if (pc < lim_pc && next_pc
1250 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
1252 /* alloc - start of a regular function. */
1253 int sor = (int) ((instr & 0x00078000000LL) >> 27);
1254 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
1255 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
1256 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1258 /* Verify that the current cfm matches what we think is the
1259 function start. If we have somehow jumped within a function,
1260 we do not want to interpret the prologue and calculate the
1261 addresses of various registers such as the return address.
1262 We will instead treat the frame as frameless. */
1264 (sof == (cache->cfm & 0x7f) &&
1265 sol == ((cache->cfm >> 7) & 0x7f)))
1269 last_prologue_pc = next_pc;
1274 /* Look for a leaf routine. */
1275 if (pc < lim_pc && next_pc
1276 && (it == I || it == M)
1277 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
1279 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1280 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
1281 | ((instr & 0x001f8000000LL) >> 20)
1282 | ((instr & 0x000000fe000LL) >> 13));
1283 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
1284 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1285 int qp = (int) (instr & 0x0000000003fLL);
1286 if (qp == 0 && rN == 2 && imm == 0 && rM == 12 && fp_reg == 0)
1288 /* mov r2, r12 - beginning of leaf routine */
1290 last_prologue_pc = next_pc;
1294 /* If we don't recognize a regular function or leaf routine, we are
1300 last_prologue_pc = lim_pc;
1304 /* Loop, looking for prologue instructions, keeping track of
1305 where preserved registers were spilled. */
1308 next_pc = fetch_instruction (pc, &it, &instr);
1312 if (it == B && ((instr & 0x1e1f800003fLL) != 0x04000000000LL))
1314 /* Exit loop upon hitting a non-nop branch instruction. */
1319 else if (((instr & 0x3fLL) != 0LL) &&
1320 (frameless || ret_reg != 0))
1322 /* Exit loop upon hitting a predicated instruction if
1323 we already have the return register or if we are frameless. */
1328 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
1331 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
1332 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1333 int qp = (int) (instr & 0x0000000003f);
1335 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
1338 last_prologue_pc = next_pc;
1341 else if ((it == I || it == M)
1342 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
1344 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1345 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
1346 | ((instr & 0x001f8000000LL) >> 20)
1347 | ((instr & 0x000000fe000LL) >> 13));
1348 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
1349 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1350 int qp = (int) (instr & 0x0000000003fLL);
1352 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
1356 last_prologue_pc = next_pc;
1358 else if (qp == 0 && rN == 12 && rM == 12)
1360 /* adds r12, -mem_stack_frame_size, r12 */
1361 mem_stack_frame_size -= imm;
1362 last_prologue_pc = next_pc;
1364 else if (qp == 0 && rN == 2
1365 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
1367 char buf[MAX_REGISTER_SIZE];
1368 CORE_ADDR saved_sp = 0;
1369 /* adds r2, spilloffset, rFramePointer
1371 adds r2, spilloffset, r12
1373 Get ready for stf.spill or st8.spill instructions.
1374 The address to start spilling at is loaded into r2.
1375 FIXME: Why r2? That's what gcc currently uses; it
1376 could well be different for other compilers. */
1378 /* Hmm... whether or not this will work will depend on
1379 where the pc is. If it's still early in the prologue
1380 this'll be wrong. FIXME */
1383 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1384 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1385 get_frame_register (this_frame, sp_regnum, buf);
1386 saved_sp = extract_unsigned_integer (buf, 8, byte_order);
1388 spill_addr = saved_sp
1389 + (rM == 12 ? 0 : mem_stack_frame_size)
1392 last_prologue_pc = next_pc;
1394 else if (qp == 0 && rM >= 32 && rM < 40 && !instores[rM-32] &&
1395 rN < 256 && imm == 0)
1397 /* mov rN, rM where rM is an input register */
1398 reg_contents[rN] = rM;
1399 last_prologue_pc = next_pc;
1401 else if (frameless && qp == 0 && rN == fp_reg && imm == 0 &&
1405 last_prologue_pc = next_pc;
1410 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
1411 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
1413 /* stf.spill [rN] = fM, imm9
1415 stf.spill [rN] = fM */
1417 int imm = imm9(instr);
1418 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1419 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1420 int qp = (int) (instr & 0x0000000003fLL);
1421 if (qp == 0 && rN == spill_reg && spill_addr != 0
1422 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
1424 cache->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
1426 if ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
1429 spill_addr = 0; /* last one; must be done */
1430 last_prologue_pc = next_pc;
1433 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
1434 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
1440 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
1441 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1442 int qp = (int) (instr & 0x0000000003fLL);
1443 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
1445 /* We have something like "mov.m r3 = ar.unat". Remember the
1446 r3 (or whatever) and watch for a store of this register... */
1448 last_prologue_pc = next_pc;
1451 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
1454 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1455 int qp = (int) (instr & 0x0000000003fLL);
1456 if (qp == 0 && isScratch (rN))
1459 last_prologue_pc = next_pc;
1463 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1464 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1468 st8 [rN] = rM, imm9 */
1469 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1470 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1471 int qp = (int) (instr & 0x0000000003fLL);
1472 int indirect = rM < 256 ? reg_contents[rM] : 0;
1473 if (qp == 0 && rN == spill_reg && spill_addr != 0
1474 && (rM == unat_save_reg || rM == pr_save_reg))
1476 /* We've found a spill of either the UNAT register or the PR
1477 register. (Well, not exactly; what we've actually found is
1478 a spill of the register that UNAT or PR was moved to).
1479 Record that fact and move on... */
1480 if (rM == unat_save_reg)
1482 /* Track UNAT register */
1483 cache->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
1488 /* Track PR register */
1489 cache->saved_regs[IA64_PR_REGNUM] = spill_addr;
1492 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1493 /* st8 [rN] = rM, imm9 */
1494 spill_addr += imm9(instr);
1496 spill_addr = 0; /* must be done spilling */
1497 last_prologue_pc = next_pc;
1499 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1501 /* Allow up to one store of each input register. */
1502 instores[rM-32] = 1;
1503 last_prologue_pc = next_pc;
1505 else if (qp == 0 && 32 <= indirect && indirect < 40 &&
1506 !instores[indirect-32])
1508 /* Allow an indirect store of an input register. */
1509 instores[indirect-32] = 1;
1510 last_prologue_pc = next_pc;
1513 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1520 Note that the st8 case is handled in the clause above.
1522 Advance over stores of input registers. One store per input
1523 register is permitted. */
1524 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1525 int qp = (int) (instr & 0x0000000003fLL);
1526 int indirect = rM < 256 ? reg_contents[rM] : 0;
1527 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1529 instores[rM-32] = 1;
1530 last_prologue_pc = next_pc;
1532 else if (qp == 0 && 32 <= indirect && indirect < 40 &&
1533 !instores[indirect-32])
1535 /* Allow an indirect store of an input register. */
1536 instores[indirect-32] = 1;
1537 last_prologue_pc = next_pc;
1540 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1547 Advance over stores of floating point input registers. Again
1548 one store per register is permitted */
1549 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1550 int qp = (int) (instr & 0x0000000003fLL);
1551 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1553 infpstores[fM-8] = 1;
1554 last_prologue_pc = next_pc;
1558 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1559 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1561 /* st8.spill [rN] = rM
1563 st8.spill [rN] = rM, imm9 */
1564 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1565 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1566 int qp = (int) (instr & 0x0000000003fLL);
1567 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1569 /* We've found a spill of one of the preserved general purpose
1570 regs. Record the spill address and advance the spill
1571 register if appropriate. */
1572 cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
1573 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1574 /* st8.spill [rN] = rM, imm9 */
1575 spill_addr += imm9(instr);
1577 spill_addr = 0; /* Done spilling */
1578 last_prologue_pc = next_pc;
1585 /* If not frameless and we aren't called by skip_prologue, then we need
1586 to calculate registers for the previous frame which will be needed
1589 if (!frameless && this_frame)
1591 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1592 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1594 /* Extract the size of the rotating portion of the stack
1595 frame and the register rename base from the current
1601 rrb_gr = (cfm >> 18) & 0x7f;
1603 /* Find the bof (beginning of frame). */
1604 bof = rse_address_add (cache->bsp, -sof);
1606 for (i = 0, addr = bof;
1610 if (IS_NaT_COLLECTION_ADDR (addr))
1614 if (i+32 == cfm_reg)
1615 cache->saved_regs[IA64_CFM_REGNUM] = addr;
1616 if (i+32 == ret_reg)
1617 cache->saved_regs[IA64_VRAP_REGNUM] = addr;
1619 cache->saved_regs[IA64_VFP_REGNUM] = addr;
1622 /* For the previous argument registers we require the previous bof.
1623 If we can't find the previous cfm, then we can do nothing. */
1625 if (cache->saved_regs[IA64_CFM_REGNUM] != 0)
1627 cfm = read_memory_integer (cache->saved_regs[IA64_CFM_REGNUM],
1630 else if (cfm_reg != 0)
1632 get_frame_register (this_frame, cfm_reg, buf);
1633 cfm = extract_unsigned_integer (buf, 8, byte_order);
1635 cache->prev_cfm = cfm;
1639 sor = ((cfm >> 14) & 0xf) * 8;
1641 sol = (cfm >> 7) & 0x7f;
1642 rrb_gr = (cfm >> 18) & 0x7f;
1644 /* The previous bof only requires subtraction of the sol (size of
1645 locals) due to the overlap between output and input of
1646 subsequent frames. */
1647 bof = rse_address_add (bof, -sol);
1649 for (i = 0, addr = bof;
1653 if (IS_NaT_COLLECTION_ADDR (addr))
1658 cache->saved_regs[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1661 cache->saved_regs[IA64_GR32_REGNUM + i] = addr;
1667 /* Try and trust the lim_pc value whenever possible. */
1668 if (trust_limit && lim_pc >= last_prologue_pc)
1669 last_prologue_pc = lim_pc;
1671 cache->frameless = frameless;
1672 cache->after_prologue = last_prologue_pc;
1673 cache->mem_stack_frame_size = mem_stack_frame_size;
1674 cache->fp_reg = fp_reg;
1676 return last_prologue_pc;
1680 ia64_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1682 struct ia64_frame_cache cache;
1684 cache.after_prologue = 0;
1688 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1689 return examine_prologue (pc, pc+1024, 0, &cache);
1693 /* Normal frames. */
1695 static struct ia64_frame_cache *
1696 ia64_frame_cache (struct frame_info *this_frame, void **this_cache)
1698 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1699 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1700 struct ia64_frame_cache *cache;
1702 CORE_ADDR cfm, sof, sol, bsp, psr;
1708 cache = ia64_alloc_frame_cache ();
1709 *this_cache = cache;
1711 get_frame_register (this_frame, sp_regnum, buf);
1712 cache->saved_sp = extract_unsigned_integer (buf, 8, byte_order);
1714 /* We always want the bsp to point to the end of frame.
1715 This way, we can always get the beginning of frame (bof)
1716 by subtracting frame size. */
1717 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
1718 cache->bsp = extract_unsigned_integer (buf, 8, byte_order);
1720 get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
1721 psr = extract_unsigned_integer (buf, 8, byte_order);
1723 get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
1724 cfm = extract_unsigned_integer (buf, 8, byte_order);
1726 cache->sof = (cfm & 0x7f);
1727 cache->sol = (cfm >> 7) & 0x7f;
1728 cache->sor = ((cfm >> 14) & 0xf) * 8;
1732 cache->pc = get_frame_func (this_frame);
1735 examine_prologue (cache->pc, get_frame_pc (this_frame), this_frame, cache);
1737 cache->base = cache->saved_sp + cache->mem_stack_frame_size;
1743 ia64_frame_this_id (struct frame_info *this_frame, void **this_cache,
1744 struct frame_id *this_id)
1746 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1747 struct ia64_frame_cache *cache =
1748 ia64_frame_cache (this_frame, this_cache);
1750 /* If outermost frame, mark with null frame id. */
1751 if (cache->base == 0)
1752 (*this_id) = null_frame_id;
1754 (*this_id) = frame_id_build_special (cache->base, cache->pc, cache->bsp);
1755 if (gdbarch_debug >= 1)
1756 fprintf_unfiltered (gdb_stdlog,
1757 "regular frame id: code %s, stack %s, special %s, this_frame %s\n",
1758 paddress (gdbarch, this_id->code_addr),
1759 paddress (gdbarch, this_id->stack_addr),
1760 paddress (gdbarch, cache->bsp),
1761 host_address_to_string (this_frame));
1764 static struct value *
1765 ia64_frame_prev_register (struct frame_info *this_frame, void **this_cache,
1768 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1769 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1770 struct ia64_frame_cache *cache = ia64_frame_cache (this_frame, this_cache);
1773 gdb_assert (regnum >= 0);
1775 if (!target_has_registers)
1776 error (_("No registers."));
1778 if (regnum == gdbarch_sp_regnum (gdbarch))
1779 return frame_unwind_got_constant (this_frame, regnum, cache->base);
1781 else if (regnum == IA64_BSP_REGNUM)
1784 CORE_ADDR prev_cfm, bsp, prev_bsp;
1786 /* We want to calculate the previous bsp as the end of the previous
1787 register stack frame. This corresponds to what the hardware bsp
1788 register will be if we pop the frame back which is why we might
1789 have been called. We know the beginning of the current frame is
1790 cache->bsp - cache->sof. This value in the previous frame points
1791 to the start of the output registers. We can calculate the end of
1792 that frame by adding the size of output:
1793 (sof (size of frame) - sol (size of locals)). */
1794 val = ia64_frame_prev_register (this_frame, this_cache, IA64_CFM_REGNUM);
1795 prev_cfm = extract_unsigned_integer (value_contents_all (val),
1797 bsp = rse_address_add (cache->bsp, -(cache->sof));
1799 rse_address_add (bsp, (prev_cfm & 0x7f) - ((prev_cfm >> 7) & 0x7f));
1801 return frame_unwind_got_constant (this_frame, regnum, prev_bsp);
1804 else if (regnum == IA64_CFM_REGNUM)
1806 CORE_ADDR addr = cache->saved_regs[IA64_CFM_REGNUM];
1809 return frame_unwind_got_memory (this_frame, regnum, addr);
1811 if (cache->prev_cfm)
1812 return frame_unwind_got_constant (this_frame, regnum, cache->prev_cfm);
1814 if (cache->frameless)
1815 return frame_unwind_got_register (this_frame, IA64_PFS_REGNUM,
1817 return frame_unwind_got_register (this_frame, regnum, 0);
1820 else if (regnum == IA64_VFP_REGNUM)
1822 /* If the function in question uses an automatic register (r32-r127)
1823 for the frame pointer, it'll be found by ia64_find_saved_register()
1824 above. If the function lacks one of these frame pointers, we can
1825 still provide a value since we know the size of the frame. */
1826 return frame_unwind_got_constant (this_frame, regnum, cache->base);
1829 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
1831 struct value *pr_val;
1834 pr_val = ia64_frame_prev_register (this_frame, this_cache,
1836 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
1838 /* Fetch predicate register rename base from current frame
1839 marker for this frame. */
1840 int rrb_pr = (cache->cfm >> 32) & 0x3f;
1842 /* Adjust the register number to account for register rotation. */
1843 regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
1845 prN = extract_bit_field (value_contents_all (pr_val),
1846 regnum - VP0_REGNUM, 1);
1847 return frame_unwind_got_constant (this_frame, regnum, prN);
1850 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1852 struct value *unat_val;
1854 unat_val = ia64_frame_prev_register (this_frame, this_cache,
1856 unatN = extract_bit_field (value_contents_all (unat_val),
1857 regnum - IA64_NAT0_REGNUM, 1);
1858 return frame_unwind_got_constant (this_frame, regnum, unatN);
1861 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1864 /* Find address of general register corresponding to nat bit we're
1868 gr_addr = cache->saved_regs[regnum - IA64_NAT0_REGNUM + IA64_GR0_REGNUM];
1872 /* Compute address of nat collection bits. */
1873 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1875 CORE_ADDR nat_collection;
1878 /* If our nat collection address is bigger than bsp, we have to get
1879 the nat collection from rnat. Otherwise, we fetch the nat
1880 collection from the computed address. */
1881 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
1882 bsp = extract_unsigned_integer (buf, 8, byte_order);
1883 if (nat_addr >= bsp)
1885 get_frame_register (this_frame, IA64_RNAT_REGNUM, buf);
1886 nat_collection = extract_unsigned_integer (buf, 8, byte_order);
1889 nat_collection = read_memory_integer (nat_addr, 8, byte_order);
1890 nat_bit = (gr_addr >> 3) & 0x3f;
1891 natval = (nat_collection >> nat_bit) & 1;
1894 return frame_unwind_got_constant (this_frame, regnum, natval);
1897 else if (regnum == IA64_IP_REGNUM)
1900 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
1904 read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
1905 pc = extract_unsigned_integer (buf, 8, byte_order);
1907 else if (cache->frameless)
1909 get_frame_register (this_frame, IA64_BR0_REGNUM, buf);
1910 pc = extract_unsigned_integer (buf, 8, byte_order);
1913 return frame_unwind_got_constant (this_frame, regnum, pc);
1916 else if (regnum == IA64_PSR_REGNUM)
1918 /* We don't know how to get the complete previous PSR, but we need it
1919 for the slot information when we unwind the pc (pc is formed of IP
1920 register plus slot information from PSR). To get the previous
1921 slot information, we mask it off the return address. */
1922 ULONGEST slot_num = 0;
1925 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
1927 get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
1928 psr = extract_unsigned_integer (buf, 8, byte_order);
1932 read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
1933 pc = extract_unsigned_integer (buf, 8, byte_order);
1935 else if (cache->frameless)
1937 get_frame_register (this_frame, IA64_BR0_REGNUM, buf);
1938 pc = extract_unsigned_integer (buf, 8, byte_order);
1940 psr &= ~(3LL << 41);
1941 slot_num = pc & 0x3LL;
1942 psr |= (CORE_ADDR)slot_num << 41;
1943 return frame_unwind_got_constant (this_frame, regnum, psr);
1946 else if (regnum == IA64_BR0_REGNUM)
1948 CORE_ADDR addr = cache->saved_regs[IA64_BR0_REGNUM];
1951 return frame_unwind_got_memory (this_frame, regnum, addr);
1953 return frame_unwind_got_constant (this_frame, regnum, 0);
1956 else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM)
1957 || (regnum >= V32_REGNUM && regnum <= V127_REGNUM))
1961 if (regnum >= V32_REGNUM)
1962 regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
1963 addr = cache->saved_regs[regnum];
1965 return frame_unwind_got_memory (this_frame, regnum, addr);
1967 if (cache->frameless)
1969 struct value *reg_val;
1970 CORE_ADDR prev_cfm, prev_bsp, prev_bof;
1972 /* FIXME: brobecker/2008-05-01: Doesn't this seem redundant
1973 with the same code above? */
1974 if (regnum >= V32_REGNUM)
1975 regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
1976 reg_val = ia64_frame_prev_register (this_frame, this_cache,
1978 prev_cfm = extract_unsigned_integer (value_contents_all (reg_val),
1980 reg_val = ia64_frame_prev_register (this_frame, this_cache,
1982 prev_bsp = extract_unsigned_integer (value_contents_all (reg_val),
1984 prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f));
1986 addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM));
1987 return frame_unwind_got_memory (this_frame, regnum, addr);
1990 return frame_unwind_got_constant (this_frame, regnum, 0);
1993 else /* All other registers. */
1997 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1999 /* Fetch floating point register rename base from current
2000 frame marker for this frame. */
2001 int rrb_fr = (cache->cfm >> 25) & 0x7f;
2003 /* Adjust the floating point register number to account for
2004 register rotation. */
2005 regnum = IA64_FR32_REGNUM
2006 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
2009 /* If we have stored a memory address, access the register. */
2010 addr = cache->saved_regs[regnum];
2012 return frame_unwind_got_memory (this_frame, regnum, addr);
2013 /* Otherwise, punt and get the current value of the register. */
2015 return frame_unwind_got_register (this_frame, regnum, regnum);
2019 static const struct frame_unwind ia64_frame_unwind =
2022 &ia64_frame_this_id,
2023 &ia64_frame_prev_register,
2025 default_frame_sniffer
2028 /* Signal trampolines. */
2031 ia64_sigtramp_frame_init_saved_regs (struct frame_info *this_frame,
2032 struct ia64_frame_cache *cache)
2034 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2035 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2037 if (tdep->sigcontext_register_address)
2041 cache->saved_regs[IA64_VRAP_REGNUM] =
2042 tdep->sigcontext_register_address (gdbarch, cache->base, IA64_IP_REGNUM);
2043 cache->saved_regs[IA64_CFM_REGNUM] =
2044 tdep->sigcontext_register_address (gdbarch, cache->base, IA64_CFM_REGNUM);
2045 cache->saved_regs[IA64_PSR_REGNUM] =
2046 tdep->sigcontext_register_address (gdbarch, cache->base, IA64_PSR_REGNUM);
2047 cache->saved_regs[IA64_BSP_REGNUM] =
2048 tdep->sigcontext_register_address (gdbarch, cache->base, IA64_BSP_REGNUM);
2049 cache->saved_regs[IA64_RNAT_REGNUM] =
2050 tdep->sigcontext_register_address (gdbarch, cache->base, IA64_RNAT_REGNUM);
2051 cache->saved_regs[IA64_CCV_REGNUM] =
2052 tdep->sigcontext_register_address (gdbarch, cache->base, IA64_CCV_REGNUM);
2053 cache->saved_regs[IA64_UNAT_REGNUM] =
2054 tdep->sigcontext_register_address (gdbarch, cache->base, IA64_UNAT_REGNUM);
2055 cache->saved_regs[IA64_FPSR_REGNUM] =
2056 tdep->sigcontext_register_address (gdbarch, cache->base, IA64_FPSR_REGNUM);
2057 cache->saved_regs[IA64_PFS_REGNUM] =
2058 tdep->sigcontext_register_address (gdbarch, cache->base, IA64_PFS_REGNUM);
2059 cache->saved_regs[IA64_LC_REGNUM] =
2060 tdep->sigcontext_register_address (gdbarch, cache->base, IA64_LC_REGNUM);
2061 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
2062 cache->saved_regs[regno] =
2063 tdep->sigcontext_register_address (gdbarch, cache->base, regno);
2064 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
2065 cache->saved_regs[regno] =
2066 tdep->sigcontext_register_address (gdbarch, cache->base, regno);
2067 for (regno = IA64_FR2_REGNUM; regno <= IA64_FR31_REGNUM; regno++)
2068 cache->saved_regs[regno] =
2069 tdep->sigcontext_register_address (gdbarch, cache->base, regno);
2073 static struct ia64_frame_cache *
2074 ia64_sigtramp_frame_cache (struct frame_info *this_frame, void **this_cache)
2076 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2077 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2078 struct ia64_frame_cache *cache;
2086 cache = ia64_alloc_frame_cache ();
2088 get_frame_register (this_frame, sp_regnum, buf);
2089 /* Note that frame size is hard-coded below. We cannot calculate it
2090 via prologue examination. */
2091 cache->base = extract_unsigned_integer (buf, 8, byte_order) + 16;
2093 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
2094 cache->bsp = extract_unsigned_integer (buf, 8, byte_order);
2096 get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
2097 cache->cfm = extract_unsigned_integer (buf, 8, byte_order);
2098 cache->sof = cache->cfm & 0x7f;
2100 ia64_sigtramp_frame_init_saved_regs (this_frame, cache);
2102 *this_cache = cache;
2107 ia64_sigtramp_frame_this_id (struct frame_info *this_frame,
2108 void **this_cache, struct frame_id *this_id)
2110 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2111 struct ia64_frame_cache *cache =
2112 ia64_sigtramp_frame_cache (this_frame, this_cache);
2114 (*this_id) = frame_id_build_special (cache->base,
2115 get_frame_pc (this_frame),
2117 if (gdbarch_debug >= 1)
2118 fprintf_unfiltered (gdb_stdlog,
2119 "sigtramp frame id: code %s, stack %s, special %s, this_frame %s\n",
2120 paddress (gdbarch, this_id->code_addr),
2121 paddress (gdbarch, this_id->stack_addr),
2122 paddress (gdbarch, cache->bsp),
2123 host_address_to_string (this_frame));
2126 static struct value *
2127 ia64_sigtramp_frame_prev_register (struct frame_info *this_frame,
2128 void **this_cache, int regnum)
2130 char buf[MAX_REGISTER_SIZE];
2132 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2133 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2134 struct ia64_frame_cache *cache =
2135 ia64_sigtramp_frame_cache (this_frame, this_cache);
2137 gdb_assert (regnum >= 0);
2139 if (!target_has_registers)
2140 error (_("No registers."));
2142 if (regnum == IA64_IP_REGNUM)
2145 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
2149 read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
2150 pc = extract_unsigned_integer (buf, 8, byte_order);
2153 return frame_unwind_got_constant (this_frame, regnum, pc);
2156 else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM)
2157 || (regnum >= V32_REGNUM && regnum <= V127_REGNUM))
2161 if (regnum >= V32_REGNUM)
2162 regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
2163 addr = cache->saved_regs[regnum];
2165 return frame_unwind_got_memory (this_frame, regnum, addr);
2167 return frame_unwind_got_constant (this_frame, regnum, 0);
2170 else /* All other registers not listed above. */
2172 CORE_ADDR addr = cache->saved_regs[regnum];
2175 return frame_unwind_got_memory (this_frame, regnum, addr);
2177 return frame_unwind_got_constant (this_frame, regnum, 0);
2182 ia64_sigtramp_frame_sniffer (const struct frame_unwind *self,
2183 struct frame_info *this_frame,
2186 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
2187 if (tdep->pc_in_sigtramp)
2189 CORE_ADDR pc = get_frame_pc (this_frame);
2191 if (tdep->pc_in_sigtramp (pc))
2198 static const struct frame_unwind ia64_sigtramp_frame_unwind =
2201 ia64_sigtramp_frame_this_id,
2202 ia64_sigtramp_frame_prev_register,
2204 ia64_sigtramp_frame_sniffer
2210 ia64_frame_base_address (struct frame_info *this_frame, void **this_cache)
2212 struct ia64_frame_cache *cache = ia64_frame_cache (this_frame, this_cache);
2217 static const struct frame_base ia64_frame_base =
2220 ia64_frame_base_address,
2221 ia64_frame_base_address,
2222 ia64_frame_base_address
2225 #ifdef HAVE_LIBUNWIND_IA64_H
2227 struct ia64_unwind_table_entry
2229 unw_word_t start_offset;
2230 unw_word_t end_offset;
2231 unw_word_t info_offset;
2234 static __inline__ uint64_t
2235 ia64_rse_slot_num (uint64_t addr)
2237 return (addr >> 3) & 0x3f;
2240 /* Skip over a designated number of registers in the backing
2241 store, remembering every 64th position is for NAT. */
2242 static __inline__ uint64_t
2243 ia64_rse_skip_regs (uint64_t addr, long num_regs)
2245 long delta = ia64_rse_slot_num(addr) + num_regs;
2249 return addr + ((num_regs + delta/0x3f) << 3);
2252 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2253 number to a libunwind register number. */
2255 ia64_gdb2uw_regnum (int regnum)
2257 if (regnum == sp_regnum)
2259 else if (regnum == IA64_BSP_REGNUM)
2260 return UNW_IA64_BSP;
2261 else if ((unsigned) (regnum - IA64_GR0_REGNUM) < 128)
2262 return UNW_IA64_GR + (regnum - IA64_GR0_REGNUM);
2263 else if ((unsigned) (regnum - V32_REGNUM) < 95)
2264 return UNW_IA64_GR + 32 + (regnum - V32_REGNUM);
2265 else if ((unsigned) (regnum - IA64_FR0_REGNUM) < 128)
2266 return UNW_IA64_FR + (regnum - IA64_FR0_REGNUM);
2267 else if ((unsigned) (regnum - IA64_PR0_REGNUM) < 64)
2269 else if ((unsigned) (regnum - IA64_BR0_REGNUM) < 8)
2270 return UNW_IA64_BR + (regnum - IA64_BR0_REGNUM);
2271 else if (regnum == IA64_PR_REGNUM)
2273 else if (regnum == IA64_IP_REGNUM)
2275 else if (regnum == IA64_CFM_REGNUM)
2276 return UNW_IA64_CFM;
2277 else if ((unsigned) (regnum - IA64_AR0_REGNUM) < 128)
2278 return UNW_IA64_AR + (regnum - IA64_AR0_REGNUM);
2279 else if ((unsigned) (regnum - IA64_NAT0_REGNUM) < 128)
2280 return UNW_IA64_NAT + (regnum - IA64_NAT0_REGNUM);
2285 /* Gdb libunwind-frame callback function to convert from a libunwind register
2286 number to a ia64 gdb register number. */
2288 ia64_uw2gdb_regnum (int uw_regnum)
2290 if (uw_regnum == UNW_IA64_SP)
2292 else if (uw_regnum == UNW_IA64_BSP)
2293 return IA64_BSP_REGNUM;
2294 else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 32)
2295 return IA64_GR0_REGNUM + (uw_regnum - UNW_IA64_GR);
2296 else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 128)
2297 return V32_REGNUM + (uw_regnum - (IA64_GR0_REGNUM + 32));
2298 else if ((unsigned) (uw_regnum - UNW_IA64_FR) < 128)
2299 return IA64_FR0_REGNUM + (uw_regnum - UNW_IA64_FR);
2300 else if ((unsigned) (uw_regnum - UNW_IA64_BR) < 8)
2301 return IA64_BR0_REGNUM + (uw_regnum - UNW_IA64_BR);
2302 else if (uw_regnum == UNW_IA64_PR)
2303 return IA64_PR_REGNUM;
2304 else if (uw_regnum == UNW_REG_IP)
2305 return IA64_IP_REGNUM;
2306 else if (uw_regnum == UNW_IA64_CFM)
2307 return IA64_CFM_REGNUM;
2308 else if ((unsigned) (uw_regnum - UNW_IA64_AR) < 128)
2309 return IA64_AR0_REGNUM + (uw_regnum - UNW_IA64_AR);
2310 else if ((unsigned) (uw_regnum - UNW_IA64_NAT) < 128)
2311 return IA64_NAT0_REGNUM + (uw_regnum - UNW_IA64_NAT);
2316 /* Gdb libunwind-frame callback function to reveal if register is a float
2319 ia64_is_fpreg (int uw_regnum)
2321 return unw_is_fpreg (uw_regnum);
2324 /* Libunwind callback accessor function for general registers. */
2326 ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val,
2327 int write, void *arg)
2329 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2330 unw_word_t bsp, sof, sol, cfm, psr, ip;
2331 struct frame_info *this_frame = arg;
2332 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2333 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2334 long new_sof, old_sof;
2335 char buf[MAX_REGISTER_SIZE];
2337 /* We never call any libunwind routines that need to write registers. */
2338 gdb_assert (!write);
2343 /* Libunwind expects to see the pc value which means the slot number
2344 from the psr must be merged with the ip word address. */
2345 get_frame_register (this_frame, IA64_IP_REGNUM, buf);
2346 ip = extract_unsigned_integer (buf, 8, byte_order);
2347 get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
2348 psr = extract_unsigned_integer (buf, 8, byte_order);
2349 *val = ip | ((psr >> 41) & 0x3);
2352 case UNW_IA64_AR_BSP:
2353 /* Libunwind expects to see the beginning of the current register
2354 frame so we must account for the fact that ptrace() will return a value
2355 for bsp that points *after* the current register frame. */
2356 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
2357 bsp = extract_unsigned_integer (buf, 8, byte_order);
2358 get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
2359 cfm = extract_unsigned_integer (buf, 8, byte_order);
2361 *val = ia64_rse_skip_regs (bsp, -sof);
2364 case UNW_IA64_AR_BSPSTORE:
2365 /* Libunwind wants bspstore to be after the current register frame.
2366 This is what ptrace() and gdb treats as the regular bsp value. */
2367 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
2368 *val = extract_unsigned_integer (buf, 8, byte_order);
2372 /* For all other registers, just unwind the value directly. */
2373 get_frame_register (this_frame, regnum, buf);
2374 *val = extract_unsigned_integer (buf, 8, byte_order);
2378 if (gdbarch_debug >= 1)
2379 fprintf_unfiltered (gdb_stdlog,
2380 " access_reg: from cache: %4s=%s\n",
2381 (((unsigned) regnum <= IA64_NAT127_REGNUM)
2382 ? ia64_register_names[regnum] : "r??"),
2387 /* Libunwind callback accessor function for floating-point registers. */
2389 ia64_access_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_fpreg_t *val,
2390 int write, void *arg)
2392 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2393 struct frame_info *this_frame = arg;
2395 /* We never call any libunwind routines that need to write registers. */
2396 gdb_assert (!write);
2398 get_frame_register (this_frame, regnum, (char *) val);
2403 /* Libunwind callback accessor function for top-level rse registers. */
2405 ia64_access_rse_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val,
2406 int write, void *arg)
2408 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2409 unw_word_t bsp, sof, sol, cfm, psr, ip;
2410 struct regcache *regcache = arg;
2411 struct gdbarch *gdbarch = get_regcache_arch (regcache);
2412 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2413 long new_sof, old_sof;
2414 char buf[MAX_REGISTER_SIZE];
2416 /* We never call any libunwind routines that need to write registers. */
2417 gdb_assert (!write);
2422 /* Libunwind expects to see the pc value which means the slot number
2423 from the psr must be merged with the ip word address. */
2424 regcache_cooked_read (regcache, IA64_IP_REGNUM, buf);
2425 ip = extract_unsigned_integer (buf, 8, byte_order);
2426 regcache_cooked_read (regcache, IA64_PSR_REGNUM, buf);
2427 psr = extract_unsigned_integer (buf, 8, byte_order);
2428 *val = ip | ((psr >> 41) & 0x3);
2431 case UNW_IA64_AR_BSP:
2432 /* Libunwind expects to see the beginning of the current register
2433 frame so we must account for the fact that ptrace() will return a value
2434 for bsp that points *after* the current register frame. */
2435 regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf);
2436 bsp = extract_unsigned_integer (buf, 8, byte_order);
2437 regcache_cooked_read (regcache, IA64_CFM_REGNUM, buf);
2438 cfm = extract_unsigned_integer (buf, 8, byte_order);
2440 *val = ia64_rse_skip_regs (bsp, -sof);
2443 case UNW_IA64_AR_BSPSTORE:
2444 /* Libunwind wants bspstore to be after the current register frame.
2445 This is what ptrace() and gdb treats as the regular bsp value. */
2446 regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf);
2447 *val = extract_unsigned_integer (buf, 8, byte_order);
2451 /* For all other registers, just unwind the value directly. */
2452 regcache_cooked_read (regcache, regnum, buf);
2453 *val = extract_unsigned_integer (buf, 8, byte_order);
2457 if (gdbarch_debug >= 1)
2458 fprintf_unfiltered (gdb_stdlog,
2459 " access_rse_reg: from cache: %4s=%s\n",
2460 (((unsigned) regnum <= IA64_NAT127_REGNUM)
2461 ? ia64_register_names[regnum] : "r??"),
2462 paddress (gdbarch, *val));
2467 /* Libunwind callback accessor function for top-level fp registers. */
2469 ia64_access_rse_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum,
2470 unw_fpreg_t *val, int write, void *arg)
2472 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2473 struct regcache *regcache = arg;
2475 /* We never call any libunwind routines that need to write registers. */
2476 gdb_assert (!write);
2478 regcache_cooked_read (regcache, regnum, (char *) val);
2483 /* Libunwind callback accessor function for accessing memory. */
2485 ia64_access_mem (unw_addr_space_t as,
2486 unw_word_t addr, unw_word_t *val,
2487 int write, void *arg)
2489 if (addr - KERNEL_START < ktab_size)
2491 unw_word_t *laddr = (unw_word_t*) ((char *) ktab
2492 + (addr - KERNEL_START));
2501 /* XXX do we need to normalize byte-order here? */
2503 return target_write_memory (addr, (char *) val, sizeof (unw_word_t));
2505 return target_read_memory (addr, (char *) val, sizeof (unw_word_t));
2508 /* Call low-level function to access the kernel unwind table. */
2510 getunwind_table (gdb_byte **buf_p)
2514 /* FIXME drow/2005-09-10: This code used to call
2515 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2516 for the currently running ia64-linux kernel. That data should
2517 come from the core file and be accessed via the auxv vector; if
2518 we want to preserve fall back to the running kernel's table, then
2519 we should find a way to override the corefile layer's
2520 xfer_partial method. */
2522 x = target_read_alloc (¤t_target, TARGET_OBJECT_UNWIND_TABLE,
2528 /* Get the kernel unwind table. */
2530 get_kernel_table (unw_word_t ip, unw_dyn_info_t *di)
2532 static struct ia64_table_entry *etab;
2539 size = getunwind_table (&ktab_buf);
2541 return -UNW_ENOINFO;
2543 ktab = (struct ia64_table_entry *) ktab_buf;
2546 for (etab = ktab; etab->start_offset; ++etab)
2547 etab->info_offset += KERNEL_START;
2550 if (ip < ktab[0].start_offset || ip >= etab[-1].end_offset)
2551 return -UNW_ENOINFO;
2553 di->format = UNW_INFO_FORMAT_TABLE;
2555 di->start_ip = ktab[0].start_offset;
2556 di->end_ip = etab[-1].end_offset;
2557 di->u.ti.name_ptr = (unw_word_t) "<kernel>";
2558 di->u.ti.segbase = 0;
2559 di->u.ti.table_len = ((char *) etab - (char *) ktab) / sizeof (unw_word_t);
2560 di->u.ti.table_data = (unw_word_t *) ktab;
2562 if (gdbarch_debug >= 1)
2563 fprintf_unfiltered (gdb_stdlog, "get_kernel_table: found table `%s': "
2564 "segbase=%s, length=%s, gp=%s\n",
2565 (char *) di->u.ti.name_ptr,
2566 hex_string (di->u.ti.segbase),
2567 pulongest (di->u.ti.table_len),
2568 hex_string (di->gp));
2572 /* Find the unwind table entry for a specified address. */
2574 ia64_find_unwind_table (struct objfile *objfile, unw_word_t ip,
2575 unw_dyn_info_t *dip, void **buf)
2577 Elf_Internal_Phdr *phdr, *p_text = NULL, *p_unwind = NULL;
2578 Elf_Internal_Ehdr *ehdr;
2579 unw_word_t segbase = 0;
2580 CORE_ADDR load_base;
2584 bfd = objfile->obfd;
2586 ehdr = elf_tdata (bfd)->elf_header;
2587 phdr = elf_tdata (bfd)->phdr;
2589 load_base = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile));
2591 for (i = 0; i < ehdr->e_phnum; ++i)
2593 switch (phdr[i].p_type)
2596 if ((unw_word_t) (ip - load_base - phdr[i].p_vaddr)
2601 case PT_IA_64_UNWIND:
2602 p_unwind = phdr + i;
2610 if (!p_text || !p_unwind)
2611 return -UNW_ENOINFO;
2613 /* Verify that the segment that contains the IP also contains
2614 the static unwind table. If not, we may be in the Linux kernel's
2615 DSO gate page in which case the unwind table is another segment.
2616 Otherwise, we are dealing with runtime-generated code, for which we
2617 have no info here. */
2618 segbase = p_text->p_vaddr + load_base;
2620 if ((p_unwind->p_vaddr - p_text->p_vaddr) >= p_text->p_memsz)
2623 for (i = 0; i < ehdr->e_phnum; ++i)
2625 if (phdr[i].p_type == PT_LOAD
2626 && (p_unwind->p_vaddr - phdr[i].p_vaddr) < phdr[i].p_memsz)
2629 /* Get the segbase from the section containing the
2631 segbase = phdr[i].p_vaddr + load_base;
2635 return -UNW_ENOINFO;
2638 dip->start_ip = p_text->p_vaddr + load_base;
2639 dip->end_ip = dip->start_ip + p_text->p_memsz;
2640 dip->gp = ia64_find_global_pointer (get_objfile_arch (objfile), ip);
2641 dip->format = UNW_INFO_FORMAT_REMOTE_TABLE;
2642 dip->u.rti.name_ptr = (unw_word_t) bfd_get_filename (bfd);
2643 dip->u.rti.segbase = segbase;
2644 dip->u.rti.table_len = p_unwind->p_memsz / sizeof (unw_word_t);
2645 dip->u.rti.table_data = p_unwind->p_vaddr + load_base;
2650 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2652 ia64_find_proc_info_x (unw_addr_space_t as, unw_word_t ip, unw_proc_info_t *pi,
2653 int need_unwind_info, void *arg)
2655 struct obj_section *sec = find_pc_section (ip);
2662 /* XXX This only works if the host and the target architecture are
2663 both ia64 and if the have (more or less) the same kernel
2665 if (get_kernel_table (ip, &di) < 0)
2666 return -UNW_ENOINFO;
2668 if (gdbarch_debug >= 1)
2669 fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: %s -> "
2670 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2671 "length=%s,data=%s)\n",
2672 hex_string (ip), (char *)di.u.ti.name_ptr,
2673 hex_string (di.u.ti.segbase),
2674 hex_string (di.start_ip), hex_string (di.end_ip),
2676 pulongest (di.u.ti.table_len),
2677 hex_string ((CORE_ADDR)di.u.ti.table_data));
2681 ret = ia64_find_unwind_table (sec->objfile, ip, &di, &buf);
2685 if (gdbarch_debug >= 1)
2686 fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: %s -> "
2687 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2688 "length=%s,data=%s)\n",
2689 hex_string (ip), (char *)di.u.rti.name_ptr,
2690 hex_string (di.u.rti.segbase),
2691 hex_string (di.start_ip), hex_string (di.end_ip),
2693 pulongest (di.u.rti.table_len),
2694 hex_string (di.u.rti.table_data));
2697 ret = libunwind_search_unwind_table (&as, ip, &di, pi, need_unwind_info,
2700 /* We no longer need the dyn info storage so free it. */
2706 /* Libunwind callback accessor function for cleanup. */
2708 ia64_put_unwind_info (unw_addr_space_t as,
2709 unw_proc_info_t *pip, void *arg)
2711 /* Nothing required for now. */
2714 /* Libunwind callback accessor function to get head of the dynamic
2715 unwind-info registration list. */
2717 ia64_get_dyn_info_list (unw_addr_space_t as,
2718 unw_word_t *dilap, void *arg)
2720 struct obj_section *text_sec;
2721 struct objfile *objfile;
2722 unw_word_t ip, addr;
2726 if (!libunwind_is_initialized ())
2727 return -UNW_ENOINFO;
2729 for (objfile = object_files; objfile; objfile = objfile->next)
2733 text_sec = objfile->sections + SECT_OFF_TEXT (objfile);
2734 ip = obj_section_addr (text_sec);
2735 ret = ia64_find_unwind_table (objfile, ip, &di, &buf);
2738 addr = libunwind_find_dyn_list (as, &di, arg);
2739 /* We no longer need the dyn info storage so free it. */
2744 if (gdbarch_debug >= 1)
2745 fprintf_unfiltered (gdb_stdlog,
2746 "dynamic unwind table in objfile %s "
2748 bfd_get_filename (objfile->obfd),
2749 hex_string (addr), hex_string (di.gp));
2755 return -UNW_ENOINFO;
2759 /* Frame interface functions for libunwind. */
2762 ia64_libunwind_frame_this_id (struct frame_info *this_frame, void **this_cache,
2763 struct frame_id *this_id)
2765 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2766 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2772 libunwind_frame_this_id (this_frame, this_cache, &id);
2773 if (frame_id_eq (id, null_frame_id))
2775 (*this_id) = null_frame_id;
2779 /* We must add the bsp as the special address for frame comparison
2781 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
2782 bsp = extract_unsigned_integer (buf, 8, byte_order);
2784 (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp);
2786 if (gdbarch_debug >= 1)
2787 fprintf_unfiltered (gdb_stdlog,
2788 "libunwind frame id: code %s, stack %s, special %s, this_frame %s\n",
2789 paddress (gdbarch, id.code_addr),
2790 paddress (gdbarch, id.stack_addr),
2791 paddress (gdbarch, bsp),
2792 host_address_to_string (this_frame));
2795 static struct value *
2796 ia64_libunwind_frame_prev_register (struct frame_info *this_frame,
2797 void **this_cache, int regnum)
2800 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2801 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2804 if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
2805 reg = IA64_PR_REGNUM;
2806 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
2807 reg = IA64_UNAT_REGNUM;
2809 /* Let libunwind do most of the work. */
2810 val = libunwind_frame_prev_register (this_frame, this_cache, reg);
2812 if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
2816 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
2820 unsigned char buf[MAX_REGISTER_SIZE];
2822 /* Fetch predicate register rename base from current frame
2823 marker for this frame. */
2824 get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
2825 cfm = extract_unsigned_integer (buf, 8, byte_order);
2826 rrb_pr = (cfm >> 32) & 0x3f;
2828 /* Adjust the register number to account for register rotation. */
2829 regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
2831 prN_val = extract_bit_field (value_contents_all (val),
2832 regnum - VP0_REGNUM, 1);
2833 return frame_unwind_got_constant (this_frame, regnum, prN_val);
2836 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
2840 unatN_val = extract_bit_field (value_contents_all (val),
2841 regnum - IA64_NAT0_REGNUM, 1);
2842 return frame_unwind_got_constant (this_frame, regnum, unatN_val);
2845 else if (regnum == IA64_BSP_REGNUM)
2847 struct value *cfm_val;
2848 CORE_ADDR prev_bsp, prev_cfm;
2850 /* We want to calculate the previous bsp as the end of the previous
2851 register stack frame. This corresponds to what the hardware bsp
2852 register will be if we pop the frame back which is why we might
2853 have been called. We know that libunwind will pass us back the
2854 beginning of the current frame so we should just add sof to it. */
2855 prev_bsp = extract_unsigned_integer (value_contents_all (val),
2857 cfm_val = libunwind_frame_prev_register (this_frame, this_cache,
2859 prev_cfm = extract_unsigned_integer (value_contents_all (cfm_val),
2861 prev_bsp = rse_address_add (prev_bsp, (prev_cfm & 0x7f));
2863 return frame_unwind_got_constant (this_frame, regnum, prev_bsp);
2870 ia64_libunwind_frame_sniffer (const struct frame_unwind *self,
2871 struct frame_info *this_frame,
2874 if (libunwind_is_initialized ()
2875 && libunwind_frame_sniffer (self, this_frame, this_cache))
2881 static const struct frame_unwind ia64_libunwind_frame_unwind =
2884 ia64_libunwind_frame_this_id,
2885 ia64_libunwind_frame_prev_register,
2887 ia64_libunwind_frame_sniffer,
2888 libunwind_frame_dealloc_cache
2892 ia64_libunwind_sigtramp_frame_this_id (struct frame_info *this_frame,
2894 struct frame_id *this_id)
2896 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2897 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2903 libunwind_frame_this_id (this_frame, this_cache, &id);
2904 if (frame_id_eq (id, null_frame_id))
2906 (*this_id) = null_frame_id;
2910 /* We must add the bsp as the special address for frame comparison
2912 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
2913 bsp = extract_unsigned_integer (buf, 8, byte_order);
2915 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2916 (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp);
2918 if (gdbarch_debug >= 1)
2919 fprintf_unfiltered (gdb_stdlog,
2920 "libunwind sigtramp frame id: code %s, stack %s, special %s, this_frame %s\n",
2921 paddress (gdbarch, id.code_addr),
2922 paddress (gdbarch, id.stack_addr),
2923 paddress (gdbarch, bsp),
2924 host_address_to_string (this_frame));
2927 static struct value *
2928 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info *this_frame,
2929 void **this_cache, int regnum)
2931 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2932 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2933 struct value *prev_ip_val;
2936 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2937 method of getting previous registers. */
2938 prev_ip_val = libunwind_frame_prev_register (this_frame, this_cache,
2940 prev_ip = extract_unsigned_integer (value_contents_all (prev_ip_val),
2945 void *tmp_cache = NULL;
2946 return ia64_sigtramp_frame_prev_register (this_frame, &tmp_cache,
2950 return ia64_libunwind_frame_prev_register (this_frame, this_cache, regnum);
2954 ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind *self,
2955 struct frame_info *this_frame,
2958 if (libunwind_is_initialized ())
2960 if (libunwind_sigtramp_frame_sniffer (self, this_frame, this_cache))
2965 return ia64_sigtramp_frame_sniffer (self, this_frame, this_cache);
2968 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind =
2971 ia64_libunwind_sigtramp_frame_this_id,
2972 ia64_libunwind_sigtramp_frame_prev_register,
2974 ia64_libunwind_sigtramp_frame_sniffer
2977 /* Set of libunwind callback acccessor functions. */
2978 static unw_accessors_t ia64_unw_accessors =
2980 ia64_find_proc_info_x,
2981 ia64_put_unwind_info,
2982 ia64_get_dyn_info_list,
2990 /* Set of special libunwind callback acccessor functions specific for accessing
2991 the rse registers. At the top of the stack, we want libunwind to figure out
2992 how to read r32 - r127. Though usually they are found sequentially in memory
2993 starting from $bof, this is not always true. */
2994 static unw_accessors_t ia64_unw_rse_accessors =
2996 ia64_find_proc_info_x,
2997 ia64_put_unwind_info,
2998 ia64_get_dyn_info_list,
3000 ia64_access_rse_reg,
3001 ia64_access_rse_fpreg,
3006 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
3007 static struct libunwind_descr ia64_libunwind_descr =
3012 &ia64_unw_accessors,
3013 &ia64_unw_rse_accessors,
3016 #endif /* HAVE_LIBUNWIND_IA64_H */
3019 ia64_use_struct_convention (struct type *type)
3021 struct type *float_elt_type;
3023 /* Don't use the struct convention for anything but structure,
3024 union, or array types. */
3025 if (!(TYPE_CODE (type) == TYPE_CODE_STRUCT
3026 || TYPE_CODE (type) == TYPE_CODE_UNION
3027 || TYPE_CODE (type) == TYPE_CODE_ARRAY))
3030 /* HFAs are structures (or arrays) consisting entirely of floating
3031 point values of the same length. Up to 8 of these are returned
3032 in registers. Don't use the struct convention when this is the
3034 float_elt_type = is_float_or_hfa_type (type);
3035 if (float_elt_type != NULL
3036 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
3039 /* Other structs of length 32 or less are returned in r8-r11.
3040 Don't use the struct convention for those either. */
3041 return TYPE_LENGTH (type) > 32;
3045 ia64_extract_return_value (struct type *type, struct regcache *regcache,
3048 struct gdbarch *gdbarch = get_regcache_arch (regcache);
3049 struct type *float_elt_type;
3051 float_elt_type = is_float_or_hfa_type (type);
3052 if (float_elt_type != NULL)
3054 char from[MAX_REGISTER_SIZE];
3056 int regnum = IA64_FR8_REGNUM;
3057 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
3061 regcache_cooked_read (regcache, regnum, from);
3062 convert_typed_floating (from, ia64_ext_type (gdbarch),
3063 (char *)valbuf + offset, float_elt_type);
3064 offset += TYPE_LENGTH (float_elt_type);
3072 int regnum = IA64_GR8_REGNUM;
3073 int reglen = TYPE_LENGTH (register_type (gdbarch, IA64_GR8_REGNUM));
3074 int n = TYPE_LENGTH (type) / reglen;
3075 int m = TYPE_LENGTH (type) % reglen;
3080 regcache_cooked_read_unsigned (regcache, regnum, &val);
3081 memcpy ((char *)valbuf + offset, &val, reglen);
3088 regcache_cooked_read_unsigned (regcache, regnum, &val);
3089 memcpy ((char *)valbuf + offset, &val, m);
3095 ia64_store_return_value (struct type *type, struct regcache *regcache,
3096 const gdb_byte *valbuf)
3098 struct gdbarch *gdbarch = get_regcache_arch (regcache);
3099 struct type *float_elt_type;
3101 float_elt_type = is_float_or_hfa_type (type);
3102 if (float_elt_type != NULL)
3104 char to[MAX_REGISTER_SIZE];
3106 int regnum = IA64_FR8_REGNUM;
3107 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
3111 convert_typed_floating ((char *)valbuf + offset, float_elt_type,
3112 to, ia64_ext_type (gdbarch));
3113 regcache_cooked_write (regcache, regnum, to);
3114 offset += TYPE_LENGTH (float_elt_type);
3122 int regnum = IA64_GR8_REGNUM;
3123 int reglen = TYPE_LENGTH (register_type (gdbarch, IA64_GR8_REGNUM));
3124 int n = TYPE_LENGTH (type) / reglen;
3125 int m = TYPE_LENGTH (type) % reglen;
3130 memcpy (&val, (char *)valbuf + offset, reglen);
3131 regcache_cooked_write_unsigned (regcache, regnum, val);
3138 memcpy (&val, (char *)valbuf + offset, m);
3139 regcache_cooked_write_unsigned (regcache, regnum, val);
3144 static enum return_value_convention
3145 ia64_return_value (struct gdbarch *gdbarch, struct type *func_type,
3146 struct type *valtype, struct regcache *regcache,
3147 gdb_byte *readbuf, const gdb_byte *writebuf)
3149 int struct_return = ia64_use_struct_convention (valtype);
3151 if (writebuf != NULL)
3153 gdb_assert (!struct_return);
3154 ia64_store_return_value (valtype, regcache, writebuf);
3157 if (readbuf != NULL)
3159 gdb_assert (!struct_return);
3160 ia64_extract_return_value (valtype, regcache, readbuf);
3164 return RETURN_VALUE_STRUCT_CONVENTION;
3166 return RETURN_VALUE_REGISTER_CONVENTION;
3170 is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
3172 switch (TYPE_CODE (t))
3176 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
3183 case TYPE_CODE_ARRAY:
3185 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
3188 case TYPE_CODE_STRUCT:
3192 for (i = 0; i < TYPE_NFIELDS (t); i++)
3193 if (!is_float_or_hfa_type_recurse
3194 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
3205 /* Determine if the given type is one of the floating point types or
3206 and HFA (which is a struct, array, or combination thereof whose
3207 bottom-most elements are all of the same floating point type). */
3209 static struct type *
3210 is_float_or_hfa_type (struct type *t)
3212 struct type *et = 0;
3214 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
3218 /* Return 1 if the alignment of T is such that the next even slot
3219 should be used. Return 0, if the next available slot should
3220 be used. (See section 8.5.1 of the IA-64 Software Conventions
3221 and Runtime manual). */
3224 slot_alignment_is_next_even (struct type *t)
3226 switch (TYPE_CODE (t))
3230 if (TYPE_LENGTH (t) > 8)
3234 case TYPE_CODE_ARRAY:
3236 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
3237 case TYPE_CODE_STRUCT:
3241 for (i = 0; i < TYPE_NFIELDS (t); i++)
3242 if (slot_alignment_is_next_even
3243 (check_typedef (TYPE_FIELD_TYPE (t, i))))
3252 /* Attempt to find (and return) the global pointer for the given
3255 This is a rather nasty bit of code searchs for the .dynamic section
3256 in the objfile corresponding to the pc of the function we're trying
3257 to call. Once it finds the addresses at which the .dynamic section
3258 lives in the child process, it scans the Elf64_Dyn entries for a
3259 DT_PLTGOT tag. If it finds one of these, the corresponding
3260 d_un.d_ptr value is the global pointer. */
3263 ia64_find_global_pointer (struct gdbarch *gdbarch, CORE_ADDR faddr)
3265 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3266 struct obj_section *faddr_sect;
3268 faddr_sect = find_pc_section (faddr);
3269 if (faddr_sect != NULL)
3271 struct obj_section *osect;
3273 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
3275 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
3279 if (osect < faddr_sect->objfile->sections_end)
3281 CORE_ADDR addr, endaddr;
3283 addr = obj_section_addr (osect);
3284 endaddr = obj_section_endaddr (osect);
3286 while (addr < endaddr)
3292 status = target_read_memory (addr, buf, sizeof (buf));
3295 tag = extract_signed_integer (buf, sizeof (buf), byte_order);
3297 if (tag == DT_PLTGOT)
3299 CORE_ADDR global_pointer;
3301 status = target_read_memory (addr + 8, buf, sizeof (buf));
3304 global_pointer = extract_unsigned_integer (buf, sizeof (buf),
3308 return global_pointer;
3321 /* Given a function's address, attempt to find (and return) the
3322 corresponding (canonical) function descriptor. Return 0 if
3325 find_extant_func_descr (struct gdbarch *gdbarch, CORE_ADDR faddr)
3327 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3328 struct obj_section *faddr_sect;
3330 /* Return early if faddr is already a function descriptor. */
3331 faddr_sect = find_pc_section (faddr);
3332 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
3335 if (faddr_sect != NULL)
3337 struct obj_section *osect;
3338 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
3340 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
3344 if (osect < faddr_sect->objfile->sections_end)
3346 CORE_ADDR addr, endaddr;
3348 addr = obj_section_addr (osect);
3349 endaddr = obj_section_endaddr (osect);
3351 while (addr < endaddr)
3357 status = target_read_memory (addr, buf, sizeof (buf));
3360 faddr2 = extract_signed_integer (buf, sizeof (buf), byte_order);
3362 if (faddr == faddr2)
3372 /* Attempt to find a function descriptor corresponding to the
3373 given address. If none is found, construct one on the
3374 stack using the address at fdaptr. */
3377 find_func_descr (struct regcache *regcache, CORE_ADDR faddr, CORE_ADDR *fdaptr)
3379 struct gdbarch *gdbarch = get_regcache_arch (regcache);
3380 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3383 fdesc = find_extant_func_descr (gdbarch, faddr);
3387 ULONGEST global_pointer;
3393 global_pointer = ia64_find_global_pointer (gdbarch, faddr);
3395 if (global_pointer == 0)
3396 regcache_cooked_read_unsigned (regcache,
3397 IA64_GR1_REGNUM, &global_pointer);
3399 store_unsigned_integer (buf, 8, byte_order, faddr);
3400 store_unsigned_integer (buf + 8, 8, byte_order, global_pointer);
3402 write_memory (fdesc, buf, 16);
3408 /* Use the following routine when printing out function pointers
3409 so the user can see the function address rather than just the
3410 function descriptor. */
3412 ia64_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
3413 struct target_ops *targ)
3415 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3416 struct obj_section *s;
3418 s = find_pc_section (addr);
3420 /* check if ADDR points to a function descriptor. */
3421 if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
3422 return read_memory_unsigned_integer (addr, 8, byte_order);
3424 /* Normally, functions live inside a section that is executable.
3425 So, if ADDR points to a non-executable section, then treat it
3426 as a function descriptor and return the target address iff
3427 the target address itself points to a section that is executable. */
3428 if (s && (s->the_bfd_section->flags & SEC_CODE) == 0)
3430 CORE_ADDR pc = read_memory_unsigned_integer (addr, 8, byte_order);
3431 struct obj_section *pc_section = find_pc_section (pc);
3433 if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE))
3437 /* There are also descriptors embedded in vtables. */
3440 struct minimal_symbol *minsym;
3442 minsym = lookup_minimal_symbol_by_pc (addr);
3444 if (minsym && is_vtable_name (SYMBOL_LINKAGE_NAME (minsym)))
3445 return read_memory_unsigned_integer (addr, 8, byte_order);
3452 ia64_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
3458 ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
3459 struct regcache *regcache, CORE_ADDR bp_addr,
3460 int nargs, struct value **args, CORE_ADDR sp,
3461 int struct_return, CORE_ADDR struct_addr)
3463 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3468 int nslots, rseslots, memslots, slotnum, nfuncargs;
3470 ULONGEST bsp, cfm, pfs, new_bsp;
3471 CORE_ADDR funcdescaddr, pc, global_pointer;
3472 CORE_ADDR func_addr = find_function_addr (function, NULL);
3476 /* Count the number of slots needed for the arguments. */
3477 for (argno = 0; argno < nargs; argno++)
3480 type = check_typedef (value_type (arg));
3481 len = TYPE_LENGTH (type);
3483 if ((nslots & 1) && slot_alignment_is_next_even (type))
3486 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
3489 nslots += (len + 7) / 8;
3492 /* Divvy up the slots between the RSE and the memory stack. */
3493 rseslots = (nslots > 8) ? 8 : nslots;
3494 memslots = nslots - rseslots;
3496 /* Allocate a new RSE frame. */
3497 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
3499 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
3500 new_bsp = rse_address_add (bsp, rseslots);
3501 regcache_cooked_write_unsigned (regcache, IA64_BSP_REGNUM, new_bsp);
3503 regcache_cooked_read_unsigned (regcache, IA64_PFS_REGNUM, &pfs);
3504 pfs &= 0xc000000000000000LL;
3505 pfs |= (cfm & 0xffffffffffffLL);
3506 regcache_cooked_write_unsigned (regcache, IA64_PFS_REGNUM, pfs);
3508 cfm &= 0xc000000000000000LL;
3510 regcache_cooked_write_unsigned (regcache, IA64_CFM_REGNUM, cfm);
3512 /* We will attempt to find function descriptors in the .opd segment,
3513 but if we can't we'll construct them ourselves. That being the
3514 case, we'll need to reserve space on the stack for them. */
3515 funcdescaddr = sp - nfuncargs * 16;
3516 funcdescaddr &= ~0xfLL;
3518 /* Adjust the stack pointer to it's new value. The calling conventions
3519 require us to have 16 bytes of scratch, plus whatever space is
3520 necessary for the memory slots and our function descriptors. */
3521 sp = sp - 16 - (memslots + nfuncargs) * 8;
3522 sp &= ~0xfLL; /* Maintain 16 byte alignment. */
3524 /* Place the arguments where they belong. The arguments will be
3525 either placed in the RSE backing store or on the memory stack.
3526 In addition, floating point arguments or HFAs are placed in
3527 floating point registers. */
3529 floatreg = IA64_FR8_REGNUM;
3530 for (argno = 0; argno < nargs; argno++)
3532 struct type *float_elt_type;
3535 type = check_typedef (value_type (arg));
3536 len = TYPE_LENGTH (type);
3538 /* Special handling for function parameters. */
3540 && TYPE_CODE (type) == TYPE_CODE_PTR
3541 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
3544 ULONGEST faddr = extract_unsigned_integer (value_contents (arg),
3546 store_unsigned_integer (val_buf, 8, byte_order,
3547 find_func_descr (regcache, faddr,
3549 if (slotnum < rseslots)
3550 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
3552 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
3559 /* Skip odd slot if necessary... */
3560 if ((slotnum & 1) && slot_alignment_is_next_even (type))
3568 memset (val_buf, 0, 8);
3569 memcpy (val_buf, value_contents (arg) + argoffset, (len > 8) ? 8 : len);
3571 if (slotnum < rseslots)
3572 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
3574 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
3581 /* Handle floating point types (including HFAs). */
3582 float_elt_type = is_float_or_hfa_type (type);
3583 if (float_elt_type != NULL)
3586 len = TYPE_LENGTH (type);
3587 while (len > 0 && floatreg < IA64_FR16_REGNUM)
3589 char to[MAX_REGISTER_SIZE];
3590 convert_typed_floating (value_contents (arg) + argoffset, float_elt_type,
3591 to, ia64_ext_type (gdbarch));
3592 regcache_cooked_write (regcache, floatreg, (void *)to);
3594 argoffset += TYPE_LENGTH (float_elt_type);
3595 len -= TYPE_LENGTH (float_elt_type);
3600 /* Store the struct return value in r8 if necessary. */
3603 regcache_cooked_write_unsigned (regcache, IA64_GR8_REGNUM, (ULONGEST)struct_addr);
3606 global_pointer = ia64_find_global_pointer (gdbarch, func_addr);
3608 if (global_pointer != 0)
3609 regcache_cooked_write_unsigned (regcache, IA64_GR1_REGNUM, global_pointer);
3611 regcache_cooked_write_unsigned (regcache, IA64_BR0_REGNUM, bp_addr);
3613 regcache_cooked_write_unsigned (regcache, sp_regnum, sp);
3618 static struct frame_id
3619 ia64_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
3621 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3625 get_frame_register (this_frame, sp_regnum, buf);
3626 sp = extract_unsigned_integer (buf, 8, byte_order);
3628 get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
3629 bsp = extract_unsigned_integer (buf, 8, byte_order);
3631 if (gdbarch_debug >= 1)
3632 fprintf_unfiltered (gdb_stdlog,
3633 "dummy frame id: code %s, stack %s, special %s\n",
3634 paddress (gdbarch, get_frame_pc (this_frame)),
3635 paddress (gdbarch, sp), paddress (gdbarch, bsp));
3637 return frame_id_build_special (sp, get_frame_pc (this_frame), bsp);
3641 ia64_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
3643 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3645 CORE_ADDR ip, psr, pc;
3647 frame_unwind_register (next_frame, IA64_IP_REGNUM, buf);
3648 ip = extract_unsigned_integer (buf, 8, byte_order);
3649 frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf);
3650 psr = extract_unsigned_integer (buf, 8, byte_order);
3652 pc = (ip & ~0xf) | ((psr >> 41) & 3);
3657 ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info)
3659 info->bytes_per_line = SLOT_MULTIPLIER;
3660 return print_insn_ia64 (memaddr, info);
3663 static struct gdbarch *
3664 ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3666 struct gdbarch *gdbarch;
3667 struct gdbarch_tdep *tdep;
3669 /* If there is already a candidate, use it. */
3670 arches = gdbarch_list_lookup_by_info (arches, &info);
3672 return arches->gdbarch;
3674 tdep = xmalloc (sizeof (struct gdbarch_tdep));
3675 gdbarch = gdbarch_alloc (&info, tdep);
3677 tdep->sigcontext_register_address = 0;
3678 tdep->pc_in_sigtramp = 0;
3680 /* According to the ia64 specs, instructions that store long double
3681 floats in memory use a long-double format different than that
3682 used in the floating registers. The memory format matches the
3683 x86 extended float format which is 80 bits. An OS may choose to
3684 use this format (e.g. GNU/Linux) or choose to use a different
3685 format for storing long doubles (e.g. HPUX). In the latter case,
3686 the setting of the format may be moved/overridden in an
3687 OS-specific tdep file. */
3688 set_gdbarch_long_double_format (gdbarch, floatformats_i387_ext);
3690 set_gdbarch_short_bit (gdbarch, 16);
3691 set_gdbarch_int_bit (gdbarch, 32);
3692 set_gdbarch_long_bit (gdbarch, 64);
3693 set_gdbarch_long_long_bit (gdbarch, 64);
3694 set_gdbarch_float_bit (gdbarch, 32);
3695 set_gdbarch_double_bit (gdbarch, 64);
3696 set_gdbarch_long_double_bit (gdbarch, 128);
3697 set_gdbarch_ptr_bit (gdbarch, 64);
3699 set_gdbarch_num_regs (gdbarch, NUM_IA64_RAW_REGS);
3700 set_gdbarch_num_pseudo_regs (gdbarch, LAST_PSEUDO_REGNUM - FIRST_PSEUDO_REGNUM);
3701 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
3702 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
3704 set_gdbarch_register_name (gdbarch, ia64_register_name);
3705 set_gdbarch_register_type (gdbarch, ia64_register_type);
3707 set_gdbarch_pseudo_register_read (gdbarch, ia64_pseudo_register_read);
3708 set_gdbarch_pseudo_register_write (gdbarch, ia64_pseudo_register_write);
3709 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, ia64_dwarf_reg_to_regnum);
3710 set_gdbarch_register_reggroup_p (gdbarch, ia64_register_reggroup_p);
3711 set_gdbarch_convert_register_p (gdbarch, ia64_convert_register_p);
3712 set_gdbarch_register_to_value (gdbarch, ia64_register_to_value);
3713 set_gdbarch_value_to_register (gdbarch, ia64_value_to_register);
3715 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
3717 set_gdbarch_return_value (gdbarch, ia64_return_value);
3719 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
3720 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
3721 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
3722 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
3723 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
3725 /* Settings for calling functions in the inferior. */
3726 set_gdbarch_push_dummy_call (gdbarch, ia64_push_dummy_call);
3727 set_gdbarch_frame_align (gdbarch, ia64_frame_align);
3728 set_gdbarch_dummy_id (gdbarch, ia64_dummy_id);
3730 set_gdbarch_unwind_pc (gdbarch, ia64_unwind_pc);
3731 #ifdef HAVE_LIBUNWIND_IA64_H
3732 frame_unwind_append_unwinder (gdbarch,
3733 &ia64_libunwind_sigtramp_frame_unwind);
3734 frame_unwind_append_unwinder (gdbarch, &ia64_libunwind_frame_unwind);
3735 frame_unwind_append_unwinder (gdbarch, &ia64_sigtramp_frame_unwind);
3736 libunwind_frame_set_descr (gdbarch, &ia64_libunwind_descr);
3738 frame_unwind_append_unwinder (gdbarch, &ia64_sigtramp_frame_unwind);
3740 frame_unwind_append_unwinder (gdbarch, &ia64_frame_unwind);
3741 frame_base_set_default (gdbarch, &ia64_frame_base);
3743 /* Settings that should be unnecessary. */
3744 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
3746 set_gdbarch_print_insn (gdbarch, ia64_print_insn);
3747 set_gdbarch_convert_from_func_ptr_addr (gdbarch, ia64_convert_from_func_ptr_addr);
3749 /* The virtual table contains 16-byte descriptors, not pointers to
3751 set_gdbarch_vtable_function_descriptors (gdbarch, 1);
3753 /* Hook in ABI-specific overrides, if they have been registered. */
3754 gdbarch_init_osabi (info, gdbarch);
3759 extern initialize_file_ftype _initialize_ia64_tdep; /* -Wmissing-prototypes */
3762 _initialize_ia64_tdep (void)
3764 gdbarch_register (bfd_arch_ia64, ia64_gdbarch_init, NULL);