1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
26 #include "arch-utils.h"
27 #include "floatformat.h"
29 #include "reggroups.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
35 #include "gdb_assert.h"
37 #include "elf/common.h" /* for DT_PLTGOT value */
42 #include "ia64-tdep.h"
44 #ifdef HAVE_LIBUNWIND_IA64_H
45 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
46 #include "libunwind-frame.h"
47 #include "libunwind-ia64.h"
50 /* An enumeration of the different IA-64 instruction types. */
52 typedef enum instruction_type
54 A, /* Integer ALU ; I-unit or M-unit */
55 I, /* Non-ALU integer; I-unit */
56 M, /* Memory ; M-unit */
57 F, /* Floating-point ; F-unit */
58 B, /* Branch ; B-unit */
59 L, /* Extended (L+X) ; I-unit */
60 X, /* Extended (L+X) ; I-unit */
61 undefined /* undefined or reserved */
64 /* We represent IA-64 PC addresses as the value of the instruction
65 pointer or'd with some bit combination in the low nibble which
66 represents the slot number in the bundle addressed by the
67 instruction pointer. The problem is that the Linux kernel
68 multiplies its slot numbers (for exceptions) by one while the
69 disassembler multiplies its slot numbers by 6. In addition, I've
70 heard it said that the simulator uses 1 as the multiplier.
72 I've fixed the disassembler so that the bytes_per_line field will
73 be the slot multiplier. If bytes_per_line comes in as zero, it
74 is set to six (which is how it was set up initially). -- objdump
75 displays pretty disassembly dumps with this value. For our purposes,
76 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
77 never want to also display the raw bytes the way objdump does. */
79 #define SLOT_MULTIPLIER 1
81 /* Length in bytes of an instruction bundle */
85 static gdbarch_init_ftype ia64_gdbarch_init;
87 static gdbarch_register_name_ftype ia64_register_name;
88 static gdbarch_register_type_ftype ia64_register_type;
89 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
90 static gdbarch_skip_prologue_ftype ia64_skip_prologue;
91 static gdbarch_extract_return_value_ftype ia64_extract_return_value;
92 static struct type *is_float_or_hfa_type (struct type *t);
93 static CORE_ADDR ia64_find_global_pointer (CORE_ADDR faddr);
95 static struct type *builtin_type_ia64_ext;
97 #define NUM_IA64_RAW_REGS 462
99 static int sp_regnum = IA64_GR12_REGNUM;
100 static int fp_regnum = IA64_VFP_REGNUM;
101 static int lr_regnum = IA64_VRAP_REGNUM;
103 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
104 they may not be accessible via the ptrace register get/set interfaces. */
105 enum pseudo_regs { FIRST_PSEUDO_REGNUM = NUM_IA64_RAW_REGS, VBOF_REGNUM = IA64_NAT127_REGNUM + 1, V32_REGNUM,
106 V127_REGNUM = V32_REGNUM + 95,
107 VP0_REGNUM, VP16_REGNUM = VP0_REGNUM + 16, VP63_REGNUM = VP0_REGNUM + 63, LAST_PSEUDO_REGNUM };
109 /* Array of register names; There should be ia64_num_regs strings in
112 static char *ia64_register_names[] =
113 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
114 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
115 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
116 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
117 "", "", "", "", "", "", "", "",
118 "", "", "", "", "", "", "", "",
119 "", "", "", "", "", "", "", "",
120 "", "", "", "", "", "", "", "",
121 "", "", "", "", "", "", "", "",
122 "", "", "", "", "", "", "", "",
123 "", "", "", "", "", "", "", "",
124 "", "", "", "", "", "", "", "",
125 "", "", "", "", "", "", "", "",
126 "", "", "", "", "", "", "", "",
127 "", "", "", "", "", "", "", "",
128 "", "", "", "", "", "", "", "",
130 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
131 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
132 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
133 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
134 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
135 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
136 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
137 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
138 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
139 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
140 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
141 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
142 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
143 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
144 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
145 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
147 "", "", "", "", "", "", "", "",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
156 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
160 "pr", "ip", "psr", "cfm",
162 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
163 "", "", "", "", "", "", "", "",
164 "rsc", "bsp", "bspstore", "rnat",
166 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
167 "ccv", "", "", "", "unat", "", "", "",
168 "fpsr", "", "", "", "itc",
169 "", "", "", "", "", "", "", "", "", "",
170 "", "", "", "", "", "", "", "", "",
172 "", "", "", "", "", "", "", "", "", "",
173 "", "", "", "", "", "", "", "", "", "",
174 "", "", "", "", "", "", "", "", "", "",
175 "", "", "", "", "", "", "", "", "", "",
176 "", "", "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "", "", "",
179 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
180 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
181 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
182 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
183 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
184 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
185 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
186 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
187 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
188 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
189 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
190 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
191 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
192 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
193 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
194 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
198 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
199 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
200 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
201 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
202 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
203 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
204 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
205 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
206 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
207 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
208 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
209 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
211 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
212 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
213 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
214 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
215 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
216 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
217 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
218 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
221 struct ia64_frame_cache
223 CORE_ADDR base; /* frame pointer base for frame */
224 CORE_ADDR pc; /* function start pc for frame */
225 CORE_ADDR saved_sp; /* stack pointer for frame */
226 CORE_ADDR bsp; /* points at r32 for the current frame */
227 CORE_ADDR cfm; /* cfm value for current frame */
228 CORE_ADDR prev_cfm; /* cfm value for previous frame */
230 int sof; /* Size of frame (decoded from cfm value) */
231 int sol; /* Size of locals (decoded from cfm value) */
232 int sor; /* Number of rotating registers. (decoded from cfm value) */
233 CORE_ADDR after_prologue;
234 /* Address of first instruction after the last
235 prologue instruction; Note that there may
236 be instructions from the function's body
237 intermingled with the prologue. */
238 int mem_stack_frame_size;
239 /* Size of the memory stack frame (may be zero),
240 or -1 if it has not been determined yet. */
241 int fp_reg; /* Register number (if any) used a frame pointer
242 for this frame. 0 if no register is being used
243 as the frame pointer. */
245 /* Saved registers. */
246 CORE_ADDR saved_regs[NUM_IA64_RAW_REGS];
250 #define SIGCONTEXT_REGISTER_ADDRESS \
251 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
254 ia64_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
255 struct reggroup *group)
260 if (group == all_reggroup)
262 vector_p = TYPE_VECTOR (register_type (gdbarch, regnum));
263 float_p = TYPE_CODE (register_type (gdbarch, regnum)) == TYPE_CODE_FLT;
264 raw_p = regnum < NUM_IA64_RAW_REGS;
265 if (group == float_reggroup)
267 if (group == vector_reggroup)
269 if (group == general_reggroup)
270 return (!vector_p && !float_p);
271 if (group == save_reggroup || group == restore_reggroup)
277 ia64_register_name (int reg)
279 return ia64_register_names[reg];
283 ia64_register_type (struct gdbarch *arch, int reg)
285 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
286 return builtin_type_ia64_ext;
288 return builtin_type_long;
292 ia64_dwarf_reg_to_regnum (int reg)
294 if (reg >= IA64_GR32_REGNUM && reg <= IA64_GR127_REGNUM)
295 return V32_REGNUM + (reg - IA64_GR32_REGNUM);
300 floatformat_valid (const struct floatformat *fmt, const char *from)
305 const struct floatformat floatformat_ia64_ext =
307 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
308 floatformat_intbit_yes, "floatformat_ia64_ext", floatformat_valid
312 /* Extract ``len'' bits from an instruction bundle starting at
316 extract_bit_field (char *bundle, int from, int len)
318 long long result = 0LL;
320 int from_byte = from / 8;
321 int to_byte = to / 8;
322 unsigned char *b = (unsigned char *) bundle;
328 if (from_byte == to_byte)
329 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
330 result = c >> (from % 8);
331 lshift = 8 - (from % 8);
333 for (i = from_byte+1; i < to_byte; i++)
335 result |= ((long long) b[i]) << lshift;
339 if (from_byte < to_byte && (to % 8 != 0))
342 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
343 result |= ((long long) c) << lshift;
349 /* Replace the specified bits in an instruction bundle */
352 replace_bit_field (char *bundle, long long val, int from, int len)
355 int from_byte = from / 8;
356 int to_byte = to / 8;
357 unsigned char *b = (unsigned char *) bundle;
360 if (from_byte == to_byte)
362 unsigned char left, right;
364 left = (c >> (to % 8)) << (to % 8);
365 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
366 c = (unsigned char) (val & 0xff);
367 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
375 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
376 c = c | (val << (from % 8));
378 val >>= 8 - from % 8;
380 for (i = from_byte+1; i < to_byte; i++)
389 unsigned char cv = (unsigned char) val;
391 c = c >> (to % 8) << (to % 8);
392 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
398 /* Return the contents of slot N (for N = 0, 1, or 2) in
399 and instruction bundle */
402 slotN_contents (char *bundle, int slotnum)
404 return extract_bit_field (bundle, 5+41*slotnum, 41);
407 /* Store an instruction in an instruction bundle */
410 replace_slotN_contents (char *bundle, long long instr, int slotnum)
412 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
415 static enum instruction_type template_encoding_table[32][3] =
417 { M, I, I }, /* 00 */
418 { M, I, I }, /* 01 */
419 { M, I, I }, /* 02 */
420 { M, I, I }, /* 03 */
421 { M, L, X }, /* 04 */
422 { M, L, X }, /* 05 */
423 { undefined, undefined, undefined }, /* 06 */
424 { undefined, undefined, undefined }, /* 07 */
425 { M, M, I }, /* 08 */
426 { M, M, I }, /* 09 */
427 { M, M, I }, /* 0A */
428 { M, M, I }, /* 0B */
429 { M, F, I }, /* 0C */
430 { M, F, I }, /* 0D */
431 { M, M, F }, /* 0E */
432 { M, M, F }, /* 0F */
433 { M, I, B }, /* 10 */
434 { M, I, B }, /* 11 */
435 { M, B, B }, /* 12 */
436 { M, B, B }, /* 13 */
437 { undefined, undefined, undefined }, /* 14 */
438 { undefined, undefined, undefined }, /* 15 */
439 { B, B, B }, /* 16 */
440 { B, B, B }, /* 17 */
441 { M, M, B }, /* 18 */
442 { M, M, B }, /* 19 */
443 { undefined, undefined, undefined }, /* 1A */
444 { undefined, undefined, undefined }, /* 1B */
445 { M, F, B }, /* 1C */
446 { M, F, B }, /* 1D */
447 { undefined, undefined, undefined }, /* 1E */
448 { undefined, undefined, undefined }, /* 1F */
451 /* Fetch and (partially) decode an instruction at ADDR and return the
452 address of the next instruction to fetch. */
455 fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
457 char bundle[BUNDLE_LEN];
458 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
462 /* Warn about slot numbers greater than 2. We used to generate
463 an error here on the assumption that the user entered an invalid
464 address. But, sometimes GDB itself requests an invalid address.
465 This can (easily) happen when execution stops in a function for
466 which there are no symbols. The prologue scanner will attempt to
467 find the beginning of the function - if the nearest symbol
468 happens to not be aligned on a bundle boundary (16 bytes), the
469 resulting starting address will cause GDB to think that the slot
472 So we warn about it and set the slot number to zero. It is
473 not necessarily a fatal condition, particularly if debugging
474 at the assembly language level. */
477 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
478 "Using slot 0 instead");
484 val = target_read_memory (addr, bundle, BUNDLE_LEN);
489 *instr = slotN_contents (bundle, slotnum);
490 template = extract_bit_field (bundle, 0, 5);
491 *it = template_encoding_table[(int)template][slotnum];
493 if (slotnum == 2 || (slotnum == 1 && *it == L))
496 addr += (slotnum + 1) * SLOT_MULTIPLIER;
501 /* There are 5 different break instructions (break.i, break.b,
502 break.m, break.f, and break.x), but they all have the same
503 encoding. (The five bit template in the low five bits of the
504 instruction bundle distinguishes one from another.)
506 The runtime architecture manual specifies that break instructions
507 used for debugging purposes must have the upper two bits of the 21
508 bit immediate set to a 0 and a 1 respectively. A breakpoint
509 instruction encodes the most significant bit of its 21 bit
510 immediate at bit 36 of the 41 bit instruction. The penultimate msb
511 is at bit 25 which leads to the pattern below.
513 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
514 it turns out that 0x80000 was used as the syscall break in the early
515 simulators. So I changed the pattern slightly to do "break.i 0x080001"
516 instead. But that didn't work either (I later found out that this
517 pattern was used by the simulator that I was using.) So I ended up
518 using the pattern seen below. */
521 #define IA64_BREAKPOINT 0x00002000040LL
523 #define IA64_BREAKPOINT 0x00003333300LL
526 ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
528 char bundle[BUNDLE_LEN];
529 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
535 error("Can't insert breakpoint for slot numbers greater than 2.");
539 val = target_read_memory (addr, bundle, BUNDLE_LEN);
541 /* Check for L type instruction in 2nd slot, if present then
542 bump up the slot number to the 3rd slot */
543 template = extract_bit_field (bundle, 0, 5);
544 if (slotnum == 1 && template_encoding_table[template][1] == L)
549 instr = slotN_contents (bundle, slotnum);
550 memcpy(contents_cache, &instr, sizeof(instr));
551 replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum);
553 target_write_memory (addr, bundle, BUNDLE_LEN);
559 ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
561 char bundle[BUNDLE_LEN];
562 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
569 val = target_read_memory (addr, bundle, BUNDLE_LEN);
571 /* Check for L type instruction in 2nd slot, if present then
572 bump up the slot number to the 3rd slot */
573 template = extract_bit_field (bundle, 0, 5);
574 if (slotnum == 1 && template_encoding_table[template][1] == L)
579 memcpy (&instr, contents_cache, sizeof instr);
580 replace_slotN_contents (bundle, instr, slotnum);
582 target_write_memory (addr, bundle, BUNDLE_LEN);
587 /* We don't really want to use this, but remote.c needs to call it in order
588 to figure out if Z-packets are supported or not. Oh, well. */
589 const unsigned char *
590 ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
592 static unsigned char breakpoint[] =
593 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
594 *lenptr = sizeof (breakpoint);
602 ia64_read_pc (ptid_t ptid)
604 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
605 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
606 int slot_num = (psr_value >> 41) & 3;
608 return pc_value | (slot_num * SLOT_MULTIPLIER);
612 ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
614 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
615 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
616 psr_value &= ~(3LL << 41);
617 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
621 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
622 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
625 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
627 /* Returns the address of the slot that's NSLOTS slots away from
628 the address ADDR. NSLOTS may be positive or negative. */
630 rse_address_add(CORE_ADDR addr, int nslots)
633 int mandatory_nat_slots = nslots / 63;
634 int direction = nslots < 0 ? -1 : 1;
636 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
638 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
639 new_addr += 8 * direction;
641 if (IS_NaT_COLLECTION_ADDR(new_addr))
642 new_addr += 8 * direction;
648 ia64_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
649 int regnum, void *buf)
651 if (regnum >= V32_REGNUM && regnum <= V127_REGNUM)
656 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
657 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
659 /* The bsp points at the end of the register frame so we
660 subtract the size of frame from it to get start of register frame. */
661 bsp = rse_address_add (bsp, -(cfm & 0x7f));
663 if ((cfm & 0x7f) > regnum - V32_REGNUM)
665 ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
666 reg = read_memory_integer ((CORE_ADDR)reg_addr, 8);
667 store_unsigned_integer (buf, register_size (current_gdbarch, regnum), reg);
670 store_unsigned_integer (buf, register_size (current_gdbarch, regnum), 0);
672 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
676 regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat);
677 unatN_val = (unat & (1LL << (regnum - IA64_NAT0_REGNUM))) != 0;
678 store_unsigned_integer (buf, register_size (current_gdbarch, regnum), unatN_val);
680 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
682 ULONGEST natN_val = 0;
685 CORE_ADDR gr_addr = 0;
686 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
687 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
689 /* The bsp points at the end of the register frame so we
690 subtract the size of frame from it to get start of register frame. */
691 bsp = rse_address_add (bsp, -(cfm & 0x7f));
693 if ((cfm & 0x7f) > regnum - V32_REGNUM)
694 gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
698 /* Compute address of nat collection bits. */
699 CORE_ADDR nat_addr = gr_addr | 0x1f8;
700 CORE_ADDR nat_collection;
702 /* If our nat collection address is bigger than bsp, we have to get
703 the nat collection from rnat. Otherwise, we fetch the nat
704 collection from the computed address. */
706 regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection);
708 nat_collection = read_memory_integer (nat_addr, 8);
709 nat_bit = (gr_addr >> 3) & 0x3f;
710 natN_val = (nat_collection >> nat_bit) & 1;
713 store_unsigned_integer (buf, register_size (current_gdbarch, regnum), natN_val);
715 else if (regnum == VBOF_REGNUM)
717 /* A virtual register frame start is provided for user convenience.
718 It can be calculated as the bsp - sof (sizeof frame). */
722 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
723 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
725 /* The bsp points at the end of the register frame so we
726 subtract the size of frame from it to get beginning of frame. */
727 vbsp = rse_address_add (bsp, -(cfm & 0x7f));
728 store_unsigned_integer (buf, register_size (current_gdbarch, regnum), vbsp);
730 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
736 regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr);
737 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
739 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
741 /* Fetch predicate register rename base from current frame
742 marker for this frame. */
743 int rrb_pr = (cfm >> 32) & 0x3f;
745 /* Adjust the register number to account for register rotation. */
747 + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
749 prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0;
750 store_unsigned_integer (buf, register_size (current_gdbarch, regnum), prN_val);
753 memset (buf, 0, register_size (current_gdbarch, regnum));
757 ia64_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
758 int regnum, const void *buf)
760 if (regnum >= V32_REGNUM && regnum <= V127_REGNUM)
765 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
766 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
768 bsp = rse_address_add (bsp, -(cfm & 0x7f));
770 if ((cfm & 0x7f) > regnum - V32_REGNUM)
772 ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
773 write_memory (reg_addr, (void *)buf, 8);
776 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
778 ULONGEST unatN_val, unat, unatN_mask;
779 regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat);
780 unatN_val = extract_unsigned_integer (buf, register_size (current_gdbarch, regnum));
781 unatN_mask = (1LL << (regnum - IA64_NAT0_REGNUM));
784 else if (unatN_val == 1)
786 regcache_cooked_write_unsigned (regcache, IA64_UNAT_REGNUM, unat);
788 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
793 CORE_ADDR gr_addr = 0;
794 regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
795 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
797 /* The bsp points at the end of the register frame so we
798 subtract the size of frame from it to get start of register frame. */
799 bsp = rse_address_add (bsp, -(cfm & 0x7f));
801 if ((cfm & 0x7f) > regnum - V32_REGNUM)
802 gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
804 natN_val = extract_unsigned_integer (buf, register_size (current_gdbarch, regnum));
806 if (gr_addr != 0 && (natN_val == 0 || natN_val == 1))
808 /* Compute address of nat collection bits. */
809 CORE_ADDR nat_addr = gr_addr | 0x1f8;
810 CORE_ADDR nat_collection;
811 int natN_bit = (gr_addr >> 3) & 0x3f;
812 ULONGEST natN_mask = (1LL << natN_bit);
813 /* If our nat collection address is bigger than bsp, we have to get
814 the nat collection from rnat. Otherwise, we fetch the nat
815 collection from the computed address. */
818 regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection);
820 nat_collection |= natN_mask;
822 nat_collection &= ~natN_mask;
823 regcache_cooked_write_unsigned (regcache, IA64_RNAT_REGNUM, nat_collection);
828 nat_collection = read_memory_integer (nat_addr, 8);
830 nat_collection |= natN_mask;
832 nat_collection &= ~natN_mask;
833 store_unsigned_integer (nat_buf, register_size (current_gdbarch, regnum), nat_collection);
834 write_memory (nat_addr, nat_buf, 8);
838 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
845 regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr);
846 regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
848 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
850 /* Fetch predicate register rename base from current frame
851 marker for this frame. */
852 int rrb_pr = (cfm >> 32) & 0x3f;
854 /* Adjust the register number to account for register rotation. */
856 + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
858 prN_val = extract_unsigned_integer (buf, register_size (current_gdbarch, regnum));
859 prN_mask = (1LL << (regnum - VP0_REGNUM));
862 else if (prN_val == 1)
864 regcache_cooked_write_unsigned (regcache, IA64_PR_REGNUM, pr);
868 /* The ia64 needs to convert between various ieee floating-point formats
869 and the special ia64 floating point register format. */
872 ia64_convert_register_p (int regno, struct type *type)
874 return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM);
878 ia64_register_to_value (struct frame_info *frame, int regnum,
879 struct type *valtype, void *out)
881 char in[MAX_REGISTER_SIZE];
882 frame_register_read (frame, regnum, in);
883 convert_typed_floating (in, builtin_type_ia64_ext, out, valtype);
887 ia64_value_to_register (struct frame_info *frame, int regnum,
888 struct type *valtype, const void *in)
890 char out[MAX_REGISTER_SIZE];
891 convert_typed_floating (in, valtype, out, builtin_type_ia64_ext);
892 put_frame_register (frame, regnum, out);
896 /* Limit the number of skipped non-prologue instructions since examining
897 of the prologue is expensive. */
898 static int max_skip_non_prologue_insns = 40;
900 /* Given PC representing the starting address of a function, and
901 LIM_PC which is the (sloppy) limit to which to scan when looking
902 for a prologue, attempt to further refine this limit by using
903 the line data in the symbol table. If successful, a better guess
904 on where the prologue ends is returned, otherwise the previous
905 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
906 which will be set to indicate whether the returned limit may be
907 used with no further scanning in the event that the function is
910 /* FIXME: cagney/2004-02-14: This function and logic have largely been
911 superseded by skip_prologue_using_sal. */
914 refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
916 struct symtab_and_line prologue_sal;
917 CORE_ADDR start_pc = pc;
919 /* Start off not trusting the limit. */
922 prologue_sal = find_pc_line (pc, 0);
923 if (prologue_sal.line != 0)
926 CORE_ADDR addr = prologue_sal.end;
928 /* Handle the case in which compiler's optimizer/scheduler
929 has moved instructions into the prologue. We scan ahead
930 in the function looking for address ranges whose corresponding
931 line number is less than or equal to the first one that we
932 found for the function. (It can be less than when the
933 scheduler puts a body instruction before the first prologue
935 for (i = 2 * max_skip_non_prologue_insns;
936 i > 0 && (lim_pc == 0 || addr < lim_pc);
939 struct symtab_and_line sal;
941 sal = find_pc_line (addr, 0);
944 if (sal.line <= prologue_sal.line
945 && sal.symtab == prologue_sal.symtab)
952 if (lim_pc == 0 || prologue_sal.end < lim_pc)
954 lim_pc = prologue_sal.end;
955 if (start_pc == get_pc_function_start (lim_pc))
962 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
963 || (8 <= (_regnum_) && (_regnum_) <= 11) \
964 || (14 <= (_regnum_) && (_regnum_) <= 31))
965 #define imm9(_instr_) \
966 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
967 | (((_instr_) & 0x00008000000LL) >> 20) \
968 | (((_instr_) & 0x00000001fc0LL) >> 6))
970 /* Allocate and initialize a frame cache. */
972 static struct ia64_frame_cache *
973 ia64_alloc_frame_cache (void)
975 struct ia64_frame_cache *cache;
978 cache = FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache);
990 cache->frameless = 1;
992 for (i = 0; i < NUM_IA64_RAW_REGS; i++)
993 cache->saved_regs[i] = 0;
999 examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *next_frame, struct ia64_frame_cache *cache)
1002 CORE_ADDR last_prologue_pc = pc;
1003 instruction_type it;
1008 int unat_save_reg = 0;
1009 int pr_save_reg = 0;
1010 int mem_stack_frame_size = 0;
1012 CORE_ADDR spill_addr = 0;
1015 char reg_contents[256];
1021 CORE_ADDR bof, sor, sol, sof, cfm, rrb_gr;
1023 memset (instores, 0, sizeof instores);
1024 memset (infpstores, 0, sizeof infpstores);
1025 memset (reg_contents, 0, sizeof reg_contents);
1027 if (cache->after_prologue != 0
1028 && cache->after_prologue <= lim_pc)
1029 return cache->after_prologue;
1031 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
1032 next_pc = fetch_instruction (pc, &it, &instr);
1034 /* We want to check if we have a recognizable function start before we
1035 look ahead for a prologue. */
1036 if (pc < lim_pc && next_pc
1037 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
1039 /* alloc - start of a regular function. */
1040 int sor = (int) ((instr & 0x00078000000LL) >> 27);
1041 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
1042 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
1043 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1045 /* Verify that the current cfm matches what we think is the
1046 function start. If we have somehow jumped within a function,
1047 we do not want to interpret the prologue and calculate the
1048 addresses of various registers such as the return address.
1049 We will instead treat the frame as frameless. */
1051 (sof == (cache->cfm & 0x7f) &&
1052 sol == ((cache->cfm >> 7) & 0x7f)))
1056 last_prologue_pc = next_pc;
1061 /* Look for a leaf routine. */
1062 if (pc < lim_pc && next_pc
1063 && (it == I || it == M)
1064 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
1066 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1067 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
1068 | ((instr & 0x001f8000000LL) >> 20)
1069 | ((instr & 0x000000fe000LL) >> 13));
1070 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
1071 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1072 int qp = (int) (instr & 0x0000000003fLL);
1073 if (qp == 0 && rN == 2 && imm == 0 && rM == 12 && fp_reg == 0)
1075 /* mov r2, r12 - beginning of leaf routine */
1077 last_prologue_pc = next_pc;
1081 /* If we don't recognize a regular function or leaf routine, we are
1087 last_prologue_pc = lim_pc;
1091 /* Loop, looking for prologue instructions, keeping track of
1092 where preserved registers were spilled. */
1095 next_pc = fetch_instruction (pc, &it, &instr);
1099 if (it == B && ((instr & 0x1e1f800003fLL) != 0x04000000000LL))
1101 /* Exit loop upon hitting a non-nop branch instruction. */
1106 else if (((instr & 0x3fLL) != 0LL) &&
1107 (frameless || ret_reg != 0))
1109 /* Exit loop upon hitting a predicated instruction if
1110 we already have the return register or if we are frameless. */
1115 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
1118 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
1119 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1120 int qp = (int) (instr & 0x0000000003f);
1122 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
1125 last_prologue_pc = next_pc;
1128 else if ((it == I || it == M)
1129 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
1131 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1132 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
1133 | ((instr & 0x001f8000000LL) >> 20)
1134 | ((instr & 0x000000fe000LL) >> 13));
1135 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
1136 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1137 int qp = (int) (instr & 0x0000000003fLL);
1139 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
1143 last_prologue_pc = next_pc;
1145 else if (qp == 0 && rN == 12 && rM == 12)
1147 /* adds r12, -mem_stack_frame_size, r12 */
1148 mem_stack_frame_size -= imm;
1149 last_prologue_pc = next_pc;
1151 else if (qp == 0 && rN == 2
1152 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
1154 char buf[MAX_REGISTER_SIZE];
1155 CORE_ADDR saved_sp = 0;
1156 /* adds r2, spilloffset, rFramePointer
1158 adds r2, spilloffset, r12
1160 Get ready for stf.spill or st8.spill instructions.
1161 The address to start spilling at is loaded into r2.
1162 FIXME: Why r2? That's what gcc currently uses; it
1163 could well be different for other compilers. */
1165 /* Hmm... whether or not this will work will depend on
1166 where the pc is. If it's still early in the prologue
1167 this'll be wrong. FIXME */
1170 frame_unwind_register (next_frame, sp_regnum, buf);
1171 saved_sp = extract_unsigned_integer (buf, 8);
1173 spill_addr = saved_sp
1174 + (rM == 12 ? 0 : mem_stack_frame_size)
1177 last_prologue_pc = next_pc;
1179 else if (qp == 0 && rM >= 32 && rM < 40 && !instores[rM] &&
1180 rN < 256 && imm == 0)
1182 /* mov rN, rM where rM is an input register */
1183 reg_contents[rN] = rM;
1184 last_prologue_pc = next_pc;
1186 else if (frameless && qp == 0 && rN == fp_reg && imm == 0 &&
1190 last_prologue_pc = next_pc;
1195 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
1196 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
1198 /* stf.spill [rN] = fM, imm9
1200 stf.spill [rN] = fM */
1202 int imm = imm9(instr);
1203 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1204 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1205 int qp = (int) (instr & 0x0000000003fLL);
1206 if (qp == 0 && rN == spill_reg && spill_addr != 0
1207 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
1209 cache->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
1211 if ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
1214 spill_addr = 0; /* last one; must be done */
1215 last_prologue_pc = next_pc;
1218 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
1219 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
1225 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
1226 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1227 int qp = (int) (instr & 0x0000000003fLL);
1228 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
1230 /* We have something like "mov.m r3 = ar.unat". Remember the
1231 r3 (or whatever) and watch for a store of this register... */
1233 last_prologue_pc = next_pc;
1236 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
1239 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1240 int qp = (int) (instr & 0x0000000003fLL);
1241 if (qp == 0 && isScratch (rN))
1244 last_prologue_pc = next_pc;
1248 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1249 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1253 st8 [rN] = rM, imm9 */
1254 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1255 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1256 int qp = (int) (instr & 0x0000000003fLL);
1257 int indirect = rM < 256 ? reg_contents[rM] : 0;
1258 if (qp == 0 && rN == spill_reg && spill_addr != 0
1259 && (rM == unat_save_reg || rM == pr_save_reg))
1261 /* We've found a spill of either the UNAT register or the PR
1262 register. (Well, not exactly; what we've actually found is
1263 a spill of the register that UNAT or PR was moved to).
1264 Record that fact and move on... */
1265 if (rM == unat_save_reg)
1267 /* Track UNAT register */
1268 cache->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
1273 /* Track PR register */
1274 cache->saved_regs[IA64_PR_REGNUM] = spill_addr;
1277 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1278 /* st8 [rN] = rM, imm9 */
1279 spill_addr += imm9(instr);
1281 spill_addr = 0; /* must be done spilling */
1282 last_prologue_pc = next_pc;
1284 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1286 /* Allow up to one store of each input register. */
1287 instores[rM-32] = 1;
1288 last_prologue_pc = next_pc;
1290 else if (qp == 0 && 32 <= indirect && indirect < 40 &&
1291 !instores[indirect-32])
1293 /* Allow an indirect store of an input register. */
1294 instores[indirect-32] = 1;
1295 last_prologue_pc = next_pc;
1298 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1305 Note that the st8 case is handled in the clause above.
1307 Advance over stores of input registers. One store per input
1308 register is permitted. */
1309 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1310 int qp = (int) (instr & 0x0000000003fLL);
1311 int indirect = rM < 256 ? reg_contents[rM] : 0;
1312 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1314 instores[rM-32] = 1;
1315 last_prologue_pc = next_pc;
1317 else if (qp == 0 && 32 <= indirect && indirect < 40 &&
1318 !instores[indirect-32])
1320 /* Allow an indirect store of an input register. */
1321 instores[indirect-32] = 1;
1322 last_prologue_pc = next_pc;
1325 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1332 Advance over stores of floating point input registers. Again
1333 one store per register is permitted */
1334 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1335 int qp = (int) (instr & 0x0000000003fLL);
1336 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1338 infpstores[fM-8] = 1;
1339 last_prologue_pc = next_pc;
1343 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1344 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1346 /* st8.spill [rN] = rM
1348 st8.spill [rN] = rM, imm9 */
1349 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1350 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1351 int qp = (int) (instr & 0x0000000003fLL);
1352 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1354 /* We've found a spill of one of the preserved general purpose
1355 regs. Record the spill address and advance the spill
1356 register if appropriate. */
1357 cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
1358 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1359 /* st8.spill [rN] = rM, imm9 */
1360 spill_addr += imm9(instr);
1362 spill_addr = 0; /* Done spilling */
1363 last_prologue_pc = next_pc;
1370 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1371 registers for the previous frame which will be needed later. */
1373 if (!frameless && next_frame)
1375 /* Extract the size of the rotating portion of the stack
1376 frame and the register rename base from the current
1382 rrb_gr = (cfm >> 18) & 0x7f;
1384 /* Find the bof (beginning of frame). */
1385 bof = rse_address_add (cache->bsp, -sof);
1387 for (i = 0, addr = bof;
1391 if (IS_NaT_COLLECTION_ADDR (addr))
1395 if (i+32 == cfm_reg)
1396 cache->saved_regs[IA64_CFM_REGNUM] = addr;
1397 if (i+32 == ret_reg)
1398 cache->saved_regs[IA64_VRAP_REGNUM] = addr;
1400 cache->saved_regs[IA64_VFP_REGNUM] = addr;
1403 /* For the previous argument registers we require the previous bof.
1404 If we can't find the previous cfm, then we can do nothing. */
1406 if (cache->saved_regs[IA64_CFM_REGNUM] != 0)
1408 cfm = read_memory_integer (cache->saved_regs[IA64_CFM_REGNUM], 8);
1410 else if (cfm_reg != 0)
1412 frame_unwind_register (next_frame, cfm_reg, buf);
1413 cfm = extract_unsigned_integer (buf, 8);
1415 cache->prev_cfm = cfm;
1419 sor = ((cfm >> 14) & 0xf) * 8;
1421 sol = (cfm >> 7) & 0x7f;
1422 rrb_gr = (cfm >> 18) & 0x7f;
1424 /* The previous bof only requires subtraction of the sol (size of locals)
1425 due to the overlap between output and input of subsequent frames. */
1426 bof = rse_address_add (bof, -sol);
1428 for (i = 0, addr = bof;
1432 if (IS_NaT_COLLECTION_ADDR (addr))
1437 cache->saved_regs[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1440 cache->saved_regs[IA64_GR32_REGNUM + i] = addr;
1446 /* Try and trust the lim_pc value whenever possible. */
1447 if (trust_limit && lim_pc >= last_prologue_pc)
1448 last_prologue_pc = lim_pc;
1450 cache->frameless = frameless;
1451 cache->after_prologue = last_prologue_pc;
1452 cache->mem_stack_frame_size = mem_stack_frame_size;
1453 cache->fp_reg = fp_reg;
1455 return last_prologue_pc;
1459 ia64_skip_prologue (CORE_ADDR pc)
1461 struct ia64_frame_cache cache;
1463 cache.after_prologue = 0;
1467 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1468 return examine_prologue (pc, pc+1024, 0, &cache);
1472 /* Normal frames. */
1474 static struct ia64_frame_cache *
1475 ia64_frame_cache (struct frame_info *next_frame, void **this_cache)
1477 struct ia64_frame_cache *cache;
1479 CORE_ADDR cfm, sof, sol, bsp, psr;
1485 cache = ia64_alloc_frame_cache ();
1486 *this_cache = cache;
1488 frame_unwind_register (next_frame, sp_regnum, buf);
1489 cache->saved_sp = extract_unsigned_integer (buf, 8);
1491 /* We always want the bsp to point to the end of frame.
1492 This way, we can always get the beginning of frame (bof)
1493 by subtracting frame size. */
1494 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
1495 cache->bsp = extract_unsigned_integer (buf, 8);
1497 frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf);
1498 psr = extract_unsigned_integer (buf, 8);
1500 frame_unwind_register (next_frame, IA64_CFM_REGNUM, buf);
1501 cfm = extract_unsigned_integer (buf, 8);
1503 cache->sof = (cfm & 0x7f);
1504 cache->sol = (cfm >> 7) & 0x7f;
1505 cache->sor = ((cfm >> 14) & 0xf) * 8;
1509 cache->pc = frame_func_unwind (next_frame);
1512 examine_prologue (cache->pc, frame_pc_unwind (next_frame), next_frame, cache);
1514 cache->base = cache->saved_sp + cache->mem_stack_frame_size;
1520 ia64_frame_this_id (struct frame_info *next_frame, void **this_cache,
1521 struct frame_id *this_id)
1523 struct ia64_frame_cache *cache =
1524 ia64_frame_cache (next_frame, this_cache);
1526 /* This marks the outermost frame. */
1527 if (cache->base == 0)
1530 (*this_id) = frame_id_build_special (cache->base, cache->pc, cache->bsp);
1531 if (gdbarch_debug >= 1)
1532 fprintf_unfiltered (gdb_stdlog,
1533 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1534 paddr_nz (this_id->code_addr),
1535 paddr_nz (this_id->stack_addr),
1536 paddr_nz (cache->bsp), next_frame);
1540 ia64_frame_prev_register (struct frame_info *next_frame, void **this_cache,
1541 int regnum, int *optimizedp,
1542 enum lval_type *lvalp, CORE_ADDR *addrp,
1543 int *realnump, void *valuep)
1545 struct ia64_frame_cache *cache =
1546 ia64_frame_cache (next_frame, this_cache);
1547 char dummy_valp[MAX_REGISTER_SIZE];
1550 gdb_assert (regnum >= 0);
1552 if (!target_has_registers)
1553 error ("No registers.");
1560 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1561 when valuep is not supplied. */
1563 valuep = dummy_valp;
1565 memset (valuep, 0, register_size (current_gdbarch, regnum));
1567 if (regnum == SP_REGNUM)
1569 /* Handle SP values for all frames but the topmost. */
1570 store_unsigned_integer (valuep, register_size (current_gdbarch, regnum),
1573 else if (regnum == IA64_BSP_REGNUM)
1575 char cfm_valuep[MAX_REGISTER_SIZE];
1578 enum lval_type cfm_lval;
1580 CORE_ADDR bsp, prev_cfm, prev_bsp;
1582 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1583 This corresponds to what the hardware bsp register will be if we pop the frame
1584 back which is why we might have been called. We know the beginning of the current
1585 frame is cache->bsp - cache->sof. This value in the previous frame points to
1586 the start of the output registers. We can calculate the end of that frame by adding
1587 the size of output (sof (size of frame) - sol (size of locals)). */
1588 ia64_frame_prev_register (next_frame, this_cache, IA64_CFM_REGNUM,
1589 &cfm_optim, &cfm_lval, &cfm_addr, &cfm_realnum, cfm_valuep);
1590 prev_cfm = extract_unsigned_integer (cfm_valuep, 8);
1592 bsp = rse_address_add (cache->bsp, -(cache->sof));
1593 prev_bsp = rse_address_add (bsp, (prev_cfm & 0x7f) - ((prev_cfm >> 7) & 0x7f));
1595 store_unsigned_integer (valuep, register_size (current_gdbarch, regnum),
1598 else if (regnum == IA64_CFM_REGNUM)
1600 CORE_ADDR addr = cache->saved_regs[IA64_CFM_REGNUM];
1604 *lvalp = lval_memory;
1606 read_memory (addr, valuep, register_size (current_gdbarch, regnum));
1608 else if (cache->prev_cfm)
1609 store_unsigned_integer (valuep, register_size (current_gdbarch, regnum), cache->prev_cfm);
1610 else if (cache->frameless)
1613 frame_unwind_register (next_frame, IA64_PFS_REGNUM, valuep);
1616 else if (regnum == IA64_VFP_REGNUM)
1618 /* If the function in question uses an automatic register (r32-r127)
1619 for the frame pointer, it'll be found by ia64_find_saved_register()
1620 above. If the function lacks one of these frame pointers, we can
1621 still provide a value since we know the size of the frame. */
1622 CORE_ADDR vfp = cache->base;
1623 store_unsigned_integer (valuep, register_size (current_gdbarch, IA64_VFP_REGNUM), vfp);
1625 else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
1627 char pr_valuep[MAX_REGISTER_SIZE];
1630 enum lval_type pr_lval;
1633 ia64_frame_prev_register (next_frame, this_cache, IA64_PR_REGNUM,
1634 &pr_optim, &pr_lval, &pr_addr, &pr_realnum, pr_valuep);
1635 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
1637 /* Fetch predicate register rename base from current frame
1638 marker for this frame. */
1639 int rrb_pr = (cache->cfm >> 32) & 0x3f;
1641 /* Adjust the register number to account for register rotation. */
1642 regnum = VP16_REGNUM
1643 + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
1645 prN_val = extract_bit_field ((unsigned char *) pr_valuep,
1646 regnum - VP0_REGNUM, 1);
1647 store_unsigned_integer (valuep, register_size (current_gdbarch, regnum), prN_val);
1649 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1651 char unat_valuep[MAX_REGISTER_SIZE];
1654 enum lval_type unat_lval;
1655 CORE_ADDR unat_addr;
1657 ia64_frame_prev_register (next_frame, this_cache, IA64_UNAT_REGNUM,
1658 &unat_optim, &unat_lval, &unat_addr, &unat_realnum, unat_valuep);
1659 unatN_val = extract_bit_field ((unsigned char *) unat_valuep,
1660 regnum - IA64_NAT0_REGNUM, 1);
1661 store_unsigned_integer (valuep, register_size (current_gdbarch, regnum),
1664 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1667 /* Find address of general register corresponding to nat bit we're
1671 gr_addr = cache->saved_regs[regnum - IA64_NAT0_REGNUM
1675 /* Compute address of nat collection bits. */
1676 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1678 CORE_ADDR nat_collection;
1680 /* If our nat collection address is bigger than bsp, we have to get
1681 the nat collection from rnat. Otherwise, we fetch the nat
1682 collection from the computed address. */
1683 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
1684 bsp = extract_unsigned_integer (buf, 8);
1685 if (nat_addr >= bsp)
1687 frame_unwind_register (next_frame, IA64_RNAT_REGNUM, buf);
1688 nat_collection = extract_unsigned_integer (buf, 8);
1691 nat_collection = read_memory_integer (nat_addr, 8);
1692 nat_bit = (gr_addr >> 3) & 0x3f;
1693 natval = (nat_collection >> nat_bit) & 1;
1696 store_unsigned_integer (valuep, register_size (current_gdbarch, regnum), natval);
1698 else if (regnum == IA64_IP_REGNUM)
1701 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
1705 *lvalp = lval_memory;
1707 read_memory (addr, buf, register_size (current_gdbarch, IA64_IP_REGNUM));
1708 pc = extract_unsigned_integer (buf, 8);
1710 else if (cache->frameless)
1712 frame_unwind_register (next_frame, IA64_BR0_REGNUM, buf);
1713 pc = extract_unsigned_integer (buf, 8);
1716 store_unsigned_integer (valuep, 8, pc);
1718 else if (regnum == IA64_PSR_REGNUM)
1720 /* We don't know how to get the complete previous PSR, but we need it for
1721 the slot information when we unwind the pc (pc is formed of IP register
1722 plus slot information from PSR). To get the previous slot information,
1723 we mask it off the return address. */
1724 ULONGEST slot_num = 0;
1727 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
1729 frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf);
1730 psr = extract_unsigned_integer (buf, 8);
1734 *lvalp = lval_memory;
1736 read_memory (addr, buf, register_size (current_gdbarch, IA64_IP_REGNUM));
1737 pc = extract_unsigned_integer (buf, 8);
1739 else if (cache->frameless)
1742 frame_unwind_register (next_frame, IA64_BR0_REGNUM, buf);
1743 pc = extract_unsigned_integer (buf, 8);
1745 psr &= ~(3LL << 41);
1746 slot_num = pc & 0x3LL;
1747 psr |= (CORE_ADDR)slot_num << 41;
1748 store_unsigned_integer (valuep, 8, psr);
1750 else if (regnum == IA64_BR0_REGNUM)
1753 CORE_ADDR addr = cache->saved_regs[IA64_BR0_REGNUM];
1756 *lvalp = lval_memory;
1758 read_memory (addr, buf, register_size (current_gdbarch, IA64_BR0_REGNUM));
1759 br0 = extract_unsigned_integer (buf, 8);
1761 store_unsigned_integer (valuep, 8, br0);
1763 else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM) ||
1764 (regnum >= V32_REGNUM && regnum <= V127_REGNUM))
1767 if (regnum >= V32_REGNUM)
1768 regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
1769 addr = cache->saved_regs[regnum];
1772 *lvalp = lval_memory;
1774 read_memory (addr, valuep, register_size (current_gdbarch, regnum));
1776 else if (cache->frameless)
1778 char r_valuep[MAX_REGISTER_SIZE];
1781 enum lval_type r_lval;
1783 CORE_ADDR prev_cfm, prev_bsp, prev_bof;
1785 if (regnum >= V32_REGNUM)
1786 regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
1787 ia64_frame_prev_register (next_frame, this_cache, IA64_CFM_REGNUM,
1788 &r_optim, &r_lval, &r_addr, &r_realnum, r_valuep);
1789 prev_cfm = extract_unsigned_integer (r_valuep, 8);
1790 ia64_frame_prev_register (next_frame, this_cache, IA64_BSP_REGNUM,
1791 &r_optim, &r_lval, &r_addr, &r_realnum, r_valuep);
1792 prev_bsp = extract_unsigned_integer (r_valuep, 8);
1793 prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f));
1795 addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM));
1796 *lvalp = lval_memory;
1798 read_memory (addr, valuep, register_size (current_gdbarch, regnum));
1804 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1806 /* Fetch floating point register rename base from current
1807 frame marker for this frame. */
1808 int rrb_fr = (cache->cfm >> 25) & 0x7f;
1810 /* Adjust the floating point register number to account for
1811 register rotation. */
1812 regnum = IA64_FR32_REGNUM
1813 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1816 /* If we have stored a memory address, access the register. */
1817 addr = cache->saved_regs[regnum];
1820 *lvalp = lval_memory;
1822 read_memory (addr, valuep, register_size (current_gdbarch, regnum));
1824 /* Otherwise, punt and get the current value of the register. */
1826 frame_unwind_register (next_frame, regnum, valuep);
1829 if (gdbarch_debug >= 1)
1830 fprintf_unfiltered (gdb_stdlog,
1831 "regular prev register <%d> <%s> is 0x%s\n", regnum,
1832 (((unsigned) regnum <= IA64_NAT127_REGNUM)
1833 ? ia64_register_names[regnum] : "r??"),
1834 paddr_nz (extract_unsigned_integer (valuep, 8)));
1837 static const struct frame_unwind ia64_frame_unwind =
1840 &ia64_frame_this_id,
1841 &ia64_frame_prev_register
1844 static const struct frame_unwind *
1845 ia64_frame_sniffer (struct frame_info *next_frame)
1847 return &ia64_frame_unwind;
1850 /* Signal trampolines. */
1853 ia64_sigtramp_frame_init_saved_regs (struct ia64_frame_cache *cache)
1855 if (SIGCONTEXT_REGISTER_ADDRESS)
1859 cache->saved_regs[IA64_VRAP_REGNUM] =
1860 SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_IP_REGNUM);
1861 cache->saved_regs[IA64_CFM_REGNUM] =
1862 SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_CFM_REGNUM);
1863 cache->saved_regs[IA64_PSR_REGNUM] =
1864 SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_PSR_REGNUM);
1865 cache->saved_regs[IA64_BSP_REGNUM] =
1866 SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_BSP_REGNUM);
1867 cache->saved_regs[IA64_RNAT_REGNUM] =
1868 SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_RNAT_REGNUM);
1869 cache->saved_regs[IA64_CCV_REGNUM] =
1870 SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_CCV_REGNUM);
1871 cache->saved_regs[IA64_UNAT_REGNUM] =
1872 SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_UNAT_REGNUM);
1873 cache->saved_regs[IA64_FPSR_REGNUM] =
1874 SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_FPSR_REGNUM);
1875 cache->saved_regs[IA64_PFS_REGNUM] =
1876 SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_PFS_REGNUM);
1877 cache->saved_regs[IA64_LC_REGNUM] =
1878 SIGCONTEXT_REGISTER_ADDRESS (cache->base, IA64_LC_REGNUM);
1879 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1880 cache->saved_regs[regno] =
1881 SIGCONTEXT_REGISTER_ADDRESS (cache->base, regno);
1882 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1883 cache->saved_regs[regno] =
1884 SIGCONTEXT_REGISTER_ADDRESS (cache->base, regno);
1885 for (regno = IA64_FR2_REGNUM; regno <= IA64_FR31_REGNUM; regno++)
1886 cache->saved_regs[regno] =
1887 SIGCONTEXT_REGISTER_ADDRESS (cache->base, regno);
1891 static struct ia64_frame_cache *
1892 ia64_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache)
1894 struct ia64_frame_cache *cache;
1902 cache = ia64_alloc_frame_cache ();
1904 frame_unwind_register (next_frame, sp_regnum, buf);
1905 /* Note that frame size is hard-coded below. We cannot calculate it
1906 via prologue examination. */
1907 cache->base = extract_unsigned_integer (buf, 8) + 16;
1909 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
1910 cache->bsp = extract_unsigned_integer (buf, 8);
1912 frame_unwind_register (next_frame, IA64_CFM_REGNUM, buf);
1913 cache->cfm = extract_unsigned_integer (buf, 8);
1914 cache->sof = cache->cfm & 0x7f;
1916 ia64_sigtramp_frame_init_saved_regs (cache);
1918 *this_cache = cache;
1923 ia64_sigtramp_frame_this_id (struct frame_info *next_frame,
1924 void **this_cache, struct frame_id *this_id)
1926 struct ia64_frame_cache *cache =
1927 ia64_sigtramp_frame_cache (next_frame, this_cache);
1929 (*this_id) = frame_id_build_special (cache->base, frame_pc_unwind (next_frame), cache->bsp);
1930 if (gdbarch_debug >= 1)
1931 fprintf_unfiltered (gdb_stdlog,
1932 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1933 paddr_nz (this_id->code_addr),
1934 paddr_nz (this_id->stack_addr),
1935 paddr_nz (cache->bsp), next_frame);
1939 ia64_sigtramp_frame_prev_register (struct frame_info *next_frame,
1941 int regnum, int *optimizedp,
1942 enum lval_type *lvalp, CORE_ADDR *addrp,
1943 int *realnump, void *valuep)
1945 char dummy_valp[MAX_REGISTER_SIZE];
1946 char buf[MAX_REGISTER_SIZE];
1948 struct ia64_frame_cache *cache =
1949 ia64_sigtramp_frame_cache (next_frame, this_cache);
1951 gdb_assert (regnum >= 0);
1953 if (!target_has_registers)
1954 error ("No registers.");
1961 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1962 when valuep is not supplied. */
1964 valuep = dummy_valp;
1966 memset (valuep, 0, register_size (current_gdbarch, regnum));
1968 if (regnum == IA64_IP_REGNUM)
1971 CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
1975 *lvalp = lval_memory;
1977 read_memory (addr, buf, register_size (current_gdbarch, IA64_IP_REGNUM));
1978 pc = extract_unsigned_integer (buf, 8);
1981 store_unsigned_integer (valuep, 8, pc);
1983 else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM) ||
1984 (regnum >= V32_REGNUM && regnum <= V127_REGNUM))
1987 if (regnum >= V32_REGNUM)
1988 regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
1989 addr = cache->saved_regs[regnum];
1992 *lvalp = lval_memory;
1994 read_memory (addr, valuep, register_size (current_gdbarch, regnum));
1999 /* All other registers not listed above. */
2000 CORE_ADDR addr = cache->saved_regs[regnum];
2003 *lvalp = lval_memory;
2005 read_memory (addr, valuep, register_size (current_gdbarch, regnum));
2009 if (gdbarch_debug >= 1)
2010 fprintf_unfiltered (gdb_stdlog,
2011 "sigtramp prev register <%s> is 0x%s\n",
2012 (((unsigned) regnum <= IA64_NAT127_REGNUM)
2013 ? ia64_register_names[regnum] : "r??"),
2014 paddr_nz (extract_unsigned_integer (valuep, 8)));
2017 static const struct frame_unwind ia64_sigtramp_frame_unwind =
2020 ia64_sigtramp_frame_this_id,
2021 ia64_sigtramp_frame_prev_register
2024 static const struct frame_unwind *
2025 ia64_sigtramp_frame_sniffer (struct frame_info *next_frame)
2028 CORE_ADDR pc = frame_pc_unwind (next_frame);
2030 find_pc_partial_function (pc, &name, NULL, NULL);
2031 if (legacy_pc_in_sigtramp (pc, name))
2032 return &ia64_sigtramp_frame_unwind;
2039 ia64_frame_base_address (struct frame_info *next_frame, void **this_cache)
2041 struct ia64_frame_cache *cache =
2042 ia64_frame_cache (next_frame, this_cache);
2047 static const struct frame_base ia64_frame_base =
2050 ia64_frame_base_address,
2051 ia64_frame_base_address,
2052 ia64_frame_base_address
2055 #ifdef HAVE_LIBUNWIND_IA64_H
2057 struct ia64_unwind_table_entry
2059 unw_word_t start_offset;
2060 unw_word_t end_offset;
2061 unw_word_t info_offset;
2064 static __inline__ uint64_t
2065 ia64_rse_slot_num (uint64_t addr)
2067 return (addr >> 3) & 0x3f;
2070 /* Skip over a designated number of registers in the backing
2071 store, remembering every 64th position is for NAT. */
2072 static __inline__ uint64_t
2073 ia64_rse_skip_regs (uint64_t addr, long num_regs)
2075 long delta = ia64_rse_slot_num(addr) + num_regs;
2079 return addr + ((num_regs + delta/0x3f) << 3);
2082 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2083 number to a libunwind register number. */
2085 ia64_gdb2uw_regnum (int regnum)
2087 if (regnum == sp_regnum)
2089 else if (regnum == IA64_BSP_REGNUM)
2090 return UNW_IA64_BSP;
2091 else if ((unsigned) (regnum - IA64_GR0_REGNUM) < 128)
2092 return UNW_IA64_GR + (regnum - IA64_GR0_REGNUM);
2093 else if ((unsigned) (regnum - V32_REGNUM) < 95)
2094 return UNW_IA64_GR + 32 + (regnum - V32_REGNUM);
2095 else if ((unsigned) (regnum - IA64_FR0_REGNUM) < 128)
2096 return UNW_IA64_FR + (regnum - IA64_FR0_REGNUM);
2097 else if ((unsigned) (regnum - IA64_PR0_REGNUM) < 64)
2099 else if ((unsigned) (regnum - IA64_BR0_REGNUM) < 8)
2100 return UNW_IA64_BR + (regnum - IA64_BR0_REGNUM);
2101 else if (regnum == IA64_PR_REGNUM)
2103 else if (regnum == IA64_IP_REGNUM)
2105 else if (regnum == IA64_CFM_REGNUM)
2106 return UNW_IA64_CFM;
2107 else if ((unsigned) (regnum - IA64_AR0_REGNUM) < 128)
2108 return UNW_IA64_AR + (regnum - IA64_AR0_REGNUM);
2109 else if ((unsigned) (regnum - IA64_NAT0_REGNUM) < 128)
2110 return UNW_IA64_NAT + (regnum - IA64_NAT0_REGNUM);
2115 /* Gdb libunwind-frame callback function to convert from a libunwind register
2116 number to a ia64 gdb register number. */
2118 ia64_uw2gdb_regnum (int uw_regnum)
2120 if (uw_regnum == UNW_IA64_SP)
2122 else if (uw_regnum == UNW_IA64_BSP)
2123 return IA64_BSP_REGNUM;
2124 else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 32)
2125 return IA64_GR0_REGNUM + (uw_regnum - UNW_IA64_GR);
2126 else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 128)
2127 return V32_REGNUM + (uw_regnum - (IA64_GR0_REGNUM + 32));
2128 else if ((unsigned) (uw_regnum - UNW_IA64_FR) < 128)
2129 return IA64_FR0_REGNUM + (uw_regnum - UNW_IA64_FR);
2130 else if ((unsigned) (uw_regnum - UNW_IA64_BR) < 8)
2131 return IA64_BR0_REGNUM + (uw_regnum - UNW_IA64_BR);
2132 else if (uw_regnum == UNW_IA64_PR)
2133 return IA64_PR_REGNUM;
2134 else if (uw_regnum == UNW_REG_IP)
2135 return IA64_IP_REGNUM;
2136 else if (uw_regnum == UNW_IA64_CFM)
2137 return IA64_CFM_REGNUM;
2138 else if ((unsigned) (uw_regnum - UNW_IA64_AR) < 128)
2139 return IA64_AR0_REGNUM + (uw_regnum - UNW_IA64_AR);
2140 else if ((unsigned) (uw_regnum - UNW_IA64_NAT) < 128)
2141 return IA64_NAT0_REGNUM + (uw_regnum - UNW_IA64_NAT);
2146 /* Gdb libunwind-frame callback function to reveal if register is a float
2149 ia64_is_fpreg (int uw_regnum)
2151 return unw_is_fpreg (uw_regnum);
2154 /* Libunwind callback accessor function for general registers. */
2156 ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val,
2157 int write, void *arg)
2159 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2160 unw_word_t bsp, sof, sol, cfm, psr, ip;
2161 struct frame_info *next_frame = arg;
2162 long new_sof, old_sof;
2163 char buf[MAX_REGISTER_SIZE];
2168 /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */
2174 ia64_write_pc (*val, inferior_ptid);
2177 case UNW_IA64_AR_BSPSTORE:
2178 write_register (IA64_BSP_REGNUM, *val);
2181 case UNW_IA64_AR_BSP:
2183 /* Account for the fact that ptrace() expects bsp to point
2184 after the current register frame. */
2185 cfm = read_register (IA64_CFM_REGNUM);
2187 bsp = ia64_rse_skip_regs (*val, sof);
2188 write_register (IA64_BSP_REGNUM, bsp);
2192 /* If we change CFM, we need to adjust ptrace's notion of
2193 bsp accordingly, so that the real bsp remains
2195 bsp = read_register (IA64_BSP_REGNUM);
2196 cfm = read_register (IA64_CFM_REGNUM);
2197 old_sof = (cfm & 0x7f);
2198 new_sof = (*val & 0x7f);
2199 if (old_sof != new_sof)
2201 bsp = ia64_rse_skip_regs (bsp, -old_sof + new_sof);
2202 write_register (IA64_BSP_REGNUM, bsp);
2204 write_register (IA64_CFM_REGNUM, *val);
2208 write_register (regnum, *val);
2211 if (gdbarch_debug >= 1)
2212 fprintf_unfiltered (gdb_stdlog,
2213 " access_reg: to cache: %4s=0x%s\n",
2214 (((unsigned) regnum <= IA64_NAT127_REGNUM)
2215 ? ia64_register_names[regnum] : "r??"),
2223 /* Libunwind expects to see the pc value which means the slot number
2224 from the psr must be merged with the ip word address. */
2225 frame_unwind_register (next_frame, IA64_IP_REGNUM, buf);
2226 ip = extract_unsigned_integer (buf, 8);
2227 frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf);
2228 psr = extract_unsigned_integer (buf, 8);
2229 *val = ip | ((psr >> 41) & 0x3);
2232 case UNW_IA64_AR_BSP:
2233 /* Libunwind expects to see the beginning of the current register
2234 frame so we must account for the fact that ptrace() will return a value
2235 for bsp that points *after* the current register frame. */
2236 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
2237 bsp = extract_unsigned_integer (buf, 8);
2238 frame_unwind_register (next_frame, IA64_CFM_REGNUM, buf);
2239 cfm = extract_unsigned_integer (buf, 8);
2241 *val = ia64_rse_skip_regs (bsp, -sof);
2244 case UNW_IA64_AR_BSPSTORE:
2245 /* Libunwind wants bspstore to be after the current register frame.
2246 This is what ptrace() and gdb treats as the regular bsp value. */
2247 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
2248 *val = extract_unsigned_integer (buf, 8);
2252 /* For all other registers, just unwind the value directly. */
2253 frame_unwind_register (next_frame, regnum, buf);
2254 *val = extract_unsigned_integer (buf, 8);
2258 if (gdbarch_debug >= 1)
2259 fprintf_unfiltered (gdb_stdlog,
2260 " access_reg: from cache: %4s=0x%s\n",
2261 (((unsigned) regnum <= IA64_NAT127_REGNUM)
2262 ? ia64_register_names[regnum] : "r??"),
2268 /* Libunwind callback accessor function for floating-point registers. */
2270 ia64_access_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_fpreg_t *val,
2271 int write, void *arg)
2273 int regnum = ia64_uw2gdb_regnum (uw_regnum);
2276 regcache_cooked_write (current_regcache, regnum, (char *) val);
2278 regcache_cooked_read (current_regcache, regnum, (char *) val);
2282 /* Libunwind callback accessor function for accessing memory. */
2284 ia64_access_mem (unw_addr_space_t as,
2285 unw_word_t addr, unw_word_t *val,
2286 int write, void *arg)
2288 /* XXX do we need to normalize byte-order here? */
2290 return target_write_memory (addr, (char *) val, sizeof (unw_word_t));
2292 return target_read_memory (addr, (char *) val, sizeof (unw_word_t));
2295 /* Call low-level function to access the kernel unwind table. */
2297 getunwind_table (void *buf, size_t len)
2300 x = target_read_partial (¤t_target, TARGET_OBJECT_UNWIND_TABLE, NULL,
2306 /* Get the kernel unwind table. */
2308 get_kernel_table (unw_word_t ip, unw_dyn_info_t *di)
2311 struct ia64_table_entry
2313 uint64_t start_offset;
2314 uint64_t end_offset;
2315 uint64_t info_offset;
2317 static struct ia64_table_entry *ktab = NULL, *etab;
2321 size = getunwind_table (NULL, 0);
2323 return -UNW_ENOINFO;
2324 ktab = xmalloc (size);
2325 getunwind_table (ktab, size);
2327 /* Determine length of kernel's unwind table and relocate
2329 for (etab = ktab; etab->start_offset; ++etab)
2330 etab->info_offset += (uint64_t) ktab;
2333 if (ip < ktab[0].start_offset || ip >= etab[-1].end_offset)
2334 return -UNW_ENOINFO;
2336 di->format = UNW_INFO_FORMAT_TABLE;
2338 di->start_ip = ktab[0].start_offset;
2339 di->end_ip = etab[-1].end_offset;
2340 di->u.ti.name_ptr = (unw_word_t) "<kernel>";
2341 di->u.ti.segbase = 0;
2342 di->u.ti.table_len = ((char *) etab - (char *) ktab) / sizeof (unw_word_t);
2343 di->u.ti.table_data = (unw_word_t *) ktab;
2345 if (gdbarch_debug >= 1)
2346 fprintf_unfiltered (gdb_stdlog, "get_kernel_table: found table `%s': "
2347 "segbase=0x%s, length=%s, gp=0x%s\n",
2348 (char *) di->u.ti.name_ptr,
2349 paddr_nz (di->u.ti.segbase),
2350 paddr_u (di->u.ti.table_len),
2355 /* Find the unwind table entry for a specified address. */
2357 ia64_find_unwind_table (struct objfile *objfile, unw_word_t ip,
2358 unw_dyn_info_t *dip, void **buf)
2360 Elf_Internal_Phdr *phdr, *p_text = NULL, *p_unwind = NULL;
2361 Elf_Internal_Ehdr *ehdr;
2362 unw_word_t segbase = 0;
2363 CORE_ADDR load_base;
2367 bfd = objfile->obfd;
2369 ehdr = elf_tdata (bfd)->elf_header;
2370 phdr = elf_tdata (bfd)->phdr;
2372 load_base = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile));
2374 for (i = 0; i < ehdr->e_phnum; ++i)
2376 switch (phdr[i].p_type)
2379 if ((unw_word_t) (ip - load_base - phdr[i].p_vaddr)
2384 case PT_IA_64_UNWIND:
2385 p_unwind = phdr + i;
2393 if (!p_text || !p_unwind
2394 /* Verify that the segment that contains the IP also contains
2395 the static unwind table. If not, we are dealing with
2396 runtime-generated code, for which we have no info here. */
2397 || (p_unwind->p_vaddr - p_text->p_vaddr) >= p_text->p_memsz)
2398 return -UNW_ENOINFO;
2400 segbase = p_text->p_vaddr + load_base;
2402 dip->start_ip = segbase;
2403 dip->end_ip = dip->start_ip + p_text->p_memsz;
2404 dip->gp = ia64_find_global_pointer (ip);
2405 dip->format = UNW_INFO_FORMAT_REMOTE_TABLE;
2406 dip->u.rti.name_ptr = (unw_word_t) bfd_get_filename (bfd);
2407 dip->u.rti.segbase = segbase;
2408 dip->u.rti.table_len = p_unwind->p_memsz / sizeof (unw_word_t);
2409 dip->u.rti.table_data = p_unwind->p_vaddr + load_base;
2414 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2416 ia64_find_proc_info_x (unw_addr_space_t as, unw_word_t ip, unw_proc_info_t *pi,
2417 int need_unwind_info, void *arg)
2419 struct obj_section *sec = find_pc_section (ip);
2426 /* XXX This only works if the host and the target architecture are
2427 both ia64 and if the have (more or less) the same kernel
2429 if (get_kernel_table (ip, &di) < 0)
2430 return -UNW_ENOINFO;
2432 if (gdbarch_debug >= 1)
2433 fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: 0x%s -> "
2434 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2435 "length=%s,data=0x%s)\n",
2436 paddr_nz (ip), (char *)di.u.ti.name_ptr,
2437 paddr_nz (di.u.ti.segbase),
2438 paddr_nz (di.start_ip), paddr_nz (di.end_ip),
2440 paddr_u (di.u.ti.table_len),
2441 paddr_nz ((CORE_ADDR)di.u.ti.table_data));
2445 ret = ia64_find_unwind_table (sec->objfile, ip, &di, &buf);
2449 if (gdbarch_debug >= 1)
2450 fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: 0x%s -> "
2451 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2452 "length=%s,data=0x%s)\n",
2453 paddr_nz (ip), (char *)di.u.rti.name_ptr,
2454 paddr_nz (di.u.rti.segbase),
2455 paddr_nz (di.start_ip), paddr_nz (di.end_ip),
2457 paddr_u (di.u.rti.table_len),
2458 paddr_nz (di.u.rti.table_data));
2461 ret = libunwind_search_unwind_table (&as, ip, &di, pi, need_unwind_info,
2464 /* We no longer need the dyn info storage so free it. */
2470 /* Libunwind callback accessor function for cleanup. */
2472 ia64_put_unwind_info (unw_addr_space_t as,
2473 unw_proc_info_t *pip, void *arg)
2475 /* Nothing required for now. */
2478 /* Libunwind callback accessor function to get head of the dynamic
2479 unwind-info registration list. */
2481 ia64_get_dyn_info_list (unw_addr_space_t as,
2482 unw_word_t *dilap, void *arg)
2484 struct obj_section *text_sec;
2485 struct objfile *objfile;
2486 unw_word_t ip, addr;
2490 if (!libunwind_is_initialized ())
2491 return -UNW_ENOINFO;
2493 for (objfile = object_files; objfile; objfile = objfile->next)
2497 text_sec = objfile->sections + SECT_OFF_TEXT (objfile);
2498 ip = text_sec->addr;
2499 ret = ia64_find_unwind_table (objfile, ip, &di, &buf);
2502 addr = libunwind_find_dyn_list (as, &di, arg);
2503 /* We no longer need the dyn info storage so free it. */
2508 if (gdbarch_debug >= 1)
2509 fprintf_unfiltered (gdb_stdlog,
2510 "dynamic unwind table in objfile %s "
2511 "at 0x%s (gp=0x%s)\n",
2512 bfd_get_filename (objfile->obfd),
2513 paddr_nz (addr), paddr_nz (di.gp));
2519 return -UNW_ENOINFO;
2523 /* Frame interface functions for libunwind. */
2526 ia64_libunwind_frame_this_id (struct frame_info *next_frame, void **this_cache,
2527 struct frame_id *this_id)
2533 libunwind_frame_this_id (next_frame, this_cache, &id);
2535 /* We must add the bsp as the special address for frame comparison purposes. */
2536 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
2537 bsp = extract_unsigned_integer (buf, 8);
2539 (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp);
2541 if (gdbarch_debug >= 1)
2542 fprintf_unfiltered (gdb_stdlog,
2543 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2544 paddr_nz (id.code_addr), paddr_nz (id.stack_addr),
2545 paddr_nz (bsp), next_frame);
2549 ia64_libunwind_frame_prev_register (struct frame_info *next_frame,
2551 int regnum, int *optimizedp,
2552 enum lval_type *lvalp, CORE_ADDR *addrp,
2553 int *realnump, void *valuep)
2557 if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
2558 reg = IA64_PR_REGNUM;
2559 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
2560 reg = IA64_UNAT_REGNUM;
2562 /* Let libunwind do most of the work. */
2563 libunwind_frame_prev_register (next_frame, this_cache, reg,
2564 optimizedp, lvalp, addrp, realnump, valuep);
2566 /* No more to do if the value is not supposed to be supplied. */
2570 if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
2574 if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
2578 unsigned char buf[MAX_REGISTER_SIZE];
2580 /* Fetch predicate register rename base from current frame
2581 marker for this frame. */
2582 frame_unwind_register (next_frame, IA64_CFM_REGNUM, buf);
2583 cfm = extract_unsigned_integer (buf, 8);
2584 rrb_pr = (cfm >> 32) & 0x3f;
2586 /* Adjust the register number to account for register rotation. */
2587 regnum = VP16_REGNUM
2588 + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
2590 prN_val = extract_bit_field ((unsigned char *) valuep,
2591 regnum - VP0_REGNUM, 1);
2592 store_unsigned_integer (valuep, register_size (current_gdbarch, regnum), prN_val);
2594 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
2598 unatN_val = extract_bit_field ((unsigned char *) valuep,
2599 regnum - IA64_NAT0_REGNUM, 1);
2600 store_unsigned_integer (valuep, register_size (current_gdbarch, regnum),
2603 else if (regnum == IA64_BSP_REGNUM)
2605 char cfm_valuep[MAX_REGISTER_SIZE];
2608 enum lval_type cfm_lval;
2610 CORE_ADDR bsp, prev_cfm, prev_bsp;
2612 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2613 This corresponds to what the hardware bsp register will be if we pop the frame
2614 back which is why we might have been called. We know that libunwind will pass us back
2615 the beginning of the current frame so we should just add sof to it. */
2616 prev_bsp = extract_unsigned_integer (valuep, 8);
2617 libunwind_frame_prev_register (next_frame, this_cache, IA64_CFM_REGNUM,
2618 &cfm_optim, &cfm_lval, &cfm_addr, &cfm_realnum, cfm_valuep);
2619 prev_cfm = extract_unsigned_integer (cfm_valuep, 8);
2620 prev_bsp = rse_address_add (prev_bsp, (prev_cfm & 0x7f));
2622 store_unsigned_integer (valuep, register_size (current_gdbarch, regnum),
2626 if (gdbarch_debug >= 1)
2627 fprintf_unfiltered (gdb_stdlog,
2628 "libunwind prev register <%s> is 0x%s\n",
2629 (((unsigned) regnum <= IA64_NAT127_REGNUM)
2630 ? ia64_register_names[regnum] : "r??"),
2631 paddr_nz (extract_unsigned_integer (valuep, 8)));
2634 static const struct frame_unwind ia64_libunwind_frame_unwind =
2637 ia64_libunwind_frame_this_id,
2638 ia64_libunwind_frame_prev_register
2641 static const struct frame_unwind *
2642 ia64_libunwind_frame_sniffer (struct frame_info *next_frame)
2644 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame))
2645 return &ia64_libunwind_frame_unwind;
2650 /* Set of libunwind callback acccessor functions. */
2651 static unw_accessors_t ia64_unw_accessors =
2653 ia64_find_proc_info_x,
2654 ia64_put_unwind_info,
2655 ia64_get_dyn_info_list,
2663 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2664 static struct libunwind_descr ia64_libunwind_descr =
2669 &ia64_unw_accessors,
2672 #endif /* HAVE_LIBUNWIND_IA64_H */
2674 /* Should we use DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS instead of
2675 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc and TYPE
2676 is the type (which is known to be struct, union or array). */
2678 ia64_use_struct_convention (int gcc_p, struct type *type)
2680 struct type *float_elt_type;
2682 /* HFAs are structures (or arrays) consisting entirely of floating
2683 point values of the same length. Up to 8 of these are returned
2684 in registers. Don't use the struct convention when this is the
2686 float_elt_type = is_float_or_hfa_type (type);
2687 if (float_elt_type != NULL
2688 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
2691 /* Other structs of length 32 or less are returned in r8-r11.
2692 Don't use the struct convention for those either. */
2693 return TYPE_LENGTH (type) > 32;
2697 ia64_extract_return_value (struct type *type, struct regcache *regcache, void *valbuf)
2699 struct type *float_elt_type;
2701 float_elt_type = is_float_or_hfa_type (type);
2702 if (float_elt_type != NULL)
2704 char from[MAX_REGISTER_SIZE];
2706 int regnum = IA64_FR8_REGNUM;
2707 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
2711 regcache_cooked_read (regcache, regnum, from);
2712 convert_typed_floating (from, builtin_type_ia64_ext,
2713 (char *)valbuf + offset, float_elt_type);
2714 offset += TYPE_LENGTH (float_elt_type);
2722 int regnum = IA64_GR8_REGNUM;
2723 int reglen = TYPE_LENGTH (ia64_register_type (NULL, IA64_GR8_REGNUM));
2724 int n = TYPE_LENGTH (type) / reglen;
2725 int m = TYPE_LENGTH (type) % reglen;
2730 regcache_cooked_read_unsigned (regcache, regnum, &val);
2731 memcpy ((char *)valbuf + offset, &val, reglen);
2738 regcache_cooked_read_unsigned (regcache, regnum, &val);
2739 memcpy ((char *)valbuf + offset, &val, m);
2745 ia64_extract_struct_value_address (struct regcache *regcache)
2747 error ("ia64_extract_struct_value_address called and cannot get struct value address");
2753 is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
2755 switch (TYPE_CODE (t))
2759 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
2766 case TYPE_CODE_ARRAY:
2768 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
2771 case TYPE_CODE_STRUCT:
2775 for (i = 0; i < TYPE_NFIELDS (t); i++)
2776 if (!is_float_or_hfa_type_recurse
2777 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
2788 /* Determine if the given type is one of the floating point types or
2789 and HFA (which is a struct, array, or combination thereof whose
2790 bottom-most elements are all of the same floating point type). */
2792 static struct type *
2793 is_float_or_hfa_type (struct type *t)
2795 struct type *et = 0;
2797 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
2801 /* Return 1 if the alignment of T is such that the next even slot
2802 should be used. Return 0, if the next available slot should
2803 be used. (See section 8.5.1 of the IA-64 Software Conventions
2804 and Runtime manual). */
2807 slot_alignment_is_next_even (struct type *t)
2809 switch (TYPE_CODE (t))
2813 if (TYPE_LENGTH (t) > 8)
2817 case TYPE_CODE_ARRAY:
2819 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
2820 case TYPE_CODE_STRUCT:
2824 for (i = 0; i < TYPE_NFIELDS (t); i++)
2825 if (slot_alignment_is_next_even
2826 (check_typedef (TYPE_FIELD_TYPE (t, i))))
2835 /* Attempt to find (and return) the global pointer for the given
2838 This is a rather nasty bit of code searchs for the .dynamic section
2839 in the objfile corresponding to the pc of the function we're trying
2840 to call. Once it finds the addresses at which the .dynamic section
2841 lives in the child process, it scans the Elf64_Dyn entries for a
2842 DT_PLTGOT tag. If it finds one of these, the corresponding
2843 d_un.d_ptr value is the global pointer. */
2846 ia64_find_global_pointer (CORE_ADDR faddr)
2848 struct obj_section *faddr_sect;
2850 faddr_sect = find_pc_section (faddr);
2851 if (faddr_sect != NULL)
2853 struct obj_section *osect;
2855 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
2857 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
2861 if (osect < faddr_sect->objfile->sections_end)
2866 while (addr < osect->endaddr)
2872 status = target_read_memory (addr, buf, sizeof (buf));
2875 tag = extract_signed_integer (buf, sizeof (buf));
2877 if (tag == DT_PLTGOT)
2879 CORE_ADDR global_pointer;
2881 status = target_read_memory (addr + 8, buf, sizeof (buf));
2884 global_pointer = extract_unsigned_integer (buf, sizeof (buf));
2887 return global_pointer;
2900 /* Given a function's address, attempt to find (and return) the
2901 corresponding (canonical) function descriptor. Return 0 if
2904 find_extant_func_descr (CORE_ADDR faddr)
2906 struct obj_section *faddr_sect;
2908 /* Return early if faddr is already a function descriptor. */
2909 faddr_sect = find_pc_section (faddr);
2910 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
2913 if (faddr_sect != NULL)
2915 struct obj_section *osect;
2916 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
2918 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
2922 if (osect < faddr_sect->objfile->sections_end)
2927 while (addr < osect->endaddr)
2933 status = target_read_memory (addr, buf, sizeof (buf));
2936 faddr2 = extract_signed_integer (buf, sizeof (buf));
2938 if (faddr == faddr2)
2948 /* Attempt to find a function descriptor corresponding to the
2949 given address. If none is found, construct one on the
2950 stack using the address at fdaptr. */
2953 find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
2957 fdesc = find_extant_func_descr (faddr);
2961 CORE_ADDR global_pointer;
2967 global_pointer = ia64_find_global_pointer (faddr);
2969 if (global_pointer == 0)
2970 global_pointer = read_register (IA64_GR1_REGNUM);
2972 store_unsigned_integer (buf, 8, faddr);
2973 store_unsigned_integer (buf + 8, 8, global_pointer);
2975 write_memory (fdesc, buf, 16);
2981 /* Use the following routine when printing out function pointers
2982 so the user can see the function address rather than just the
2983 function descriptor. */
2985 ia64_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
2986 struct target_ops *targ)
2988 struct obj_section *s;
2990 s = find_pc_section (addr);
2992 /* check if ADDR points to a function descriptor. */
2993 if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
2994 return read_memory_unsigned_integer (addr, 8);
3000 ia64_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
3006 ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
3007 struct regcache *regcache, CORE_ADDR bp_addr,
3008 int nargs, struct value **args, CORE_ADDR sp,
3009 int struct_return, CORE_ADDR struct_addr)
3015 int nslots, rseslots, memslots, slotnum, nfuncargs;
3017 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr, pc, global_pointer;
3018 CORE_ADDR func_addr = find_function_addr (function, NULL);
3022 /* Count the number of slots needed for the arguments. */
3023 for (argno = 0; argno < nargs; argno++)
3026 type = check_typedef (value_type (arg));
3027 len = TYPE_LENGTH (type);
3029 if ((nslots & 1) && slot_alignment_is_next_even (type))
3032 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
3035 nslots += (len + 7) / 8;
3038 /* Divvy up the slots between the RSE and the memory stack. */
3039 rseslots = (nslots > 8) ? 8 : nslots;
3040 memslots = nslots - rseslots;
3042 /* Allocate a new RSE frame. */
3043 cfm = read_register (IA64_CFM_REGNUM);
3045 bsp = read_register (IA64_BSP_REGNUM);
3046 new_bsp = rse_address_add (bsp, rseslots);
3047 write_register (IA64_BSP_REGNUM, new_bsp);
3049 pfs = read_register (IA64_PFS_REGNUM);
3050 pfs &= 0xc000000000000000LL;
3051 pfs |= (cfm & 0xffffffffffffLL);
3052 write_register (IA64_PFS_REGNUM, pfs);
3054 cfm &= 0xc000000000000000LL;
3056 write_register (IA64_CFM_REGNUM, cfm);
3058 /* We will attempt to find function descriptors in the .opd segment,
3059 but if we can't we'll construct them ourselves. That being the
3060 case, we'll need to reserve space on the stack for them. */
3061 funcdescaddr = sp - nfuncargs * 16;
3062 funcdescaddr &= ~0xfLL;
3064 /* Adjust the stack pointer to it's new value. The calling conventions
3065 require us to have 16 bytes of scratch, plus whatever space is
3066 necessary for the memory slots and our function descriptors. */
3067 sp = sp - 16 - (memslots + nfuncargs) * 8;
3068 sp &= ~0xfLL; /* Maintain 16 byte alignment. */
3070 /* Place the arguments where they belong. The arguments will be
3071 either placed in the RSE backing store or on the memory stack.
3072 In addition, floating point arguments or HFAs are placed in
3073 floating point registers. */
3075 floatreg = IA64_FR8_REGNUM;
3076 for (argno = 0; argno < nargs; argno++)
3078 struct type *float_elt_type;
3081 type = check_typedef (value_type (arg));
3082 len = TYPE_LENGTH (type);
3084 /* Special handling for function parameters. */
3086 && TYPE_CODE (type) == TYPE_CODE_PTR
3087 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
3091 store_unsigned_integer (val_buf, 8,
3092 find_func_descr (extract_unsigned_integer (value_contents (arg), 8),
3094 if (slotnum < rseslots)
3095 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
3097 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
3104 /* Skip odd slot if necessary... */
3105 if ((slotnum & 1) && slot_alignment_is_next_even (type))
3113 memset (val_buf, 0, 8);
3114 memcpy (val_buf, value_contents (arg) + argoffset, (len > 8) ? 8 : len);
3116 if (slotnum < rseslots)
3117 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
3119 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
3126 /* Handle floating point types (including HFAs). */
3127 float_elt_type = is_float_or_hfa_type (type);
3128 if (float_elt_type != NULL)
3131 len = TYPE_LENGTH (type);
3132 while (len > 0 && floatreg < IA64_FR16_REGNUM)
3134 char to[MAX_REGISTER_SIZE];
3135 convert_typed_floating (value_contents (arg) + argoffset, float_elt_type,
3136 to, builtin_type_ia64_ext);
3137 regcache_cooked_write (regcache, floatreg, (void *)to);
3139 argoffset += TYPE_LENGTH (float_elt_type);
3140 len -= TYPE_LENGTH (float_elt_type);
3145 /* Store the struct return value in r8 if necessary. */
3148 regcache_cooked_write_unsigned (regcache, IA64_GR8_REGNUM, (ULONGEST)struct_addr);
3151 global_pointer = ia64_find_global_pointer (func_addr);
3153 if (global_pointer != 0)
3154 write_register (IA64_GR1_REGNUM, global_pointer);
3156 write_register (IA64_BR0_REGNUM, bp_addr);
3158 write_register (sp_regnum, sp);
3163 static struct frame_id
3164 ia64_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
3169 frame_unwind_register (next_frame, sp_regnum, buf);
3170 sp = extract_unsigned_integer (buf, 8);
3172 frame_unwind_register (next_frame, IA64_BSP_REGNUM, buf);
3173 bsp = extract_unsigned_integer (buf, 8);
3175 if (gdbarch_debug >= 1)
3176 fprintf_unfiltered (gdb_stdlog,
3177 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3178 paddr_nz (frame_pc_unwind (next_frame)),
3179 paddr_nz (sp), paddr_nz (bsp));
3181 return frame_id_build_special (sp, frame_pc_unwind (next_frame), bsp);
3185 ia64_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
3188 CORE_ADDR ip, psr, pc;
3190 frame_unwind_register (next_frame, IA64_IP_REGNUM, buf);
3191 ip = extract_unsigned_integer (buf, 8);
3192 frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf);
3193 psr = extract_unsigned_integer (buf, 8);
3195 pc = (ip & ~0xf) | ((psr >> 41) & 3);
3200 ia64_store_return_value (struct type *type, struct regcache *regcache, const void *valbuf)
3202 if (TYPE_CODE (type) == TYPE_CODE_FLT)
3204 char to[MAX_REGISTER_SIZE];
3205 convert_typed_floating (valbuf, type, to, builtin_type_ia64_ext);
3206 regcache_cooked_write (regcache, IA64_FR8_REGNUM, (void *)to);
3207 target_store_registers (IA64_FR8_REGNUM);
3210 regcache_cooked_write (regcache, IA64_GR8_REGNUM, valbuf);
3214 ia64_remote_translate_xfer_address (struct gdbarch *gdbarch,
3215 struct regcache *regcache,
3216 CORE_ADDR memaddr, int nr_bytes,
3217 CORE_ADDR *targ_addr, int *targ_len)
3219 *targ_addr = memaddr;
3220 *targ_len = nr_bytes;
3224 ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info)
3226 info->bytes_per_line = SLOT_MULTIPLIER;
3227 return print_insn_ia64 (memaddr, info);
3230 static struct gdbarch *
3231 ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3233 struct gdbarch *gdbarch;
3234 struct gdbarch_tdep *tdep;
3236 /* If there is already a candidate, use it. */
3237 arches = gdbarch_list_lookup_by_info (arches, &info);
3239 return arches->gdbarch;
3241 tdep = xmalloc (sizeof (struct gdbarch_tdep));
3242 gdbarch = gdbarch_alloc (&info, tdep);
3244 tdep->sigcontext_register_address = 0;
3246 /* Define the ia64 floating-point format to gdb. */
3247 builtin_type_ia64_ext =
3248 init_type (TYPE_CODE_FLT, 128 / 8,
3249 0, "builtin_type_ia64_ext", NULL);
3250 TYPE_FLOATFORMAT (builtin_type_ia64_ext) = &floatformat_ia64_ext;
3252 /* According to the ia64 specs, instructions that store long double
3253 floats in memory use a long-double format different than that
3254 used in the floating registers. The memory format matches the
3255 x86 extended float format which is 80 bits. An OS may choose to
3256 use this format (e.g. GNU/Linux) or choose to use a different
3257 format for storing long doubles (e.g. HPUX). In the latter case,
3258 the setting of the format may be moved/overridden in an
3259 OS-specific tdep file. */
3260 set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext);
3262 set_gdbarch_short_bit (gdbarch, 16);
3263 set_gdbarch_int_bit (gdbarch, 32);
3264 set_gdbarch_long_bit (gdbarch, 64);
3265 set_gdbarch_long_long_bit (gdbarch, 64);
3266 set_gdbarch_float_bit (gdbarch, 32);
3267 set_gdbarch_double_bit (gdbarch, 64);
3268 set_gdbarch_long_double_bit (gdbarch, 128);
3269 set_gdbarch_ptr_bit (gdbarch, 64);
3271 set_gdbarch_num_regs (gdbarch, NUM_IA64_RAW_REGS);
3272 set_gdbarch_num_pseudo_regs (gdbarch, LAST_PSEUDO_REGNUM - FIRST_PSEUDO_REGNUM);
3273 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
3274 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
3276 set_gdbarch_register_name (gdbarch, ia64_register_name);
3277 /* FIXME: Following interface should not be needed, however, without it recurse.exp
3278 gets a number of extra failures. */
3279 set_gdbarch_deprecated_register_size (gdbarch, 8);
3280 set_gdbarch_register_type (gdbarch, ia64_register_type);
3282 set_gdbarch_pseudo_register_read (gdbarch, ia64_pseudo_register_read);
3283 set_gdbarch_pseudo_register_write (gdbarch, ia64_pseudo_register_write);
3284 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, ia64_dwarf_reg_to_regnum);
3285 set_gdbarch_register_reggroup_p (gdbarch, ia64_register_reggroup_p);
3286 set_gdbarch_convert_register_p (gdbarch, ia64_convert_register_p);
3287 set_gdbarch_register_to_value (gdbarch, ia64_register_to_value);
3288 set_gdbarch_value_to_register (gdbarch, ia64_value_to_register);
3290 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
3292 set_gdbarch_deprecated_use_struct_convention (gdbarch, ia64_use_struct_convention);
3293 set_gdbarch_extract_return_value (gdbarch, ia64_extract_return_value);
3295 set_gdbarch_store_return_value (gdbarch, ia64_store_return_value);
3296 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
3298 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
3299 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
3300 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
3301 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
3302 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
3304 /* Settings for calling functions in the inferior. */
3305 set_gdbarch_push_dummy_call (gdbarch, ia64_push_dummy_call);
3306 set_gdbarch_frame_align (gdbarch, ia64_frame_align);
3307 set_gdbarch_unwind_dummy_id (gdbarch, ia64_unwind_dummy_id);
3309 set_gdbarch_unwind_pc (gdbarch, ia64_unwind_pc);
3310 frame_unwind_append_sniffer (gdbarch, ia64_sigtramp_frame_sniffer);
3311 #ifdef HAVE_LIBUNWIND_IA64_H
3312 frame_unwind_append_sniffer (gdbarch, ia64_libunwind_frame_sniffer);
3313 libunwind_frame_set_descr (gdbarch, &ia64_libunwind_descr);
3315 frame_unwind_append_sniffer (gdbarch, ia64_frame_sniffer);
3316 frame_base_set_default (gdbarch, &ia64_frame_base);
3318 /* Settings that should be unnecessary. */
3319 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
3321 set_gdbarch_remote_translate_xfer_address (
3322 gdbarch, ia64_remote_translate_xfer_address);
3324 set_gdbarch_print_insn (gdbarch, ia64_print_insn);
3325 set_gdbarch_convert_from_func_ptr_addr (gdbarch, ia64_convert_from_func_ptr_addr);
3327 /* Hook in ABI-specific overrides, if they have been registered. */
3328 gdbarch_init_osabi (info, gdbarch);
3333 extern initialize_file_ftype _initialize_ia64_tdep; /* -Wmissing-prototypes */
3336 _initialize_ia64_tdep (void)
3338 gdbarch_register (bfd_arch_ia64, ia64_gdbarch_init, NULL);