1 /* Target-dependent code for the i386.
3 Copyright (C) 2001-2017 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
29 /* GDB's i386 target supports both the 32-bit Intel Architecture
30 (IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
31 a similar register layout for both.
33 - General purpose registers
35 - FPU control registers
37 - SSE control register
39 The general purpose registers for the x86-64 architecture are quite
40 different from IA-32. Therefore, gdbarch_fp0_regnum
41 determines the register number at which the FPU data registers
42 start. The number of FPU data and control registers is the same
43 for both architectures. The number of SSE registers however,
44 differs and is determined by the num_xmm_regs member of `struct
47 /* Convention for returning structures. */
51 pcc_struct_return, /* Return "short" structures in memory. */
52 reg_struct_return /* Return "short" structures in registers. */
55 /* i386 architecture specific information. */
58 /* General-purpose registers. */
59 int *gregset_reg_offset;
61 size_t sizeof_gregset;
63 /* Floating-point registers. */
64 size_t sizeof_fpregset;
66 /* Register number for %st(0). The register numbers for the other
67 registers follow from this one. Set this to -1 to indicate the
71 /* Number of MMX registers. */
74 /* Register number for %mm0. Set this to -1 to indicate the absence
78 /* Number of pseudo YMM registers. */
81 /* Register number for %ymm0. Set this to -1 to indicate the absence
82 of pseudo YMM register support. */
85 /* Number of AVX512 OpMask registers (K-registers) */
88 /* Register number for %k0. Set this to -1 to indicate the absence
89 of AVX512 OpMask register support. */
92 /* Number of pseudo ZMM registers ($zmm0-$zmm31). */
95 /* Register number for %zmm0. Set this to -1 to indicate the absence
96 of pseudo ZMM register support. */
99 /* Number of byte registers. */
102 /* Register pseudo number for %al. */
105 /* Number of pseudo word registers. */
108 /* Register number for %ax. */
111 /* Number of pseudo dword registers. */
114 /* Register number for %eax. Set this to -1 to indicate the absence
115 of pseudo dword register support. */
118 /* Number of core registers. */
121 /* Number of SSE registers. */
124 /* Number of SSE registers added in AVX512. */
125 int num_xmm_avx512_regs;
127 /* Register number of XMM16, the first XMM register added in AVX512. */
130 /* Number of YMM registers added in AVX512. */
131 int num_ymm_avx512_regs;
133 /* Register number of YMM16, the first YMM register added in AVX512. */
136 /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
137 register), excluding the x87 bit, which are supported by this GDB. */
141 /* Offset of XCR0 in XSAVE extended state. */
142 int xsave_xcr0_offset;
144 /* Register names. */
145 const char **register_names;
147 /* Register number for %ymm0h. Set this to -1 to indicate the absence
148 of upper YMM register support. */
151 /* Upper YMM register names. Only used for tdesc_numbered_register. */
152 const char **ymmh_register_names;
154 /* Register number for %ymm16h. Set this to -1 to indicate the absence
155 of support for YMM16-31. */
158 /* YMM16-31 register names. Only used for tdesc_numbered_register. */
159 const char **ymm16h_register_names;
161 /* Register number for %bnd0r. Set this to -1 to indicate the absence
165 /* Register number for pseudo register %bnd0. Set this to -1 to indicate the absence
169 /* Register number for %bndcfgu. Set this to -1 to indicate the absence
170 bound control registers. */
173 /* MPX register names. Only used for tdesc_numbered_register. */
174 const char **mpx_register_names;
176 /* Register number for %zmm0h. Set this to -1 to indicate the absence
177 of ZMM_HI256 register support. */
180 /* OpMask register names. */
181 const char **k_register_names;
183 /* ZMM register names. Only used for tdesc_numbered_register. */
184 const char **zmmh_register_names;
186 /* XMM16-31 register names. Only used for tdesc_numbered_register. */
187 const char **xmm_avx512_register_names;
189 /* YMM16-31 register names. Only used for tdesc_numbered_register. */
190 const char **ymm_avx512_register_names;
192 /* Number of PKEYS registers. */
195 /* Register number for PKRU register. */
198 /* PKEYS register names. */
199 const char **pkeys_register_names;
201 /* Target description. */
202 const struct target_desc *tdesc;
204 /* Register group function. */
205 gdbarch_register_reggroup_p_ftype *register_reggroup_p;
207 /* Offset of saved PC in jmp_buf. */
210 /* Convention for returning structures. */
211 enum struct_return struct_return;
213 /* Address range where sigtramp lives. */
214 CORE_ADDR sigtramp_start;
215 CORE_ADDR sigtramp_end;
217 /* Detect sigtramp. */
218 int (*sigtramp_p) (struct frame_info *);
220 /* Get address of sigcontext for sigtramp. */
221 CORE_ADDR (*sigcontext_addr) (struct frame_info *);
223 /* Offset of registers in `struct sigcontext'. */
227 /* Offset of saved PC and SP in `struct sigcontext'. Usage of these
228 is deprecated, please use `sc_reg_offset' instead. */
232 /* ISA-specific data types. */
233 struct type *i386_mmx_type;
234 struct type *i386_ymm_type;
235 struct type *i386_zmm_type;
236 struct type *i387_ext_type;
237 struct type *i386_bnd_type;
239 /* Process record/replay target. */
240 /* The map for registers because the AMD64's registers order
241 in GDB is not same as I386 instructions. */
242 const int *record_regmap;
243 /* Parse intx80 args. */
244 int (*i386_intx80_record) (struct regcache *regcache);
245 /* Parse sysenter args. */
246 int (*i386_sysenter_record) (struct regcache *regcache);
247 /* Parse syscall args. */
248 int (*i386_syscall_record) (struct regcache *regcache);
251 const struct regset *fpregset;
254 /* Floating-point registers. */
256 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
257 (at most) in the FPU, but are zero-extended to 32 bits in GDB's
260 /* Return non-zero if REGNUM matches the FP register and the FP
261 register set is active. */
262 extern int i386_fp_regnum_p (struct gdbarch *, int);
263 extern int i386_fpc_regnum_p (struct gdbarch *, int);
265 /* Register numbers of various important registers. */
269 I386_EAX_REGNUM, /* %eax */
270 I386_ECX_REGNUM, /* %ecx */
271 I386_EDX_REGNUM, /* %edx */
272 I386_EBX_REGNUM, /* %ebx */
273 I386_ESP_REGNUM, /* %esp */
274 I386_EBP_REGNUM, /* %ebp */
275 I386_ESI_REGNUM, /* %esi */
276 I386_EDI_REGNUM, /* %edi */
277 I386_EIP_REGNUM, /* %eip */
278 I386_EFLAGS_REGNUM, /* %eflags */
279 I386_CS_REGNUM, /* %cs */
280 I386_SS_REGNUM, /* %ss */
281 I386_DS_REGNUM, /* %ds */
282 I386_ES_REGNUM, /* %es */
283 I386_FS_REGNUM, /* %fs */
284 I386_GS_REGNUM, /* %gs */
285 I386_ST0_REGNUM, /* %st(0) */
286 I386_MXCSR_REGNUM = 40, /* %mxcsr */
287 I386_YMM0H_REGNUM, /* %ymm0h */
288 I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
290 I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
292 I386_BNDSTATUS_REGNUM,
293 I386_K0_REGNUM, /* %k0 */
294 I386_K7_REGNUM = I386_K0_REGNUM + 7,
295 I386_ZMM0H_REGNUM, /* %zmm0h */
296 I386_ZMM7H_REGNUM = I386_ZMM0H_REGNUM + 7,
300 /* Register numbers of RECORD_REGMAP. */
302 enum record_i386_regnum
304 X86_RECORD_REAX_REGNUM,
305 X86_RECORD_RECX_REGNUM,
306 X86_RECORD_REDX_REGNUM,
307 X86_RECORD_REBX_REGNUM,
308 X86_RECORD_RESP_REGNUM,
309 X86_RECORD_REBP_REGNUM,
310 X86_RECORD_RESI_REGNUM,
311 X86_RECORD_REDI_REGNUM,
312 X86_RECORD_R8_REGNUM,
313 X86_RECORD_R9_REGNUM,
314 X86_RECORD_R10_REGNUM,
315 X86_RECORD_R11_REGNUM,
316 X86_RECORD_R12_REGNUM,
317 X86_RECORD_R13_REGNUM,
318 X86_RECORD_R14_REGNUM,
319 X86_RECORD_R15_REGNUM,
320 X86_RECORD_REIP_REGNUM,
321 X86_RECORD_EFLAGS_REGNUM,
322 X86_RECORD_CS_REGNUM,
323 X86_RECORD_SS_REGNUM,
324 X86_RECORD_DS_REGNUM,
325 X86_RECORD_ES_REGNUM,
326 X86_RECORD_FS_REGNUM,
327 X86_RECORD_GS_REGNUM,
330 #define I386_NUM_GREGS 16
331 #define I386_NUM_XREGS 9
333 #define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
334 #define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
335 #define I386_MPX_NUM_REGS (I386_BNDSTATUS_REGNUM + 1)
336 #define I386_AVX512_NUM_REGS (I386_ZMM7H_REGNUM + 1)
337 #define I386_PKEYS_NUM_REGS (I386_PKRU_REGNUM + 1)
339 /* Size of the largest register. */
340 #define I386_MAX_REGISTER_SIZE 64
342 /* Types for i386-specific registers. */
343 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
345 /* Checks of different pseudo-registers. */
346 extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
347 extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
348 extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
349 extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
350 extern int i386_xmm_avx512_regnum_p (struct gdbarch * gdbarch, int regnum);
351 extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
352 extern int i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum);
353 extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
354 extern int i386_k_regnum_p (struct gdbarch *gdbarch, int regnum);
355 extern int i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum);
356 extern int i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum);
357 extern bool i386_pkru_regnum_p (struct gdbarch *gdbarch, int regnum);
359 extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
361 extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
364 extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
365 struct regcache *regcache,
367 struct value *result);
369 extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
370 struct regcache *regcache,
371 int regnum, const gdb_byte *buf);
373 extern int i386_ax_pseudo_register_collect (struct gdbarch *gdbarch,
374 struct agent_expr *ax,
377 /* Segment selectors. */
378 #define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
379 #define I386_SEL_UPL 0x0003 /* User Privilige Level. */
380 #define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
382 /* The length of the longest i386 instruction (according to
383 include/asm-i386/kprobes.h in Linux 2.6. */
384 #define I386_MAX_INSN_LEN (16)
386 /* Functions exported from i386-tdep.c. */
387 extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
388 CORE_ADDR pc, char *name);
389 extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
392 /* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
393 extern int i386_sigtramp_p (struct frame_info *this_frame);
395 /* Return non-zero if REGNUM is a member of the specified group. */
396 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
397 struct reggroup *group);
399 /* Supply register REGNUM from the general-purpose register set REGSET
400 to register cache REGCACHE. If REGNUM is -1, do this for all
401 registers in REGSET. */
402 extern void i386_supply_gregset (const struct regset *regset,
403 struct regcache *regcache, int regnum,
404 const void *gregs, size_t len);
406 /* General-purpose register set. */
407 extern const struct regset i386_gregset;
409 /* Floating-point register set. */
410 extern const struct regset i386_fpregset;
412 /* Default iterator over core file register note sections. */
414 i386_iterate_over_regset_sections (struct gdbarch *gdbarch,
415 iterate_over_regset_sections_cb *cb,
417 const struct regcache *regcache);
419 extern struct displaced_step_closure *i386_displaced_step_copy_insn
420 (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
421 struct regcache *regs);
422 extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
423 struct displaced_step_closure *closure,
424 CORE_ADDR from, CORE_ADDR to,
425 struct regcache *regs);
427 /* Initialize a basic ELF architecture variant. */
428 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
430 /* Initialize a SVR4 architecture variant. */
431 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
433 /* Convert SVR4 register number REG to the appropriate register number
435 extern int i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg);
437 extern int i386_process_record (struct gdbarch *gdbarch,
438 struct regcache *regcache, CORE_ADDR addr);
439 extern const struct target_desc *i386_target_description (uint64_t xcr0);
441 /* Return true iff the current target is MPX enabled. */
442 extern int i386_mpx_enabled (void);
445 /* Functions and variables exported from i386-bsd-tdep.c. */
447 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
448 extern CORE_ADDR i386fbsd_sigtramp_start_addr;
449 extern CORE_ADDR i386fbsd_sigtramp_end_addr;
450 extern CORE_ADDR i386obsd_sigtramp_start_addr;
451 extern CORE_ADDR i386obsd_sigtramp_end_addr;
452 extern int i386fbsd4_sc_reg_offset[];
453 extern int i386fbsd_sc_reg_offset[];
454 extern int i386nbsd_sc_reg_offset[];
455 extern int i386obsd_sc_reg_offset[];
456 extern int i386bsd_sc_reg_offset[];
458 /* SystemTap related functions. */
460 extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
463 extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
464 struct stap_parse_info *p);
466 #endif /* i386-tdep.h */