1 /* Target-dependent code for the i386.
3 Copyright (C) 2001, 2002, 2003, 2004, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
30 /* GDB's i386 target supports both the 32-bit Intel Architecture
31 (IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
32 a similar register layout for both.
34 - General purpose registers
36 - FPU control registers
38 - SSE control register
40 The general purpose registers for the x86-64 architecture are quite
41 different from IA-32. Therefore, gdbarch_fp0_regnum
42 determines the register number at which the FPU data registers
43 start. The number of FPU data and control registers is the same
44 for both architectures. The number of SSE registers however,
45 differs and is determined by the num_xmm_regs member of `struct
48 /* Convention for returning structures. */
52 pcc_struct_return, /* Return "short" structures in memory. */
53 reg_struct_return /* Return "short" structures in registers. */
56 /* Register classes as defined in the AMD x86-64 psABI. */
70 /* i386 architecture specific information. */
73 /* General-purpose registers. */
74 struct regset *gregset;
75 int *gregset_reg_offset;
77 size_t sizeof_gregset;
79 /* The general-purpose registers used to pass integers when making
80 function calls. This only applies to amd64, as all parameters
81 are passed through the stack on x86. */
82 int call_dummy_num_integer_regs;
83 int *call_dummy_integer_regs;
85 /* Used on amd64 only. Classify TYPE according to calling conventions,
86 and store the result in CLASS. */
87 void (*classify) (struct type *type, enum amd64_reg_class class[2]);
89 /* Used on amd64 only. Non-zero if the first few MEMORY arguments
90 should be passed by pointer.
92 More precisely, MEMORY arguments are passed through the stack.
93 But certain architectures require that their address be passed
94 by register as well, if there are still some integer registers
95 available for argument passing. */
96 int memory_args_by_pointer;
98 /* Used on amd64 only.
100 If non-zero, then the callers of a function are expected to reserve
101 some space in the stack just before the area where the PC is saved
102 so that the callee may save the integer-parameter registers there.
103 The amount of space is dependent on the list of registers used for
104 integer parameter passing (see component call_dummy_num_integer_regs
106 int integer_param_regs_saved_in_caller_frame;
108 /* Floating-point registers. */
109 struct regset *fpregset;
110 size_t sizeof_fpregset;
112 /* Register number for %st(0). The register numbers for the other
113 registers follow from this one. Set this to -1 to indicate the
114 absence of an FPU. */
117 /* Register number for %mm0. Set this to -1 to indicate the absence
121 /* Number of core registers. */
124 /* Number of SSE registers. */
127 /* Register names. */
128 const char **register_names;
130 /* Target description. */
131 const struct target_desc *tdesc;
133 /* Register group function. */
134 const void *register_reggroup_p;
136 /* Offset of saved PC in jmp_buf. */
139 /* Convention for returning structures. */
140 enum struct_return struct_return;
142 /* Address range where sigtramp lives. */
143 CORE_ADDR sigtramp_start;
144 CORE_ADDR sigtramp_end;
146 /* Detect sigtramp. */
147 int (*sigtramp_p) (struct frame_info *);
149 /* Get address of sigcontext for sigtramp. */
150 CORE_ADDR (*sigcontext_addr) (struct frame_info *);
152 /* Offset of registers in `struct sigcontext'. */
156 /* Offset of saved PC and SP in `struct sigcontext'. Usage of these
157 is deprecated, please use `sc_reg_offset' instead. */
161 /* ISA-specific data types. */
162 struct type *i386_mmx_type;
163 struct type *i387_ext_type;
165 /* Process record/replay target. */
166 /* The map for registers because the AMD64's registers order
167 in GDB is not same as I386 instructions. */
168 const int *record_regmap;
169 /* Parse intx80 args. */
170 int (*i386_intx80_record) (struct regcache *regcache);
171 /* Parse sysenter args. */
172 int (*i386_sysenter_record) (struct regcache *regcache);
173 /* Parse syscall args. */
174 int (*i386_syscall_record) (struct regcache *regcache);
177 /* Floating-point registers. */
179 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
180 (at most) in the FPU, but are zero-extended to 32 bits in GDB's
183 /* Return non-zero if REGNUM matches the FP register and the FP
184 register set is active. */
185 extern int i386_fp_regnum_p (struct gdbarch *, int);
186 extern int i386_fpc_regnum_p (struct gdbarch *, int);
188 /* Register numbers of various important registers. */
192 I386_EAX_REGNUM, /* %eax */
193 I386_ECX_REGNUM, /* %ecx */
194 I386_EDX_REGNUM, /* %edx */
195 I386_EBX_REGNUM, /* %ebx */
196 I386_ESP_REGNUM, /* %esp */
197 I386_EBP_REGNUM, /* %ebp */
198 I386_ESI_REGNUM, /* %esi */
199 I386_EDI_REGNUM, /* %edi */
200 I386_EIP_REGNUM, /* %eip */
201 I386_EFLAGS_REGNUM, /* %eflags */
202 I386_CS_REGNUM, /* %cs */
203 I386_SS_REGNUM, /* %ss */
204 I386_DS_REGNUM, /* %ds */
205 I386_ES_REGNUM, /* %es */
206 I386_FS_REGNUM, /* %fs */
207 I386_GS_REGNUM, /* %gs */
208 I386_ST0_REGNUM, /* %st(0) */
209 I386_MXCSR_REGNUM = 40 /* %mxcsr */
212 /* Register numbers of RECORD_REGMAP. */
214 enum record_i386_regnum
216 X86_RECORD_REAX_REGNUM,
217 X86_RECORD_RECX_REGNUM,
218 X86_RECORD_REDX_REGNUM,
219 X86_RECORD_REBX_REGNUM,
220 X86_RECORD_RESP_REGNUM,
221 X86_RECORD_REBP_REGNUM,
222 X86_RECORD_RESI_REGNUM,
223 X86_RECORD_REDI_REGNUM,
224 X86_RECORD_R8_REGNUM,
225 X86_RECORD_R9_REGNUM,
226 X86_RECORD_R10_REGNUM,
227 X86_RECORD_R11_REGNUM,
228 X86_RECORD_R12_REGNUM,
229 X86_RECORD_R13_REGNUM,
230 X86_RECORD_R14_REGNUM,
231 X86_RECORD_R15_REGNUM,
232 X86_RECORD_REIP_REGNUM,
233 X86_RECORD_EFLAGS_REGNUM,
234 X86_RECORD_CS_REGNUM,
235 X86_RECORD_SS_REGNUM,
236 X86_RECORD_DS_REGNUM,
237 X86_RECORD_ES_REGNUM,
238 X86_RECORD_FS_REGNUM,
239 X86_RECORD_GS_REGNUM,
242 #define I386_NUM_GREGS 16
243 #define I386_NUM_XREGS 9
245 #define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
247 /* Size of the largest register. */
248 #define I386_MAX_REGISTER_SIZE 16
250 /* Types for i386-specific registers. */
251 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
253 /* Segment selectors. */
254 #define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
255 #define I386_SEL_UPL 0x0003 /* User Privilige Level. */
256 #define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
258 /* The length of the longest i386 instruction (according to
259 include/asm-i386/kprobes.h in Linux 2.6. */
260 #define I386_MAX_INSN_LEN (16)
262 /* Functions exported from i386-tdep.c. */
263 extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
264 CORE_ADDR pc, char *name);
265 extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc);
267 /* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
268 extern int i386_sigtramp_p (struct frame_info *this_frame);
270 /* Return non-zero if REGNUM is a member of the specified group. */
271 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
272 struct reggroup *group);
274 /* Supply register REGNUM from the general-purpose register set REGSET
275 to register cache REGCACHE. If REGNUM is -1, do this for all
276 registers in REGSET. */
277 extern void i386_supply_gregset (const struct regset *regset,
278 struct regcache *regcache, int regnum,
279 const void *gregs, size_t len);
281 /* Collect register REGNUM from the register cache REGCACHE and store
282 it in the buffer specified by GREGS and LEN as described by the
283 general-purpose register set REGSET. If REGNUM is -1, do this for
284 all registers in REGSET. */
285 extern void i386_collect_gregset (const struct regset *regset,
286 const struct regcache *regcache,
287 int regnum, void *gregs, size_t len);
289 /* Return the appropriate register set for the core section identified
290 by SECT_NAME and SECT_SIZE. */
291 extern const struct regset *
292 i386_regset_from_core_section (struct gdbarch *gdbarch,
293 const char *sect_name, size_t sect_size);
296 extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
297 struct displaced_step_closure *closure,
298 CORE_ADDR from, CORE_ADDR to,
299 struct regcache *regs);
301 /* Initialize a basic ELF architecture variant. */
302 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
304 /* Initialize a SVR4 architecture variant. */
305 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
307 extern int i386_process_record (struct gdbarch *gdbarch,
308 struct regcache *regcache, CORE_ADDR addr);
311 /* Functions and variables exported from i386bsd-tdep.c. */
313 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
314 extern CORE_ADDR i386fbsd_sigtramp_start_addr;
315 extern CORE_ADDR i386fbsd_sigtramp_end_addr;
316 extern CORE_ADDR i386obsd_sigtramp_start_addr;
317 extern CORE_ADDR i386obsd_sigtramp_end_addr;
318 extern int i386fbsd4_sc_reg_offset[];
319 extern int i386fbsd_sc_reg_offset[];
320 extern int i386nbsd_sc_reg_offset[];
321 extern int i386obsd_sc_reg_offset[];
322 extern int i386bsd_sc_reg_offset[];
324 #endif /* i386-tdep.h */