1 /* Target-dependent code for GDB, the GNU debugger.
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 /* GDB's i386 target supports both the 32-bit Intel Architecture
28 (IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
29 a similar register layout for both.
31 - General purpose registers
33 - FPU control registers
35 - SSE control register
37 The general purpose registers for the x86-64 architecture are quite
38 different from IA-32. Therefore, the FP0_REGNUM target macro
39 determines the register number at which the FPU data registers
40 start. The number of FPU data and control registers is the same
41 for both architectures. The number of SSE registers however,
42 differs and is determined by the num_xmm_regs member of `struct
45 /* Convention for returning structures. */
49 pcc_struct_return, /* Return "short" structures in memory. */
50 reg_struct_return /* Return "short" structures in registers. */
53 /* i386 architecture specific information. */
59 /* Number of SSE registers. */
62 /* Offset of saved PC in jmp_buf. */
65 /* Convention for returning structures. */
66 enum struct_return struct_return;
68 /* Address range where sigtramp lives. */
69 CORE_ADDR sigtramp_start;
70 CORE_ADDR sigtramp_end;
72 /* Get address of sigcontext for sigtramp. */
73 CORE_ADDR (*sigcontext_addr) (struct frame_info *);
75 /* Offset of saved PC and SP in `struct sigcontext'. */
80 /* Floating-point registers. */
82 #define FPU_REG_RAW_SIZE 10
84 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
85 (at most) in the FPU, but are zero-extended to 32 bits in GDB's
88 /* "Generic" floating point control register. */
89 #define FPC_REGNUM (FP0_REGNUM + 8)
91 /* FPU control word. */
92 #define FCTRL_REGNUM FPC_REGNUM
94 /* FPU status word. */
95 #define FSTAT_REGNUM (FPC_REGNUM + 1)
97 /* FPU register tag word. */
98 #define FTAG_REGNUM (FPC_REGNUM + 2)
100 /* FPU instruction's code segment selector, called "FPU Instruction
101 Pointer Selector" in the IA-32 manuals. */
102 #define FISEG_REGNUM (FPC_REGNUM + 3)
104 /* FPU instruction's offset within segment. */
105 #define FIOFF_REGNUM (FPC_REGNUM + 4)
107 /* FPU operand's data segment. */
108 #define FOSEG_REGNUM (FPC_REGNUM + 5)
110 /* FPU operand's offset within segment */
111 #define FOOFF_REGNUM (FPC_REGNUM + 6)
113 /* FPU opcode, bottom eleven bits. */
114 #define FOP_REGNUM (FPC_REGNUM + 7)
116 /* Return non-zero if REGNUM matches the FP register and the FP
117 register set is active. */
118 extern int i386_fp_regnum_p (int regnum);
119 extern int i386_fpc_regnum_p (int regnum);
123 /* First SSE data register. */
124 #define XMM0_REGNUM (FPC_REGNUM + 8)
126 /* SSE control/status register. */
127 #define MXCSR_REGNUM \
128 (XMM0_REGNUM + gdbarch_tdep (current_gdbarch)->num_xmm_regs)
130 /* Return non-zero if REGNUM matches the SSE register and the SSE
131 register set is active. */
132 extern int i386_sse_regnum_p (int regnum);
133 extern int i386_mxcsr_regnum_p (int regnum);
135 /* FIXME: kettenis/2001-11-24: Obsolete macro's. */
136 #define FCS_REGNUM FISEG_REGNUM
137 #define FCOFF_REGNUM FIOFF_REGNUM
138 #define FDS_REGNUM FOSEG_REGNUM
139 #define FDOFF_REGNUM FOOFF_REGNUM
140 #define IS_FP_REGNUM(n) i386_fp_regnum_p (n)
141 #define IS_FPU_CTRL_REGNUM(n) i386_fpc_regnum_p (n)
142 #define IS_SSE_REGNUM(n) i386_sse_regnum_p (n)
144 #define I386_NUM_GREGS 16
145 #define I386_NUM_FREGS 16
146 #define I386_NUM_XREGS 9
148 #define I386_SSE_NUM_REGS (I386_NUM_GREGS + I386_NUM_FREGS \
151 /* Sizes of individual register sets. These cover the entire register
152 file, so summing up the sizes of those portions actually present
153 yields REGISTER_BYTES. */
154 #define I386_SIZEOF_GREGS (I386_NUM_GREGS * 4)
155 #define I386_SIZEOF_FREGS (8 * 10 + 8 * 4)
156 #define I386_SIZEOF_XREGS (8 * 16 + 4)
158 #define I386_SSE_SIZEOF_REGS (I386_SIZEOF_GREGS + I386_SIZEOF_FREGS \
161 /* Size of the largest register. */
162 #define I386_MAX_REGISTER_SIZE 16
164 /* Functions exported from i386-tdep.c. */
165 extern CORE_ADDR i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name);
166 extern int i386_frameless_signal_p (struct frame_info *frame);
168 /* Return the name of register REG. */
169 extern char const *i386_register_name (int reg);
171 /* Initialize a basic ELF architecture variant. */
172 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
174 /* Initialize a SVR4 architecture variant. */
175 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
177 /* Functions exported from i386bsd-tdep.c. */
179 extern CORE_ADDR i386bsd_sigcontext_addr (struct frame_info *frame);
180 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
182 #endif /* i386-tdep.h */