1 /* Target-dependent code for the i386.
3 Copyright (C) 2001-2014 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
29 /* GDB's i386 target supports both the 32-bit Intel Architecture
30 (IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
31 a similar register layout for both.
33 - General purpose registers
35 - FPU control registers
37 - SSE control register
39 The general purpose registers for the x86-64 architecture are quite
40 different from IA-32. Therefore, gdbarch_fp0_regnum
41 determines the register number at which the FPU data registers
42 start. The number of FPU data and control registers is the same
43 for both architectures. The number of SSE registers however,
44 differs and is determined by the num_xmm_regs member of `struct
47 /* Convention for returning structures. */
51 pcc_struct_return, /* Return "short" structures in memory. */
52 reg_struct_return /* Return "short" structures in registers. */
55 /* i386 architecture specific information. */
58 /* General-purpose registers. */
59 struct regset *gregset;
60 int *gregset_reg_offset;
62 size_t sizeof_gregset;
64 /* Floating-point registers. */
65 struct regset *fpregset;
66 size_t sizeof_fpregset;
68 /* XSAVE extended state. */
69 struct regset *xstateregset;
71 /* Register number for %st(0). The register numbers for the other
72 registers follow from this one. Set this to -1 to indicate the
76 /* Number of MMX registers. */
79 /* Register number for %mm0. Set this to -1 to indicate the absence
83 /* Number of pseudo YMM registers. */
86 /* Register number for %ymm0. Set this to -1 to indicate the absence
87 of pseudo YMM register support. */
90 /* Number of AVX512 OpMask registers (K-registers) */
93 /* Register number for %k0. Set this to -1 to indicate the absence
94 of AVX512 OpMask register support. */
97 /* Number of pseudo ZMM registers ($zmm0-$zmm31). */
100 /* Register number for %zmm0. Set this to -1 to indicate the absence
101 of pseudo ZMM register support. */
104 /* Number of byte registers. */
107 /* Register pseudo number for %al. */
110 /* Number of pseudo word registers. */
113 /* Register number for %ax. */
116 /* Number of pseudo dword registers. */
119 /* Register number for %eax. Set this to -1 to indicate the absence
120 of pseudo dword register support. */
123 /* Number of core registers. */
126 /* Number of SSE registers. */
129 /* Number of SSE registers added in AVX512. */
130 int num_xmm_avx512_regs;
132 /* Register number of XMM16, the first XMM register added in AVX512. */
135 /* Number of YMM registers added in AVX512. */
136 int num_ymm_avx512_regs;
138 /* Register number of YMM16, the first YMM register added in AVX512. */
141 /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
142 register), excluding the x87 bit, which are supported by this GDB. */
146 /* Offset of XCR0 in XSAVE extended state. */
147 int xsave_xcr0_offset;
149 /* Register names. */
150 const char **register_names;
152 /* Register number for %ymm0h. Set this to -1 to indicate the absence
153 of upper YMM register support. */
156 /* Upper YMM register names. Only used for tdesc_numbered_register. */
157 const char **ymmh_register_names;
159 /* Register number for %ymm16h. Set this to -1 to indicate the absence
160 of support for YMM16-31. */
163 /* YMM16-31 register names. Only used for tdesc_numbered_register. */
164 const char **ymm16h_register_names;
166 /* Register number for %bnd0r. Set this to -1 to indicate the absence
170 /* Register number for pseudo register %bnd0. Set this to -1 to indicate the absence
174 /* Register number for %bndcfgu. Set this to -1 to indicate the absence
175 bound control registers. */
178 /* MPX register names. Only used for tdesc_numbered_register. */
179 const char **mpx_register_names;
181 /* Register number for %zmm0h. Set this to -1 to indicate the absence
182 of ZMM_HI256 register support. */
185 /* OpMask register names. */
186 const char **k_register_names;
188 /* ZMM register names. Only used for tdesc_numbered_register. */
189 const char **zmmh_register_names;
191 /* XMM16-31 register names. Only used for tdesc_numbered_register. */
192 const char **xmm_avx512_register_names;
194 /* YMM16-31 register names. Only used for tdesc_numbered_register. */
195 const char **ymm_avx512_register_names;
197 /* Target description. */
198 const struct target_desc *tdesc;
200 /* Register group function. */
201 const void *register_reggroup_p;
203 /* Offset of saved PC in jmp_buf. */
206 /* Convention for returning structures. */
207 enum struct_return struct_return;
209 /* Address range where sigtramp lives. */
210 CORE_ADDR sigtramp_start;
211 CORE_ADDR sigtramp_end;
213 /* Detect sigtramp. */
214 int (*sigtramp_p) (struct frame_info *);
216 /* Get address of sigcontext for sigtramp. */
217 CORE_ADDR (*sigcontext_addr) (struct frame_info *);
219 /* Offset of registers in `struct sigcontext'. */
223 /* Offset of saved PC and SP in `struct sigcontext'. Usage of these
224 is deprecated, please use `sc_reg_offset' instead. */
228 /* ISA-specific data types. */
229 struct type *i386_mmx_type;
230 struct type *i386_ymm_type;
231 struct type *i386_zmm_type;
232 struct type *i387_ext_type;
233 struct type *i386_bnd_type;
235 /* Process record/replay target. */
236 /* The map for registers because the AMD64's registers order
237 in GDB is not same as I386 instructions. */
238 const int *record_regmap;
239 /* Parse intx80 args. */
240 int (*i386_intx80_record) (struct regcache *regcache);
241 /* Parse sysenter args. */
242 int (*i386_sysenter_record) (struct regcache *regcache);
243 /* Parse syscall args. */
244 int (*i386_syscall_record) (struct regcache *regcache);
247 /* Floating-point registers. */
249 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
250 (at most) in the FPU, but are zero-extended to 32 bits in GDB's
253 /* Return non-zero if REGNUM matches the FP register and the FP
254 register set is active. */
255 extern int i386_fp_regnum_p (struct gdbarch *, int);
256 extern int i386_fpc_regnum_p (struct gdbarch *, int);
258 /* Register numbers of various important registers. */
262 I386_EAX_REGNUM, /* %eax */
263 I386_ECX_REGNUM, /* %ecx */
264 I386_EDX_REGNUM, /* %edx */
265 I386_EBX_REGNUM, /* %ebx */
266 I386_ESP_REGNUM, /* %esp */
267 I386_EBP_REGNUM, /* %ebp */
268 I386_ESI_REGNUM, /* %esi */
269 I386_EDI_REGNUM, /* %edi */
270 I386_EIP_REGNUM, /* %eip */
271 I386_EFLAGS_REGNUM, /* %eflags */
272 I386_CS_REGNUM, /* %cs */
273 I386_SS_REGNUM, /* %ss */
274 I386_DS_REGNUM, /* %ds */
275 I386_ES_REGNUM, /* %es */
276 I386_FS_REGNUM, /* %fs */
277 I386_GS_REGNUM, /* %gs */
278 I386_ST0_REGNUM, /* %st(0) */
279 I386_MXCSR_REGNUM = 40, /* %mxcsr */
280 I386_YMM0H_REGNUM, /* %ymm0h */
281 I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
283 I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
285 I386_BNDSTATUS_REGNUM,
286 I386_K0_REGNUM, /* %k0 */
287 I386_K7_REGNUM = I386_K0_REGNUM + 7,
288 I386_ZMM0H_REGNUM, /* %zmm0h */
289 I386_ZMM7H_REGNUM = I386_ZMM0H_REGNUM + 7
292 /* Register numbers of RECORD_REGMAP. */
294 enum record_i386_regnum
296 X86_RECORD_REAX_REGNUM,
297 X86_RECORD_RECX_REGNUM,
298 X86_RECORD_REDX_REGNUM,
299 X86_RECORD_REBX_REGNUM,
300 X86_RECORD_RESP_REGNUM,
301 X86_RECORD_REBP_REGNUM,
302 X86_RECORD_RESI_REGNUM,
303 X86_RECORD_REDI_REGNUM,
304 X86_RECORD_R8_REGNUM,
305 X86_RECORD_R9_REGNUM,
306 X86_RECORD_R10_REGNUM,
307 X86_RECORD_R11_REGNUM,
308 X86_RECORD_R12_REGNUM,
309 X86_RECORD_R13_REGNUM,
310 X86_RECORD_R14_REGNUM,
311 X86_RECORD_R15_REGNUM,
312 X86_RECORD_REIP_REGNUM,
313 X86_RECORD_EFLAGS_REGNUM,
314 X86_RECORD_CS_REGNUM,
315 X86_RECORD_SS_REGNUM,
316 X86_RECORD_DS_REGNUM,
317 X86_RECORD_ES_REGNUM,
318 X86_RECORD_FS_REGNUM,
319 X86_RECORD_GS_REGNUM,
322 #define I386_NUM_GREGS 16
323 #define I386_NUM_XREGS 9
325 #define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
326 #define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
327 #define I386_MPX_NUM_REGS (I386_BNDSTATUS_REGNUM + 1)
328 #define I386_AVX512_NUM_REGS (I386_ZMM7H_REGNUM + 1)
330 /* Size of the largest register. */
331 #define I386_MAX_REGISTER_SIZE 64
333 /* Types for i386-specific registers. */
334 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
336 /* Checks of different pseudo-registers. */
337 extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
338 extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
339 extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
340 extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
341 extern int i386_xmm_avx512_regnum_p (struct gdbarch * gdbarch, int regnum);
342 extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
343 extern int i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum);
344 extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
345 extern int i386_k_regnum_p (struct gdbarch *gdbarch, int regnum);
346 extern int i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum);
347 extern int i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum);
349 extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
351 extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
354 extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
355 struct regcache *regcache,
357 struct value *result);
359 extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
360 struct regcache *regcache,
361 int regnum, const gdb_byte *buf);
363 /* Segment selectors. */
364 #define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
365 #define I386_SEL_UPL 0x0003 /* User Privilige Level. */
366 #define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
368 /* The length of the longest i386 instruction (according to
369 include/asm-i386/kprobes.h in Linux 2.6. */
370 #define I386_MAX_INSN_LEN (16)
372 /* Functions exported from i386-tdep.c. */
373 extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
374 CORE_ADDR pc, char *name);
375 extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
378 /* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
379 extern int i386_sigtramp_p (struct frame_info *this_frame);
381 /* Return non-zero if REGNUM is a member of the specified group. */
382 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
383 struct reggroup *group);
385 /* Supply register REGNUM from the general-purpose register set REGSET
386 to register cache REGCACHE. If REGNUM is -1, do this for all
387 registers in REGSET. */
388 extern void i386_supply_gregset (const struct regset *regset,
389 struct regcache *regcache, int regnum,
390 const void *gregs, size_t len);
392 /* Collect register REGNUM from the register cache REGCACHE and store
393 it in the buffer specified by GREGS and LEN as described by the
394 general-purpose register set REGSET. If REGNUM is -1, do this for
395 all registers in REGSET. */
396 extern void i386_collect_gregset (const struct regset *regset,
397 const struct regcache *regcache,
398 int regnum, void *gregs, size_t len);
400 /* Return the appropriate register set for the core section identified
401 by SECT_NAME and SECT_SIZE. */
402 extern const struct regset *
403 i386_regset_from_core_section (struct gdbarch *gdbarch,
404 const char *sect_name, size_t sect_size);
407 extern struct displaced_step_closure *i386_displaced_step_copy_insn
408 (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
409 struct regcache *regs);
410 extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
411 struct displaced_step_closure *closure,
412 CORE_ADDR from, CORE_ADDR to,
413 struct regcache *regs);
415 /* Initialize a basic ELF architecture variant. */
416 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
418 /* Initialize a SVR4 architecture variant. */
419 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
421 extern int i386_process_record (struct gdbarch *gdbarch,
422 struct regcache *regcache, CORE_ADDR addr);
426 /* Functions and variables exported from i386bsd-tdep.c. */
428 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
429 extern CORE_ADDR i386fbsd_sigtramp_start_addr;
430 extern CORE_ADDR i386fbsd_sigtramp_end_addr;
431 extern CORE_ADDR i386obsd_sigtramp_start_addr;
432 extern CORE_ADDR i386obsd_sigtramp_end_addr;
433 extern int i386fbsd4_sc_reg_offset[];
434 extern int i386fbsd_sc_reg_offset[];
435 extern int i386nbsd_sc_reg_offset[];
436 extern int i386obsd_sc_reg_offset[];
437 extern int i386bsd_sc_reg_offset[];
439 /* SystemTap related functions. */
441 extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
444 extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
445 struct stap_parse_info *p);
447 #endif /* i386-tdep.h */