1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
4 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
25 #include "dummy-frame.h"
26 #include "dwarf2-frame.h"
29 #include "frame-base.h"
30 #include "frame-unwind.h"
38 #include "reggroups.h"
46 #include "gdb_assert.h"
47 #include "gdb_string.h"
49 #include "i386-tdep.h"
50 #include "i387-tdep.h"
54 static char *i386_register_names[] =
56 "eax", "ecx", "edx", "ebx",
57 "esp", "ebp", "esi", "edi",
58 "eip", "eflags", "cs", "ss",
59 "ds", "es", "fs", "gs",
60 "st0", "st1", "st2", "st3",
61 "st4", "st5", "st6", "st7",
62 "fctrl", "fstat", "ftag", "fiseg",
63 "fioff", "foseg", "fooff", "fop",
64 "xmm0", "xmm1", "xmm2", "xmm3",
65 "xmm4", "xmm5", "xmm6", "xmm7",
69 static const int i386_num_register_names = ARRAY_SIZE (i386_register_names);
71 /* Register names for MMX pseudo-registers. */
73 static char *i386_mmx_names[] =
75 "mm0", "mm1", "mm2", "mm3",
76 "mm4", "mm5", "mm6", "mm7"
79 static const int i386_num_mmx_regs = ARRAY_SIZE (i386_mmx_names);
82 i386_mmx_regnum_p (struct gdbarch *gdbarch, int regnum)
84 int mm0_regnum = gdbarch_tdep (gdbarch)->mm0_regnum;
89 return (regnum >= mm0_regnum && regnum < mm0_regnum + i386_num_mmx_regs);
95 i386_sse_regnum_p (struct gdbarch *gdbarch, int regnum)
97 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
99 #define I387_ST0_REGNUM tdep->st0_regnum
100 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
102 if (I387_NUM_XMM_REGS == 0)
105 return (I387_XMM0_REGNUM <= regnum && regnum < I387_MXCSR_REGNUM);
107 #undef I387_ST0_REGNUM
108 #undef I387_NUM_XMM_REGS
112 i386_mxcsr_regnum_p (struct gdbarch *gdbarch, int regnum)
114 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
116 #define I387_ST0_REGNUM tdep->st0_regnum
117 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
119 if (I387_NUM_XMM_REGS == 0)
122 return (regnum == I387_MXCSR_REGNUM);
124 #undef I387_ST0_REGNUM
125 #undef I387_NUM_XMM_REGS
128 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
129 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
130 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
135 i386_fp_regnum_p (int regnum)
137 if (I387_ST0_REGNUM < 0)
140 return (I387_ST0_REGNUM <= regnum && regnum < I387_FCTRL_REGNUM);
144 i386_fpc_regnum_p (int regnum)
146 if (I387_ST0_REGNUM < 0)
149 return (I387_FCTRL_REGNUM <= regnum && regnum < I387_XMM0_REGNUM);
152 /* Return the name of register REGNUM. */
155 i386_register_name (int regnum)
157 if (i386_mmx_regnum_p (current_gdbarch, regnum))
158 return i386_mmx_names[regnum - I387_MM0_REGNUM];
160 if (regnum >= 0 && regnum < i386_num_register_names)
161 return i386_register_names[regnum];
166 /* Convert a dbx register number REG to the appropriate register
167 number used by GDB. */
170 i386_dbx_reg_to_regnum (int reg)
172 /* This implements what GCC calls the "default" register map
173 (dbx_register_map[]). */
175 if (reg >= 0 && reg <= 7)
177 /* General-purpose registers. The debug info calls %ebp
178 register 4, and %esp register 5. */
185 else if (reg >= 12 && reg <= 19)
187 /* Floating-point registers. */
188 return reg - 12 + I387_ST0_REGNUM;
190 else if (reg >= 21 && reg <= 28)
193 return reg - 21 + I387_XMM0_REGNUM;
195 else if (reg >= 29 && reg <= 36)
198 return reg - 29 + I387_MM0_REGNUM;
201 /* This will hopefully provoke a warning. */
202 return gdbarch_num_regs (current_gdbarch)
203 + gdbarch_num_pseudo_regs (current_gdbarch);
206 /* Convert SVR4 register number REG to the appropriate register number
210 i386_svr4_reg_to_regnum (int reg)
212 /* This implements the GCC register map that tries to be compatible
213 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
215 /* The SVR4 register numbering includes %eip and %eflags, and
216 numbers the floating point registers differently. */
217 if (reg >= 0 && reg <= 9)
219 /* General-purpose registers. */
222 else if (reg >= 11 && reg <= 18)
224 /* Floating-point registers. */
225 return reg - 11 + I387_ST0_REGNUM;
227 else if (reg >= 21 && reg <= 36)
229 /* The SSE and MMX registers have the same numbers as with dbx. */
230 return i386_dbx_reg_to_regnum (reg);
235 case 37: return I387_FCTRL_REGNUM;
236 case 38: return I387_FSTAT_REGNUM;
237 case 39: return I387_MXCSR_REGNUM;
238 case 40: return I386_ES_REGNUM;
239 case 41: return I386_CS_REGNUM;
240 case 42: return I386_SS_REGNUM;
241 case 43: return I386_DS_REGNUM;
242 case 44: return I386_FS_REGNUM;
243 case 45: return I386_GS_REGNUM;
246 /* This will hopefully provoke a warning. */
247 return gdbarch_num_regs (current_gdbarch)
248 + gdbarch_num_pseudo_regs (current_gdbarch);
251 #undef I387_ST0_REGNUM
252 #undef I387_MM0_REGNUM
253 #undef I387_NUM_XMM_REGS
256 /* This is the variable that is set with "set disassembly-flavor", and
257 its legitimate values. */
258 static const char att_flavor[] = "att";
259 static const char intel_flavor[] = "intel";
260 static const char *valid_flavors[] =
266 static const char *disassembly_flavor = att_flavor;
269 /* Use the program counter to determine the contents and size of a
270 breakpoint instruction. Return a pointer to a string of bytes that
271 encode a breakpoint instruction, store the length of the string in
272 *LEN and optionally adjust *PC to point to the correct memory
273 location for inserting the breakpoint.
275 On the i386 we have a single breakpoint that fits in a single byte
276 and can be inserted anywhere.
278 This function is 64-bit safe. */
280 static const gdb_byte *
281 i386_breakpoint_from_pc (CORE_ADDR *pc, int *len)
283 static gdb_byte break_insn[] = { 0xcc }; /* int 3 */
285 *len = sizeof (break_insn);
289 #ifdef I386_REGNO_TO_SYMMETRY
290 #error "The Sequent Symmetry is no longer supported."
293 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
294 and %esp "belong" to the calling function. Therefore these
295 registers should be saved if they're going to be modified. */
297 /* The maximum number of saved registers. This should include all
298 registers mentioned above, and %eip. */
299 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
301 struct i386_frame_cache
308 /* Saved registers. */
309 CORE_ADDR saved_regs[I386_NUM_SAVED_REGS];
314 /* Stack space reserved for local variables. */
318 /* Allocate and initialize a frame cache. */
320 static struct i386_frame_cache *
321 i386_alloc_frame_cache (void)
323 struct i386_frame_cache *cache;
326 cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache);
330 cache->sp_offset = -4;
333 /* Saved registers. We initialize these to -1 since zero is a valid
334 offset (that's where %ebp is supposed to be stored). */
335 for (i = 0; i < I386_NUM_SAVED_REGS; i++)
336 cache->saved_regs[i] = -1;
338 cache->stack_align = 0;
339 cache->pc_in_eax = 0;
341 /* Frameless until proven otherwise. */
347 /* If the instruction at PC is a jump, return the address of its
348 target. Otherwise, return PC. */
351 i386_follow_jump (CORE_ADDR pc)
357 read_memory_nobpt (pc, &op, 1);
361 op = read_memory_unsigned_integer (pc + 1, 1);
367 /* Relative jump: if data16 == 0, disp32, else disp16. */
370 delta = read_memory_integer (pc + 2, 2);
372 /* Include the size of the jmp instruction (including the
378 delta = read_memory_integer (pc + 1, 4);
380 /* Include the size of the jmp instruction. */
385 /* Relative jump, disp8 (ignore data16). */
386 delta = read_memory_integer (pc + data16 + 1, 1);
395 /* Check whether PC points at a prologue for a function returning a
396 structure or union. If so, it updates CACHE and returns the
397 address of the first instruction after the code sequence that
398 removes the "hidden" argument from the stack or CURRENT_PC,
399 whichever is smaller. Otherwise, return PC. */
402 i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc,
403 struct i386_frame_cache *cache)
405 /* Functions that return a structure or union start with:
408 xchgl %eax, (%esp) 0x87 0x04 0x24
409 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
411 (the System V compiler puts out the second `xchg' instruction,
412 and the assembler doesn't try to optimize it, so the 'sib' form
413 gets generated). This sequence is used to get the address of the
414 return buffer for a function that returns a structure. */
415 static gdb_byte proto1[3] = { 0x87, 0x04, 0x24 };
416 static gdb_byte proto2[4] = { 0x87, 0x44, 0x24, 0x00 };
420 if (current_pc <= pc)
423 read_memory_nobpt (pc, &op, 1);
425 if (op != 0x58) /* popl %eax */
428 read_memory_nobpt (pc + 1, buf, 4);
429 if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0)
432 if (current_pc == pc)
434 cache->sp_offset += 4;
438 if (current_pc == pc + 1)
440 cache->pc_in_eax = 1;
444 if (buf[1] == proto1[1])
451 i386_skip_probe (CORE_ADDR pc)
453 /* A function may start with
467 read_memory_nobpt (pc, &op, 1);
469 if (op == 0x68 || op == 0x6a)
473 /* Skip past the `pushl' instruction; it has either a one-byte or a
474 four-byte operand, depending on the opcode. */
480 /* Read the following 8 bytes, which should be `call _probe' (6
481 bytes) followed by `addl $4,%esp' (2 bytes). */
482 read_memory (pc + delta, buf, sizeof (buf));
483 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
484 pc += delta + sizeof (buf);
490 /* GCC 4.1 and later, can put code in the prologue to realign the
491 stack pointer. Check whether PC points to such code, and update
492 CACHE accordingly. Return the first instruction after the code
493 sequence or CURRENT_PC, whichever is smaller. If we don't
494 recognize the code, return PC. */
497 i386_analyze_stack_align (CORE_ADDR pc, CORE_ADDR current_pc,
498 struct i386_frame_cache *cache)
500 /* The register used by the compiler to perform the stack re-alignment
501 is, in order of preference, either %ecx, %edx, or %eax. GCC should
502 never use %ebx as it always treats it as callee-saved, whereas
503 the compiler can only use caller-saved registers. */
504 static const gdb_byte insns_ecx[10] = {
505 0x8d, 0x4c, 0x24, 0x04, /* leal 4(%esp), %ecx */
506 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
507 0xff, 0x71, 0xfc /* pushl -4(%ecx) */
509 static const gdb_byte insns_edx[10] = {
510 0x8d, 0x54, 0x24, 0x04, /* leal 4(%esp), %edx */
511 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
512 0xff, 0x72, 0xfc /* pushl -4(%edx) */
514 static const gdb_byte insns_eax[10] = {
515 0x8d, 0x44, 0x24, 0x04, /* leal 4(%esp), %eax */
516 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
517 0xff, 0x70, 0xfc /* pushl -4(%eax) */
521 if (target_read_memory (pc, buf, sizeof buf)
522 || (memcmp (buf, insns_ecx, sizeof buf) != 0
523 && memcmp (buf, insns_edx, sizeof buf) != 0
524 && memcmp (buf, insns_eax, sizeof buf) != 0))
527 if (current_pc > pc + 4)
528 cache->stack_align = 1;
530 return min (pc + 10, current_pc);
533 /* Maximum instruction length we need to handle. */
534 #define I386_MAX_INSN_LEN 6
536 /* Instruction description. */
540 gdb_byte insn[I386_MAX_INSN_LEN];
541 gdb_byte mask[I386_MAX_INSN_LEN];
544 /* Search for the instruction at PC in the list SKIP_INSNS. Return
545 the first instruction description that matches. Otherwise, return
548 static struct i386_insn *
549 i386_match_insn (CORE_ADDR pc, struct i386_insn *skip_insns)
551 struct i386_insn *insn;
554 read_memory_nobpt (pc, &op, 1);
556 for (insn = skip_insns; insn->len > 0; insn++)
558 if ((op & insn->mask[0]) == insn->insn[0])
560 gdb_byte buf[I386_MAX_INSN_LEN - 1];
561 int insn_matched = 1;
564 gdb_assert (insn->len > 1);
565 gdb_assert (insn->len <= I386_MAX_INSN_LEN);
567 read_memory_nobpt (pc + 1, buf, insn->len - 1);
568 for (i = 1; i < insn->len; i++)
570 if ((buf[i - 1] & insn->mask[i]) != insn->insn[i])
582 /* Some special instructions that might be migrated by GCC into the
583 part of the prologue that sets up the new stack frame. Because the
584 stack frame hasn't been setup yet, no registers have been saved
585 yet, and only the scratch registers %eax, %ecx and %edx can be
588 struct i386_insn i386_frame_setup_skip_insns[] =
590 /* Check for `movb imm8, r' and `movl imm32, r'.
592 ??? Should we handle 16-bit operand-sizes here? */
594 /* `movb imm8, %al' and `movb imm8, %ah' */
595 /* `movb imm8, %cl' and `movb imm8, %ch' */
596 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
597 /* `movb imm8, %dl' and `movb imm8, %dh' */
598 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
599 /* `movl imm32, %eax' and `movl imm32, %ecx' */
600 { 5, { 0xb8 }, { 0xfe } },
601 /* `movl imm32, %edx' */
602 { 5, { 0xba }, { 0xff } },
604 /* Check for `mov imm32, r32'. Note that there is an alternative
605 encoding for `mov m32, %eax'.
607 ??? Should we handle SIB adressing here?
608 ??? Should we handle 16-bit operand-sizes here? */
610 /* `movl m32, %eax' */
611 { 5, { 0xa1 }, { 0xff } },
612 /* `movl m32, %eax' and `mov; m32, %ecx' */
613 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
614 /* `movl m32, %edx' */
615 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
617 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
618 Because of the symmetry, there are actually two ways to encode
619 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
620 opcode bytes 0x31 and 0x33 for `xorl'. */
622 /* `subl %eax, %eax' */
623 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
624 /* `subl %ecx, %ecx' */
625 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
626 /* `subl %edx, %edx' */
627 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
628 /* `xorl %eax, %eax' */
629 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
630 /* `xorl %ecx, %ecx' */
631 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
632 /* `xorl %edx, %edx' */
633 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
637 /* Check whether PC points at a code that sets up a new stack frame.
638 If so, it updates CACHE and returns the address of the first
639 instruction after the sequence that sets up the frame or LIMIT,
640 whichever is smaller. If we don't recognize the code, return PC. */
643 i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR limit,
644 struct i386_frame_cache *cache)
646 struct i386_insn *insn;
653 read_memory_nobpt (pc, &op, 1);
655 if (op == 0x55) /* pushl %ebp */
657 /* Take into account that we've executed the `pushl %ebp' that
658 starts this instruction sequence. */
659 cache->saved_regs[I386_EBP_REGNUM] = 0;
660 cache->sp_offset += 4;
663 /* If that's all, return now. */
667 /* Check for some special instructions that might be migrated by
668 GCC into the prologue and skip them. At this point in the
669 prologue, code should only touch the scratch registers %eax,
670 %ecx and %edx, so while the number of posibilities is sheer,
673 Make sure we only skip these instructions if we later see the
674 `movl %esp, %ebp' that actually sets up the frame. */
675 while (pc + skip < limit)
677 insn = i386_match_insn (pc + skip, i386_frame_setup_skip_insns);
684 /* If that's all, return now. */
685 if (limit <= pc + skip)
688 read_memory_nobpt (pc + skip, &op, 1);
690 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
694 if (read_memory_unsigned_integer (pc + skip + 1, 1) != 0xec)
698 if (read_memory_unsigned_integer (pc + skip + 1, 1) != 0xe5)
705 /* OK, we actually have a frame. We just don't know how large
706 it is yet. Set its size to zero. We'll adjust it if
707 necessary. We also now commit to skipping the special
708 instructions mentioned before. */
712 /* If that's all, return now. */
716 /* Check for stack adjustment
720 NOTE: You can't subtract a 16-bit immediate from a 32-bit
721 reg, so we don't have to worry about a data16 prefix. */
722 read_memory_nobpt (pc, &op, 1);
725 /* `subl' with 8-bit immediate. */
726 if (read_memory_unsigned_integer (pc + 1, 1) != 0xec)
727 /* Some instruction starting with 0x83 other than `subl'. */
730 /* `subl' with signed 8-bit immediate (though it wouldn't
731 make sense to be negative). */
732 cache->locals = read_memory_integer (pc + 2, 1);
737 /* Maybe it is `subl' with a 32-bit immediate. */
738 if (read_memory_unsigned_integer (pc + 1, 1) != 0xec)
739 /* Some instruction starting with 0x81 other than `subl'. */
742 /* It is `subl' with a 32-bit immediate. */
743 cache->locals = read_memory_integer (pc + 2, 4);
748 /* Some instruction other than `subl'. */
752 else if (op == 0xc8) /* enter */
754 cache->locals = read_memory_unsigned_integer (pc + 1, 2);
761 /* Check whether PC points at code that saves registers on the stack.
762 If so, it updates CACHE and returns the address of the first
763 instruction after the register saves or CURRENT_PC, whichever is
764 smaller. Otherwise, return PC. */
767 i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc,
768 struct i386_frame_cache *cache)
770 CORE_ADDR offset = 0;
774 if (cache->locals > 0)
775 offset -= cache->locals;
776 for (i = 0; i < 8 && pc < current_pc; i++)
778 read_memory_nobpt (pc, &op, 1);
779 if (op < 0x50 || op > 0x57)
783 cache->saved_regs[op - 0x50] = offset;
784 cache->sp_offset += 4;
791 /* Do a full analysis of the prologue at PC and update CACHE
792 accordingly. Bail out early if CURRENT_PC is reached. Return the
793 address where the analysis stopped.
795 We handle these cases:
797 The startup sequence can be at the start of the function, or the
798 function can start with a branch to startup code at the end.
800 %ebp can be set up with either the 'enter' instruction, or "pushl
801 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
802 once used in the System V compiler).
804 Local space is allocated just below the saved %ebp by either the
805 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
806 16-bit unsigned argument for space to allocate, and the 'addl'
807 instruction could have either a signed byte, or 32-bit immediate.
809 Next, the registers used by this function are pushed. With the
810 System V compiler they will always be in the order: %edi, %esi,
811 %ebx (and sometimes a harmless bug causes it to also save but not
812 restore %eax); however, the code below is willing to see the pushes
813 in any order, and will handle up to 8 of them.
815 If the setup sequence is at the end of the function, then the next
816 instruction will be a branch back to the start. */
819 i386_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
820 struct i386_frame_cache *cache)
822 pc = i386_follow_jump (pc);
823 pc = i386_analyze_struct_return (pc, current_pc, cache);
824 pc = i386_skip_probe (pc);
825 pc = i386_analyze_stack_align (pc, current_pc, cache);
826 pc = i386_analyze_frame_setup (pc, current_pc, cache);
827 return i386_analyze_register_saves (pc, current_pc, cache);
830 /* Return PC of first real instruction. */
833 i386_skip_prologue (CORE_ADDR start_pc)
835 static gdb_byte pic_pat[6] =
837 0xe8, 0, 0, 0, 0, /* call 0x0 */
838 0x5b, /* popl %ebx */
840 struct i386_frame_cache cache;
846 pc = i386_analyze_prologue (start_pc, 0xffffffff, &cache);
847 if (cache.locals < 0)
850 /* Found valid frame setup. */
852 /* The native cc on SVR4 in -K PIC mode inserts the following code
853 to get the address of the global offset table (GOT) into register
858 movl %ebx,x(%ebp) (optional)
861 This code is with the rest of the prologue (at the end of the
862 function), so we have to skip it to get to the first real
863 instruction at the start of the function. */
865 for (i = 0; i < 6; i++)
867 read_memory_nobpt (pc + i, &op, 1);
868 if (pic_pat[i] != op)
875 read_memory_nobpt (pc + delta, &op, 1);
877 if (op == 0x89) /* movl %ebx, x(%ebp) */
879 op = read_memory_unsigned_integer (pc + delta + 1, 1);
881 if (op == 0x5d) /* One byte offset from %ebp. */
883 else if (op == 0x9d) /* Four byte offset from %ebp. */
885 else /* Unexpected instruction. */
888 read_memory_nobpt (pc + delta, &op, 1);
892 if (delta > 0 && op == 0x81
893 && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3)
899 /* If the function starts with a branch (to startup code at the end)
900 the last instruction should bring us back to the first
901 instruction of the real code. */
902 if (i386_follow_jump (start_pc) != start_pc)
903 pc = i386_follow_jump (pc);
908 /* This function is 64-bit safe. */
911 i386_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
915 frame_unwind_register (next_frame, gdbarch_pc_regnum (gdbarch), buf);
916 return extract_typed_address (buf, builtin_type_void_func_ptr);
922 static struct i386_frame_cache *
923 i386_frame_cache (struct frame_info *next_frame, void **this_cache)
925 struct i386_frame_cache *cache;
932 cache = i386_alloc_frame_cache ();
935 /* In principle, for normal frames, %ebp holds the frame pointer,
936 which holds the base address for the current stack frame.
937 However, for functions that don't need it, the frame pointer is
938 optional. For these "frameless" functions the frame pointer is
939 actually the frame pointer of the calling frame. Signal
940 trampolines are just a special case of a "frameless" function.
941 They (usually) share their frame pointer with the frame that was
942 in progress when the signal occurred. */
944 frame_unwind_register (next_frame, I386_EBP_REGNUM, buf);
945 cache->base = extract_unsigned_integer (buf, 4);
946 if (cache->base == 0)
949 /* For normal frames, %eip is stored at 4(%ebp). */
950 cache->saved_regs[I386_EIP_REGNUM] = 4;
952 cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
954 i386_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache);
956 if (cache->stack_align)
958 /* Saved stack pointer has been saved in %ecx. */
959 frame_unwind_register (next_frame, I386_ECX_REGNUM, buf);
960 cache->saved_sp = extract_unsigned_integer(buf, 4);
963 if (cache->locals < 0)
965 /* We didn't find a valid frame, which means that CACHE->base
966 currently holds the frame pointer for our calling frame. If
967 we're at the start of a function, or somewhere half-way its
968 prologue, the function's frame probably hasn't been fully
969 setup yet. Try to reconstruct the base address for the stack
970 frame by looking at the stack pointer. For truly "frameless"
971 functions this might work too. */
973 if (cache->stack_align)
975 /* We're halfway aligning the stack. */
976 cache->base = ((cache->saved_sp - 4) & 0xfffffff0) - 4;
977 cache->saved_regs[I386_EIP_REGNUM] = cache->saved_sp - 4;
979 /* This will be added back below. */
980 cache->saved_regs[I386_EIP_REGNUM] -= cache->base;
984 frame_unwind_register (next_frame, I386_ESP_REGNUM, buf);
985 cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset;
989 /* Now that we have the base address for the stack frame we can
990 calculate the value of %esp in the calling frame. */
991 if (cache->saved_sp == 0)
992 cache->saved_sp = cache->base + 8;
994 /* Adjust all the saved registers such that they contain addresses
995 instead of offsets. */
996 for (i = 0; i < I386_NUM_SAVED_REGS; i++)
997 if (cache->saved_regs[i] != -1)
998 cache->saved_regs[i] += cache->base;
1004 i386_frame_this_id (struct frame_info *next_frame, void **this_cache,
1005 struct frame_id *this_id)
1007 struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache);
1009 /* This marks the outermost frame. */
1010 if (cache->base == 0)
1013 /* See the end of i386_push_dummy_call. */
1014 (*this_id) = frame_id_build (cache->base + 8, cache->pc);
1018 i386_frame_prev_register (struct frame_info *next_frame, void **this_cache,
1019 int regnum, int *optimizedp,
1020 enum lval_type *lvalp, CORE_ADDR *addrp,
1021 int *realnump, gdb_byte *valuep)
1023 struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache);
1025 gdb_assert (regnum >= 0);
1027 /* The System V ABI says that:
1029 "The flags register contains the system flags, such as the
1030 direction flag and the carry flag. The direction flag must be
1031 set to the forward (that is, zero) direction before entry and
1032 upon exit from a function. Other user flags have no specified
1033 role in the standard calling sequence and are not preserved."
1035 To guarantee the "upon exit" part of that statement we fake a
1036 saved flags register that has its direction flag cleared.
1038 Note that GCC doesn't seem to rely on the fact that the direction
1039 flag is cleared after a function return; it always explicitly
1040 clears the flag before operations where it matters.
1042 FIXME: kettenis/20030316: I'm not quite sure whether this is the
1043 right thing to do. The way we fake the flags register here makes
1044 it impossible to change it. */
1046 if (regnum == I386_EFLAGS_REGNUM)
1056 /* Clear the direction flag. */
1057 val = frame_unwind_register_unsigned (next_frame,
1058 I386_EFLAGS_REGNUM);
1060 store_unsigned_integer (valuep, 4, val);
1066 if (regnum == I386_EIP_REGNUM && cache->pc_in_eax)
1069 *lvalp = lval_register;
1071 *realnump = I386_EAX_REGNUM;
1073 frame_unwind_register (next_frame, (*realnump), valuep);
1077 if (regnum == I386_ESP_REGNUM && cache->saved_sp)
1085 /* Store the value. */
1086 store_unsigned_integer (valuep, 4, cache->saved_sp);
1091 if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1)
1094 *lvalp = lval_memory;
1095 *addrp = cache->saved_regs[regnum];
1099 /* Read the value in from memory. */
1100 read_memory (*addrp, valuep,
1101 register_size (get_frame_arch (next_frame), regnum));
1107 *lvalp = lval_register;
1111 frame_unwind_register (next_frame, (*realnump), valuep);
1114 static const struct frame_unwind i386_frame_unwind =
1118 i386_frame_prev_register
1121 static const struct frame_unwind *
1122 i386_frame_sniffer (struct frame_info *next_frame)
1124 return &i386_frame_unwind;
1128 /* Signal trampolines. */
1130 static struct i386_frame_cache *
1131 i386_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache)
1133 struct i386_frame_cache *cache;
1134 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (next_frame));
1141 cache = i386_alloc_frame_cache ();
1143 frame_unwind_register (next_frame, I386_ESP_REGNUM, buf);
1144 cache->base = extract_unsigned_integer (buf, 4) - 4;
1146 addr = tdep->sigcontext_addr (next_frame);
1147 if (tdep->sc_reg_offset)
1151 gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS);
1153 for (i = 0; i < tdep->sc_num_regs; i++)
1154 if (tdep->sc_reg_offset[i] != -1)
1155 cache->saved_regs[i] = addr + tdep->sc_reg_offset[i];
1159 cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset;
1160 cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset;
1163 *this_cache = cache;
1168 i386_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache,
1169 struct frame_id *this_id)
1171 struct i386_frame_cache *cache =
1172 i386_sigtramp_frame_cache (next_frame, this_cache);
1174 /* See the end of i386_push_dummy_call. */
1175 (*this_id) = frame_id_build (cache->base + 8, frame_pc_unwind (next_frame));
1179 i386_sigtramp_frame_prev_register (struct frame_info *next_frame,
1181 int regnum, int *optimizedp,
1182 enum lval_type *lvalp, CORE_ADDR *addrp,
1183 int *realnump, gdb_byte *valuep)
1185 /* Make sure we've initialized the cache. */
1186 i386_sigtramp_frame_cache (next_frame, this_cache);
1188 i386_frame_prev_register (next_frame, this_cache, regnum,
1189 optimizedp, lvalp, addrp, realnump, valuep);
1192 static const struct frame_unwind i386_sigtramp_frame_unwind =
1195 i386_sigtramp_frame_this_id,
1196 i386_sigtramp_frame_prev_register
1199 static const struct frame_unwind *
1200 i386_sigtramp_frame_sniffer (struct frame_info *next_frame)
1202 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (next_frame));
1204 /* We shouldn't even bother if we don't have a sigcontext_addr
1206 if (tdep->sigcontext_addr == NULL)
1209 if (tdep->sigtramp_p != NULL)
1211 if (tdep->sigtramp_p (next_frame))
1212 return &i386_sigtramp_frame_unwind;
1215 if (tdep->sigtramp_start != 0)
1217 CORE_ADDR pc = frame_pc_unwind (next_frame);
1219 gdb_assert (tdep->sigtramp_end != 0);
1220 if (pc >= tdep->sigtramp_start && pc < tdep->sigtramp_end)
1221 return &i386_sigtramp_frame_unwind;
1229 i386_frame_base_address (struct frame_info *next_frame, void **this_cache)
1231 struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache);
1236 static const struct frame_base i386_frame_base =
1239 i386_frame_base_address,
1240 i386_frame_base_address,
1241 i386_frame_base_address
1244 static struct frame_id
1245 i386_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1250 frame_unwind_register (next_frame, I386_EBP_REGNUM, buf);
1251 fp = extract_unsigned_integer (buf, 4);
1253 /* See the end of i386_push_dummy_call. */
1254 return frame_id_build (fp + 8, frame_pc_unwind (next_frame));
1258 /* Figure out where the longjmp will land. Slurp the args out of the
1259 stack. We expect the first arg to be a pointer to the jmp_buf
1260 structure from which we extract the address that we will land at.
1261 This address is copied into PC. This routine returns non-zero on
1264 This function is 64-bit safe. */
1267 i386_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
1270 CORE_ADDR sp, jb_addr;
1271 int jb_pc_offset = gdbarch_tdep (get_frame_arch (frame))->jb_pc_offset;
1272 int len = TYPE_LENGTH (builtin_type_void_func_ptr);
1274 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1275 longjmp will land. */
1276 if (jb_pc_offset == -1)
1279 /* Don't use I386_ESP_REGNUM here, since this function is also used
1281 get_frame_register (frame, gdbarch_sp_regnum (get_frame_arch (frame)), buf);
1282 sp = extract_typed_address (buf, builtin_type_void_data_ptr);
1283 if (target_read_memory (sp + len, buf, len))
1286 jb_addr = extract_typed_address (buf, builtin_type_void_data_ptr);
1287 if (target_read_memory (jb_addr + jb_pc_offset, buf, len))
1290 *pc = extract_typed_address (buf, builtin_type_void_func_ptr);
1296 i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1297 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
1298 struct value **args, CORE_ADDR sp, int struct_return,
1299 CORE_ADDR struct_addr)
1304 /* Push arguments in reverse order. */
1305 for (i = nargs - 1; i >= 0; i--)
1307 int len = TYPE_LENGTH (value_enclosing_type (args[i]));
1309 /* The System V ABI says that:
1311 "An argument's size is increased, if necessary, to make it a
1312 multiple of [32-bit] words. This may require tail padding,
1313 depending on the size of the argument."
1315 This makes sure the stack stays word-aligned. */
1316 sp -= (len + 3) & ~3;
1317 write_memory (sp, value_contents_all (args[i]), len);
1320 /* Push value address. */
1324 store_unsigned_integer (buf, 4, struct_addr);
1325 write_memory (sp, buf, 4);
1328 /* Store return address. */
1330 store_unsigned_integer (buf, 4, bp_addr);
1331 write_memory (sp, buf, 4);
1333 /* Finally, update the stack pointer... */
1334 store_unsigned_integer (buf, 4, sp);
1335 regcache_cooked_write (regcache, I386_ESP_REGNUM, buf);
1337 /* ...and fake a frame pointer. */
1338 regcache_cooked_write (regcache, I386_EBP_REGNUM, buf);
1340 /* MarkK wrote: This "+ 8" is all over the place:
1341 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1342 i386_unwind_dummy_id). It's there, since all frame unwinders for
1343 a given target have to agree (within a certain margin) on the
1344 definition of the stack address of a frame. Otherwise
1345 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1346 stack address *before* the function call as a frame's CFA. On
1347 the i386, when %ebp is used as a frame pointer, the offset
1348 between the contents %ebp and the CFA as defined by GCC. */
1352 /* These registers are used for returning integers (and on some
1353 targets also for returning `struct' and `union' values when their
1354 size and alignment match an integer type). */
1355 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1356 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1358 /* Read, for architecture GDBARCH, a function return value of TYPE
1359 from REGCACHE, and copy that into VALBUF. */
1362 i386_extract_return_value (struct gdbarch *gdbarch, struct type *type,
1363 struct regcache *regcache, gdb_byte *valbuf)
1365 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1366 int len = TYPE_LENGTH (type);
1367 gdb_byte buf[I386_MAX_REGISTER_SIZE];
1369 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1371 if (tdep->st0_regnum < 0)
1373 warning (_("Cannot find floating-point return value."));
1374 memset (valbuf, 0, len);
1378 /* Floating-point return values can be found in %st(0). Convert
1379 its contents to the desired type. This is probably not
1380 exactly how it would happen on the target itself, but it is
1381 the best we can do. */
1382 regcache_raw_read (regcache, I386_ST0_REGNUM, buf);
1383 convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type);
1387 int low_size = register_size (gdbarch, LOW_RETURN_REGNUM);
1388 int high_size = register_size (gdbarch, HIGH_RETURN_REGNUM);
1390 if (len <= low_size)
1392 regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf);
1393 memcpy (valbuf, buf, len);
1395 else if (len <= (low_size + high_size))
1397 regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf);
1398 memcpy (valbuf, buf, low_size);
1399 regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf);
1400 memcpy (valbuf + low_size, buf, len - low_size);
1403 internal_error (__FILE__, __LINE__,
1404 _("Cannot extract return value of %d bytes long."), len);
1408 /* Write, for architecture GDBARCH, a function return value of TYPE
1409 from VALBUF into REGCACHE. */
1412 i386_store_return_value (struct gdbarch *gdbarch, struct type *type,
1413 struct regcache *regcache, const gdb_byte *valbuf)
1415 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1416 int len = TYPE_LENGTH (type);
1418 /* Define I387_ST0_REGNUM such that we use the proper definitions
1419 for the architecture. */
1420 #define I387_ST0_REGNUM I386_ST0_REGNUM
1422 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1425 gdb_byte buf[I386_MAX_REGISTER_SIZE];
1427 if (tdep->st0_regnum < 0)
1429 warning (_("Cannot set floating-point return value."));
1433 /* Returning floating-point values is a bit tricky. Apart from
1434 storing the return value in %st(0), we have to simulate the
1435 state of the FPU at function return point. */
1437 /* Convert the value found in VALBUF to the extended
1438 floating-point format used by the FPU. This is probably
1439 not exactly how it would happen on the target itself, but
1440 it is the best we can do. */
1441 convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext);
1442 regcache_raw_write (regcache, I386_ST0_REGNUM, buf);
1444 /* Set the top of the floating-point register stack to 7. The
1445 actual value doesn't really matter, but 7 is what a normal
1446 function return would end up with if the program started out
1447 with a freshly initialized FPU. */
1448 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
1450 regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM, fstat);
1452 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1453 the floating-point register stack to 7, the appropriate value
1454 for the tag word is 0x3fff. */
1455 regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM, 0x3fff);
1459 int low_size = register_size (gdbarch, LOW_RETURN_REGNUM);
1460 int high_size = register_size (gdbarch, HIGH_RETURN_REGNUM);
1462 if (len <= low_size)
1463 regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf);
1464 else if (len <= (low_size + high_size))
1466 regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf);
1467 regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0,
1468 len - low_size, valbuf + low_size);
1471 internal_error (__FILE__, __LINE__,
1472 _("Cannot store return value of %d bytes long."), len);
1475 #undef I387_ST0_REGNUM
1479 /* This is the variable that is set with "set struct-convention", and
1480 its legitimate values. */
1481 static const char default_struct_convention[] = "default";
1482 static const char pcc_struct_convention[] = "pcc";
1483 static const char reg_struct_convention[] = "reg";
1484 static const char *valid_conventions[] =
1486 default_struct_convention,
1487 pcc_struct_convention,
1488 reg_struct_convention,
1491 static const char *struct_convention = default_struct_convention;
1493 /* Return non-zero if TYPE, which is assumed to be a structure,
1494 a union type, or an array type, should be returned in registers
1495 for architecture GDBARCH. */
1498 i386_reg_struct_return_p (struct gdbarch *gdbarch, struct type *type)
1500 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1501 enum type_code code = TYPE_CODE (type);
1502 int len = TYPE_LENGTH (type);
1504 gdb_assert (code == TYPE_CODE_STRUCT
1505 || code == TYPE_CODE_UNION
1506 || code == TYPE_CODE_ARRAY);
1508 if (struct_convention == pcc_struct_convention
1509 || (struct_convention == default_struct_convention
1510 && tdep->struct_return == pcc_struct_return))
1513 /* Structures consisting of a single `float', `double' or 'long
1514 double' member are returned in %st(0). */
1515 if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
1517 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1518 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1519 return (len == 4 || len == 8 || len == 12);
1522 return (len == 1 || len == 2 || len == 4 || len == 8);
1525 /* Determine, for architecture GDBARCH, how a return value of TYPE
1526 should be returned. If it is supposed to be returned in registers,
1527 and READBUF is non-zero, read the appropriate value from REGCACHE,
1528 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1529 from WRITEBUF into REGCACHE. */
1531 static enum return_value_convention
1532 i386_return_value (struct gdbarch *gdbarch, struct type *type,
1533 struct regcache *regcache, gdb_byte *readbuf,
1534 const gdb_byte *writebuf)
1536 enum type_code code = TYPE_CODE (type);
1538 if ((code == TYPE_CODE_STRUCT
1539 || code == TYPE_CODE_UNION
1540 || code == TYPE_CODE_ARRAY)
1541 && !i386_reg_struct_return_p (gdbarch, type))
1543 /* The System V ABI says that:
1545 "A function that returns a structure or union also sets %eax
1546 to the value of the original address of the caller's area
1547 before it returns. Thus when the caller receives control
1548 again, the address of the returned object resides in register
1549 %eax and can be used to access the object."
1551 So the ABI guarantees that we can always find the return
1552 value just after the function has returned. */
1554 /* Note that the ABI doesn't mention functions returning arrays,
1555 which is something possible in certain languages such as Ada.
1556 In this case, the value is returned as if it was wrapped in
1557 a record, so the convention applied to records also applies
1564 regcache_raw_read_unsigned (regcache, I386_EAX_REGNUM, &addr);
1565 read_memory (addr, readbuf, TYPE_LENGTH (type));
1568 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
1571 /* This special case is for structures consisting of a single
1572 `float', `double' or 'long double' member. These structures are
1573 returned in %st(0). For these structures, we call ourselves
1574 recursively, changing TYPE into the type of the first member of
1575 the structure. Since that should work for all structures that
1576 have only one member, we don't bother to check the member's type
1578 if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
1580 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1581 return i386_return_value (gdbarch, type, regcache, readbuf, writebuf);
1585 i386_extract_return_value (gdbarch, type, regcache, readbuf);
1587 i386_store_return_value (gdbarch, type, regcache, writebuf);
1589 return RETURN_VALUE_REGISTER_CONVENTION;
1593 /* Type for %eflags. */
1594 struct type *i386_eflags_type;
1596 /* Type for %mxcsr. */
1597 struct type *i386_mxcsr_type;
1599 /* Construct types for ISA-specific registers. */
1601 i386_init_types (void)
1605 type = init_flags_type ("builtin_type_i386_eflags", 4);
1606 append_flags_type_flag (type, 0, "CF");
1607 append_flags_type_flag (type, 1, NULL);
1608 append_flags_type_flag (type, 2, "PF");
1609 append_flags_type_flag (type, 4, "AF");
1610 append_flags_type_flag (type, 6, "ZF");
1611 append_flags_type_flag (type, 7, "SF");
1612 append_flags_type_flag (type, 8, "TF");
1613 append_flags_type_flag (type, 9, "IF");
1614 append_flags_type_flag (type, 10, "DF");
1615 append_flags_type_flag (type, 11, "OF");
1616 append_flags_type_flag (type, 14, "NT");
1617 append_flags_type_flag (type, 16, "RF");
1618 append_flags_type_flag (type, 17, "VM");
1619 append_flags_type_flag (type, 18, "AC");
1620 append_flags_type_flag (type, 19, "VIF");
1621 append_flags_type_flag (type, 20, "VIP");
1622 append_flags_type_flag (type, 21, "ID");
1623 i386_eflags_type = type;
1625 type = init_flags_type ("builtin_type_i386_mxcsr", 4);
1626 append_flags_type_flag (type, 0, "IE");
1627 append_flags_type_flag (type, 1, "DE");
1628 append_flags_type_flag (type, 2, "ZE");
1629 append_flags_type_flag (type, 3, "OE");
1630 append_flags_type_flag (type, 4, "UE");
1631 append_flags_type_flag (type, 5, "PE");
1632 append_flags_type_flag (type, 6, "DAZ");
1633 append_flags_type_flag (type, 7, "IM");
1634 append_flags_type_flag (type, 8, "DM");
1635 append_flags_type_flag (type, 9, "ZM");
1636 append_flags_type_flag (type, 10, "OM");
1637 append_flags_type_flag (type, 11, "UM");
1638 append_flags_type_flag (type, 12, "PM");
1639 append_flags_type_flag (type, 15, "FZ");
1640 i386_mxcsr_type = type;
1643 /* Construct vector type for MMX registers. */
1645 i386_mmx_type (struct gdbarch *gdbarch)
1647 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1649 if (!tdep->i386_mmx_type)
1651 /* The type we're building is this: */
1653 union __gdb_builtin_type_vec64i
1656 int32_t v2_int32[2];
1657 int16_t v4_int16[4];
1664 t = init_composite_type ("__gdb_builtin_type_vec64i", TYPE_CODE_UNION);
1665 append_composite_type_field (t, "uint64", builtin_type_int64);
1666 append_composite_type_field (t, "v2_int32",
1667 init_vector_type (builtin_type_int32, 2));
1668 append_composite_type_field (t, "v4_int16",
1669 init_vector_type (builtin_type_int16, 4));
1670 append_composite_type_field (t, "v8_int8",
1671 init_vector_type (builtin_type_int8, 8));
1673 TYPE_FLAGS (t) |= TYPE_FLAG_VECTOR;
1674 TYPE_NAME (t) = "builtin_type_vec64i";
1675 tdep->i386_mmx_type = t;
1678 return tdep->i386_mmx_type;
1682 i386_sse_type (struct gdbarch *gdbarch)
1684 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1686 if (!tdep->i386_sse_type)
1688 /* The type we're building is this: */
1690 union __gdb_builtin_type_vec128i
1693 int64_t v2_int64[2];
1694 int32_t v4_int32[4];
1695 int16_t v8_int16[8];
1696 int8_t v16_int8[16];
1697 double v2_double[2];
1704 t = init_composite_type ("__gdb_builtin_type_vec128i", TYPE_CODE_UNION);
1705 append_composite_type_field (t, "v4_float",
1706 init_vector_type (builtin_type_float, 4));
1707 append_composite_type_field (t, "v2_double",
1708 init_vector_type (builtin_type_double, 2));
1709 append_composite_type_field (t, "v16_int8",
1710 init_vector_type (builtin_type_int8, 16));
1711 append_composite_type_field (t, "v8_int16",
1712 init_vector_type (builtin_type_int16, 8));
1713 append_composite_type_field (t, "v4_int32",
1714 init_vector_type (builtin_type_int32, 4));
1715 append_composite_type_field (t, "v2_int64",
1716 init_vector_type (builtin_type_int64, 2));
1717 append_composite_type_field (t, "uint128", builtin_type_int128);
1719 TYPE_FLAGS (t) |= TYPE_FLAG_VECTOR;
1720 TYPE_NAME (t) = "builtin_type_vec128i";
1721 tdep->i386_sse_type = t;
1724 return tdep->i386_sse_type;
1727 /* Return the GDB type object for the "standard" data type of data in
1728 register REGNUM. Perhaps %esi and %edi should go here, but
1729 potentially they could be used for things other than address. */
1731 static struct type *
1732 i386_register_type (struct gdbarch *gdbarch, int regnum)
1734 if (regnum == I386_EIP_REGNUM)
1735 return builtin_type_void_func_ptr;
1737 if (regnum == I386_EFLAGS_REGNUM)
1738 return i386_eflags_type;
1740 if (regnum == I386_EBP_REGNUM || regnum == I386_ESP_REGNUM)
1741 return builtin_type_void_data_ptr;
1743 if (i386_fp_regnum_p (regnum))
1744 return builtin_type_i387_ext;
1746 if (i386_mmx_regnum_p (gdbarch, regnum))
1747 return i386_mmx_type (gdbarch);
1749 if (i386_sse_regnum_p (gdbarch, regnum))
1750 return i386_sse_type (gdbarch);
1752 #define I387_ST0_REGNUM I386_ST0_REGNUM
1753 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
1755 if (regnum == I387_MXCSR_REGNUM)
1756 return i386_mxcsr_type;
1758 #undef I387_ST0_REGNUM
1759 #undef I387_NUM_XMM_REGS
1761 return builtin_type_int;
1764 /* Map a cooked register onto a raw register or memory. For the i386,
1765 the MMX registers need to be mapped onto floating point registers. */
1768 i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum)
1770 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
1775 /* Define I387_ST0_REGNUM such that we use the proper definitions
1776 for REGCACHE's architecture. */
1777 #define I387_ST0_REGNUM tdep->st0_regnum
1779 mmxreg = regnum - tdep->mm0_regnum;
1780 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
1781 tos = (fstat >> 11) & 0x7;
1782 fpreg = (mmxreg + tos) % 8;
1784 return (I387_ST0_REGNUM + fpreg);
1786 #undef I387_ST0_REGNUM
1790 i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
1791 int regnum, gdb_byte *buf)
1793 if (i386_mmx_regnum_p (gdbarch, regnum))
1795 gdb_byte mmx_buf[MAX_REGISTER_SIZE];
1796 int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
1798 /* Extract (always little endian). */
1799 regcache_raw_read (regcache, fpnum, mmx_buf);
1800 memcpy (buf, mmx_buf, register_size (gdbarch, regnum));
1803 regcache_raw_read (regcache, regnum, buf);
1807 i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1808 int regnum, const gdb_byte *buf)
1810 if (i386_mmx_regnum_p (gdbarch, regnum))
1812 gdb_byte mmx_buf[MAX_REGISTER_SIZE];
1813 int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
1816 regcache_raw_read (regcache, fpnum, mmx_buf);
1817 /* ... Modify ... (always little endian). */
1818 memcpy (mmx_buf, buf, register_size (gdbarch, regnum));
1820 regcache_raw_write (regcache, fpnum, mmx_buf);
1823 regcache_raw_write (regcache, regnum, buf);
1827 /* Return the register number of the register allocated by GCC after
1828 REGNUM, or -1 if there is no such register. */
1831 i386_next_regnum (int regnum)
1833 /* GCC allocates the registers in the order:
1835 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1837 Since storing a variable in %esp doesn't make any sense we return
1838 -1 for %ebp and for %esp itself. */
1839 static int next_regnum[] =
1841 I386_EDX_REGNUM, /* Slot for %eax. */
1842 I386_EBX_REGNUM, /* Slot for %ecx. */
1843 I386_ECX_REGNUM, /* Slot for %edx. */
1844 I386_ESI_REGNUM, /* Slot for %ebx. */
1845 -1, -1, /* Slots for %esp and %ebp. */
1846 I386_EDI_REGNUM, /* Slot for %esi. */
1847 I386_EBP_REGNUM /* Slot for %edi. */
1850 if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0]))
1851 return next_regnum[regnum];
1856 /* Return nonzero if a value of type TYPE stored in register REGNUM
1857 needs any special handling. */
1860 i386_convert_register_p (int regnum, struct type *type)
1862 int len = TYPE_LENGTH (type);
1864 /* Values may be spread across multiple registers. Most debugging
1865 formats aren't expressive enough to specify the locations, so
1866 some heuristics is involved. Right now we only handle types that
1867 have a length that is a multiple of the word size, since GCC
1868 doesn't seem to put any other types into registers. */
1869 if (len > 4 && len % 4 == 0)
1871 int last_regnum = regnum;
1875 last_regnum = i386_next_regnum (last_regnum);
1879 if (last_regnum != -1)
1883 return i387_convert_register_p (regnum, type);
1886 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1887 return its contents in TO. */
1890 i386_register_to_value (struct frame_info *frame, int regnum,
1891 struct type *type, gdb_byte *to)
1893 int len = TYPE_LENGTH (type);
1895 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1896 available in FRAME (i.e. if it wasn't saved)? */
1898 if (i386_fp_regnum_p (regnum))
1900 i387_register_to_value (frame, regnum, type, to);
1904 /* Read a value spread across multiple registers. */
1906 gdb_assert (len > 4 && len % 4 == 0);
1910 gdb_assert (regnum != -1);
1911 gdb_assert (register_size (get_frame_arch (frame), regnum) == 4);
1913 get_frame_register (frame, regnum, to);
1914 regnum = i386_next_regnum (regnum);
1920 /* Write the contents FROM of a value of type TYPE into register
1921 REGNUM in frame FRAME. */
1924 i386_value_to_register (struct frame_info *frame, int regnum,
1925 struct type *type, const gdb_byte *from)
1927 int len = TYPE_LENGTH (type);
1929 if (i386_fp_regnum_p (regnum))
1931 i387_value_to_register (frame, regnum, type, from);
1935 /* Write a value spread across multiple registers. */
1937 gdb_assert (len > 4 && len % 4 == 0);
1941 gdb_assert (regnum != -1);
1942 gdb_assert (register_size (get_frame_arch (frame), regnum) == 4);
1944 put_frame_register (frame, regnum, from);
1945 regnum = i386_next_regnum (regnum);
1951 /* Supply register REGNUM from the buffer specified by GREGS and LEN
1952 in the general-purpose register set REGSET to register cache
1953 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
1956 i386_supply_gregset (const struct regset *regset, struct regcache *regcache,
1957 int regnum, const void *gregs, size_t len)
1959 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
1960 const gdb_byte *regs = gregs;
1963 gdb_assert (len == tdep->sizeof_gregset);
1965 for (i = 0; i < tdep->gregset_num_regs; i++)
1967 if ((regnum == i || regnum == -1)
1968 && tdep->gregset_reg_offset[i] != -1)
1969 regcache_raw_supply (regcache, i, regs + tdep->gregset_reg_offset[i]);
1973 /* Collect register REGNUM from the register cache REGCACHE and store
1974 it in the buffer specified by GREGS and LEN as described by the
1975 general-purpose register set REGSET. If REGNUM is -1, do this for
1976 all registers in REGSET. */
1979 i386_collect_gregset (const struct regset *regset,
1980 const struct regcache *regcache,
1981 int regnum, void *gregs, size_t len)
1983 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
1984 gdb_byte *regs = gregs;
1987 gdb_assert (len == tdep->sizeof_gregset);
1989 for (i = 0; i < tdep->gregset_num_regs; i++)
1991 if ((regnum == i || regnum == -1)
1992 && tdep->gregset_reg_offset[i] != -1)
1993 regcache_raw_collect (regcache, i, regs + tdep->gregset_reg_offset[i]);
1997 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
1998 in the floating-point register set REGSET to register cache
1999 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
2002 i386_supply_fpregset (const struct regset *regset, struct regcache *regcache,
2003 int regnum, const void *fpregs, size_t len)
2005 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
2007 if (len == I387_SIZEOF_FXSAVE)
2009 i387_supply_fxsave (regcache, regnum, fpregs);
2013 gdb_assert (len == tdep->sizeof_fpregset);
2014 i387_supply_fsave (regcache, regnum, fpregs);
2017 /* Collect register REGNUM from the register cache REGCACHE and store
2018 it in the buffer specified by FPREGS and LEN as described by the
2019 floating-point register set REGSET. If REGNUM is -1, do this for
2020 all registers in REGSET. */
2023 i386_collect_fpregset (const struct regset *regset,
2024 const struct regcache *regcache,
2025 int regnum, void *fpregs, size_t len)
2027 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
2029 if (len == I387_SIZEOF_FXSAVE)
2031 i387_collect_fxsave (regcache, regnum, fpregs);
2035 gdb_assert (len == tdep->sizeof_fpregset);
2036 i387_collect_fsave (regcache, regnum, fpregs);
2039 /* Return the appropriate register set for the core section identified
2040 by SECT_NAME and SECT_SIZE. */
2042 const struct regset *
2043 i386_regset_from_core_section (struct gdbarch *gdbarch,
2044 const char *sect_name, size_t sect_size)
2046 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2048 if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset)
2050 if (tdep->gregset == NULL)
2051 tdep->gregset = regset_alloc (gdbarch, i386_supply_gregset,
2052 i386_collect_gregset);
2053 return tdep->gregset;
2056 if ((strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset)
2057 || (strcmp (sect_name, ".reg-xfp") == 0
2058 && sect_size == I387_SIZEOF_FXSAVE))
2060 if (tdep->fpregset == NULL)
2061 tdep->fpregset = regset_alloc (gdbarch, i386_supply_fpregset,
2062 i386_collect_fpregset);
2063 return tdep->fpregset;
2070 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
2073 i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name)
2075 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
2077 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
2078 struct minimal_symbol *indsym =
2079 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
2080 char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0;
2084 if (strncmp (symname, "__imp_", 6) == 0
2085 || strncmp (symname, "_imp_", 5) == 0)
2086 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
2089 return 0; /* Not a trampoline. */
2093 /* Return whether the frame preceding NEXT_FRAME corresponds to a
2094 sigtramp routine. */
2097 i386_sigtramp_p (struct frame_info *next_frame)
2099 CORE_ADDR pc = frame_pc_unwind (next_frame);
2102 find_pc_partial_function (pc, &name, NULL, NULL);
2103 return (name && strcmp ("_sigtramp", name) == 0);
2107 /* We have two flavours of disassembly. The machinery on this page
2108 deals with switching between those. */
2111 i386_print_insn (bfd_vma pc, struct disassemble_info *info)
2113 gdb_assert (disassembly_flavor == att_flavor
2114 || disassembly_flavor == intel_flavor);
2116 /* FIXME: kettenis/20020915: Until disassembler_options is properly
2117 constified, cast to prevent a compiler warning. */
2118 info->disassembler_options = (char *) disassembly_flavor;
2119 info->mach = gdbarch_bfd_arch_info (current_gdbarch)->mach;
2121 return print_insn_i386 (pc, info);
2125 /* There are a few i386 architecture variants that differ only
2126 slightly from the generic i386 target. For now, we don't give them
2127 their own source file, but include them here. As a consequence,
2128 they'll always be included. */
2130 /* System V Release 4 (SVR4). */
2132 /* Return whether the frame preceding NEXT_FRAME corresponds to a SVR4
2133 sigtramp routine. */
2136 i386_svr4_sigtramp_p (struct frame_info *next_frame)
2138 CORE_ADDR pc = frame_pc_unwind (next_frame);
2141 /* UnixWare uses _sigacthandler. The origin of the other symbols is
2142 currently unknown. */
2143 find_pc_partial_function (pc, &name, NULL, NULL);
2144 return (name && (strcmp ("_sigreturn", name) == 0
2145 || strcmp ("_sigacthandler", name) == 0
2146 || strcmp ("sigvechandler", name) == 0));
2149 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
2150 routine, return the address of the associated sigcontext (ucontext)
2154 i386_svr4_sigcontext_addr (struct frame_info *next_frame)
2159 frame_unwind_register (next_frame, I386_ESP_REGNUM, buf);
2160 sp = extract_unsigned_integer (buf, 4);
2162 return read_memory_unsigned_integer (sp + 8, 4);
2169 i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
2171 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
2172 set_gdbarch_stab_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
2175 /* System V Release 4 (SVR4). */
2178 i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
2180 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2182 /* System V Release 4 uses ELF. */
2183 i386_elf_init_abi (info, gdbarch);
2185 /* System V Release 4 has shared libraries. */
2186 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
2188 tdep->sigtramp_p = i386_svr4_sigtramp_p;
2189 tdep->sigcontext_addr = i386_svr4_sigcontext_addr;
2190 tdep->sc_pc_offset = 36 + 14 * 4;
2191 tdep->sc_sp_offset = 36 + 17 * 4;
2193 tdep->jb_pc_offset = 20;
2199 i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
2201 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2203 /* DJGPP doesn't have any special frames for signal handlers. */
2204 tdep->sigtramp_p = NULL;
2206 tdep->jb_pc_offset = 36;
2210 /* i386 register groups. In addition to the normal groups, add "mmx"
2213 static struct reggroup *i386_sse_reggroup;
2214 static struct reggroup *i386_mmx_reggroup;
2217 i386_init_reggroups (void)
2219 i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP);
2220 i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP);
2224 i386_add_reggroups (struct gdbarch *gdbarch)
2226 reggroup_add (gdbarch, i386_sse_reggroup);
2227 reggroup_add (gdbarch, i386_mmx_reggroup);
2228 reggroup_add (gdbarch, general_reggroup);
2229 reggroup_add (gdbarch, float_reggroup);
2230 reggroup_add (gdbarch, all_reggroup);
2231 reggroup_add (gdbarch, save_reggroup);
2232 reggroup_add (gdbarch, restore_reggroup);
2233 reggroup_add (gdbarch, vector_reggroup);
2234 reggroup_add (gdbarch, system_reggroup);
2238 i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
2239 struct reggroup *group)
2241 int sse_regnum_p = (i386_sse_regnum_p (gdbarch, regnum)
2242 || i386_mxcsr_regnum_p (gdbarch, regnum));
2243 int fp_regnum_p = (i386_fp_regnum_p (regnum)
2244 || i386_fpc_regnum_p (regnum));
2245 int mmx_regnum_p = (i386_mmx_regnum_p (gdbarch, regnum));
2247 if (group == i386_mmx_reggroup)
2248 return mmx_regnum_p;
2249 if (group == i386_sse_reggroup)
2250 return sse_regnum_p;
2251 if (group == vector_reggroup)
2252 return (mmx_regnum_p || sse_regnum_p);
2253 if (group == float_reggroup)
2255 if (group == general_reggroup)
2256 return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p);
2258 return default_register_reggroup_p (gdbarch, regnum, group);
2262 /* Get the ARGIth function argument for the current function. */
2265 i386_fetch_pointer_argument (struct frame_info *frame, int argi,
2268 CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM);
2269 return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4);
2273 static struct gdbarch *
2274 i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2276 struct gdbarch_tdep *tdep;
2277 struct gdbarch *gdbarch;
2279 /* If there is already a candidate, use it. */
2280 arches = gdbarch_list_lookup_by_info (arches, &info);
2282 return arches->gdbarch;
2284 /* Allocate space for the new architecture. */
2285 tdep = XCALLOC (1, struct gdbarch_tdep);
2286 gdbarch = gdbarch_alloc (&info, tdep);
2288 /* General-purpose registers. */
2289 tdep->gregset = NULL;
2290 tdep->gregset_reg_offset = NULL;
2291 tdep->gregset_num_regs = I386_NUM_GREGS;
2292 tdep->sizeof_gregset = 0;
2294 /* Floating-point registers. */
2295 tdep->fpregset = NULL;
2296 tdep->sizeof_fpregset = I387_SIZEOF_FSAVE;
2298 /* The default settings include the FPU registers, the MMX registers
2299 and the SSE registers. This can be overridden for a specific ABI
2300 by adjusting the members `st0_regnum', `mm0_regnum' and
2301 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
2302 will show up in the output of "info all-registers". Ideally we
2303 should try to autodetect whether they are available, such that we
2304 can prevent "info all-registers" from displaying registers that
2307 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
2308 [the SSE registers] always (even when they don't exist) or never
2309 showing them to the user (even when they do exist), I prefer the
2310 former over the latter. */
2312 tdep->st0_regnum = I386_ST0_REGNUM;
2314 /* The MMX registers are implemented as pseudo-registers. Put off
2315 calculating the register number for %mm0 until we know the number
2316 of raw registers. */
2317 tdep->mm0_regnum = 0;
2319 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
2320 tdep->num_xmm_regs = I386_NUM_XREGS - 1;
2322 tdep->jb_pc_offset = -1;
2323 tdep->struct_return = pcc_struct_return;
2324 tdep->sigtramp_start = 0;
2325 tdep->sigtramp_end = 0;
2326 tdep->sigtramp_p = i386_sigtramp_p;
2327 tdep->sigcontext_addr = NULL;
2328 tdep->sc_reg_offset = NULL;
2329 tdep->sc_pc_offset = -1;
2330 tdep->sc_sp_offset = -1;
2332 /* The format used for `long double' on almost all i386 targets is
2333 the i387 extended floating-point format. In fact, of all targets
2334 in the GCC 2.95 tree, only OSF/1 does it different, and insists
2335 on having a `long double' that's not `long' at all. */
2336 set_gdbarch_long_double_format (gdbarch, floatformats_i387_ext);
2338 /* Although the i387 extended floating-point has only 80 significant
2339 bits, a `long double' actually takes up 96, probably to enforce
2341 set_gdbarch_long_double_bit (gdbarch, 96);
2343 /* The default ABI includes general-purpose registers,
2344 floating-point registers, and the SSE registers. */
2345 set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS);
2346 set_gdbarch_register_name (gdbarch, i386_register_name);
2347 set_gdbarch_register_type (gdbarch, i386_register_type);
2349 /* Register numbers of various important registers. */
2350 set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */
2351 set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */
2352 set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */
2353 set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */
2355 /* NOTE: kettenis/20040418: GCC does have two possible register
2356 numbering schemes on the i386: dbx and SVR4. These schemes
2357 differ in how they number %ebp, %esp, %eflags, and the
2358 floating-point registers, and are implemented by the arrays
2359 dbx_register_map[] and svr4_dbx_register_map in
2360 gcc/config/i386.c. GCC also defines a third numbering scheme in
2361 gcc/config/i386.c, which it designates as the "default" register
2362 map used in 64bit mode. This last register numbering scheme is
2363 implemented in dbx64_register_map, and is used for AMD64; see
2366 Currently, each GCC i386 target always uses the same register
2367 numbering scheme across all its supported debugging formats
2368 i.e. SDB (COFF), stabs and DWARF 2. This is because
2369 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
2370 DBX_REGISTER_NUMBER macro which is defined by each target's
2371 respective config header in a manner independent of the requested
2372 output debugging format.
2374 This does not match the arrangement below, which presumes that
2375 the SDB and stabs numbering schemes differ from the DWARF and
2376 DWARF 2 ones. The reason for this arrangement is that it is
2377 likely to get the numbering scheme for the target's
2378 default/native debug format right. For targets where GCC is the
2379 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
2380 targets where the native toolchain uses a different numbering
2381 scheme for a particular debug format (stabs-in-ELF on Solaris)
2382 the defaults below will have to be overridden, like
2383 i386_elf_init_abi() does. */
2385 /* Use the dbx register numbering scheme for stabs and COFF. */
2386 set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dbx_reg_to_regnum);
2387 set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_dbx_reg_to_regnum);
2389 /* Use the SVR4 register numbering scheme for DWARF and DWARF 2. */
2390 set_gdbarch_dwarf_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
2391 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
2393 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
2394 be in use on any of the supported i386 targets. */
2396 set_gdbarch_print_float_info (gdbarch, i387_print_float_info);
2398 set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target);
2400 /* Call dummy code. */
2401 set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call);
2403 set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p);
2404 set_gdbarch_register_to_value (gdbarch, i386_register_to_value);
2405 set_gdbarch_value_to_register (gdbarch, i386_value_to_register);
2407 set_gdbarch_return_value (gdbarch, i386_return_value);
2409 set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue);
2411 /* Stack grows downward. */
2412 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2414 set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc);
2415 set_gdbarch_decr_pc_after_break (gdbarch, 1);
2417 set_gdbarch_frame_args_skip (gdbarch, 8);
2419 /* Wire in the MMX registers. */
2420 set_gdbarch_num_pseudo_regs (gdbarch, i386_num_mmx_regs);
2421 set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read);
2422 set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write);
2424 set_gdbarch_print_insn (gdbarch, i386_print_insn);
2426 set_gdbarch_unwind_dummy_id (gdbarch, i386_unwind_dummy_id);
2428 set_gdbarch_unwind_pc (gdbarch, i386_unwind_pc);
2430 /* Add the i386 register groups. */
2431 i386_add_reggroups (gdbarch);
2432 set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p);
2434 /* Helper for function argument information. */
2435 set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument);
2437 /* Hook in the DWARF CFI frame unwinder. */
2438 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
2440 frame_base_set_default (gdbarch, &i386_frame_base);
2442 /* Hook in ABI-specific overrides, if they have been registered. */
2443 gdbarch_init_osabi (info, gdbarch);
2445 frame_unwind_append_sniffer (gdbarch, i386_sigtramp_frame_sniffer);
2446 frame_unwind_append_sniffer (gdbarch, i386_frame_sniffer);
2448 /* If we have a register mapping, enable the generic core file
2449 support, unless it has already been enabled. */
2450 if (tdep->gregset_reg_offset
2451 && !gdbarch_regset_from_core_section_p (gdbarch))
2452 set_gdbarch_regset_from_core_section (gdbarch,
2453 i386_regset_from_core_section);
2455 /* Unless support for MMX has been disabled, make %mm0 the first
2457 if (tdep->mm0_regnum == 0)
2458 tdep->mm0_regnum = gdbarch_num_regs (gdbarch);
2463 static enum gdb_osabi
2464 i386_coff_osabi_sniffer (bfd *abfd)
2466 if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0
2467 || strcmp (bfd_get_target (abfd), "coff-go32") == 0)
2468 return GDB_OSABI_GO32;
2470 return GDB_OSABI_UNKNOWN;
2474 /* Provide a prototype to silence -Wmissing-prototypes. */
2475 void _initialize_i386_tdep (void);
2478 _initialize_i386_tdep (void)
2480 register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init);
2482 /* Add the variable that controls the disassembly flavor. */
2483 add_setshow_enum_cmd ("disassembly-flavor", no_class, valid_flavors,
2484 &disassembly_flavor, _("\
2485 Set the disassembly flavor."), _("\
2486 Show the disassembly flavor."), _("\
2487 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
2489 NULL, /* FIXME: i18n: */
2490 &setlist, &showlist);
2492 /* Add the variable that controls the convention for returning
2494 add_setshow_enum_cmd ("struct-convention", no_class, valid_conventions,
2495 &struct_convention, _("\
2496 Set the convention for returning small structs."), _("\
2497 Show the convention for returning small structs."), _("\
2498 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
2501 NULL, /* FIXME: i18n: */
2502 &setlist, &showlist);
2504 gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour,
2505 i386_coff_osabi_sniffer);
2507 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4,
2508 i386_svr4_init_abi);
2509 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32,
2510 i386_go32_init_abi);
2512 /* Initialize the i386-specific register groups & types. */
2513 i386_init_reggroups ();