1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
4 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
25 #include "dummy-frame.h"
26 #include "dwarf2-frame.h"
29 #include "frame-base.h"
30 #include "frame-unwind.h"
38 #include "reggroups.h"
46 #include "gdb_assert.h"
47 #include "gdb_string.h"
49 #include "i386-tdep.h"
50 #include "i387-tdep.h"
54 static char *i386_register_names[] =
56 "eax", "ecx", "edx", "ebx",
57 "esp", "ebp", "esi", "edi",
58 "eip", "eflags", "cs", "ss",
59 "ds", "es", "fs", "gs",
60 "st0", "st1", "st2", "st3",
61 "st4", "st5", "st6", "st7",
62 "fctrl", "fstat", "ftag", "fiseg",
63 "fioff", "foseg", "fooff", "fop",
64 "xmm0", "xmm1", "xmm2", "xmm3",
65 "xmm4", "xmm5", "xmm6", "xmm7",
69 static const int i386_num_register_names = ARRAY_SIZE (i386_register_names);
71 /* Register names for MMX pseudo-registers. */
73 static char *i386_mmx_names[] =
75 "mm0", "mm1", "mm2", "mm3",
76 "mm4", "mm5", "mm6", "mm7"
79 static const int i386_num_mmx_regs = ARRAY_SIZE (i386_mmx_names);
82 i386_mmx_regnum_p (struct gdbarch *gdbarch, int regnum)
84 int mm0_regnum = gdbarch_tdep (gdbarch)->mm0_regnum;
89 return (regnum >= mm0_regnum && regnum < mm0_regnum + i386_num_mmx_regs);
95 i386_sse_regnum_p (struct gdbarch *gdbarch, int regnum)
97 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
99 if (I387_NUM_XMM_REGS (tdep) == 0)
102 return (I387_XMM0_REGNUM (tdep) <= regnum
103 && regnum < I387_MXCSR_REGNUM (tdep));
107 i386_mxcsr_regnum_p (struct gdbarch *gdbarch, int regnum)
109 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
111 if (I387_NUM_XMM_REGS (tdep) == 0)
114 return (regnum == I387_MXCSR_REGNUM (tdep));
120 i386_fp_regnum_p (struct gdbarch *gdbarch, int regnum)
122 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
124 if (I387_ST0_REGNUM (tdep) < 0)
127 return (I387_ST0_REGNUM (tdep) <= regnum
128 && regnum < I387_FCTRL_REGNUM (tdep));
132 i386_fpc_regnum_p (struct gdbarch *gdbarch, int regnum)
134 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
136 if (I387_ST0_REGNUM (tdep) < 0)
139 return (I387_FCTRL_REGNUM (tdep) <= regnum
140 && regnum < I387_XMM0_REGNUM (tdep));
143 /* Return the name of register REGNUM. */
146 i386_register_name (struct gdbarch *gdbarch, int regnum)
148 if (i386_mmx_regnum_p (gdbarch, regnum))
149 return i386_mmx_names[regnum - I387_MM0_REGNUM (gdbarch_tdep (gdbarch))];
151 if (regnum >= 0 && regnum < i386_num_register_names)
152 return i386_register_names[regnum];
157 /* Convert a dbx register number REG to the appropriate register
158 number used by GDB. */
161 i386_dbx_reg_to_regnum (struct gdbarch *gdbarch, int reg)
163 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
165 /* This implements what GCC calls the "default" register map
166 (dbx_register_map[]). */
168 if (reg >= 0 && reg <= 7)
170 /* General-purpose registers. The debug info calls %ebp
171 register 4, and %esp register 5. */
178 else if (reg >= 12 && reg <= 19)
180 /* Floating-point registers. */
181 return reg - 12 + I387_ST0_REGNUM (tdep);
183 else if (reg >= 21 && reg <= 28)
186 return reg - 21 + I387_XMM0_REGNUM (tdep);
188 else if (reg >= 29 && reg <= 36)
191 return reg - 29 + I387_MM0_REGNUM (tdep);
194 /* This will hopefully provoke a warning. */
195 return gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch);
198 /* Convert SVR4 register number REG to the appropriate register number
202 i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg)
204 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
206 /* This implements the GCC register map that tries to be compatible
207 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
209 /* The SVR4 register numbering includes %eip and %eflags, and
210 numbers the floating point registers differently. */
211 if (reg >= 0 && reg <= 9)
213 /* General-purpose registers. */
216 else if (reg >= 11 && reg <= 18)
218 /* Floating-point registers. */
219 return reg - 11 + I387_ST0_REGNUM (tdep);
221 else if (reg >= 21 && reg <= 36)
223 /* The SSE and MMX registers have the same numbers as with dbx. */
224 return i386_dbx_reg_to_regnum (gdbarch, reg);
229 case 37: return I387_FCTRL_REGNUM (tdep);
230 case 38: return I387_FSTAT_REGNUM (tdep);
231 case 39: return I387_MXCSR_REGNUM (tdep);
232 case 40: return I386_ES_REGNUM;
233 case 41: return I386_CS_REGNUM;
234 case 42: return I386_SS_REGNUM;
235 case 43: return I386_DS_REGNUM;
236 case 44: return I386_FS_REGNUM;
237 case 45: return I386_GS_REGNUM;
240 /* This will hopefully provoke a warning. */
241 return gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch);
246 /* This is the variable that is set with "set disassembly-flavor", and
247 its legitimate values. */
248 static const char att_flavor[] = "att";
249 static const char intel_flavor[] = "intel";
250 static const char *valid_flavors[] =
256 static const char *disassembly_flavor = att_flavor;
259 /* Use the program counter to determine the contents and size of a
260 breakpoint instruction. Return a pointer to a string of bytes that
261 encode a breakpoint instruction, store the length of the string in
262 *LEN and optionally adjust *PC to point to the correct memory
263 location for inserting the breakpoint.
265 On the i386 we have a single breakpoint that fits in a single byte
266 and can be inserted anywhere.
268 This function is 64-bit safe. */
270 static const gdb_byte *
271 i386_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
273 static gdb_byte break_insn[] = { 0xcc }; /* int 3 */
275 *len = sizeof (break_insn);
279 /* Displaced instruction handling. */
283 i386_absolute_jmp_p (gdb_byte *insn)
285 /* jmp far (absolute address in operand) */
291 /* jump near, absolute indirect (/4) */
292 if ((insn[1] & 0x38) == 0x20)
295 /* jump far, absolute indirect (/5) */
296 if ((insn[1] & 0x38) == 0x28)
304 i386_absolute_call_p (gdb_byte *insn)
306 /* call far, absolute */
312 /* Call near, absolute indirect (/2) */
313 if ((insn[1] & 0x38) == 0x10)
316 /* Call far, absolute indirect (/3) */
317 if ((insn[1] & 0x38) == 0x18)
325 i386_ret_p (gdb_byte *insn)
329 case 0xc2: /* ret near, pop N bytes */
330 case 0xc3: /* ret near */
331 case 0xca: /* ret far, pop N bytes */
332 case 0xcb: /* ret far */
333 case 0xcf: /* iret */
342 i386_call_p (gdb_byte *insn)
344 if (i386_absolute_call_p (insn))
347 /* call near, relative */
355 i386_breakpoint_p (gdb_byte *insn)
357 return insn[0] == 0xcc; /* int 3 */
360 /* Return non-zero if INSN is a system call, and set *LENGTHP to its
361 length in bytes. Otherwise, return zero. */
363 i386_syscall_p (gdb_byte *insn, ULONGEST *lengthp)
374 /* Fix up the state of registers and memory after having single-stepped
375 a displaced instruction. */
377 i386_displaced_step_fixup (struct gdbarch *gdbarch,
378 struct displaced_step_closure *closure,
379 CORE_ADDR from, CORE_ADDR to,
380 struct regcache *regs)
382 /* The offset we applied to the instruction's address.
383 This could well be negative (when viewed as a signed 32-bit
384 value), but ULONGEST won't reflect that, so take care when
386 ULONGEST insn_offset = to - from;
388 /* Since we use simple_displaced_step_copy_insn, our closure is a
389 copy of the instruction. */
390 gdb_byte *insn = (gdb_byte *) closure;
393 fprintf_unfiltered (gdb_stdlog,
394 "displaced: fixup (0x%s, 0x%s), "
395 "insn = 0x%02x 0x%02x ...\n",
396 paddr_nz (from), paddr_nz (to), insn[0], insn[1]);
398 /* The list of issues to contend with here is taken from
399 resume_execution in arch/i386/kernel/kprobes.c, Linux 2.6.20.
400 Yay for Free Software! */
402 /* Relocate the %eip, if necessary. */
404 /* Except in the case of absolute or indirect jump or call
405 instructions, or a return instruction, the new eip is relative to
406 the displaced instruction; make it relative. Well, signal
407 handler returns don't need relocation either, but we use the
408 value of %eip to recognize those; see below. */
409 if (! i386_absolute_jmp_p (insn)
410 && ! i386_absolute_call_p (insn)
411 && ! i386_ret_p (insn))
416 regcache_cooked_read_unsigned (regs, I386_EIP_REGNUM, &orig_eip);
418 /* A signal trampoline system call changes the %eip, resuming
419 execution of the main program after the signal handler has
420 returned. That makes them like 'return' instructions; we
421 shouldn't relocate %eip.
423 But most system calls don't, and we do need to relocate %eip.
425 Our heuristic for distinguishing these cases: if stepping
426 over the system call instruction left control directly after
427 the instruction, the we relocate --- control almost certainly
428 doesn't belong in the displaced copy. Otherwise, we assume
429 the instruction has put control where it belongs, and leave
430 it unrelocated. Goodness help us if there are PC-relative
432 if (i386_syscall_p (insn, &insn_len)
433 && orig_eip != to + insn_len)
436 fprintf_unfiltered (gdb_stdlog,
437 "displaced: syscall changed %%eip; "
442 ULONGEST eip = (orig_eip - insn_offset) & 0xffffffffUL;
444 /* If we have stepped over a breakpoint, set the %eip to
445 point at the breakpoint instruction itself.
447 (gdbarch_decr_pc_after_break was never something the core
448 of GDB should have been concerned with; arch-specific
449 code should be making PC values consistent before
450 presenting them to GDB.) */
451 if (i386_breakpoint_p (insn))
453 fprintf_unfiltered (gdb_stdlog,
454 "displaced: stepped breakpoint\n");
458 regcache_cooked_write_unsigned (regs, I386_EIP_REGNUM, eip);
461 fprintf_unfiltered (gdb_stdlog,
463 "relocated %%eip from 0x%s to 0x%s\n",
464 paddr_nz (orig_eip), paddr_nz (eip));
468 /* If the instruction was PUSHFL, then the TF bit will be set in the
469 pushed value, and should be cleared. We'll leave this for later,
470 since GDB already messes up the TF flag when stepping over a
473 /* If the instruction was a call, the return address now atop the
474 stack is the address following the copied instruction. We need
475 to make it the address following the original instruction. */
476 if (i386_call_p (insn))
480 const ULONGEST retaddr_len = 4;
482 regcache_cooked_read_unsigned (regs, I386_ESP_REGNUM, &esp);
483 retaddr = read_memory_unsigned_integer (esp, retaddr_len);
484 retaddr = (retaddr - insn_offset) & 0xffffffffUL;
485 write_memory_unsigned_integer (esp, retaddr_len, retaddr);
488 fprintf_unfiltered (gdb_stdlog,
489 "displaced: relocated return addr at 0x%s "
498 #ifdef I386_REGNO_TO_SYMMETRY
499 #error "The Sequent Symmetry is no longer supported."
502 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
503 and %esp "belong" to the calling function. Therefore these
504 registers should be saved if they're going to be modified. */
506 /* The maximum number of saved registers. This should include all
507 registers mentioned above, and %eip. */
508 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
510 struct i386_frame_cache
517 /* Saved registers. */
518 CORE_ADDR saved_regs[I386_NUM_SAVED_REGS];
523 /* Stack space reserved for local variables. */
527 /* Allocate and initialize a frame cache. */
529 static struct i386_frame_cache *
530 i386_alloc_frame_cache (void)
532 struct i386_frame_cache *cache;
535 cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache);
539 cache->sp_offset = -4;
542 /* Saved registers. We initialize these to -1 since zero is a valid
543 offset (that's where %ebp is supposed to be stored). */
544 for (i = 0; i < I386_NUM_SAVED_REGS; i++)
545 cache->saved_regs[i] = -1;
547 cache->stack_align = 0;
548 cache->pc_in_eax = 0;
550 /* Frameless until proven otherwise. */
556 /* If the instruction at PC is a jump, return the address of its
557 target. Otherwise, return PC. */
560 i386_follow_jump (CORE_ADDR pc)
566 target_read_memory (pc, &op, 1);
570 op = read_memory_unsigned_integer (pc + 1, 1);
576 /* Relative jump: if data16 == 0, disp32, else disp16. */
579 delta = read_memory_integer (pc + 2, 2);
581 /* Include the size of the jmp instruction (including the
587 delta = read_memory_integer (pc + 1, 4);
589 /* Include the size of the jmp instruction. */
594 /* Relative jump, disp8 (ignore data16). */
595 delta = read_memory_integer (pc + data16 + 1, 1);
604 /* Check whether PC points at a prologue for a function returning a
605 structure or union. If so, it updates CACHE and returns the
606 address of the first instruction after the code sequence that
607 removes the "hidden" argument from the stack or CURRENT_PC,
608 whichever is smaller. Otherwise, return PC. */
611 i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc,
612 struct i386_frame_cache *cache)
614 /* Functions that return a structure or union start with:
617 xchgl %eax, (%esp) 0x87 0x04 0x24
618 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
620 (the System V compiler puts out the second `xchg' instruction,
621 and the assembler doesn't try to optimize it, so the 'sib' form
622 gets generated). This sequence is used to get the address of the
623 return buffer for a function that returns a structure. */
624 static gdb_byte proto1[3] = { 0x87, 0x04, 0x24 };
625 static gdb_byte proto2[4] = { 0x87, 0x44, 0x24, 0x00 };
629 if (current_pc <= pc)
632 target_read_memory (pc, &op, 1);
634 if (op != 0x58) /* popl %eax */
637 target_read_memory (pc + 1, buf, 4);
638 if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0)
641 if (current_pc == pc)
643 cache->sp_offset += 4;
647 if (current_pc == pc + 1)
649 cache->pc_in_eax = 1;
653 if (buf[1] == proto1[1])
660 i386_skip_probe (CORE_ADDR pc)
662 /* A function may start with
676 target_read_memory (pc, &op, 1);
678 if (op == 0x68 || op == 0x6a)
682 /* Skip past the `pushl' instruction; it has either a one-byte or a
683 four-byte operand, depending on the opcode. */
689 /* Read the following 8 bytes, which should be `call _probe' (6
690 bytes) followed by `addl $4,%esp' (2 bytes). */
691 read_memory (pc + delta, buf, sizeof (buf));
692 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
693 pc += delta + sizeof (buf);
699 /* GCC 4.1 and later, can put code in the prologue to realign the
700 stack pointer. Check whether PC points to such code, and update
701 CACHE accordingly. Return the first instruction after the code
702 sequence or CURRENT_PC, whichever is smaller. If we don't
703 recognize the code, return PC. */
706 i386_analyze_stack_align (CORE_ADDR pc, CORE_ADDR current_pc,
707 struct i386_frame_cache *cache)
709 /* The register used by the compiler to perform the stack re-alignment
710 is, in order of preference, either %ecx, %edx, or %eax. GCC should
711 never use %ebx as it always treats it as callee-saved, whereas
712 the compiler can only use caller-saved registers. */
713 static const gdb_byte insns_ecx[10] = {
714 0x8d, 0x4c, 0x24, 0x04, /* leal 4(%esp), %ecx */
715 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
716 0xff, 0x71, 0xfc /* pushl -4(%ecx) */
718 static const gdb_byte insns_edx[10] = {
719 0x8d, 0x54, 0x24, 0x04, /* leal 4(%esp), %edx */
720 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
721 0xff, 0x72, 0xfc /* pushl -4(%edx) */
723 static const gdb_byte insns_eax[10] = {
724 0x8d, 0x44, 0x24, 0x04, /* leal 4(%esp), %eax */
725 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
726 0xff, 0x70, 0xfc /* pushl -4(%eax) */
730 if (target_read_memory (pc, buf, sizeof buf)
731 || (memcmp (buf, insns_ecx, sizeof buf) != 0
732 && memcmp (buf, insns_edx, sizeof buf) != 0
733 && memcmp (buf, insns_eax, sizeof buf) != 0))
736 if (current_pc > pc + 4)
737 cache->stack_align = 1;
739 return min (pc + 10, current_pc);
742 /* Maximum instruction length we need to handle. */
743 #define I386_MAX_MATCHED_INSN_LEN 6
745 /* Instruction description. */
749 gdb_byte insn[I386_MAX_MATCHED_INSN_LEN];
750 gdb_byte mask[I386_MAX_MATCHED_INSN_LEN];
753 /* Search for the instruction at PC in the list SKIP_INSNS. Return
754 the first instruction description that matches. Otherwise, return
757 static struct i386_insn *
758 i386_match_insn (CORE_ADDR pc, struct i386_insn *skip_insns)
760 struct i386_insn *insn;
763 target_read_memory (pc, &op, 1);
765 for (insn = skip_insns; insn->len > 0; insn++)
767 if ((op & insn->mask[0]) == insn->insn[0])
769 gdb_byte buf[I386_MAX_MATCHED_INSN_LEN - 1];
770 int insn_matched = 1;
773 gdb_assert (insn->len > 1);
774 gdb_assert (insn->len <= I386_MAX_MATCHED_INSN_LEN);
776 target_read_memory (pc + 1, buf, insn->len - 1);
777 for (i = 1; i < insn->len; i++)
779 if ((buf[i - 1] & insn->mask[i]) != insn->insn[i])
791 /* Some special instructions that might be migrated by GCC into the
792 part of the prologue that sets up the new stack frame. Because the
793 stack frame hasn't been setup yet, no registers have been saved
794 yet, and only the scratch registers %eax, %ecx and %edx can be
797 struct i386_insn i386_frame_setup_skip_insns[] =
799 /* Check for `movb imm8, r' and `movl imm32, r'.
801 ??? Should we handle 16-bit operand-sizes here? */
803 /* `movb imm8, %al' and `movb imm8, %ah' */
804 /* `movb imm8, %cl' and `movb imm8, %ch' */
805 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
806 /* `movb imm8, %dl' and `movb imm8, %dh' */
807 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
808 /* `movl imm32, %eax' and `movl imm32, %ecx' */
809 { 5, { 0xb8 }, { 0xfe } },
810 /* `movl imm32, %edx' */
811 { 5, { 0xba }, { 0xff } },
813 /* Check for `mov imm32, r32'. Note that there is an alternative
814 encoding for `mov m32, %eax'.
816 ??? Should we handle SIB adressing here?
817 ??? Should we handle 16-bit operand-sizes here? */
819 /* `movl m32, %eax' */
820 { 5, { 0xa1 }, { 0xff } },
821 /* `movl m32, %eax' and `mov; m32, %ecx' */
822 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
823 /* `movl m32, %edx' */
824 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
826 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
827 Because of the symmetry, there are actually two ways to encode
828 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
829 opcode bytes 0x31 and 0x33 for `xorl'. */
831 /* `subl %eax, %eax' */
832 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
833 /* `subl %ecx, %ecx' */
834 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
835 /* `subl %edx, %edx' */
836 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
837 /* `xorl %eax, %eax' */
838 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
839 /* `xorl %ecx, %ecx' */
840 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
841 /* `xorl %edx, %edx' */
842 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
847 /* Check whether PC points to a no-op instruction. */
849 i386_skip_noop (CORE_ADDR pc)
854 target_read_memory (pc, &op, 1);
859 /* Ignore `nop' instruction. */
863 target_read_memory (pc, &op, 1);
866 /* Ignore no-op instruction `mov %edi, %edi'.
867 Microsoft system dlls often start with
868 a `mov %edi,%edi' instruction.
869 The 5 bytes before the function start are
870 filled with `nop' instructions.
871 This pattern can be used for hot-patching:
872 The `mov %edi, %edi' instruction can be replaced by a
873 near jump to the location of the 5 `nop' instructions
874 which can be replaced by a 32-bit jump to anywhere
875 in the 32-bit address space. */
879 target_read_memory (pc + 1, &op, 1);
883 target_read_memory (pc, &op, 1);
891 /* Check whether PC points at a code that sets up a new stack frame.
892 If so, it updates CACHE and returns the address of the first
893 instruction after the sequence that sets up the frame or LIMIT,
894 whichever is smaller. If we don't recognize the code, return PC. */
897 i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR limit,
898 struct i386_frame_cache *cache)
900 struct i386_insn *insn;
907 target_read_memory (pc, &op, 1);
909 if (op == 0x55) /* pushl %ebp */
911 /* Take into account that we've executed the `pushl %ebp' that
912 starts this instruction sequence. */
913 cache->saved_regs[I386_EBP_REGNUM] = 0;
914 cache->sp_offset += 4;
917 /* If that's all, return now. */
921 /* Check for some special instructions that might be migrated by
922 GCC into the prologue and skip them. At this point in the
923 prologue, code should only touch the scratch registers %eax,
924 %ecx and %edx, so while the number of posibilities is sheer,
927 Make sure we only skip these instructions if we later see the
928 `movl %esp, %ebp' that actually sets up the frame. */
929 while (pc + skip < limit)
931 insn = i386_match_insn (pc + skip, i386_frame_setup_skip_insns);
938 /* If that's all, return now. */
939 if (limit <= pc + skip)
942 target_read_memory (pc + skip, &op, 1);
944 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
948 if (read_memory_unsigned_integer (pc + skip + 1, 1) != 0xec)
952 if (read_memory_unsigned_integer (pc + skip + 1, 1) != 0xe5)
959 /* OK, we actually have a frame. We just don't know how large
960 it is yet. Set its size to zero. We'll adjust it if
961 necessary. We also now commit to skipping the special
962 instructions mentioned before. */
966 /* If that's all, return now. */
970 /* Check for stack adjustment
974 NOTE: You can't subtract a 16-bit immediate from a 32-bit
975 reg, so we don't have to worry about a data16 prefix. */
976 target_read_memory (pc, &op, 1);
979 /* `subl' with 8-bit immediate. */
980 if (read_memory_unsigned_integer (pc + 1, 1) != 0xec)
981 /* Some instruction starting with 0x83 other than `subl'. */
984 /* `subl' with signed 8-bit immediate (though it wouldn't
985 make sense to be negative). */
986 cache->locals = read_memory_integer (pc + 2, 1);
991 /* Maybe it is `subl' with a 32-bit immediate. */
992 if (read_memory_unsigned_integer (pc + 1, 1) != 0xec)
993 /* Some instruction starting with 0x81 other than `subl'. */
996 /* It is `subl' with a 32-bit immediate. */
997 cache->locals = read_memory_integer (pc + 2, 4);
1002 /* Some instruction other than `subl'. */
1006 else if (op == 0xc8) /* enter */
1008 cache->locals = read_memory_unsigned_integer (pc + 1, 2);
1015 /* Check whether PC points at code that saves registers on the stack.
1016 If so, it updates CACHE and returns the address of the first
1017 instruction after the register saves or CURRENT_PC, whichever is
1018 smaller. Otherwise, return PC. */
1021 i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc,
1022 struct i386_frame_cache *cache)
1024 CORE_ADDR offset = 0;
1028 if (cache->locals > 0)
1029 offset -= cache->locals;
1030 for (i = 0; i < 8 && pc < current_pc; i++)
1032 target_read_memory (pc, &op, 1);
1033 if (op < 0x50 || op > 0x57)
1037 cache->saved_regs[op - 0x50] = offset;
1038 cache->sp_offset += 4;
1045 /* Do a full analysis of the prologue at PC and update CACHE
1046 accordingly. Bail out early if CURRENT_PC is reached. Return the
1047 address where the analysis stopped.
1049 We handle these cases:
1051 The startup sequence can be at the start of the function, or the
1052 function can start with a branch to startup code at the end.
1054 %ebp can be set up with either the 'enter' instruction, or "pushl
1055 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
1056 once used in the System V compiler).
1058 Local space is allocated just below the saved %ebp by either the
1059 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
1060 16-bit unsigned argument for space to allocate, and the 'addl'
1061 instruction could have either a signed byte, or 32-bit immediate.
1063 Next, the registers used by this function are pushed. With the
1064 System V compiler they will always be in the order: %edi, %esi,
1065 %ebx (and sometimes a harmless bug causes it to also save but not
1066 restore %eax); however, the code below is willing to see the pushes
1067 in any order, and will handle up to 8 of them.
1069 If the setup sequence is at the end of the function, then the next
1070 instruction will be a branch back to the start. */
1073 i386_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
1074 struct i386_frame_cache *cache)
1076 pc = i386_skip_noop (pc);
1077 pc = i386_follow_jump (pc);
1078 pc = i386_analyze_struct_return (pc, current_pc, cache);
1079 pc = i386_skip_probe (pc);
1080 pc = i386_analyze_stack_align (pc, current_pc, cache);
1081 pc = i386_analyze_frame_setup (pc, current_pc, cache);
1082 return i386_analyze_register_saves (pc, current_pc, cache);
1085 /* Return PC of first real instruction. */
1088 i386_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
1090 static gdb_byte pic_pat[6] =
1092 0xe8, 0, 0, 0, 0, /* call 0x0 */
1093 0x5b, /* popl %ebx */
1095 struct i386_frame_cache cache;
1101 pc = i386_analyze_prologue (start_pc, 0xffffffff, &cache);
1102 if (cache.locals < 0)
1105 /* Found valid frame setup. */
1107 /* The native cc on SVR4 in -K PIC mode inserts the following code
1108 to get the address of the global offset table (GOT) into register
1113 movl %ebx,x(%ebp) (optional)
1116 This code is with the rest of the prologue (at the end of the
1117 function), so we have to skip it to get to the first real
1118 instruction at the start of the function. */
1120 for (i = 0; i < 6; i++)
1122 target_read_memory (pc + i, &op, 1);
1123 if (pic_pat[i] != op)
1130 target_read_memory (pc + delta, &op, 1);
1132 if (op == 0x89) /* movl %ebx, x(%ebp) */
1134 op = read_memory_unsigned_integer (pc + delta + 1, 1);
1136 if (op == 0x5d) /* One byte offset from %ebp. */
1138 else if (op == 0x9d) /* Four byte offset from %ebp. */
1140 else /* Unexpected instruction. */
1143 target_read_memory (pc + delta, &op, 1);
1147 if (delta > 0 && op == 0x81
1148 && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3)
1154 /* If the function starts with a branch (to startup code at the end)
1155 the last instruction should bring us back to the first
1156 instruction of the real code. */
1157 if (i386_follow_jump (start_pc) != start_pc)
1158 pc = i386_follow_jump (pc);
1163 /* Check that the code pointed to by PC corresponds to a call to
1164 __main, skip it if so. Return PC otherwise. */
1167 i386_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1171 target_read_memory (pc, &op, 1);
1176 if (target_read_memory (pc + 1, buf, sizeof buf) == 0)
1178 /* Make sure address is computed correctly as a 32bit
1179 integer even if CORE_ADDR is 64 bit wide. */
1180 struct minimal_symbol *s;
1181 CORE_ADDR call_dest = pc + 5 + extract_signed_integer (buf, 4);
1183 call_dest = call_dest & 0xffffffffU;
1184 s = lookup_minimal_symbol_by_pc (call_dest);
1186 && SYMBOL_LINKAGE_NAME (s) != NULL
1187 && strcmp (SYMBOL_LINKAGE_NAME (s), "__main") == 0)
1195 /* This function is 64-bit safe. */
1198 i386_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1202 frame_unwind_register (next_frame, gdbarch_pc_regnum (gdbarch), buf);
1203 return extract_typed_address (buf, builtin_type_void_func_ptr);
1207 /* Normal frames. */
1209 static struct i386_frame_cache *
1210 i386_frame_cache (struct frame_info *this_frame, void **this_cache)
1212 struct i386_frame_cache *cache;
1219 cache = i386_alloc_frame_cache ();
1220 *this_cache = cache;
1222 /* In principle, for normal frames, %ebp holds the frame pointer,
1223 which holds the base address for the current stack frame.
1224 However, for functions that don't need it, the frame pointer is
1225 optional. For these "frameless" functions the frame pointer is
1226 actually the frame pointer of the calling frame. Signal
1227 trampolines are just a special case of a "frameless" function.
1228 They (usually) share their frame pointer with the frame that was
1229 in progress when the signal occurred. */
1231 get_frame_register (this_frame, I386_EBP_REGNUM, buf);
1232 cache->base = extract_unsigned_integer (buf, 4);
1233 if (cache->base == 0)
1236 /* For normal frames, %eip is stored at 4(%ebp). */
1237 cache->saved_regs[I386_EIP_REGNUM] = 4;
1239 cache->pc = get_frame_func (this_frame);
1241 i386_analyze_prologue (cache->pc, get_frame_pc (this_frame), cache);
1243 if (cache->stack_align)
1245 /* Saved stack pointer has been saved in %ecx. */
1246 get_frame_register (this_frame, I386_ECX_REGNUM, buf);
1247 cache->saved_sp = extract_unsigned_integer(buf, 4);
1250 if (cache->locals < 0)
1252 /* We didn't find a valid frame, which means that CACHE->base
1253 currently holds the frame pointer for our calling frame. If
1254 we're at the start of a function, or somewhere half-way its
1255 prologue, the function's frame probably hasn't been fully
1256 setup yet. Try to reconstruct the base address for the stack
1257 frame by looking at the stack pointer. For truly "frameless"
1258 functions this might work too. */
1260 if (cache->stack_align)
1262 /* We're halfway aligning the stack. */
1263 cache->base = ((cache->saved_sp - 4) & 0xfffffff0) - 4;
1264 cache->saved_regs[I386_EIP_REGNUM] = cache->saved_sp - 4;
1266 /* This will be added back below. */
1267 cache->saved_regs[I386_EIP_REGNUM] -= cache->base;
1271 get_frame_register (this_frame, I386_ESP_REGNUM, buf);
1272 cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset;
1276 /* Now that we have the base address for the stack frame we can
1277 calculate the value of %esp in the calling frame. */
1278 if (cache->saved_sp == 0)
1279 cache->saved_sp = cache->base + 8;
1281 /* Adjust all the saved registers such that they contain addresses
1282 instead of offsets. */
1283 for (i = 0; i < I386_NUM_SAVED_REGS; i++)
1284 if (cache->saved_regs[i] != -1)
1285 cache->saved_regs[i] += cache->base;
1291 i386_frame_this_id (struct frame_info *this_frame, void **this_cache,
1292 struct frame_id *this_id)
1294 struct i386_frame_cache *cache = i386_frame_cache (this_frame, this_cache);
1296 /* This marks the outermost frame. */
1297 if (cache->base == 0)
1300 /* See the end of i386_push_dummy_call. */
1301 (*this_id) = frame_id_build (cache->base + 8, cache->pc);
1304 static struct value *
1305 i386_frame_prev_register (struct frame_info *this_frame, void **this_cache,
1308 struct i386_frame_cache *cache = i386_frame_cache (this_frame, this_cache);
1310 gdb_assert (regnum >= 0);
1312 /* The System V ABI says that:
1314 "The flags register contains the system flags, such as the
1315 direction flag and the carry flag. The direction flag must be
1316 set to the forward (that is, zero) direction before entry and
1317 upon exit from a function. Other user flags have no specified
1318 role in the standard calling sequence and are not preserved."
1320 To guarantee the "upon exit" part of that statement we fake a
1321 saved flags register that has its direction flag cleared.
1323 Note that GCC doesn't seem to rely on the fact that the direction
1324 flag is cleared after a function return; it always explicitly
1325 clears the flag before operations where it matters.
1327 FIXME: kettenis/20030316: I'm not quite sure whether this is the
1328 right thing to do. The way we fake the flags register here makes
1329 it impossible to change it. */
1331 if (regnum == I386_EFLAGS_REGNUM)
1335 val = get_frame_register_unsigned (this_frame, regnum);
1337 return frame_unwind_got_constant (this_frame, regnum, val);
1340 if (regnum == I386_EIP_REGNUM && cache->pc_in_eax)
1341 return frame_unwind_got_register (this_frame, regnum, I386_EAX_REGNUM);
1343 if (regnum == I386_ESP_REGNUM && cache->saved_sp)
1344 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
1346 if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1)
1347 return frame_unwind_got_memory (this_frame, regnum,
1348 cache->saved_regs[regnum]);
1350 return frame_unwind_got_register (this_frame, regnum, regnum);
1353 static const struct frame_unwind i386_frame_unwind =
1357 i386_frame_prev_register,
1359 default_frame_sniffer
1363 /* Signal trampolines. */
1365 static struct i386_frame_cache *
1366 i386_sigtramp_frame_cache (struct frame_info *this_frame, void **this_cache)
1368 struct i386_frame_cache *cache;
1369 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
1376 cache = i386_alloc_frame_cache ();
1378 get_frame_register (this_frame, I386_ESP_REGNUM, buf);
1379 cache->base = extract_unsigned_integer (buf, 4) - 4;
1381 addr = tdep->sigcontext_addr (this_frame);
1382 if (tdep->sc_reg_offset)
1386 gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS);
1388 for (i = 0; i < tdep->sc_num_regs; i++)
1389 if (tdep->sc_reg_offset[i] != -1)
1390 cache->saved_regs[i] = addr + tdep->sc_reg_offset[i];
1394 cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset;
1395 cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset;
1398 *this_cache = cache;
1403 i386_sigtramp_frame_this_id (struct frame_info *this_frame, void **this_cache,
1404 struct frame_id *this_id)
1406 struct i386_frame_cache *cache =
1407 i386_sigtramp_frame_cache (this_frame, this_cache);
1409 /* See the end of i386_push_dummy_call. */
1410 (*this_id) = frame_id_build (cache->base + 8, get_frame_pc (this_frame));
1413 static struct value *
1414 i386_sigtramp_frame_prev_register (struct frame_info *this_frame,
1415 void **this_cache, int regnum)
1417 /* Make sure we've initialized the cache. */
1418 i386_sigtramp_frame_cache (this_frame, this_cache);
1420 return i386_frame_prev_register (this_frame, this_cache, regnum);
1424 i386_sigtramp_frame_sniffer (const struct frame_unwind *self,
1425 struct frame_info *this_frame,
1426 void **this_prologue_cache)
1428 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
1430 /* We shouldn't even bother if we don't have a sigcontext_addr
1432 if (tdep->sigcontext_addr == NULL)
1435 if (tdep->sigtramp_p != NULL)
1437 if (tdep->sigtramp_p (this_frame))
1441 if (tdep->sigtramp_start != 0)
1443 CORE_ADDR pc = get_frame_pc (this_frame);
1445 gdb_assert (tdep->sigtramp_end != 0);
1446 if (pc >= tdep->sigtramp_start && pc < tdep->sigtramp_end)
1453 static const struct frame_unwind i386_sigtramp_frame_unwind =
1456 i386_sigtramp_frame_this_id,
1457 i386_sigtramp_frame_prev_register,
1459 i386_sigtramp_frame_sniffer
1464 i386_frame_base_address (struct frame_info *this_frame, void **this_cache)
1466 struct i386_frame_cache *cache = i386_frame_cache (this_frame, this_cache);
1471 static const struct frame_base i386_frame_base =
1474 i386_frame_base_address,
1475 i386_frame_base_address,
1476 i386_frame_base_address
1479 static struct frame_id
1480 i386_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1484 fp = get_frame_register_unsigned (this_frame, I386_EBP_REGNUM);
1486 /* See the end of i386_push_dummy_call. */
1487 return frame_id_build (fp + 8, get_frame_pc (this_frame));
1491 /* Figure out where the longjmp will land. Slurp the args out of the
1492 stack. We expect the first arg to be a pointer to the jmp_buf
1493 structure from which we extract the address that we will land at.
1494 This address is copied into PC. This routine returns non-zero on
1498 i386_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
1501 CORE_ADDR sp, jb_addr;
1502 struct gdbarch *gdbarch = get_frame_arch (frame);
1503 int jb_pc_offset = gdbarch_tdep (gdbarch)->jb_pc_offset;
1505 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1506 longjmp will land. */
1507 if (jb_pc_offset == -1)
1510 get_frame_register (frame, I386_ESP_REGNUM, buf);
1511 sp = extract_unsigned_integer (buf, 4);
1512 if (target_read_memory (sp + 4, buf, 4))
1515 jb_addr = extract_unsigned_integer (buf, 4);
1516 if (target_read_memory (jb_addr + jb_pc_offset, buf, 4))
1519 *pc = extract_unsigned_integer (buf, 4);
1524 /* Check whether TYPE must be 16-byte-aligned when passed as a
1525 function argument. 16-byte vectors, _Decimal128 and structures or
1526 unions containing such types must be 16-byte-aligned; other
1527 arguments are 4-byte-aligned. */
1530 i386_16_byte_align_p (struct type *type)
1532 type = check_typedef (type);
1533 if ((TYPE_CODE (type) == TYPE_CODE_DECFLOAT
1534 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)))
1535 && TYPE_LENGTH (type) == 16)
1537 if (TYPE_CODE (type) == TYPE_CODE_ARRAY)
1538 return i386_16_byte_align_p (TYPE_TARGET_TYPE (type));
1539 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
1540 || TYPE_CODE (type) == TYPE_CODE_UNION)
1543 for (i = 0; i < TYPE_NFIELDS (type); i++)
1545 if (i386_16_byte_align_p (TYPE_FIELD_TYPE (type, i)))
1553 i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1554 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
1555 struct value **args, CORE_ADDR sp, int struct_return,
1556 CORE_ADDR struct_addr)
1563 /* Determine the total space required for arguments and struct
1564 return address in a first pass (allowing for 16-byte-aligned
1565 arguments), then push arguments in a second pass. */
1567 for (write_pass = 0; write_pass < 2; write_pass++)
1569 int args_space_used = 0;
1570 int have_16_byte_aligned_arg = 0;
1576 /* Push value address. */
1577 store_unsigned_integer (buf, 4, struct_addr);
1578 write_memory (sp, buf, 4);
1579 args_space_used += 4;
1585 for (i = 0; i < nargs; i++)
1587 int len = TYPE_LENGTH (value_enclosing_type (args[i]));
1591 if (i386_16_byte_align_p (value_enclosing_type (args[i])))
1592 args_space_used = align_up (args_space_used, 16);
1594 write_memory (sp + args_space_used,
1595 value_contents_all (args[i]), len);
1596 /* The System V ABI says that:
1598 "An argument's size is increased, if necessary, to make it a
1599 multiple of [32-bit] words. This may require tail padding,
1600 depending on the size of the argument."
1602 This makes sure the stack stays word-aligned. */
1603 args_space_used += align_up (len, 4);
1607 if (i386_16_byte_align_p (value_enclosing_type (args[i])))
1609 args_space = align_up (args_space, 16);
1610 have_16_byte_aligned_arg = 1;
1612 args_space += align_up (len, 4);
1618 if (have_16_byte_aligned_arg)
1619 args_space = align_up (args_space, 16);
1624 /* Store return address. */
1626 store_unsigned_integer (buf, 4, bp_addr);
1627 write_memory (sp, buf, 4);
1629 /* Finally, update the stack pointer... */
1630 store_unsigned_integer (buf, 4, sp);
1631 regcache_cooked_write (regcache, I386_ESP_REGNUM, buf);
1633 /* ...and fake a frame pointer. */
1634 regcache_cooked_write (regcache, I386_EBP_REGNUM, buf);
1636 /* MarkK wrote: This "+ 8" is all over the place:
1637 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1638 i386_dummy_id). It's there, since all frame unwinders for
1639 a given target have to agree (within a certain margin) on the
1640 definition of the stack address of a frame. Otherwise
1641 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1642 stack address *before* the function call as a frame's CFA. On
1643 the i386, when %ebp is used as a frame pointer, the offset
1644 between the contents %ebp and the CFA as defined by GCC. */
1648 /* These registers are used for returning integers (and on some
1649 targets also for returning `struct' and `union' values when their
1650 size and alignment match an integer type). */
1651 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1652 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1654 /* Read, for architecture GDBARCH, a function return value of TYPE
1655 from REGCACHE, and copy that into VALBUF. */
1658 i386_extract_return_value (struct gdbarch *gdbarch, struct type *type,
1659 struct regcache *regcache, gdb_byte *valbuf)
1661 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1662 int len = TYPE_LENGTH (type);
1663 gdb_byte buf[I386_MAX_REGISTER_SIZE];
1665 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1667 if (tdep->st0_regnum < 0)
1669 warning (_("Cannot find floating-point return value."));
1670 memset (valbuf, 0, len);
1674 /* Floating-point return values can be found in %st(0). Convert
1675 its contents to the desired type. This is probably not
1676 exactly how it would happen on the target itself, but it is
1677 the best we can do. */
1678 regcache_raw_read (regcache, I386_ST0_REGNUM, buf);
1679 convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type);
1683 int low_size = register_size (gdbarch, LOW_RETURN_REGNUM);
1684 int high_size = register_size (gdbarch, HIGH_RETURN_REGNUM);
1686 if (len <= low_size)
1688 regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf);
1689 memcpy (valbuf, buf, len);
1691 else if (len <= (low_size + high_size))
1693 regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf);
1694 memcpy (valbuf, buf, low_size);
1695 regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf);
1696 memcpy (valbuf + low_size, buf, len - low_size);
1699 internal_error (__FILE__, __LINE__,
1700 _("Cannot extract return value of %d bytes long."), len);
1704 /* Write, for architecture GDBARCH, a function return value of TYPE
1705 from VALBUF into REGCACHE. */
1708 i386_store_return_value (struct gdbarch *gdbarch, struct type *type,
1709 struct regcache *regcache, const gdb_byte *valbuf)
1711 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1712 int len = TYPE_LENGTH (type);
1714 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1717 gdb_byte buf[I386_MAX_REGISTER_SIZE];
1719 if (tdep->st0_regnum < 0)
1721 warning (_("Cannot set floating-point return value."));
1725 /* Returning floating-point values is a bit tricky. Apart from
1726 storing the return value in %st(0), we have to simulate the
1727 state of the FPU at function return point. */
1729 /* Convert the value found in VALBUF to the extended
1730 floating-point format used by the FPU. This is probably
1731 not exactly how it would happen on the target itself, but
1732 it is the best we can do. */
1733 convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext);
1734 regcache_raw_write (regcache, I386_ST0_REGNUM, buf);
1736 /* Set the top of the floating-point register stack to 7. The
1737 actual value doesn't really matter, but 7 is what a normal
1738 function return would end up with if the program started out
1739 with a freshly initialized FPU. */
1740 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat);
1742 regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM (tdep), fstat);
1744 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1745 the floating-point register stack to 7, the appropriate value
1746 for the tag word is 0x3fff. */
1747 regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff);
1751 int low_size = register_size (gdbarch, LOW_RETURN_REGNUM);
1752 int high_size = register_size (gdbarch, HIGH_RETURN_REGNUM);
1754 if (len <= low_size)
1755 regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf);
1756 else if (len <= (low_size + high_size))
1758 regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf);
1759 regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0,
1760 len - low_size, valbuf + low_size);
1763 internal_error (__FILE__, __LINE__,
1764 _("Cannot store return value of %d bytes long."), len);
1769 /* This is the variable that is set with "set struct-convention", and
1770 its legitimate values. */
1771 static const char default_struct_convention[] = "default";
1772 static const char pcc_struct_convention[] = "pcc";
1773 static const char reg_struct_convention[] = "reg";
1774 static const char *valid_conventions[] =
1776 default_struct_convention,
1777 pcc_struct_convention,
1778 reg_struct_convention,
1781 static const char *struct_convention = default_struct_convention;
1783 /* Return non-zero if TYPE, which is assumed to be a structure,
1784 a union type, or an array type, should be returned in registers
1785 for architecture GDBARCH. */
1788 i386_reg_struct_return_p (struct gdbarch *gdbarch, struct type *type)
1790 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1791 enum type_code code = TYPE_CODE (type);
1792 int len = TYPE_LENGTH (type);
1794 gdb_assert (code == TYPE_CODE_STRUCT
1795 || code == TYPE_CODE_UNION
1796 || code == TYPE_CODE_ARRAY);
1798 if (struct_convention == pcc_struct_convention
1799 || (struct_convention == default_struct_convention
1800 && tdep->struct_return == pcc_struct_return))
1803 /* Structures consisting of a single `float', `double' or 'long
1804 double' member are returned in %st(0). */
1805 if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
1807 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1808 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1809 return (len == 4 || len == 8 || len == 12);
1812 return (len == 1 || len == 2 || len == 4 || len == 8);
1815 /* Determine, for architecture GDBARCH, how a return value of TYPE
1816 should be returned. If it is supposed to be returned in registers,
1817 and READBUF is non-zero, read the appropriate value from REGCACHE,
1818 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1819 from WRITEBUF into REGCACHE. */
1821 static enum return_value_convention
1822 i386_return_value (struct gdbarch *gdbarch, struct type *func_type,
1823 struct type *type, struct regcache *regcache,
1824 gdb_byte *readbuf, const gdb_byte *writebuf)
1826 enum type_code code = TYPE_CODE (type);
1828 if (((code == TYPE_CODE_STRUCT
1829 || code == TYPE_CODE_UNION
1830 || code == TYPE_CODE_ARRAY)
1831 && !i386_reg_struct_return_p (gdbarch, type))
1832 /* 128-bit decimal float uses the struct return convention. */
1833 || (code == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 16))
1835 /* The System V ABI says that:
1837 "A function that returns a structure or union also sets %eax
1838 to the value of the original address of the caller's area
1839 before it returns. Thus when the caller receives control
1840 again, the address of the returned object resides in register
1841 %eax and can be used to access the object."
1843 So the ABI guarantees that we can always find the return
1844 value just after the function has returned. */
1846 /* Note that the ABI doesn't mention functions returning arrays,
1847 which is something possible in certain languages such as Ada.
1848 In this case, the value is returned as if it was wrapped in
1849 a record, so the convention applied to records also applies
1856 regcache_raw_read_unsigned (regcache, I386_EAX_REGNUM, &addr);
1857 read_memory (addr, readbuf, TYPE_LENGTH (type));
1860 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
1863 /* This special case is for structures consisting of a single
1864 `float', `double' or 'long double' member. These structures are
1865 returned in %st(0). For these structures, we call ourselves
1866 recursively, changing TYPE into the type of the first member of
1867 the structure. Since that should work for all structures that
1868 have only one member, we don't bother to check the member's type
1870 if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
1872 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1873 return i386_return_value (gdbarch, func_type, type, regcache,
1878 i386_extract_return_value (gdbarch, type, regcache, readbuf);
1880 i386_store_return_value (gdbarch, type, regcache, writebuf);
1882 return RETURN_VALUE_REGISTER_CONVENTION;
1886 /* Type for %eflags. */
1887 struct type *i386_eflags_type;
1889 /* Type for %mxcsr. */
1890 struct type *i386_mxcsr_type;
1892 /* Construct types for ISA-specific registers. */
1894 i386_init_types (void)
1898 type = init_flags_type ("builtin_type_i386_eflags", 4);
1899 append_flags_type_flag (type, 0, "CF");
1900 append_flags_type_flag (type, 1, NULL);
1901 append_flags_type_flag (type, 2, "PF");
1902 append_flags_type_flag (type, 4, "AF");
1903 append_flags_type_flag (type, 6, "ZF");
1904 append_flags_type_flag (type, 7, "SF");
1905 append_flags_type_flag (type, 8, "TF");
1906 append_flags_type_flag (type, 9, "IF");
1907 append_flags_type_flag (type, 10, "DF");
1908 append_flags_type_flag (type, 11, "OF");
1909 append_flags_type_flag (type, 14, "NT");
1910 append_flags_type_flag (type, 16, "RF");
1911 append_flags_type_flag (type, 17, "VM");
1912 append_flags_type_flag (type, 18, "AC");
1913 append_flags_type_flag (type, 19, "VIF");
1914 append_flags_type_flag (type, 20, "VIP");
1915 append_flags_type_flag (type, 21, "ID");
1916 i386_eflags_type = type;
1918 type = init_flags_type ("builtin_type_i386_mxcsr", 4);
1919 append_flags_type_flag (type, 0, "IE");
1920 append_flags_type_flag (type, 1, "DE");
1921 append_flags_type_flag (type, 2, "ZE");
1922 append_flags_type_flag (type, 3, "OE");
1923 append_flags_type_flag (type, 4, "UE");
1924 append_flags_type_flag (type, 5, "PE");
1925 append_flags_type_flag (type, 6, "DAZ");
1926 append_flags_type_flag (type, 7, "IM");
1927 append_flags_type_flag (type, 8, "DM");
1928 append_flags_type_flag (type, 9, "ZM");
1929 append_flags_type_flag (type, 10, "OM");
1930 append_flags_type_flag (type, 11, "UM");
1931 append_flags_type_flag (type, 12, "PM");
1932 append_flags_type_flag (type, 15, "FZ");
1933 i386_mxcsr_type = type;
1936 /* Construct vector type for MMX registers. */
1938 i386_mmx_type (struct gdbarch *gdbarch)
1940 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1942 if (!tdep->i386_mmx_type)
1944 /* The type we're building is this: */
1946 union __gdb_builtin_type_vec64i
1949 int32_t v2_int32[2];
1950 int16_t v4_int16[4];
1957 t = init_composite_type ("__gdb_builtin_type_vec64i", TYPE_CODE_UNION);
1958 append_composite_type_field (t, "uint64", builtin_type_int64);
1959 append_composite_type_field (t, "v2_int32",
1960 init_vector_type (builtin_type_int32, 2));
1961 append_composite_type_field (t, "v4_int16",
1962 init_vector_type (builtin_type_int16, 4));
1963 append_composite_type_field (t, "v8_int8",
1964 init_vector_type (builtin_type_int8, 8));
1966 TYPE_FLAGS (t) |= TYPE_FLAG_VECTOR;
1967 TYPE_NAME (t) = "builtin_type_vec64i";
1968 tdep->i386_mmx_type = t;
1971 return tdep->i386_mmx_type;
1975 i386_sse_type (struct gdbarch *gdbarch)
1977 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1979 if (!tdep->i386_sse_type)
1981 /* The type we're building is this: */
1983 union __gdb_builtin_type_vec128i
1986 int64_t v2_int64[2];
1987 int32_t v4_int32[4];
1988 int16_t v8_int16[8];
1989 int8_t v16_int8[16];
1990 double v2_double[2];
1997 t = init_composite_type ("__gdb_builtin_type_vec128i", TYPE_CODE_UNION);
1998 append_composite_type_field (t, "v4_float",
1999 init_vector_type (builtin_type_float, 4));
2000 append_composite_type_field (t, "v2_double",
2001 init_vector_type (builtin_type_double, 2));
2002 append_composite_type_field (t, "v16_int8",
2003 init_vector_type (builtin_type_int8, 16));
2004 append_composite_type_field (t, "v8_int16",
2005 init_vector_type (builtin_type_int16, 8));
2006 append_composite_type_field (t, "v4_int32",
2007 init_vector_type (builtin_type_int32, 4));
2008 append_composite_type_field (t, "v2_int64",
2009 init_vector_type (builtin_type_int64, 2));
2010 append_composite_type_field (t, "uint128", builtin_type_int128);
2012 TYPE_FLAGS (t) |= TYPE_FLAG_VECTOR;
2013 TYPE_NAME (t) = "builtin_type_vec128i";
2014 tdep->i386_sse_type = t;
2017 return tdep->i386_sse_type;
2020 /* Return the GDB type object for the "standard" data type of data in
2021 register REGNUM. Perhaps %esi and %edi should go here, but
2022 potentially they could be used for things other than address. */
2024 static struct type *
2025 i386_register_type (struct gdbarch *gdbarch, int regnum)
2027 if (regnum == I386_EIP_REGNUM)
2028 return builtin_type_void_func_ptr;
2030 if (regnum == I386_EFLAGS_REGNUM)
2031 return i386_eflags_type;
2033 if (regnum == I386_EBP_REGNUM || regnum == I386_ESP_REGNUM)
2034 return builtin_type_void_data_ptr;
2036 if (i386_fp_regnum_p (gdbarch, regnum))
2037 return builtin_type_i387_ext;
2039 if (i386_mmx_regnum_p (gdbarch, regnum))
2040 return i386_mmx_type (gdbarch);
2042 if (i386_sse_regnum_p (gdbarch, regnum))
2043 return i386_sse_type (gdbarch);
2045 if (regnum == I387_MXCSR_REGNUM (gdbarch_tdep (gdbarch)))
2046 return i386_mxcsr_type;
2048 return builtin_type_int;
2051 /* Map a cooked register onto a raw register or memory. For the i386,
2052 the MMX registers need to be mapped onto floating point registers. */
2055 i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum)
2057 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
2062 mmxreg = regnum - tdep->mm0_regnum;
2063 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat);
2064 tos = (fstat >> 11) & 0x7;
2065 fpreg = (mmxreg + tos) % 8;
2067 return (I387_ST0_REGNUM (tdep) + fpreg);
2071 i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
2072 int regnum, gdb_byte *buf)
2074 if (i386_mmx_regnum_p (gdbarch, regnum))
2076 gdb_byte mmx_buf[MAX_REGISTER_SIZE];
2077 int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
2079 /* Extract (always little endian). */
2080 regcache_raw_read (regcache, fpnum, mmx_buf);
2081 memcpy (buf, mmx_buf, register_size (gdbarch, regnum));
2084 regcache_raw_read (regcache, regnum, buf);
2088 i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
2089 int regnum, const gdb_byte *buf)
2091 if (i386_mmx_regnum_p (gdbarch, regnum))
2093 gdb_byte mmx_buf[MAX_REGISTER_SIZE];
2094 int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
2097 regcache_raw_read (regcache, fpnum, mmx_buf);
2098 /* ... Modify ... (always little endian). */
2099 memcpy (mmx_buf, buf, register_size (gdbarch, regnum));
2101 regcache_raw_write (regcache, fpnum, mmx_buf);
2104 regcache_raw_write (regcache, regnum, buf);
2108 /* Return the register number of the register allocated by GCC after
2109 REGNUM, or -1 if there is no such register. */
2112 i386_next_regnum (int regnum)
2114 /* GCC allocates the registers in the order:
2116 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
2118 Since storing a variable in %esp doesn't make any sense we return
2119 -1 for %ebp and for %esp itself. */
2120 static int next_regnum[] =
2122 I386_EDX_REGNUM, /* Slot for %eax. */
2123 I386_EBX_REGNUM, /* Slot for %ecx. */
2124 I386_ECX_REGNUM, /* Slot for %edx. */
2125 I386_ESI_REGNUM, /* Slot for %ebx. */
2126 -1, -1, /* Slots for %esp and %ebp. */
2127 I386_EDI_REGNUM, /* Slot for %esi. */
2128 I386_EBP_REGNUM /* Slot for %edi. */
2131 if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0]))
2132 return next_regnum[regnum];
2137 /* Return nonzero if a value of type TYPE stored in register REGNUM
2138 needs any special handling. */
2141 i386_convert_register_p (struct gdbarch *gdbarch, int regnum, struct type *type)
2143 int len = TYPE_LENGTH (type);
2145 /* Values may be spread across multiple registers. Most debugging
2146 formats aren't expressive enough to specify the locations, so
2147 some heuristics is involved. Right now we only handle types that
2148 have a length that is a multiple of the word size, since GCC
2149 doesn't seem to put any other types into registers. */
2150 if (len > 4 && len % 4 == 0)
2152 int last_regnum = regnum;
2156 last_regnum = i386_next_regnum (last_regnum);
2160 if (last_regnum != -1)
2164 return i387_convert_register_p (gdbarch, regnum, type);
2167 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
2168 return its contents in TO. */
2171 i386_register_to_value (struct frame_info *frame, int regnum,
2172 struct type *type, gdb_byte *to)
2174 struct gdbarch *gdbarch = get_frame_arch (frame);
2175 int len = TYPE_LENGTH (type);
2177 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
2178 available in FRAME (i.e. if it wasn't saved)? */
2180 if (i386_fp_regnum_p (gdbarch, regnum))
2182 i387_register_to_value (frame, regnum, type, to);
2186 /* Read a value spread across multiple registers. */
2188 gdb_assert (len > 4 && len % 4 == 0);
2192 gdb_assert (regnum != -1);
2193 gdb_assert (register_size (gdbarch, regnum) == 4);
2195 get_frame_register (frame, regnum, to);
2196 regnum = i386_next_regnum (regnum);
2202 /* Write the contents FROM of a value of type TYPE into register
2203 REGNUM in frame FRAME. */
2206 i386_value_to_register (struct frame_info *frame, int regnum,
2207 struct type *type, const gdb_byte *from)
2209 int len = TYPE_LENGTH (type);
2211 if (i386_fp_regnum_p (get_frame_arch (frame), regnum))
2213 i387_value_to_register (frame, regnum, type, from);
2217 /* Write a value spread across multiple registers. */
2219 gdb_assert (len > 4 && len % 4 == 0);
2223 gdb_assert (regnum != -1);
2224 gdb_assert (register_size (get_frame_arch (frame), regnum) == 4);
2226 put_frame_register (frame, regnum, from);
2227 regnum = i386_next_regnum (regnum);
2233 /* Supply register REGNUM from the buffer specified by GREGS and LEN
2234 in the general-purpose register set REGSET to register cache
2235 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
2238 i386_supply_gregset (const struct regset *regset, struct regcache *regcache,
2239 int regnum, const void *gregs, size_t len)
2241 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
2242 const gdb_byte *regs = gregs;
2245 gdb_assert (len == tdep->sizeof_gregset);
2247 for (i = 0; i < tdep->gregset_num_regs; i++)
2249 if ((regnum == i || regnum == -1)
2250 && tdep->gregset_reg_offset[i] != -1)
2251 regcache_raw_supply (regcache, i, regs + tdep->gregset_reg_offset[i]);
2255 /* Collect register REGNUM from the register cache REGCACHE and store
2256 it in the buffer specified by GREGS and LEN as described by the
2257 general-purpose register set REGSET. If REGNUM is -1, do this for
2258 all registers in REGSET. */
2261 i386_collect_gregset (const struct regset *regset,
2262 const struct regcache *regcache,
2263 int regnum, void *gregs, size_t len)
2265 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
2266 gdb_byte *regs = gregs;
2269 gdb_assert (len == tdep->sizeof_gregset);
2271 for (i = 0; i < tdep->gregset_num_regs; i++)
2273 if ((regnum == i || regnum == -1)
2274 && tdep->gregset_reg_offset[i] != -1)
2275 regcache_raw_collect (regcache, i, regs + tdep->gregset_reg_offset[i]);
2279 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
2280 in the floating-point register set REGSET to register cache
2281 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
2284 i386_supply_fpregset (const struct regset *regset, struct regcache *regcache,
2285 int regnum, const void *fpregs, size_t len)
2287 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
2289 if (len == I387_SIZEOF_FXSAVE)
2291 i387_supply_fxsave (regcache, regnum, fpregs);
2295 gdb_assert (len == tdep->sizeof_fpregset);
2296 i387_supply_fsave (regcache, regnum, fpregs);
2299 /* Collect register REGNUM from the register cache REGCACHE and store
2300 it in the buffer specified by FPREGS and LEN as described by the
2301 floating-point register set REGSET. If REGNUM is -1, do this for
2302 all registers in REGSET. */
2305 i386_collect_fpregset (const struct regset *regset,
2306 const struct regcache *regcache,
2307 int regnum, void *fpregs, size_t len)
2309 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
2311 if (len == I387_SIZEOF_FXSAVE)
2313 i387_collect_fxsave (regcache, regnum, fpregs);
2317 gdb_assert (len == tdep->sizeof_fpregset);
2318 i387_collect_fsave (regcache, regnum, fpregs);
2321 /* Return the appropriate register set for the core section identified
2322 by SECT_NAME and SECT_SIZE. */
2324 const struct regset *
2325 i386_regset_from_core_section (struct gdbarch *gdbarch,
2326 const char *sect_name, size_t sect_size)
2328 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2330 if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset)
2332 if (tdep->gregset == NULL)
2333 tdep->gregset = regset_alloc (gdbarch, i386_supply_gregset,
2334 i386_collect_gregset);
2335 return tdep->gregset;
2338 if ((strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset)
2339 || (strcmp (sect_name, ".reg-xfp") == 0
2340 && sect_size == I387_SIZEOF_FXSAVE))
2342 if (tdep->fpregset == NULL)
2343 tdep->fpregset = regset_alloc (gdbarch, i386_supply_fpregset,
2344 i386_collect_fpregset);
2345 return tdep->fpregset;
2352 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
2355 i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name)
2357 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
2359 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
2360 struct minimal_symbol *indsym =
2361 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
2362 char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0;
2366 if (strncmp (symname, "__imp_", 6) == 0
2367 || strncmp (symname, "_imp_", 5) == 0)
2368 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
2371 return 0; /* Not a trampoline. */
2375 /* Return whether the THIS_FRAME corresponds to a sigtramp
2379 i386_sigtramp_p (struct frame_info *this_frame)
2381 CORE_ADDR pc = get_frame_pc (this_frame);
2384 find_pc_partial_function (pc, &name, NULL, NULL);
2385 return (name && strcmp ("_sigtramp", name) == 0);
2389 /* We have two flavours of disassembly. The machinery on this page
2390 deals with switching between those. */
2393 i386_print_insn (bfd_vma pc, struct disassemble_info *info)
2395 gdb_assert (disassembly_flavor == att_flavor
2396 || disassembly_flavor == intel_flavor);
2398 /* FIXME: kettenis/20020915: Until disassembler_options is properly
2399 constified, cast to prevent a compiler warning. */
2400 info->disassembler_options = (char *) disassembly_flavor;
2402 return print_insn_i386 (pc, info);
2406 /* There are a few i386 architecture variants that differ only
2407 slightly from the generic i386 target. For now, we don't give them
2408 their own source file, but include them here. As a consequence,
2409 they'll always be included. */
2411 /* System V Release 4 (SVR4). */
2413 /* Return whether THIS_FRAME corresponds to a SVR4 sigtramp
2417 i386_svr4_sigtramp_p (struct frame_info *this_frame)
2419 CORE_ADDR pc = get_frame_pc (this_frame);
2422 /* UnixWare uses _sigacthandler. The origin of the other symbols is
2423 currently unknown. */
2424 find_pc_partial_function (pc, &name, NULL, NULL);
2425 return (name && (strcmp ("_sigreturn", name) == 0
2426 || strcmp ("_sigacthandler", name) == 0
2427 || strcmp ("sigvechandler", name) == 0));
2430 /* Assuming THIS_FRAME is for a SVR4 sigtramp routine, return the
2431 address of the associated sigcontext (ucontext) structure. */
2434 i386_svr4_sigcontext_addr (struct frame_info *this_frame)
2439 get_frame_register (this_frame, I386_ESP_REGNUM, buf);
2440 sp = extract_unsigned_integer (buf, 4);
2442 return read_memory_unsigned_integer (sp + 8, 4);
2449 i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
2451 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
2452 set_gdbarch_stab_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
2455 /* System V Release 4 (SVR4). */
2458 i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
2460 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2462 /* System V Release 4 uses ELF. */
2463 i386_elf_init_abi (info, gdbarch);
2465 /* System V Release 4 has shared libraries. */
2466 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
2468 tdep->sigtramp_p = i386_svr4_sigtramp_p;
2469 tdep->sigcontext_addr = i386_svr4_sigcontext_addr;
2470 tdep->sc_pc_offset = 36 + 14 * 4;
2471 tdep->sc_sp_offset = 36 + 17 * 4;
2473 tdep->jb_pc_offset = 20;
2479 i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
2481 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2483 /* DJGPP doesn't have any special frames for signal handlers. */
2484 tdep->sigtramp_p = NULL;
2486 tdep->jb_pc_offset = 36;
2490 /* i386 register groups. In addition to the normal groups, add "mmx"
2493 static struct reggroup *i386_sse_reggroup;
2494 static struct reggroup *i386_mmx_reggroup;
2497 i386_init_reggroups (void)
2499 i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP);
2500 i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP);
2504 i386_add_reggroups (struct gdbarch *gdbarch)
2506 reggroup_add (gdbarch, i386_sse_reggroup);
2507 reggroup_add (gdbarch, i386_mmx_reggroup);
2508 reggroup_add (gdbarch, general_reggroup);
2509 reggroup_add (gdbarch, float_reggroup);
2510 reggroup_add (gdbarch, all_reggroup);
2511 reggroup_add (gdbarch, save_reggroup);
2512 reggroup_add (gdbarch, restore_reggroup);
2513 reggroup_add (gdbarch, vector_reggroup);
2514 reggroup_add (gdbarch, system_reggroup);
2518 i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
2519 struct reggroup *group)
2521 int sse_regnum_p = (i386_sse_regnum_p (gdbarch, regnum)
2522 || i386_mxcsr_regnum_p (gdbarch, regnum));
2523 int fp_regnum_p = (i386_fp_regnum_p (gdbarch, regnum)
2524 || i386_fpc_regnum_p (gdbarch, regnum));
2525 int mmx_regnum_p = (i386_mmx_regnum_p (gdbarch, regnum));
2527 if (group == i386_mmx_reggroup)
2528 return mmx_regnum_p;
2529 if (group == i386_sse_reggroup)
2530 return sse_regnum_p;
2531 if (group == vector_reggroup)
2532 return (mmx_regnum_p || sse_regnum_p);
2533 if (group == float_reggroup)
2535 if (group == general_reggroup)
2536 return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p);
2538 return default_register_reggroup_p (gdbarch, regnum, group);
2542 /* Get the ARGIth function argument for the current function. */
2545 i386_fetch_pointer_argument (struct frame_info *frame, int argi,
2548 CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM);
2549 return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4);
2553 static struct gdbarch *
2554 i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2556 struct gdbarch_tdep *tdep;
2557 struct gdbarch *gdbarch;
2559 /* If there is already a candidate, use it. */
2560 arches = gdbarch_list_lookup_by_info (arches, &info);
2562 return arches->gdbarch;
2564 /* Allocate space for the new architecture. */
2565 tdep = XCALLOC (1, struct gdbarch_tdep);
2566 gdbarch = gdbarch_alloc (&info, tdep);
2568 /* General-purpose registers. */
2569 tdep->gregset = NULL;
2570 tdep->gregset_reg_offset = NULL;
2571 tdep->gregset_num_regs = I386_NUM_GREGS;
2572 tdep->sizeof_gregset = 0;
2574 /* Floating-point registers. */
2575 tdep->fpregset = NULL;
2576 tdep->sizeof_fpregset = I387_SIZEOF_FSAVE;
2578 /* The default settings include the FPU registers, the MMX registers
2579 and the SSE registers. This can be overridden for a specific ABI
2580 by adjusting the members `st0_regnum', `mm0_regnum' and
2581 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
2582 will show up in the output of "info all-registers". Ideally we
2583 should try to autodetect whether they are available, such that we
2584 can prevent "info all-registers" from displaying registers that
2587 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
2588 [the SSE registers] always (even when they don't exist) or never
2589 showing them to the user (even when they do exist), I prefer the
2590 former over the latter. */
2592 tdep->st0_regnum = I386_ST0_REGNUM;
2594 /* The MMX registers are implemented as pseudo-registers. Put off
2595 calculating the register number for %mm0 until we know the number
2596 of raw registers. */
2597 tdep->mm0_regnum = 0;
2599 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
2600 tdep->num_xmm_regs = I386_NUM_XREGS - 1;
2602 tdep->jb_pc_offset = -1;
2603 tdep->struct_return = pcc_struct_return;
2604 tdep->sigtramp_start = 0;
2605 tdep->sigtramp_end = 0;
2606 tdep->sigtramp_p = i386_sigtramp_p;
2607 tdep->sigcontext_addr = NULL;
2608 tdep->sc_reg_offset = NULL;
2609 tdep->sc_pc_offset = -1;
2610 tdep->sc_sp_offset = -1;
2612 /* The format used for `long double' on almost all i386 targets is
2613 the i387 extended floating-point format. In fact, of all targets
2614 in the GCC 2.95 tree, only OSF/1 does it different, and insists
2615 on having a `long double' that's not `long' at all. */
2616 set_gdbarch_long_double_format (gdbarch, floatformats_i387_ext);
2618 /* Although the i387 extended floating-point has only 80 significant
2619 bits, a `long double' actually takes up 96, probably to enforce
2621 set_gdbarch_long_double_bit (gdbarch, 96);
2623 /* The default ABI includes general-purpose registers,
2624 floating-point registers, and the SSE registers. */
2625 set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS);
2626 set_gdbarch_register_name (gdbarch, i386_register_name);
2627 set_gdbarch_register_type (gdbarch, i386_register_type);
2629 /* Register numbers of various important registers. */
2630 set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */
2631 set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */
2632 set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */
2633 set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */
2635 /* NOTE: kettenis/20040418: GCC does have two possible register
2636 numbering schemes on the i386: dbx and SVR4. These schemes
2637 differ in how they number %ebp, %esp, %eflags, and the
2638 floating-point registers, and are implemented by the arrays
2639 dbx_register_map[] and svr4_dbx_register_map in
2640 gcc/config/i386.c. GCC also defines a third numbering scheme in
2641 gcc/config/i386.c, which it designates as the "default" register
2642 map used in 64bit mode. This last register numbering scheme is
2643 implemented in dbx64_register_map, and is used for AMD64; see
2646 Currently, each GCC i386 target always uses the same register
2647 numbering scheme across all its supported debugging formats
2648 i.e. SDB (COFF), stabs and DWARF 2. This is because
2649 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
2650 DBX_REGISTER_NUMBER macro which is defined by each target's
2651 respective config header in a manner independent of the requested
2652 output debugging format.
2654 This does not match the arrangement below, which presumes that
2655 the SDB and stabs numbering schemes differ from the DWARF and
2656 DWARF 2 ones. The reason for this arrangement is that it is
2657 likely to get the numbering scheme for the target's
2658 default/native debug format right. For targets where GCC is the
2659 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
2660 targets where the native toolchain uses a different numbering
2661 scheme for a particular debug format (stabs-in-ELF on Solaris)
2662 the defaults below will have to be overridden, like
2663 i386_elf_init_abi() does. */
2665 /* Use the dbx register numbering scheme for stabs and COFF. */
2666 set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dbx_reg_to_regnum);
2667 set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_dbx_reg_to_regnum);
2669 /* Use the SVR4 register numbering scheme for DWARF 2. */
2670 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
2672 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
2673 be in use on any of the supported i386 targets. */
2675 set_gdbarch_print_float_info (gdbarch, i387_print_float_info);
2677 set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target);
2679 /* Call dummy code. */
2680 set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call);
2682 set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p);
2683 set_gdbarch_register_to_value (gdbarch, i386_register_to_value);
2684 set_gdbarch_value_to_register (gdbarch, i386_value_to_register);
2686 set_gdbarch_return_value (gdbarch, i386_return_value);
2688 set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue);
2690 /* Stack grows downward. */
2691 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2693 set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc);
2694 set_gdbarch_decr_pc_after_break (gdbarch, 1);
2695 set_gdbarch_max_insn_length (gdbarch, I386_MAX_INSN_LEN);
2697 set_gdbarch_frame_args_skip (gdbarch, 8);
2699 /* Wire in the MMX registers. */
2700 set_gdbarch_num_pseudo_regs (gdbarch, i386_num_mmx_regs);
2701 set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read);
2702 set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write);
2704 set_gdbarch_print_insn (gdbarch, i386_print_insn);
2706 set_gdbarch_dummy_id (gdbarch, i386_dummy_id);
2708 set_gdbarch_unwind_pc (gdbarch, i386_unwind_pc);
2710 /* Add the i386 register groups. */
2711 i386_add_reggroups (gdbarch);
2712 set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p);
2714 /* Helper for function argument information. */
2715 set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument);
2717 /* Hook in the DWARF CFI frame unwinder. */
2718 dwarf2_append_unwinders (gdbarch);
2720 frame_base_set_default (gdbarch, &i386_frame_base);
2722 /* Hook in ABI-specific overrides, if they have been registered. */
2723 gdbarch_init_osabi (info, gdbarch);
2725 frame_unwind_append_unwinder (gdbarch, &i386_sigtramp_frame_unwind);
2726 frame_unwind_append_unwinder (gdbarch, &i386_frame_unwind);
2728 /* If we have a register mapping, enable the generic core file
2729 support, unless it has already been enabled. */
2730 if (tdep->gregset_reg_offset
2731 && !gdbarch_regset_from_core_section_p (gdbarch))
2732 set_gdbarch_regset_from_core_section (gdbarch,
2733 i386_regset_from_core_section);
2735 /* Unless support for MMX has been disabled, make %mm0 the first
2737 if (tdep->mm0_regnum == 0)
2738 tdep->mm0_regnum = gdbarch_num_regs (gdbarch);
2743 static enum gdb_osabi
2744 i386_coff_osabi_sniffer (bfd *abfd)
2746 if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0
2747 || strcmp (bfd_get_target (abfd), "coff-go32") == 0)
2748 return GDB_OSABI_GO32;
2750 return GDB_OSABI_UNKNOWN;
2754 /* Provide a prototype to silence -Wmissing-prototypes. */
2755 void _initialize_i386_tdep (void);
2758 _initialize_i386_tdep (void)
2760 register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init);
2762 /* Add the variable that controls the disassembly flavor. */
2763 add_setshow_enum_cmd ("disassembly-flavor", no_class, valid_flavors,
2764 &disassembly_flavor, _("\
2765 Set the disassembly flavor."), _("\
2766 Show the disassembly flavor."), _("\
2767 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
2769 NULL, /* FIXME: i18n: */
2770 &setlist, &showlist);
2772 /* Add the variable that controls the convention for returning
2774 add_setshow_enum_cmd ("struct-convention", no_class, valid_conventions,
2775 &struct_convention, _("\
2776 Set the convention for returning small structs."), _("\
2777 Show the convention for returning small structs."), _("\
2778 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
2781 NULL, /* FIXME: i18n: */
2782 &setlist, &showlist);
2784 gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour,
2785 i386_coff_osabi_sniffer);
2787 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4,
2788 i386_svr4_init_abi);
2789 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32,
2790 i386_go32_init_abi);
2792 /* Initialize the i386-specific register groups & types. */
2793 i386_init_reggroups ();