1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
4 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street, Fifth Floor,
22 Boston, MA 02110-1301, USA. */
25 #include "arch-utils.h"
27 #include "dummy-frame.h"
28 #include "dwarf2-frame.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
40 #include "reggroups.h"
48 #include "gdb_assert.h"
49 #include "gdb_string.h"
51 #include "i386-tdep.h"
52 #include "i387-tdep.h"
56 static char *i386_register_names[] =
58 "eax", "ecx", "edx", "ebx",
59 "esp", "ebp", "esi", "edi",
60 "eip", "eflags", "cs", "ss",
61 "ds", "es", "fs", "gs",
62 "st0", "st1", "st2", "st3",
63 "st4", "st5", "st6", "st7",
64 "fctrl", "fstat", "ftag", "fiseg",
65 "fioff", "foseg", "fooff", "fop",
66 "xmm0", "xmm1", "xmm2", "xmm3",
67 "xmm4", "xmm5", "xmm6", "xmm7",
71 static const int i386_num_register_names = ARRAY_SIZE (i386_register_names);
73 /* Register names for MMX pseudo-registers. */
75 static char *i386_mmx_names[] =
77 "mm0", "mm1", "mm2", "mm3",
78 "mm4", "mm5", "mm6", "mm7"
81 static const int i386_num_mmx_regs = ARRAY_SIZE (i386_mmx_names);
84 i386_mmx_regnum_p (struct gdbarch *gdbarch, int regnum)
86 int mm0_regnum = gdbarch_tdep (gdbarch)->mm0_regnum;
91 return (regnum >= mm0_regnum && regnum < mm0_regnum + i386_num_mmx_regs);
97 i386_sse_regnum_p (struct gdbarch *gdbarch, int regnum)
99 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
101 #define I387_ST0_REGNUM tdep->st0_regnum
102 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
104 if (I387_NUM_XMM_REGS == 0)
107 return (I387_XMM0_REGNUM <= regnum && regnum < I387_MXCSR_REGNUM);
109 #undef I387_ST0_REGNUM
110 #undef I387_NUM_XMM_REGS
114 i386_mxcsr_regnum_p (struct gdbarch *gdbarch, int regnum)
116 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
118 #define I387_ST0_REGNUM tdep->st0_regnum
119 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
121 if (I387_NUM_XMM_REGS == 0)
124 return (regnum == I387_MXCSR_REGNUM);
126 #undef I387_ST0_REGNUM
127 #undef I387_NUM_XMM_REGS
130 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
131 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
132 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
137 i386_fp_regnum_p (int regnum)
139 if (I387_ST0_REGNUM < 0)
142 return (I387_ST0_REGNUM <= regnum && regnum < I387_FCTRL_REGNUM);
146 i386_fpc_regnum_p (int regnum)
148 if (I387_ST0_REGNUM < 0)
151 return (I387_FCTRL_REGNUM <= regnum && regnum < I387_XMM0_REGNUM);
154 /* Return the name of register REGNUM. */
157 i386_register_name (int regnum)
159 if (i386_mmx_regnum_p (current_gdbarch, regnum))
160 return i386_mmx_names[regnum - I387_MM0_REGNUM];
162 if (regnum >= 0 && regnum < i386_num_register_names)
163 return i386_register_names[regnum];
168 /* Convert a dbx register number REG to the appropriate register
169 number used by GDB. */
172 i386_dbx_reg_to_regnum (int reg)
174 /* This implements what GCC calls the "default" register map
175 (dbx_register_map[]). */
177 if (reg >= 0 && reg <= 7)
179 /* General-purpose registers. The debug info calls %ebp
180 register 4, and %esp register 5. */
187 else if (reg >= 12 && reg <= 19)
189 /* Floating-point registers. */
190 return reg - 12 + I387_ST0_REGNUM;
192 else if (reg >= 21 && reg <= 28)
195 return reg - 21 + I387_XMM0_REGNUM;
197 else if (reg >= 29 && reg <= 36)
200 return reg - 29 + I387_MM0_REGNUM;
203 /* This will hopefully provoke a warning. */
204 return gdbarch_num_regs (current_gdbarch)
205 + gdbarch_num_pseudo_regs (current_gdbarch);
208 /* Convert SVR4 register number REG to the appropriate register number
212 i386_svr4_reg_to_regnum (int reg)
214 /* This implements the GCC register map that tries to be compatible
215 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
217 /* The SVR4 register numbering includes %eip and %eflags, and
218 numbers the floating point registers differently. */
219 if (reg >= 0 && reg <= 9)
221 /* General-purpose registers. */
224 else if (reg >= 11 && reg <= 18)
226 /* Floating-point registers. */
227 return reg - 11 + I387_ST0_REGNUM;
229 else if (reg >= 21 && reg <= 36)
231 /* The SSE and MMX registers have the same numbers as with dbx. */
232 return i386_dbx_reg_to_regnum (reg);
237 case 37: return I387_FCTRL_REGNUM;
238 case 38: return I387_FSTAT_REGNUM;
239 case 39: return I387_MXCSR_REGNUM;
240 case 40: return I386_ES_REGNUM;
241 case 41: return I386_CS_REGNUM;
242 case 42: return I386_SS_REGNUM;
243 case 43: return I386_DS_REGNUM;
244 case 44: return I386_FS_REGNUM;
245 case 45: return I386_GS_REGNUM;
248 /* This will hopefully provoke a warning. */
249 return gdbarch_num_regs (current_gdbarch)
250 + gdbarch_num_pseudo_regs (current_gdbarch);
253 #undef I387_ST0_REGNUM
254 #undef I387_MM0_REGNUM
255 #undef I387_NUM_XMM_REGS
258 /* This is the variable that is set with "set disassembly-flavor", and
259 its legitimate values. */
260 static const char att_flavor[] = "att";
261 static const char intel_flavor[] = "intel";
262 static const char *valid_flavors[] =
268 static const char *disassembly_flavor = att_flavor;
271 /* Use the program counter to determine the contents and size of a
272 breakpoint instruction. Return a pointer to a string of bytes that
273 encode a breakpoint instruction, store the length of the string in
274 *LEN and optionally adjust *PC to point to the correct memory
275 location for inserting the breakpoint.
277 On the i386 we have a single breakpoint that fits in a single byte
278 and can be inserted anywhere.
280 This function is 64-bit safe. */
282 static const gdb_byte *
283 i386_breakpoint_from_pc (CORE_ADDR *pc, int *len)
285 static gdb_byte break_insn[] = { 0xcc }; /* int 3 */
287 *len = sizeof (break_insn);
291 #ifdef I386_REGNO_TO_SYMMETRY
292 #error "The Sequent Symmetry is no longer supported."
295 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
296 and %esp "belong" to the calling function. Therefore these
297 registers should be saved if they're going to be modified. */
299 /* The maximum number of saved registers. This should include all
300 registers mentioned above, and %eip. */
301 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
303 struct i386_frame_cache
310 /* Saved registers. */
311 CORE_ADDR saved_regs[I386_NUM_SAVED_REGS];
316 /* Stack space reserved for local variables. */
320 /* Allocate and initialize a frame cache. */
322 static struct i386_frame_cache *
323 i386_alloc_frame_cache (void)
325 struct i386_frame_cache *cache;
328 cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache);
332 cache->sp_offset = -4;
335 /* Saved registers. We initialize these to -1 since zero is a valid
336 offset (that's where %ebp is supposed to be stored). */
337 for (i = 0; i < I386_NUM_SAVED_REGS; i++)
338 cache->saved_regs[i] = -1;
340 cache->stack_align = 0;
341 cache->pc_in_eax = 0;
343 /* Frameless until proven otherwise. */
349 /* If the instruction at PC is a jump, return the address of its
350 target. Otherwise, return PC. */
353 i386_follow_jump (CORE_ADDR pc)
359 read_memory_nobpt (pc, &op, 1);
363 op = read_memory_unsigned_integer (pc + 1, 1);
369 /* Relative jump: if data16 == 0, disp32, else disp16. */
372 delta = read_memory_integer (pc + 2, 2);
374 /* Include the size of the jmp instruction (including the
380 delta = read_memory_integer (pc + 1, 4);
382 /* Include the size of the jmp instruction. */
387 /* Relative jump, disp8 (ignore data16). */
388 delta = read_memory_integer (pc + data16 + 1, 1);
397 /* Check whether PC points at a prologue for a function returning a
398 structure or union. If so, it updates CACHE and returns the
399 address of the first instruction after the code sequence that
400 removes the "hidden" argument from the stack or CURRENT_PC,
401 whichever is smaller. Otherwise, return PC. */
404 i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc,
405 struct i386_frame_cache *cache)
407 /* Functions that return a structure or union start with:
410 xchgl %eax, (%esp) 0x87 0x04 0x24
411 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
413 (the System V compiler puts out the second `xchg' instruction,
414 and the assembler doesn't try to optimize it, so the 'sib' form
415 gets generated). This sequence is used to get the address of the
416 return buffer for a function that returns a structure. */
417 static gdb_byte proto1[3] = { 0x87, 0x04, 0x24 };
418 static gdb_byte proto2[4] = { 0x87, 0x44, 0x24, 0x00 };
422 if (current_pc <= pc)
425 read_memory_nobpt (pc, &op, 1);
427 if (op != 0x58) /* popl %eax */
430 read_memory_nobpt (pc + 1, buf, 4);
431 if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0)
434 if (current_pc == pc)
436 cache->sp_offset += 4;
440 if (current_pc == pc + 1)
442 cache->pc_in_eax = 1;
446 if (buf[1] == proto1[1])
453 i386_skip_probe (CORE_ADDR pc)
455 /* A function may start with
469 read_memory_nobpt (pc, &op, 1);
471 if (op == 0x68 || op == 0x6a)
475 /* Skip past the `pushl' instruction; it has either a one-byte or a
476 four-byte operand, depending on the opcode. */
482 /* Read the following 8 bytes, which should be `call _probe' (6
483 bytes) followed by `addl $4,%esp' (2 bytes). */
484 read_memory (pc + delta, buf, sizeof (buf));
485 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
486 pc += delta + sizeof (buf);
492 /* GCC 4.1 and later, can put code in the prologue to realign the
493 stack pointer. Check whether PC points to such code, and update
494 CACHE accordingly. Return the first instruction after the code
495 sequence or CURRENT_PC, whichever is smaller. If we don't
496 recognize the code, return PC. */
499 i386_analyze_stack_align (CORE_ADDR pc, CORE_ADDR current_pc,
500 struct i386_frame_cache *cache)
502 /* The register used by the compiler to perform the stack re-alignment
503 is, in order of preference, either %ecx, %edx, or %eax. GCC should
504 never use %ebx as it always treats it as callee-saved, whereas
505 the compiler can only use caller-saved registers. */
506 static const gdb_byte insns_ecx[10] = {
507 0x8d, 0x4c, 0x24, 0x04, /* leal 4(%esp), %ecx */
508 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
509 0xff, 0x71, 0xfc /* pushl -4(%ecx) */
511 static const gdb_byte insns_edx[10] = {
512 0x8d, 0x54, 0x24, 0x04, /* leal 4(%esp), %edx */
513 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
514 0xff, 0x72, 0xfc /* pushl -4(%edx) */
516 static const gdb_byte insns_eax[10] = {
517 0x8d, 0x44, 0x24, 0x04, /* leal 4(%esp), %eax */
518 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
519 0xff, 0x70, 0xfc /* pushl -4(%eax) */
523 if (target_read_memory (pc, buf, sizeof buf)
524 || (memcmp (buf, insns_ecx, sizeof buf) != 0
525 && memcmp (buf, insns_edx, sizeof buf) != 0
526 && memcmp (buf, insns_eax, sizeof buf) != 0))
529 if (current_pc > pc + 4)
530 cache->stack_align = 1;
532 return min (pc + 10, current_pc);
535 /* Maximum instruction length we need to handle. */
536 #define I386_MAX_INSN_LEN 6
538 /* Instruction description. */
542 gdb_byte insn[I386_MAX_INSN_LEN];
543 gdb_byte mask[I386_MAX_INSN_LEN];
546 /* Search for the instruction at PC in the list SKIP_INSNS. Return
547 the first instruction description that matches. Otherwise, return
550 static struct i386_insn *
551 i386_match_insn (CORE_ADDR pc, struct i386_insn *skip_insns)
553 struct i386_insn *insn;
556 read_memory_nobpt (pc, &op, 1);
558 for (insn = skip_insns; insn->len > 0; insn++)
560 if ((op & insn->mask[0]) == insn->insn[0])
562 gdb_byte buf[I386_MAX_INSN_LEN - 1];
563 int insn_matched = 1;
566 gdb_assert (insn->len > 1);
567 gdb_assert (insn->len <= I386_MAX_INSN_LEN);
569 read_memory_nobpt (pc + 1, buf, insn->len - 1);
570 for (i = 1; i < insn->len; i++)
572 if ((buf[i - 1] & insn->mask[i]) != insn->insn[i])
584 /* Some special instructions that might be migrated by GCC into the
585 part of the prologue that sets up the new stack frame. Because the
586 stack frame hasn't been setup yet, no registers have been saved
587 yet, and only the scratch registers %eax, %ecx and %edx can be
590 struct i386_insn i386_frame_setup_skip_insns[] =
592 /* Check for `movb imm8, r' and `movl imm32, r'.
594 ??? Should we handle 16-bit operand-sizes here? */
596 /* `movb imm8, %al' and `movb imm8, %ah' */
597 /* `movb imm8, %cl' and `movb imm8, %ch' */
598 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
599 /* `movb imm8, %dl' and `movb imm8, %dh' */
600 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
601 /* `movl imm32, %eax' and `movl imm32, %ecx' */
602 { 5, { 0xb8 }, { 0xfe } },
603 /* `movl imm32, %edx' */
604 { 5, { 0xba }, { 0xff } },
606 /* Check for `mov imm32, r32'. Note that there is an alternative
607 encoding for `mov m32, %eax'.
609 ??? Should we handle SIB adressing here?
610 ??? Should we handle 16-bit operand-sizes here? */
612 /* `movl m32, %eax' */
613 { 5, { 0xa1 }, { 0xff } },
614 /* `movl m32, %eax' and `mov; m32, %ecx' */
615 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
616 /* `movl m32, %edx' */
617 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
619 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
620 Because of the symmetry, there are actually two ways to encode
621 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
622 opcode bytes 0x31 and 0x33 for `xorl'. */
624 /* `subl %eax, %eax' */
625 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
626 /* `subl %ecx, %ecx' */
627 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
628 /* `subl %edx, %edx' */
629 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
630 /* `xorl %eax, %eax' */
631 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
632 /* `xorl %ecx, %ecx' */
633 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
634 /* `xorl %edx, %edx' */
635 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
639 /* Check whether PC points at a code that sets up a new stack frame.
640 If so, it updates CACHE and returns the address of the first
641 instruction after the sequence that sets up the frame or LIMIT,
642 whichever is smaller. If we don't recognize the code, return PC. */
645 i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR limit,
646 struct i386_frame_cache *cache)
648 struct i386_insn *insn;
655 read_memory_nobpt (pc, &op, 1);
657 if (op == 0x55) /* pushl %ebp */
659 /* Take into account that we've executed the `pushl %ebp' that
660 starts this instruction sequence. */
661 cache->saved_regs[I386_EBP_REGNUM] = 0;
662 cache->sp_offset += 4;
665 /* If that's all, return now. */
669 /* Check for some special instructions that might be migrated by
670 GCC into the prologue and skip them. At this point in the
671 prologue, code should only touch the scratch registers %eax,
672 %ecx and %edx, so while the number of posibilities is sheer,
675 Make sure we only skip these instructions if we later see the
676 `movl %esp, %ebp' that actually sets up the frame. */
677 while (pc + skip < limit)
679 insn = i386_match_insn (pc + skip, i386_frame_setup_skip_insns);
686 /* If that's all, return now. */
687 if (limit <= pc + skip)
690 read_memory_nobpt (pc + skip, &op, 1);
692 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
696 if (read_memory_unsigned_integer (pc + skip + 1, 1) != 0xec)
700 if (read_memory_unsigned_integer (pc + skip + 1, 1) != 0xe5)
707 /* OK, we actually have a frame. We just don't know how large
708 it is yet. Set its size to zero. We'll adjust it if
709 necessary. We also now commit to skipping the special
710 instructions mentioned before. */
714 /* If that's all, return now. */
718 /* Check for stack adjustment
722 NOTE: You can't subtract a 16-bit immediate from a 32-bit
723 reg, so we don't have to worry about a data16 prefix. */
724 read_memory_nobpt (pc, &op, 1);
727 /* `subl' with 8-bit immediate. */
728 if (read_memory_unsigned_integer (pc + 1, 1) != 0xec)
729 /* Some instruction starting with 0x83 other than `subl'. */
732 /* `subl' with signed 8-bit immediate (though it wouldn't
733 make sense to be negative). */
734 cache->locals = read_memory_integer (pc + 2, 1);
739 /* Maybe it is `subl' with a 32-bit immediate. */
740 if (read_memory_unsigned_integer (pc + 1, 1) != 0xec)
741 /* Some instruction starting with 0x81 other than `subl'. */
744 /* It is `subl' with a 32-bit immediate. */
745 cache->locals = read_memory_integer (pc + 2, 4);
750 /* Some instruction other than `subl'. */
754 else if (op == 0xc8) /* enter */
756 cache->locals = read_memory_unsigned_integer (pc + 1, 2);
763 /* Check whether PC points at code that saves registers on the stack.
764 If so, it updates CACHE and returns the address of the first
765 instruction after the register saves or CURRENT_PC, whichever is
766 smaller. Otherwise, return PC. */
769 i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc,
770 struct i386_frame_cache *cache)
772 CORE_ADDR offset = 0;
776 if (cache->locals > 0)
777 offset -= cache->locals;
778 for (i = 0; i < 8 && pc < current_pc; i++)
780 read_memory_nobpt (pc, &op, 1);
781 if (op < 0x50 || op > 0x57)
785 cache->saved_regs[op - 0x50] = offset;
786 cache->sp_offset += 4;
793 /* Do a full analysis of the prologue at PC and update CACHE
794 accordingly. Bail out early if CURRENT_PC is reached. Return the
795 address where the analysis stopped.
797 We handle these cases:
799 The startup sequence can be at the start of the function, or the
800 function can start with a branch to startup code at the end.
802 %ebp can be set up with either the 'enter' instruction, or "pushl
803 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
804 once used in the System V compiler).
806 Local space is allocated just below the saved %ebp by either the
807 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
808 16-bit unsigned argument for space to allocate, and the 'addl'
809 instruction could have either a signed byte, or 32-bit immediate.
811 Next, the registers used by this function are pushed. With the
812 System V compiler they will always be in the order: %edi, %esi,
813 %ebx (and sometimes a harmless bug causes it to also save but not
814 restore %eax); however, the code below is willing to see the pushes
815 in any order, and will handle up to 8 of them.
817 If the setup sequence is at the end of the function, then the next
818 instruction will be a branch back to the start. */
821 i386_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
822 struct i386_frame_cache *cache)
824 pc = i386_follow_jump (pc);
825 pc = i386_analyze_struct_return (pc, current_pc, cache);
826 pc = i386_skip_probe (pc);
827 pc = i386_analyze_stack_align (pc, current_pc, cache);
828 pc = i386_analyze_frame_setup (pc, current_pc, cache);
829 return i386_analyze_register_saves (pc, current_pc, cache);
832 /* Return PC of first real instruction. */
835 i386_skip_prologue (CORE_ADDR start_pc)
837 static gdb_byte pic_pat[6] =
839 0xe8, 0, 0, 0, 0, /* call 0x0 */
840 0x5b, /* popl %ebx */
842 struct i386_frame_cache cache;
848 pc = i386_analyze_prologue (start_pc, 0xffffffff, &cache);
849 if (cache.locals < 0)
852 /* Found valid frame setup. */
854 /* The native cc on SVR4 in -K PIC mode inserts the following code
855 to get the address of the global offset table (GOT) into register
860 movl %ebx,x(%ebp) (optional)
863 This code is with the rest of the prologue (at the end of the
864 function), so we have to skip it to get to the first real
865 instruction at the start of the function. */
867 for (i = 0; i < 6; i++)
869 read_memory_nobpt (pc + i, &op, 1);
870 if (pic_pat[i] != op)
877 read_memory_nobpt (pc + delta, &op, 1);
879 if (op == 0x89) /* movl %ebx, x(%ebp) */
881 op = read_memory_unsigned_integer (pc + delta + 1, 1);
883 if (op == 0x5d) /* One byte offset from %ebp. */
885 else if (op == 0x9d) /* Four byte offset from %ebp. */
887 else /* Unexpected instruction. */
890 read_memory_nobpt (pc + delta, &op, 1);
894 if (delta > 0 && op == 0x81
895 && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3)
901 /* If the function starts with a branch (to startup code at the end)
902 the last instruction should bring us back to the first
903 instruction of the real code. */
904 if (i386_follow_jump (start_pc) != start_pc)
905 pc = i386_follow_jump (pc);
910 /* This function is 64-bit safe. */
913 i386_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
917 frame_unwind_register (next_frame, gdbarch_pc_regnum (current_gdbarch), buf);
918 return extract_typed_address (buf, builtin_type_void_func_ptr);
924 static struct i386_frame_cache *
925 i386_frame_cache (struct frame_info *next_frame, void **this_cache)
927 struct i386_frame_cache *cache;
934 cache = i386_alloc_frame_cache ();
937 /* In principle, for normal frames, %ebp holds the frame pointer,
938 which holds the base address for the current stack frame.
939 However, for functions that don't need it, the frame pointer is
940 optional. For these "frameless" functions the frame pointer is
941 actually the frame pointer of the calling frame. Signal
942 trampolines are just a special case of a "frameless" function.
943 They (usually) share their frame pointer with the frame that was
944 in progress when the signal occurred. */
946 frame_unwind_register (next_frame, I386_EBP_REGNUM, buf);
947 cache->base = extract_unsigned_integer (buf, 4);
948 if (cache->base == 0)
951 /* For normal frames, %eip is stored at 4(%ebp). */
952 cache->saved_regs[I386_EIP_REGNUM] = 4;
954 cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
956 i386_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache);
958 if (cache->stack_align)
960 /* Saved stack pointer has been saved in %ecx. */
961 frame_unwind_register (next_frame, I386_ECX_REGNUM, buf);
962 cache->saved_sp = extract_unsigned_integer(buf, 4);
965 if (cache->locals < 0)
967 /* We didn't find a valid frame, which means that CACHE->base
968 currently holds the frame pointer for our calling frame. If
969 we're at the start of a function, or somewhere half-way its
970 prologue, the function's frame probably hasn't been fully
971 setup yet. Try to reconstruct the base address for the stack
972 frame by looking at the stack pointer. For truly "frameless"
973 functions this might work too. */
975 if (cache->stack_align)
977 /* We're halfway aligning the stack. */
978 cache->base = ((cache->saved_sp - 4) & 0xfffffff0) - 4;
979 cache->saved_regs[I386_EIP_REGNUM] = cache->saved_sp - 4;
981 /* This will be added back below. */
982 cache->saved_regs[I386_EIP_REGNUM] -= cache->base;
986 frame_unwind_register (next_frame, I386_ESP_REGNUM, buf);
987 cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset;
991 /* Now that we have the base address for the stack frame we can
992 calculate the value of %esp in the calling frame. */
993 if (cache->saved_sp == 0)
994 cache->saved_sp = cache->base + 8;
996 /* Adjust all the saved registers such that they contain addresses
997 instead of offsets. */
998 for (i = 0; i < I386_NUM_SAVED_REGS; i++)
999 if (cache->saved_regs[i] != -1)
1000 cache->saved_regs[i] += cache->base;
1006 i386_frame_this_id (struct frame_info *next_frame, void **this_cache,
1007 struct frame_id *this_id)
1009 struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache);
1011 /* This marks the outermost frame. */
1012 if (cache->base == 0)
1015 /* See the end of i386_push_dummy_call. */
1016 (*this_id) = frame_id_build (cache->base + 8, cache->pc);
1020 i386_frame_prev_register (struct frame_info *next_frame, void **this_cache,
1021 int regnum, int *optimizedp,
1022 enum lval_type *lvalp, CORE_ADDR *addrp,
1023 int *realnump, gdb_byte *valuep)
1025 struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache);
1027 gdb_assert (regnum >= 0);
1029 /* The System V ABI says that:
1031 "The flags register contains the system flags, such as the
1032 direction flag and the carry flag. The direction flag must be
1033 set to the forward (that is, zero) direction before entry and
1034 upon exit from a function. Other user flags have no specified
1035 role in the standard calling sequence and are not preserved."
1037 To guarantee the "upon exit" part of that statement we fake a
1038 saved flags register that has its direction flag cleared.
1040 Note that GCC doesn't seem to rely on the fact that the direction
1041 flag is cleared after a function return; it always explicitly
1042 clears the flag before operations where it matters.
1044 FIXME: kettenis/20030316: I'm not quite sure whether this is the
1045 right thing to do. The way we fake the flags register here makes
1046 it impossible to change it. */
1048 if (regnum == I386_EFLAGS_REGNUM)
1058 /* Clear the direction flag. */
1059 val = frame_unwind_register_unsigned (next_frame,
1060 I386_EFLAGS_REGNUM);
1062 store_unsigned_integer (valuep, 4, val);
1068 if (regnum == I386_EIP_REGNUM && cache->pc_in_eax)
1071 *lvalp = lval_register;
1073 *realnump = I386_EAX_REGNUM;
1075 frame_unwind_register (next_frame, (*realnump), valuep);
1079 if (regnum == I386_ESP_REGNUM && cache->saved_sp)
1087 /* Store the value. */
1088 store_unsigned_integer (valuep, 4, cache->saved_sp);
1093 if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1)
1096 *lvalp = lval_memory;
1097 *addrp = cache->saved_regs[regnum];
1101 /* Read the value in from memory. */
1102 read_memory (*addrp, valuep,
1103 register_size (current_gdbarch, regnum));
1109 *lvalp = lval_register;
1113 frame_unwind_register (next_frame, (*realnump), valuep);
1116 static const struct frame_unwind i386_frame_unwind =
1120 i386_frame_prev_register
1123 static const struct frame_unwind *
1124 i386_frame_sniffer (struct frame_info *next_frame)
1126 return &i386_frame_unwind;
1130 /* Signal trampolines. */
1132 static struct i386_frame_cache *
1133 i386_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache)
1135 struct i386_frame_cache *cache;
1136 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1143 cache = i386_alloc_frame_cache ();
1145 frame_unwind_register (next_frame, I386_ESP_REGNUM, buf);
1146 cache->base = extract_unsigned_integer (buf, 4) - 4;
1148 addr = tdep->sigcontext_addr (next_frame);
1149 if (tdep->sc_reg_offset)
1153 gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS);
1155 for (i = 0; i < tdep->sc_num_regs; i++)
1156 if (tdep->sc_reg_offset[i] != -1)
1157 cache->saved_regs[i] = addr + tdep->sc_reg_offset[i];
1161 cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset;
1162 cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset;
1165 *this_cache = cache;
1170 i386_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache,
1171 struct frame_id *this_id)
1173 struct i386_frame_cache *cache =
1174 i386_sigtramp_frame_cache (next_frame, this_cache);
1176 /* See the end of i386_push_dummy_call. */
1177 (*this_id) = frame_id_build (cache->base + 8, frame_pc_unwind (next_frame));
1181 i386_sigtramp_frame_prev_register (struct frame_info *next_frame,
1183 int regnum, int *optimizedp,
1184 enum lval_type *lvalp, CORE_ADDR *addrp,
1185 int *realnump, gdb_byte *valuep)
1187 /* Make sure we've initialized the cache. */
1188 i386_sigtramp_frame_cache (next_frame, this_cache);
1190 i386_frame_prev_register (next_frame, this_cache, regnum,
1191 optimizedp, lvalp, addrp, realnump, valuep);
1194 static const struct frame_unwind i386_sigtramp_frame_unwind =
1197 i386_sigtramp_frame_this_id,
1198 i386_sigtramp_frame_prev_register
1201 static const struct frame_unwind *
1202 i386_sigtramp_frame_sniffer (struct frame_info *next_frame)
1204 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (next_frame));
1206 /* We shouldn't even bother if we don't have a sigcontext_addr
1208 if (tdep->sigcontext_addr == NULL)
1211 if (tdep->sigtramp_p != NULL)
1213 if (tdep->sigtramp_p (next_frame))
1214 return &i386_sigtramp_frame_unwind;
1217 if (tdep->sigtramp_start != 0)
1219 CORE_ADDR pc = frame_pc_unwind (next_frame);
1221 gdb_assert (tdep->sigtramp_end != 0);
1222 if (pc >= tdep->sigtramp_start && pc < tdep->sigtramp_end)
1223 return &i386_sigtramp_frame_unwind;
1231 i386_frame_base_address (struct frame_info *next_frame, void **this_cache)
1233 struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache);
1238 static const struct frame_base i386_frame_base =
1241 i386_frame_base_address,
1242 i386_frame_base_address,
1243 i386_frame_base_address
1246 static struct frame_id
1247 i386_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1252 frame_unwind_register (next_frame, I386_EBP_REGNUM, buf);
1253 fp = extract_unsigned_integer (buf, 4);
1255 /* See the end of i386_push_dummy_call. */
1256 return frame_id_build (fp + 8, frame_pc_unwind (next_frame));
1260 /* Figure out where the longjmp will land. Slurp the args out of the
1261 stack. We expect the first arg to be a pointer to the jmp_buf
1262 structure from which we extract the address that we will land at.
1263 This address is copied into PC. This routine returns non-zero on
1266 This function is 64-bit safe. */
1269 i386_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
1272 CORE_ADDR sp, jb_addr;
1273 int jb_pc_offset = gdbarch_tdep (get_frame_arch (frame))->jb_pc_offset;
1274 int len = TYPE_LENGTH (builtin_type_void_func_ptr);
1276 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1277 longjmp will land. */
1278 if (jb_pc_offset == -1)
1281 /* Don't use I386_ESP_REGNUM here, since this function is also used
1283 get_frame_register (frame, gdbarch_sp_regnum (current_gdbarch), buf);
1284 sp = extract_typed_address (buf, builtin_type_void_data_ptr);
1285 if (target_read_memory (sp + len, buf, len))
1288 jb_addr = extract_typed_address (buf, builtin_type_void_data_ptr);
1289 if (target_read_memory (jb_addr + jb_pc_offset, buf, len))
1292 *pc = extract_typed_address (buf, builtin_type_void_func_ptr);
1298 i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1299 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
1300 struct value **args, CORE_ADDR sp, int struct_return,
1301 CORE_ADDR struct_addr)
1306 /* Push arguments in reverse order. */
1307 for (i = nargs - 1; i >= 0; i--)
1309 int len = TYPE_LENGTH (value_enclosing_type (args[i]));
1311 /* The System V ABI says that:
1313 "An argument's size is increased, if necessary, to make it a
1314 multiple of [32-bit] words. This may require tail padding,
1315 depending on the size of the argument."
1317 This makes sure the stack stays word-aligned. */
1318 sp -= (len + 3) & ~3;
1319 write_memory (sp, value_contents_all (args[i]), len);
1322 /* Push value address. */
1326 store_unsigned_integer (buf, 4, struct_addr);
1327 write_memory (sp, buf, 4);
1330 /* Store return address. */
1332 store_unsigned_integer (buf, 4, bp_addr);
1333 write_memory (sp, buf, 4);
1335 /* Finally, update the stack pointer... */
1336 store_unsigned_integer (buf, 4, sp);
1337 regcache_cooked_write (regcache, I386_ESP_REGNUM, buf);
1339 /* ...and fake a frame pointer. */
1340 regcache_cooked_write (regcache, I386_EBP_REGNUM, buf);
1342 /* MarkK wrote: This "+ 8" is all over the place:
1343 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1344 i386_unwind_dummy_id). It's there, since all frame unwinders for
1345 a given target have to agree (within a certain margin) on the
1346 definition of the stack address of a frame. Otherwise
1347 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1348 stack address *before* the function call as a frame's CFA. On
1349 the i386, when %ebp is used as a frame pointer, the offset
1350 between the contents %ebp and the CFA as defined by GCC. */
1354 /* These registers are used for returning integers (and on some
1355 targets also for returning `struct' and `union' values when their
1356 size and alignment match an integer type). */
1357 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1358 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1360 /* Read, for architecture GDBARCH, a function return value of TYPE
1361 from REGCACHE, and copy that into VALBUF. */
1364 i386_extract_return_value (struct gdbarch *gdbarch, struct type *type,
1365 struct regcache *regcache, gdb_byte *valbuf)
1367 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1368 int len = TYPE_LENGTH (type);
1369 gdb_byte buf[I386_MAX_REGISTER_SIZE];
1371 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1373 if (tdep->st0_regnum < 0)
1375 warning (_("Cannot find floating-point return value."));
1376 memset (valbuf, 0, len);
1380 /* Floating-point return values can be found in %st(0). Convert
1381 its contents to the desired type. This is probably not
1382 exactly how it would happen on the target itself, but it is
1383 the best we can do. */
1384 regcache_raw_read (regcache, I386_ST0_REGNUM, buf);
1385 convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type);
1389 int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM);
1390 int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM);
1392 if (len <= low_size)
1394 regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf);
1395 memcpy (valbuf, buf, len);
1397 else if (len <= (low_size + high_size))
1399 regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf);
1400 memcpy (valbuf, buf, low_size);
1401 regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf);
1402 memcpy (valbuf + low_size, buf, len - low_size);
1405 internal_error (__FILE__, __LINE__,
1406 _("Cannot extract return value of %d bytes long."), len);
1410 /* Write, for architecture GDBARCH, a function return value of TYPE
1411 from VALBUF into REGCACHE. */
1414 i386_store_return_value (struct gdbarch *gdbarch, struct type *type,
1415 struct regcache *regcache, const gdb_byte *valbuf)
1417 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1418 int len = TYPE_LENGTH (type);
1420 /* Define I387_ST0_REGNUM such that we use the proper definitions
1421 for the architecture. */
1422 #define I387_ST0_REGNUM I386_ST0_REGNUM
1424 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1427 gdb_byte buf[I386_MAX_REGISTER_SIZE];
1429 if (tdep->st0_regnum < 0)
1431 warning (_("Cannot set floating-point return value."));
1435 /* Returning floating-point values is a bit tricky. Apart from
1436 storing the return value in %st(0), we have to simulate the
1437 state of the FPU at function return point. */
1439 /* Convert the value found in VALBUF to the extended
1440 floating-point format used by the FPU. This is probably
1441 not exactly how it would happen on the target itself, but
1442 it is the best we can do. */
1443 convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext);
1444 regcache_raw_write (regcache, I386_ST0_REGNUM, buf);
1446 /* Set the top of the floating-point register stack to 7. The
1447 actual value doesn't really matter, but 7 is what a normal
1448 function return would end up with if the program started out
1449 with a freshly initialized FPU. */
1450 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
1452 regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM, fstat);
1454 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1455 the floating-point register stack to 7, the appropriate value
1456 for the tag word is 0x3fff. */
1457 regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM, 0x3fff);
1461 int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM);
1462 int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM);
1464 if (len <= low_size)
1465 regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf);
1466 else if (len <= (low_size + high_size))
1468 regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf);
1469 regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0,
1470 len - low_size, valbuf + low_size);
1473 internal_error (__FILE__, __LINE__,
1474 _("Cannot store return value of %d bytes long."), len);
1477 #undef I387_ST0_REGNUM
1481 /* This is the variable that is set with "set struct-convention", and
1482 its legitimate values. */
1483 static const char default_struct_convention[] = "default";
1484 static const char pcc_struct_convention[] = "pcc";
1485 static const char reg_struct_convention[] = "reg";
1486 static const char *valid_conventions[] =
1488 default_struct_convention,
1489 pcc_struct_convention,
1490 reg_struct_convention,
1493 static const char *struct_convention = default_struct_convention;
1495 /* Return non-zero if TYPE, which is assumed to be a structure,
1496 a union type, or an array type, should be returned in registers
1497 for architecture GDBARCH. */
1500 i386_reg_struct_return_p (struct gdbarch *gdbarch, struct type *type)
1502 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1503 enum type_code code = TYPE_CODE (type);
1504 int len = TYPE_LENGTH (type);
1506 gdb_assert (code == TYPE_CODE_STRUCT
1507 || code == TYPE_CODE_UNION
1508 || code == TYPE_CODE_ARRAY);
1510 if (struct_convention == pcc_struct_convention
1511 || (struct_convention == default_struct_convention
1512 && tdep->struct_return == pcc_struct_return))
1515 /* Structures consisting of a single `float', `double' or 'long
1516 double' member are returned in %st(0). */
1517 if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
1519 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1520 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1521 return (len == 4 || len == 8 || len == 12);
1524 return (len == 1 || len == 2 || len == 4 || len == 8);
1527 /* Determine, for architecture GDBARCH, how a return value of TYPE
1528 should be returned. If it is supposed to be returned in registers,
1529 and READBUF is non-zero, read the appropriate value from REGCACHE,
1530 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1531 from WRITEBUF into REGCACHE. */
1533 static enum return_value_convention
1534 i386_return_value (struct gdbarch *gdbarch, struct type *type,
1535 struct regcache *regcache, gdb_byte *readbuf,
1536 const gdb_byte *writebuf)
1538 enum type_code code = TYPE_CODE (type);
1540 if ((code == TYPE_CODE_STRUCT
1541 || code == TYPE_CODE_UNION
1542 || code == TYPE_CODE_ARRAY)
1543 && !i386_reg_struct_return_p (gdbarch, type))
1545 /* The System V ABI says that:
1547 "A function that returns a structure or union also sets %eax
1548 to the value of the original address of the caller's area
1549 before it returns. Thus when the caller receives control
1550 again, the address of the returned object resides in register
1551 %eax and can be used to access the object."
1553 So the ABI guarantees that we can always find the return
1554 value just after the function has returned. */
1556 /* Note that the ABI doesn't mention functions returning arrays,
1557 which is something possible in certain languages such as Ada.
1558 In this case, the value is returned as if it was wrapped in
1559 a record, so the convention applied to records also applies
1566 regcache_raw_read_unsigned (regcache, I386_EAX_REGNUM, &addr);
1567 read_memory (addr, readbuf, TYPE_LENGTH (type));
1570 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
1573 /* This special case is for structures consisting of a single
1574 `float', `double' or 'long double' member. These structures are
1575 returned in %st(0). For these structures, we call ourselves
1576 recursively, changing TYPE into the type of the first member of
1577 the structure. Since that should work for all structures that
1578 have only one member, we don't bother to check the member's type
1580 if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
1582 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1583 return i386_return_value (gdbarch, type, regcache, readbuf, writebuf);
1587 i386_extract_return_value (gdbarch, type, regcache, readbuf);
1589 i386_store_return_value (gdbarch, type, regcache, writebuf);
1591 return RETURN_VALUE_REGISTER_CONVENTION;
1595 /* Type for %eflags. */
1596 struct type *i386_eflags_type;
1598 /* Type for %mxcsr. */
1599 struct type *i386_mxcsr_type;
1601 /* Construct types for ISA-specific registers. */
1603 i386_init_types (void)
1607 type = init_flags_type ("builtin_type_i386_eflags", 4);
1608 append_flags_type_flag (type, 0, "CF");
1609 append_flags_type_flag (type, 1, NULL);
1610 append_flags_type_flag (type, 2, "PF");
1611 append_flags_type_flag (type, 4, "AF");
1612 append_flags_type_flag (type, 6, "ZF");
1613 append_flags_type_flag (type, 7, "SF");
1614 append_flags_type_flag (type, 8, "TF");
1615 append_flags_type_flag (type, 9, "IF");
1616 append_flags_type_flag (type, 10, "DF");
1617 append_flags_type_flag (type, 11, "OF");
1618 append_flags_type_flag (type, 14, "NT");
1619 append_flags_type_flag (type, 16, "RF");
1620 append_flags_type_flag (type, 17, "VM");
1621 append_flags_type_flag (type, 18, "AC");
1622 append_flags_type_flag (type, 19, "VIF");
1623 append_flags_type_flag (type, 20, "VIP");
1624 append_flags_type_flag (type, 21, "ID");
1625 i386_eflags_type = type;
1627 type = init_flags_type ("builtin_type_i386_mxcsr", 4);
1628 append_flags_type_flag (type, 0, "IE");
1629 append_flags_type_flag (type, 1, "DE");
1630 append_flags_type_flag (type, 2, "ZE");
1631 append_flags_type_flag (type, 3, "OE");
1632 append_flags_type_flag (type, 4, "UE");
1633 append_flags_type_flag (type, 5, "PE");
1634 append_flags_type_flag (type, 6, "DAZ");
1635 append_flags_type_flag (type, 7, "IM");
1636 append_flags_type_flag (type, 8, "DM");
1637 append_flags_type_flag (type, 9, "ZM");
1638 append_flags_type_flag (type, 10, "OM");
1639 append_flags_type_flag (type, 11, "UM");
1640 append_flags_type_flag (type, 12, "PM");
1641 append_flags_type_flag (type, 15, "FZ");
1642 i386_mxcsr_type = type;
1645 /* Construct vector type for MMX registers. */
1647 i386_mmx_type (struct gdbarch *gdbarch)
1649 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1651 if (!tdep->i386_mmx_type)
1653 /* The type we're building is this: */
1655 union __gdb_builtin_type_vec64i
1658 int32_t v2_int32[2];
1659 int16_t v4_int16[4];
1666 t = init_composite_type ("__gdb_builtin_type_vec64i", TYPE_CODE_UNION);
1667 append_composite_type_field (t, "uint64", builtin_type_int64);
1668 append_composite_type_field (t, "v2_int32",
1669 init_vector_type (builtin_type_int32, 2));
1670 append_composite_type_field (t, "v4_int16",
1671 init_vector_type (builtin_type_int16, 4));
1672 append_composite_type_field (t, "v8_int8",
1673 init_vector_type (builtin_type_int8, 8));
1675 TYPE_FLAGS (t) |= TYPE_FLAG_VECTOR;
1676 TYPE_NAME (t) = "builtin_type_vec64i";
1677 tdep->i386_mmx_type = t;
1680 return tdep->i386_mmx_type;
1684 i386_sse_type (struct gdbarch *gdbarch)
1686 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1688 if (!tdep->i386_sse_type)
1690 /* The type we're building is this: */
1692 union __gdb_builtin_type_vec128i
1695 int64_t v2_int64[2];
1696 int32_t v4_int32[4];
1697 int16_t v8_int16[8];
1698 int8_t v16_int8[16];
1699 double v2_double[2];
1706 t = init_composite_type ("__gdb_builtin_type_vec128i", TYPE_CODE_UNION);
1707 append_composite_type_field (t, "v4_float",
1708 init_vector_type (builtin_type_float, 4));
1709 append_composite_type_field (t, "v2_double",
1710 init_vector_type (builtin_type_double, 2));
1711 append_composite_type_field (t, "v16_int8",
1712 init_vector_type (builtin_type_int8, 16));
1713 append_composite_type_field (t, "v8_int16",
1714 init_vector_type (builtin_type_int16, 8));
1715 append_composite_type_field (t, "v4_int32",
1716 init_vector_type (builtin_type_int32, 4));
1717 append_composite_type_field (t, "v2_int64",
1718 init_vector_type (builtin_type_int64, 2));
1719 append_composite_type_field (t, "uint128", builtin_type_int128);
1721 TYPE_FLAGS (t) |= TYPE_FLAG_VECTOR;
1722 TYPE_NAME (t) = "builtin_type_vec128i";
1723 tdep->i386_sse_type = t;
1726 return tdep->i386_sse_type;
1729 /* Return the GDB type object for the "standard" data type of data in
1730 register REGNUM. Perhaps %esi and %edi should go here, but
1731 potentially they could be used for things other than address. */
1733 static struct type *
1734 i386_register_type (struct gdbarch *gdbarch, int regnum)
1736 if (regnum == I386_EIP_REGNUM)
1737 return builtin_type_void_func_ptr;
1739 if (regnum == I386_EFLAGS_REGNUM)
1740 return i386_eflags_type;
1742 if (regnum == I386_EBP_REGNUM || regnum == I386_ESP_REGNUM)
1743 return builtin_type_void_data_ptr;
1745 if (i386_fp_regnum_p (regnum))
1746 return builtin_type_i387_ext;
1748 if (i386_mmx_regnum_p (gdbarch, regnum))
1749 return i386_mmx_type (gdbarch);
1751 if (i386_sse_regnum_p (gdbarch, regnum))
1752 return i386_sse_type (gdbarch);
1754 #define I387_ST0_REGNUM I386_ST0_REGNUM
1755 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
1757 if (regnum == I387_MXCSR_REGNUM)
1758 return i386_mxcsr_type;
1760 #undef I387_ST0_REGNUM
1761 #undef I387_NUM_XMM_REGS
1763 return builtin_type_int;
1766 /* Map a cooked register onto a raw register or memory. For the i386,
1767 the MMX registers need to be mapped onto floating point registers. */
1770 i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum)
1772 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
1777 /* Define I387_ST0_REGNUM such that we use the proper definitions
1778 for REGCACHE's architecture. */
1779 #define I387_ST0_REGNUM tdep->st0_regnum
1781 mmxreg = regnum - tdep->mm0_regnum;
1782 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
1783 tos = (fstat >> 11) & 0x7;
1784 fpreg = (mmxreg + tos) % 8;
1786 return (I387_ST0_REGNUM + fpreg);
1788 #undef I387_ST0_REGNUM
1792 i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
1793 int regnum, gdb_byte *buf)
1795 if (i386_mmx_regnum_p (gdbarch, regnum))
1797 gdb_byte mmx_buf[MAX_REGISTER_SIZE];
1798 int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
1800 /* Extract (always little endian). */
1801 regcache_raw_read (regcache, fpnum, mmx_buf);
1802 memcpy (buf, mmx_buf, register_size (gdbarch, regnum));
1805 regcache_raw_read (regcache, regnum, buf);
1809 i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1810 int regnum, const gdb_byte *buf)
1812 if (i386_mmx_regnum_p (gdbarch, regnum))
1814 gdb_byte mmx_buf[MAX_REGISTER_SIZE];
1815 int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
1818 regcache_raw_read (regcache, fpnum, mmx_buf);
1819 /* ... Modify ... (always little endian). */
1820 memcpy (mmx_buf, buf, register_size (gdbarch, regnum));
1822 regcache_raw_write (regcache, fpnum, mmx_buf);
1825 regcache_raw_write (regcache, regnum, buf);
1829 /* Return the register number of the register allocated by GCC after
1830 REGNUM, or -1 if there is no such register. */
1833 i386_next_regnum (int regnum)
1835 /* GCC allocates the registers in the order:
1837 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1839 Since storing a variable in %esp doesn't make any sense we return
1840 -1 for %ebp and for %esp itself. */
1841 static int next_regnum[] =
1843 I386_EDX_REGNUM, /* Slot for %eax. */
1844 I386_EBX_REGNUM, /* Slot for %ecx. */
1845 I386_ECX_REGNUM, /* Slot for %edx. */
1846 I386_ESI_REGNUM, /* Slot for %ebx. */
1847 -1, -1, /* Slots for %esp and %ebp. */
1848 I386_EDI_REGNUM, /* Slot for %esi. */
1849 I386_EBP_REGNUM /* Slot for %edi. */
1852 if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0]))
1853 return next_regnum[regnum];
1858 /* Return nonzero if a value of type TYPE stored in register REGNUM
1859 needs any special handling. */
1862 i386_convert_register_p (int regnum, struct type *type)
1864 int len = TYPE_LENGTH (type);
1866 /* Values may be spread across multiple registers. Most debugging
1867 formats aren't expressive enough to specify the locations, so
1868 some heuristics is involved. Right now we only handle types that
1869 have a length that is a multiple of the word size, since GCC
1870 doesn't seem to put any other types into registers. */
1871 if (len > 4 && len % 4 == 0)
1873 int last_regnum = regnum;
1877 last_regnum = i386_next_regnum (last_regnum);
1881 if (last_regnum != -1)
1885 return i386_fp_regnum_p (regnum);
1888 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1889 return its contents in TO. */
1892 i386_register_to_value (struct frame_info *frame, int regnum,
1893 struct type *type, gdb_byte *to)
1895 int len = TYPE_LENGTH (type);
1897 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1898 available in FRAME (i.e. if it wasn't saved)? */
1900 if (i386_fp_regnum_p (regnum))
1902 i387_register_to_value (frame, regnum, type, to);
1906 /* Read a value spread across multiple registers. */
1908 gdb_assert (len > 4 && len % 4 == 0);
1912 gdb_assert (regnum != -1);
1913 gdb_assert (register_size (current_gdbarch, regnum) == 4);
1915 get_frame_register (frame, regnum, to);
1916 regnum = i386_next_regnum (regnum);
1922 /* Write the contents FROM of a value of type TYPE into register
1923 REGNUM in frame FRAME. */
1926 i386_value_to_register (struct frame_info *frame, int regnum,
1927 struct type *type, const gdb_byte *from)
1929 int len = TYPE_LENGTH (type);
1931 if (i386_fp_regnum_p (regnum))
1933 i387_value_to_register (frame, regnum, type, from);
1937 /* Write a value spread across multiple registers. */
1939 gdb_assert (len > 4 && len % 4 == 0);
1943 gdb_assert (regnum != -1);
1944 gdb_assert (register_size (current_gdbarch, regnum) == 4);
1946 put_frame_register (frame, regnum, from);
1947 regnum = i386_next_regnum (regnum);
1953 /* Supply register REGNUM from the buffer specified by GREGS and LEN
1954 in the general-purpose register set REGSET to register cache
1955 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
1958 i386_supply_gregset (const struct regset *regset, struct regcache *regcache,
1959 int regnum, const void *gregs, size_t len)
1961 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
1962 const gdb_byte *regs = gregs;
1965 gdb_assert (len == tdep->sizeof_gregset);
1967 for (i = 0; i < tdep->gregset_num_regs; i++)
1969 if ((regnum == i || regnum == -1)
1970 && tdep->gregset_reg_offset[i] != -1)
1971 regcache_raw_supply (regcache, i, regs + tdep->gregset_reg_offset[i]);
1975 /* Collect register REGNUM from the register cache REGCACHE and store
1976 it in the buffer specified by GREGS and LEN as described by the
1977 general-purpose register set REGSET. If REGNUM is -1, do this for
1978 all registers in REGSET. */
1981 i386_collect_gregset (const struct regset *regset,
1982 const struct regcache *regcache,
1983 int regnum, void *gregs, size_t len)
1985 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
1986 gdb_byte *regs = gregs;
1989 gdb_assert (len == tdep->sizeof_gregset);
1991 for (i = 0; i < tdep->gregset_num_regs; i++)
1993 if ((regnum == i || regnum == -1)
1994 && tdep->gregset_reg_offset[i] != -1)
1995 regcache_raw_collect (regcache, i, regs + tdep->gregset_reg_offset[i]);
1999 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
2000 in the floating-point register set REGSET to register cache
2001 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
2004 i386_supply_fpregset (const struct regset *regset, struct regcache *regcache,
2005 int regnum, const void *fpregs, size_t len)
2007 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
2009 if (len == I387_SIZEOF_FXSAVE)
2011 i387_supply_fxsave (regcache, regnum, fpregs);
2015 gdb_assert (len == tdep->sizeof_fpregset);
2016 i387_supply_fsave (regcache, regnum, fpregs);
2019 /* Collect register REGNUM from the register cache REGCACHE and store
2020 it in the buffer specified by FPREGS and LEN as described by the
2021 floating-point register set REGSET. If REGNUM is -1, do this for
2022 all registers in REGSET. */
2025 i386_collect_fpregset (const struct regset *regset,
2026 const struct regcache *regcache,
2027 int regnum, void *fpregs, size_t len)
2029 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
2031 if (len == I387_SIZEOF_FXSAVE)
2033 i387_collect_fxsave (regcache, regnum, fpregs);
2037 gdb_assert (len == tdep->sizeof_fpregset);
2038 i387_collect_fsave (regcache, regnum, fpregs);
2041 /* Return the appropriate register set for the core section identified
2042 by SECT_NAME and SECT_SIZE. */
2044 const struct regset *
2045 i386_regset_from_core_section (struct gdbarch *gdbarch,
2046 const char *sect_name, size_t sect_size)
2048 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2050 if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset)
2052 if (tdep->gregset == NULL)
2053 tdep->gregset = regset_alloc (gdbarch, i386_supply_gregset,
2054 i386_collect_gregset);
2055 return tdep->gregset;
2058 if ((strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset)
2059 || (strcmp (sect_name, ".reg-xfp") == 0
2060 && sect_size == I387_SIZEOF_FXSAVE))
2062 if (tdep->fpregset == NULL)
2063 tdep->fpregset = regset_alloc (gdbarch, i386_supply_fpregset,
2064 i386_collect_fpregset);
2065 return tdep->fpregset;
2072 #ifdef STATIC_TRANSFORM_NAME
2073 /* SunPRO encodes the static variables. This is not related to C++
2074 mangling, it is done for C too. */
2077 sunpro_static_transform_name (char *name)
2080 if (IS_STATIC_TRANSFORM_NAME (name))
2082 /* For file-local statics there will be a period, a bunch of
2083 junk (the contents of which match a string given in the
2084 N_OPT), a period and the name. For function-local statics
2085 there will be a bunch of junk (which seems to change the
2086 second character from 'A' to 'B'), a period, the name of the
2087 function, and the name. So just skip everything before the
2089 p = strrchr (name, '.');
2095 #endif /* STATIC_TRANSFORM_NAME */
2098 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
2101 i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name)
2103 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
2105 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
2106 struct minimal_symbol *indsym =
2107 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
2108 char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0;
2112 if (strncmp (symname, "__imp_", 6) == 0
2113 || strncmp (symname, "_imp_", 5) == 0)
2114 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
2117 return 0; /* Not a trampoline. */
2121 /* Return whether the frame preceding NEXT_FRAME corresponds to a
2122 sigtramp routine. */
2125 i386_sigtramp_p (struct frame_info *next_frame)
2127 CORE_ADDR pc = frame_pc_unwind (next_frame);
2130 find_pc_partial_function (pc, &name, NULL, NULL);
2131 return (name && strcmp ("_sigtramp", name) == 0);
2135 /* We have two flavours of disassembly. The machinery on this page
2136 deals with switching between those. */
2139 i386_print_insn (bfd_vma pc, struct disassemble_info *info)
2141 gdb_assert (disassembly_flavor == att_flavor
2142 || disassembly_flavor == intel_flavor);
2144 /* FIXME: kettenis/20020915: Until disassembler_options is properly
2145 constified, cast to prevent a compiler warning. */
2146 info->disassembler_options = (char *) disassembly_flavor;
2147 info->mach = gdbarch_bfd_arch_info (current_gdbarch)->mach;
2149 return print_insn_i386 (pc, info);
2153 /* There are a few i386 architecture variants that differ only
2154 slightly from the generic i386 target. For now, we don't give them
2155 their own source file, but include them here. As a consequence,
2156 they'll always be included. */
2158 /* System V Release 4 (SVR4). */
2160 /* Return whether the frame preceding NEXT_FRAME corresponds to a SVR4
2161 sigtramp routine. */
2164 i386_svr4_sigtramp_p (struct frame_info *next_frame)
2166 CORE_ADDR pc = frame_pc_unwind (next_frame);
2169 /* UnixWare uses _sigacthandler. The origin of the other symbols is
2170 currently unknown. */
2171 find_pc_partial_function (pc, &name, NULL, NULL);
2172 return (name && (strcmp ("_sigreturn", name) == 0
2173 || strcmp ("_sigacthandler", name) == 0
2174 || strcmp ("sigvechandler", name) == 0));
2177 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
2178 routine, return the address of the associated sigcontext (ucontext)
2182 i386_svr4_sigcontext_addr (struct frame_info *next_frame)
2187 frame_unwind_register (next_frame, I386_ESP_REGNUM, buf);
2188 sp = extract_unsigned_integer (buf, 4);
2190 return read_memory_unsigned_integer (sp + 8, 4);
2197 i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
2199 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
2200 set_gdbarch_stab_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
2203 /* System V Release 4 (SVR4). */
2206 i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
2208 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2210 /* System V Release 4 uses ELF. */
2211 i386_elf_init_abi (info, gdbarch);
2213 /* System V Release 4 has shared libraries. */
2214 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
2216 tdep->sigtramp_p = i386_svr4_sigtramp_p;
2217 tdep->sigcontext_addr = i386_svr4_sigcontext_addr;
2218 tdep->sc_pc_offset = 36 + 14 * 4;
2219 tdep->sc_sp_offset = 36 + 17 * 4;
2221 tdep->jb_pc_offset = 20;
2227 i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
2229 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2231 /* DJGPP doesn't have any special frames for signal handlers. */
2232 tdep->sigtramp_p = NULL;
2234 tdep->jb_pc_offset = 36;
2238 /* i386 register groups. In addition to the normal groups, add "mmx"
2241 static struct reggroup *i386_sse_reggroup;
2242 static struct reggroup *i386_mmx_reggroup;
2245 i386_init_reggroups (void)
2247 i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP);
2248 i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP);
2252 i386_add_reggroups (struct gdbarch *gdbarch)
2254 reggroup_add (gdbarch, i386_sse_reggroup);
2255 reggroup_add (gdbarch, i386_mmx_reggroup);
2256 reggroup_add (gdbarch, general_reggroup);
2257 reggroup_add (gdbarch, float_reggroup);
2258 reggroup_add (gdbarch, all_reggroup);
2259 reggroup_add (gdbarch, save_reggroup);
2260 reggroup_add (gdbarch, restore_reggroup);
2261 reggroup_add (gdbarch, vector_reggroup);
2262 reggroup_add (gdbarch, system_reggroup);
2266 i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
2267 struct reggroup *group)
2269 int sse_regnum_p = (i386_sse_regnum_p (gdbarch, regnum)
2270 || i386_mxcsr_regnum_p (gdbarch, regnum));
2271 int fp_regnum_p = (i386_fp_regnum_p (regnum)
2272 || i386_fpc_regnum_p (regnum));
2273 int mmx_regnum_p = (i386_mmx_regnum_p (gdbarch, regnum));
2275 if (group == i386_mmx_reggroup)
2276 return mmx_regnum_p;
2277 if (group == i386_sse_reggroup)
2278 return sse_regnum_p;
2279 if (group == vector_reggroup)
2280 return (mmx_regnum_p || sse_regnum_p);
2281 if (group == float_reggroup)
2283 if (group == general_reggroup)
2284 return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p);
2286 return default_register_reggroup_p (gdbarch, regnum, group);
2290 /* Get the ARGIth function argument for the current function. */
2293 i386_fetch_pointer_argument (struct frame_info *frame, int argi,
2296 CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM);
2297 return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4);
2301 static struct gdbarch *
2302 i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2304 struct gdbarch_tdep *tdep;
2305 struct gdbarch *gdbarch;
2307 /* If there is already a candidate, use it. */
2308 arches = gdbarch_list_lookup_by_info (arches, &info);
2310 return arches->gdbarch;
2312 /* Allocate space for the new architecture. */
2313 tdep = XCALLOC (1, struct gdbarch_tdep);
2314 gdbarch = gdbarch_alloc (&info, tdep);
2316 /* General-purpose registers. */
2317 tdep->gregset = NULL;
2318 tdep->gregset_reg_offset = NULL;
2319 tdep->gregset_num_regs = I386_NUM_GREGS;
2320 tdep->sizeof_gregset = 0;
2322 /* Floating-point registers. */
2323 tdep->fpregset = NULL;
2324 tdep->sizeof_fpregset = I387_SIZEOF_FSAVE;
2326 /* The default settings include the FPU registers, the MMX registers
2327 and the SSE registers. This can be overridden for a specific ABI
2328 by adjusting the members `st0_regnum', `mm0_regnum' and
2329 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
2330 will show up in the output of "info all-registers". Ideally we
2331 should try to autodetect whether they are available, such that we
2332 can prevent "info all-registers" from displaying registers that
2335 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
2336 [the SSE registers] always (even when they don't exist) or never
2337 showing them to the user (even when they do exist), I prefer the
2338 former over the latter. */
2340 tdep->st0_regnum = I386_ST0_REGNUM;
2342 /* The MMX registers are implemented as pseudo-registers. Put off
2343 calculating the register number for %mm0 until we know the number
2344 of raw registers. */
2345 tdep->mm0_regnum = 0;
2347 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
2348 tdep->num_xmm_regs = I386_NUM_XREGS - 1;
2350 tdep->jb_pc_offset = -1;
2351 tdep->struct_return = pcc_struct_return;
2352 tdep->sigtramp_start = 0;
2353 tdep->sigtramp_end = 0;
2354 tdep->sigtramp_p = i386_sigtramp_p;
2355 tdep->sigcontext_addr = NULL;
2356 tdep->sc_reg_offset = NULL;
2357 tdep->sc_pc_offset = -1;
2358 tdep->sc_sp_offset = -1;
2360 /* The format used for `long double' on almost all i386 targets is
2361 the i387 extended floating-point format. In fact, of all targets
2362 in the GCC 2.95 tree, only OSF/1 does it different, and insists
2363 on having a `long double' that's not `long' at all. */
2364 set_gdbarch_long_double_format (gdbarch, floatformats_i387_ext);
2366 /* Although the i387 extended floating-point has only 80 significant
2367 bits, a `long double' actually takes up 96, probably to enforce
2369 set_gdbarch_long_double_bit (gdbarch, 96);
2371 /* The default ABI includes general-purpose registers,
2372 floating-point registers, and the SSE registers. */
2373 set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS);
2374 set_gdbarch_register_name (gdbarch, i386_register_name);
2375 set_gdbarch_register_type (gdbarch, i386_register_type);
2377 /* Register numbers of various important registers. */
2378 set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */
2379 set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */
2380 set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */
2381 set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */
2383 /* NOTE: kettenis/20040418: GCC does have two possible register
2384 numbering schemes on the i386: dbx and SVR4. These schemes
2385 differ in how they number %ebp, %esp, %eflags, and the
2386 floating-point registers, and are implemented by the arrays
2387 dbx_register_map[] and svr4_dbx_register_map in
2388 gcc/config/i386.c. GCC also defines a third numbering scheme in
2389 gcc/config/i386.c, which it designates as the "default" register
2390 map used in 64bit mode. This last register numbering scheme is
2391 implemented in dbx64_register_map, and is used for AMD64; see
2394 Currently, each GCC i386 target always uses the same register
2395 numbering scheme across all its supported debugging formats
2396 i.e. SDB (COFF), stabs and DWARF 2. This is because
2397 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
2398 DBX_REGISTER_NUMBER macro which is defined by each target's
2399 respective config header in a manner independent of the requested
2400 output debugging format.
2402 This does not match the arrangement below, which presumes that
2403 the SDB and stabs numbering schemes differ from the DWARF and
2404 DWARF 2 ones. The reason for this arrangement is that it is
2405 likely to get the numbering scheme for the target's
2406 default/native debug format right. For targets where GCC is the
2407 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
2408 targets where the native toolchain uses a different numbering
2409 scheme for a particular debug format (stabs-in-ELF on Solaris)
2410 the defaults below will have to be overridden, like
2411 i386_elf_init_abi() does. */
2413 /* Use the dbx register numbering scheme for stabs and COFF. */
2414 set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dbx_reg_to_regnum);
2415 set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_dbx_reg_to_regnum);
2417 /* Use the SVR4 register numbering scheme for DWARF and DWARF 2. */
2418 set_gdbarch_dwarf_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
2419 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
2421 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
2422 be in use on any of the supported i386 targets. */
2424 set_gdbarch_print_float_info (gdbarch, i387_print_float_info);
2426 set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target);
2428 /* Call dummy code. */
2429 set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call);
2431 set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p);
2432 set_gdbarch_register_to_value (gdbarch, i386_register_to_value);
2433 set_gdbarch_value_to_register (gdbarch, i386_value_to_register);
2435 set_gdbarch_return_value (gdbarch, i386_return_value);
2437 set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue);
2439 /* Stack grows downward. */
2440 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2442 set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc);
2443 set_gdbarch_decr_pc_after_break (gdbarch, 1);
2445 set_gdbarch_frame_args_skip (gdbarch, 8);
2447 /* Wire in the MMX registers. */
2448 set_gdbarch_num_pseudo_regs (gdbarch, i386_num_mmx_regs);
2449 set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read);
2450 set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write);
2452 set_gdbarch_print_insn (gdbarch, i386_print_insn);
2454 set_gdbarch_unwind_dummy_id (gdbarch, i386_unwind_dummy_id);
2456 set_gdbarch_unwind_pc (gdbarch, i386_unwind_pc);
2458 /* Add the i386 register groups. */
2459 i386_add_reggroups (gdbarch);
2460 set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p);
2462 /* Helper for function argument information. */
2463 set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument);
2465 /* Hook in the DWARF CFI frame unwinder. */
2466 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
2468 frame_base_set_default (gdbarch, &i386_frame_base);
2470 /* Hook in ABI-specific overrides, if they have been registered. */
2471 gdbarch_init_osabi (info, gdbarch);
2473 frame_unwind_append_sniffer (gdbarch, i386_sigtramp_frame_sniffer);
2474 frame_unwind_append_sniffer (gdbarch, i386_frame_sniffer);
2476 /* If we have a register mapping, enable the generic core file
2477 support, unless it has already been enabled. */
2478 if (tdep->gregset_reg_offset
2479 && !gdbarch_regset_from_core_section_p (gdbarch))
2480 set_gdbarch_regset_from_core_section (gdbarch,
2481 i386_regset_from_core_section);
2483 /* Unless support for MMX has been disabled, make %mm0 the first
2485 if (tdep->mm0_regnum == 0)
2486 tdep->mm0_regnum = gdbarch_num_regs (gdbarch);
2491 static enum gdb_osabi
2492 i386_coff_osabi_sniffer (bfd *abfd)
2494 if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0
2495 || strcmp (bfd_get_target (abfd), "coff-go32") == 0)
2496 return GDB_OSABI_GO32;
2498 return GDB_OSABI_UNKNOWN;
2502 /* Provide a prototype to silence -Wmissing-prototypes. */
2503 void _initialize_i386_tdep (void);
2506 _initialize_i386_tdep (void)
2508 register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init);
2510 /* Add the variable that controls the disassembly flavor. */
2511 add_setshow_enum_cmd ("disassembly-flavor", no_class, valid_flavors,
2512 &disassembly_flavor, _("\
2513 Set the disassembly flavor."), _("\
2514 Show the disassembly flavor."), _("\
2515 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
2517 NULL, /* FIXME: i18n: */
2518 &setlist, &showlist);
2520 /* Add the variable that controls the convention for returning
2522 add_setshow_enum_cmd ("struct-convention", no_class, valid_conventions,
2523 &struct_convention, _("\
2524 Set the convention for returning small structs."), _("\
2525 Show the convention for returning small structs."), _("\
2526 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
2529 NULL, /* FIXME: i18n: */
2530 &setlist, &showlist);
2532 gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour,
2533 i386_coff_osabi_sniffer);
2535 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4,
2536 i386_svr4_init_abi);
2537 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32,
2538 i386_go32_init_abi);
2540 /* Initialize the i386-specific register groups & types. */
2541 i386_init_reggroups ();