1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
25 #include "arch-utils.h"
27 #include "dummy-frame.h"
28 #include "dwarf2-frame.h"
30 #include "floatformat.h"
32 #include "frame-base.h"
33 #include "frame-unwind.h"
40 #include "reggroups.h"
48 #include "gdb_assert.h"
49 #include "gdb_string.h"
51 #include "i386-tdep.h"
52 #include "i387-tdep.h"
56 static char *i386_register_names[] =
58 "eax", "ecx", "edx", "ebx",
59 "esp", "ebp", "esi", "edi",
60 "eip", "eflags", "cs", "ss",
61 "ds", "es", "fs", "gs",
62 "st0", "st1", "st2", "st3",
63 "st4", "st5", "st6", "st7",
64 "fctrl", "fstat", "ftag", "fiseg",
65 "fioff", "foseg", "fooff", "fop",
66 "xmm0", "xmm1", "xmm2", "xmm3",
67 "xmm4", "xmm5", "xmm6", "xmm7",
71 static const int i386_num_register_names = ARRAY_SIZE (i386_register_names);
73 /* Register names for MMX pseudo-registers. */
75 static char *i386_mmx_names[] =
77 "mm0", "mm1", "mm2", "mm3",
78 "mm4", "mm5", "mm6", "mm7"
81 static const int i386_num_mmx_regs = ARRAY_SIZE (i386_mmx_names);
84 i386_mmx_regnum_p (struct gdbarch *gdbarch, int regnum)
86 int mm0_regnum = gdbarch_tdep (gdbarch)->mm0_regnum;
91 return (regnum >= mm0_regnum && regnum < mm0_regnum + i386_num_mmx_regs);
97 i386_sse_regnum_p (struct gdbarch *gdbarch, int regnum)
99 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
101 #define I387_ST0_REGNUM tdep->st0_regnum
102 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
104 if (I387_NUM_XMM_REGS == 0)
107 return (I387_XMM0_REGNUM <= regnum && regnum < I387_MXCSR_REGNUM);
109 #undef I387_ST0_REGNUM
110 #undef I387_NUM_XMM_REGS
114 i386_mxcsr_regnum_p (struct gdbarch *gdbarch, int regnum)
116 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
118 #define I387_ST0_REGNUM tdep->st0_regnum
119 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
121 if (I387_NUM_XMM_REGS == 0)
124 return (regnum == I387_MXCSR_REGNUM);
126 #undef I387_ST0_REGNUM
127 #undef I387_NUM_XMM_REGS
130 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
131 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
132 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
137 i386_fp_regnum_p (int regnum)
139 if (I387_ST0_REGNUM < 0)
142 return (I387_ST0_REGNUM <= regnum && regnum < I387_FCTRL_REGNUM);
146 i386_fpc_regnum_p (int regnum)
148 if (I387_ST0_REGNUM < 0)
151 return (I387_FCTRL_REGNUM <= regnum && regnum < I387_XMM0_REGNUM);
154 /* Return the name of register REG. */
157 i386_register_name (int reg)
159 if (i386_mmx_regnum_p (current_gdbarch, reg))
160 return i386_mmx_names[reg - I387_MM0_REGNUM];
162 if (reg >= 0 && reg < i386_num_register_names)
163 return i386_register_names[reg];
168 /* Convert a dbx register number REG to the appropriate register
169 number used by GDB. */
172 i386_dbx_reg_to_regnum (int reg)
174 /* This implements what GCC calls the "default" register map
175 (dbx_register_map[]). */
177 if (reg >= 0 && reg <= 7)
179 /* General-purpose registers. The debug info calls %ebp
180 register 4, and %esp register 5. */
187 else if (reg >= 12 && reg <= 19)
189 /* Floating-point registers. */
190 return reg - 12 + I387_ST0_REGNUM;
192 else if (reg >= 21 && reg <= 28)
195 return reg - 21 + I387_XMM0_REGNUM;
197 else if (reg >= 29 && reg <= 36)
200 return reg - 29 + I387_MM0_REGNUM;
203 /* This will hopefully provoke a warning. */
204 return NUM_REGS + NUM_PSEUDO_REGS;
207 /* Convert SVR4 register number REG to the appropriate register number
211 i386_svr4_reg_to_regnum (int reg)
213 /* This implements the GCC register map that tries to be compatible
214 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
216 /* The SVR4 register numbering includes %eip and %eflags, and
217 numbers the floating point registers differently. */
218 if (reg >= 0 && reg <= 9)
220 /* General-purpose registers. */
223 else if (reg >= 11 && reg <= 18)
225 /* Floating-point registers. */
226 return reg - 11 + I387_ST0_REGNUM;
230 /* The SSE and MMX registers have the same numbers as with dbx. */
231 return i386_dbx_reg_to_regnum (reg);
234 /* This will hopefully provoke a warning. */
235 return NUM_REGS + NUM_PSEUDO_REGS;
238 #undef I387_ST0_REGNUM
239 #undef I387_MM0_REGNUM
240 #undef I387_NUM_XMM_REGS
243 /* This is the variable that is set with "set disassembly-flavor", and
244 its legitimate values. */
245 static const char att_flavor[] = "att";
246 static const char intel_flavor[] = "intel";
247 static const char *valid_flavors[] =
253 static const char *disassembly_flavor = att_flavor;
256 /* Use the program counter to determine the contents and size of a
257 breakpoint instruction. Return a pointer to a string of bytes that
258 encode a breakpoint instruction, store the length of the string in
259 *LEN and optionally adjust *PC to point to the correct memory
260 location for inserting the breakpoint.
262 On the i386 we have a single breakpoint that fits in a single byte
263 and can be inserted anywhere.
265 This function is 64-bit safe. */
267 static const unsigned char *
268 i386_breakpoint_from_pc (CORE_ADDR *pc, int *len)
270 static unsigned char break_insn[] = { 0xcc }; /* int 3 */
272 *len = sizeof (break_insn);
276 #ifdef I386_REGNO_TO_SYMMETRY
277 #error "The Sequent Symmetry is no longer supported."
280 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
281 and %esp "belong" to the calling function. Therefore these
282 registers should be saved if they're going to be modified. */
284 /* The maximum number of saved registers. This should include all
285 registers mentioned above, and %eip. */
286 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
288 struct i386_frame_cache
295 /* Saved registers. */
296 CORE_ADDR saved_regs[I386_NUM_SAVED_REGS];
300 /* Stack space reserved for local variables. */
304 /* Allocate and initialize a frame cache. */
306 static struct i386_frame_cache *
307 i386_alloc_frame_cache (void)
309 struct i386_frame_cache *cache;
312 cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache);
316 cache->sp_offset = -4;
319 /* Saved registers. We initialize these to -1 since zero is a valid
320 offset (that's where %ebp is supposed to be stored). */
321 for (i = 0; i < I386_NUM_SAVED_REGS; i++)
322 cache->saved_regs[i] = -1;
324 cache->pc_in_eax = 0;
326 /* Frameless until proven otherwise. */
332 /* If the instruction at PC is a jump, return the address of its
333 target. Otherwise, return PC. */
336 i386_follow_jump (CORE_ADDR pc)
342 op = read_memory_unsigned_integer (pc, 1);
346 op = read_memory_unsigned_integer (pc + 1, 1);
352 /* Relative jump: if data16 == 0, disp32, else disp16. */
355 delta = read_memory_integer (pc + 2, 2);
357 /* Include the size of the jmp instruction (including the
363 delta = read_memory_integer (pc + 1, 4);
365 /* Include the size of the jmp instruction. */
370 /* Relative jump, disp8 (ignore data16). */
371 delta = read_memory_integer (pc + data16 + 1, 1);
380 /* Check whether PC points at a prologue for a function returning a
381 structure or union. If so, it updates CACHE and returns the
382 address of the first instruction after the code sequence that
383 removes the "hidden" argument from the stack or CURRENT_PC,
384 whichever is smaller. Otherwise, return PC. */
387 i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc,
388 struct i386_frame_cache *cache)
390 /* Functions that return a structure or union start with:
393 xchgl %eax, (%esp) 0x87 0x04 0x24
394 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
396 (the System V compiler puts out the second `xchg' instruction,
397 and the assembler doesn't try to optimize it, so the 'sib' form
398 gets generated). This sequence is used to get the address of the
399 return buffer for a function that returns a structure. */
400 static unsigned char proto1[3] = { 0x87, 0x04, 0x24 };
401 static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 };
402 unsigned char buf[4];
405 if (current_pc <= pc)
408 op = read_memory_unsigned_integer (pc, 1);
410 if (op != 0x58) /* popl %eax */
413 read_memory (pc + 1, buf, 4);
414 if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0)
417 if (current_pc == pc)
419 cache->sp_offset += 4;
423 if (current_pc == pc + 1)
425 cache->pc_in_eax = 1;
429 if (buf[1] == proto1[1])
436 i386_skip_probe (CORE_ADDR pc)
438 /* A function may start with
449 unsigned char buf[8];
452 op = read_memory_unsigned_integer (pc, 1);
454 if (op == 0x68 || op == 0x6a)
458 /* Skip past the `pushl' instruction; it has either a one-byte or a
459 four-byte operand, depending on the opcode. */
465 /* Read the following 8 bytes, which should be `call _probe' (6
466 bytes) followed by `addl $4,%esp' (2 bytes). */
467 read_memory (pc + delta, buf, sizeof (buf));
468 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
469 pc += delta + sizeof (buf);
475 /* Maximum instruction length we need to handle. */
476 #define I386_MAX_INSN_LEN 6
478 /* Instruction description. */
482 unsigned char insn[I386_MAX_INSN_LEN];
483 unsigned char mask[I386_MAX_INSN_LEN];
486 /* Search for the instruction at PC in the list SKIP_INSNS. Return
487 the first instruction description that matches. Otherwise, return
490 static struct i386_insn *
491 i386_match_insn (CORE_ADDR pc, struct i386_insn *skip_insns)
493 struct i386_insn *insn;
496 op = read_memory_unsigned_integer (pc, 1);
498 for (insn = skip_insns; insn->len > 0; insn++)
500 if ((op & insn->mask[0]) == insn->insn[0])
502 unsigned char buf[I386_MAX_INSN_LEN - 1];
505 gdb_assert (insn->len > 1);
506 gdb_assert (insn->len <= I386_MAX_INSN_LEN);
508 read_memory (pc + 1, buf, insn->len - 1);
509 for (i = 1; i < insn->len; i++)
511 if ((buf[i - 1] & insn->mask[i]) != insn->insn[i])
522 /* Some special instructions that might be migrated by GCC into the
523 part of the prologue that sets up the new stack frame. Because the
524 stack frame hasn't been setup yet, no registers have been saved
525 yet, and only the scratch registers %eax, %ecx and %edx can be
528 struct i386_insn i386_frame_setup_skip_insns[] =
530 /* Check for `movb imm8, r' and `movl imm32, r'.
532 ??? Should we handle 16-bit operand-sizes here? */
534 /* `movb imm8, %al' and `movb imm8, %ah' */
535 /* `movb imm8, %cl' and `movb imm8, %ch' */
536 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
537 /* `movb imm8, %dl' and `movb imm8, %dh' */
538 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
539 /* `movl imm32, %eax' and `movl imm32, %ecx' */
540 { 5, { 0xb8 }, { 0xfe } },
541 /* `movl imm32, %edx' */
542 { 5, { 0xba }, { 0xff } },
544 /* Check for `mov imm32, r32'. Note that there is an alternative
545 encoding for `mov m32, %eax'.
547 ??? Should we handle SIB adressing here?
548 ??? Should we handle 16-bit operand-sizes here? */
550 /* `movl m32, %eax' */
551 { 5, { 0xa1 }, { 0xff } },
552 /* `movl m32, %eax' and `mov; m32, %ecx' */
553 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
554 /* `movl m32, %edx' */
555 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
557 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
558 Because of the symmetry, there are actually two ways to encode
559 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
560 opcode bytes 0x31 and 0x33 for `xorl'. */
562 /* `subl %eax, %eax' */
563 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
564 /* `subl %ecx, %ecx' */
565 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
566 /* `subl %edx, %edx' */
567 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
568 /* `xorl %eax, %eax' */
569 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
570 /* `xorl %ecx, %ecx' */
571 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
572 /* `xorl %edx, %edx' */
573 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
577 /* Check whether PC points at a code that sets up a new stack frame.
578 If so, it updates CACHE and returns the address of the first
579 instruction after the sequence that sets up the frame or LIMIT,
580 whichever is smaller. If we don't recognize the code, return PC. */
583 i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR limit,
584 struct i386_frame_cache *cache)
586 struct i386_insn *insn;
593 op = read_memory_unsigned_integer (pc, 1);
595 if (op == 0x55) /* pushl %ebp */
597 /* Take into account that we've executed the `pushl %ebp' that
598 starts this instruction sequence. */
599 cache->saved_regs[I386_EBP_REGNUM] = 0;
600 cache->sp_offset += 4;
603 /* If that's all, return now. */
607 /* Check for some special instructions that might be migrated by
608 GCC into the prologue and skip them. At this point in the
609 prologue, code should only touch the scratch registers %eax,
610 %ecx and %edx, so while the number of posibilities is sheer,
613 Make sure we only skip these instructions if we later see the
614 `movl %esp, %ebp' that actually sets up the frame. */
615 while (pc + skip < limit)
617 insn = i386_match_insn (pc + skip, i386_frame_setup_skip_insns);
624 /* If that's all, return now. */
625 if (limit <= pc + skip)
628 op = read_memory_unsigned_integer (pc + skip, 1);
630 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
634 if (read_memory_unsigned_integer (pc + skip + 1, 1) != 0xec)
638 if (read_memory_unsigned_integer (pc + skip + 1, 1) != 0xe5)
645 /* OK, we actually have a frame. We just don't know how large
646 it is yet. Set its size to zero. We'll adjust it if
647 necessary. We also now commit to skipping the special
648 instructions mentioned before. */
652 /* If that's all, return now. */
656 /* Check for stack adjustment
660 NOTE: You can't subtract a 16-bit immediate from a 32-bit
661 reg, so we don't have to worry about a data16 prefix. */
662 op = read_memory_unsigned_integer (pc, 1);
665 /* `subl' with 8-bit immediate. */
666 if (read_memory_unsigned_integer (pc + 1, 1) != 0xec)
667 /* Some instruction starting with 0x83 other than `subl'. */
670 /* `subl' with signed 8-bit immediate (though it wouldn't
671 make sense to be negative). */
672 cache->locals = read_memory_integer (pc + 2, 1);
677 /* Maybe it is `subl' with a 32-bit immediate. */
678 if (read_memory_unsigned_integer (pc + 1, 1) != 0xec)
679 /* Some instruction starting with 0x81 other than `subl'. */
682 /* It is `subl' with a 32-bit immediate. */
683 cache->locals = read_memory_integer (pc + 2, 4);
688 /* Some instruction other than `subl'. */
692 else if (op == 0xc8) /* enter */
694 cache->locals = read_memory_unsigned_integer (pc + 1, 2);
701 /* Check whether PC points at code that saves registers on the stack.
702 If so, it updates CACHE and returns the address of the first
703 instruction after the register saves or CURRENT_PC, whichever is
704 smaller. Otherwise, return PC. */
707 i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc,
708 struct i386_frame_cache *cache)
710 CORE_ADDR offset = 0;
714 if (cache->locals > 0)
715 offset -= cache->locals;
716 for (i = 0; i < 8 && pc < current_pc; i++)
718 op = read_memory_unsigned_integer (pc, 1);
719 if (op < 0x50 || op > 0x57)
723 cache->saved_regs[op - 0x50] = offset;
724 cache->sp_offset += 4;
731 /* Do a full analysis of the prologue at PC and update CACHE
732 accordingly. Bail out early if CURRENT_PC is reached. Return the
733 address where the analysis stopped.
735 We handle these cases:
737 The startup sequence can be at the start of the function, or the
738 function can start with a branch to startup code at the end.
740 %ebp can be set up with either the 'enter' instruction, or "pushl
741 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
742 once used in the System V compiler).
744 Local space is allocated just below the saved %ebp by either the
745 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
746 16-bit unsigned argument for space to allocate, and the 'addl'
747 instruction could have either a signed byte, or 32-bit immediate.
749 Next, the registers used by this function are pushed. With the
750 System V compiler they will always be in the order: %edi, %esi,
751 %ebx (and sometimes a harmless bug causes it to also save but not
752 restore %eax); however, the code below is willing to see the pushes
753 in any order, and will handle up to 8 of them.
755 If the setup sequence is at the end of the function, then the next
756 instruction will be a branch back to the start. */
759 i386_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
760 struct i386_frame_cache *cache)
762 pc = i386_follow_jump (pc);
763 pc = i386_analyze_struct_return (pc, current_pc, cache);
764 pc = i386_skip_probe (pc);
765 pc = i386_analyze_frame_setup (pc, current_pc, cache);
766 return i386_analyze_register_saves (pc, current_pc, cache);
769 /* Return PC of first real instruction. */
772 i386_skip_prologue (CORE_ADDR start_pc)
774 static unsigned char pic_pat[6] =
776 0xe8, 0, 0, 0, 0, /* call 0x0 */
777 0x5b, /* popl %ebx */
779 struct i386_frame_cache cache;
785 pc = i386_analyze_prologue (start_pc, 0xffffffff, &cache);
786 if (cache.locals < 0)
789 /* Found valid frame setup. */
791 /* The native cc on SVR4 in -K PIC mode inserts the following code
792 to get the address of the global offset table (GOT) into register
797 movl %ebx,x(%ebp) (optional)
800 This code is with the rest of the prologue (at the end of the
801 function), so we have to skip it to get to the first real
802 instruction at the start of the function. */
804 for (i = 0; i < 6; i++)
806 op = read_memory_unsigned_integer (pc + i, 1);
807 if (pic_pat[i] != op)
814 op = read_memory_unsigned_integer (pc + delta, 1);
816 if (op == 0x89) /* movl %ebx, x(%ebp) */
818 op = read_memory_unsigned_integer (pc + delta + 1, 1);
820 if (op == 0x5d) /* One byte offset from %ebp. */
822 else if (op == 0x9d) /* Four byte offset from %ebp. */
824 else /* Unexpected instruction. */
827 op = read_memory_unsigned_integer (pc + delta, 1);
831 if (delta > 0 && op == 0x81
832 && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3);
838 /* If the function starts with a branch (to startup code at the end)
839 the last instruction should bring us back to the first
840 instruction of the real code. */
841 if (i386_follow_jump (start_pc) != start_pc)
842 pc = i386_follow_jump (pc);
847 /* This function is 64-bit safe. */
850 i386_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
854 frame_unwind_register (next_frame, PC_REGNUM, buf);
855 return extract_typed_address (buf, builtin_type_void_func_ptr);
861 static struct i386_frame_cache *
862 i386_frame_cache (struct frame_info *next_frame, void **this_cache)
864 struct i386_frame_cache *cache;
871 cache = i386_alloc_frame_cache ();
874 /* In principle, for normal frames, %ebp holds the frame pointer,
875 which holds the base address for the current stack frame.
876 However, for functions that don't need it, the frame pointer is
877 optional. For these "frameless" functions the frame pointer is
878 actually the frame pointer of the calling frame. Signal
879 trampolines are just a special case of a "frameless" function.
880 They (usually) share their frame pointer with the frame that was
881 in progress when the signal occurred. */
883 frame_unwind_register (next_frame, I386_EBP_REGNUM, buf);
884 cache->base = extract_unsigned_integer (buf, 4);
885 if (cache->base == 0)
888 /* For normal frames, %eip is stored at 4(%ebp). */
889 cache->saved_regs[I386_EIP_REGNUM] = 4;
891 cache->pc = frame_func_unwind (next_frame);
893 i386_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache);
895 if (cache->locals < 0)
897 /* We didn't find a valid frame, which means that CACHE->base
898 currently holds the frame pointer for our calling frame. If
899 we're at the start of a function, or somewhere half-way its
900 prologue, the function's frame probably hasn't been fully
901 setup yet. Try to reconstruct the base address for the stack
902 frame by looking at the stack pointer. For truly "frameless"
903 functions this might work too. */
905 frame_unwind_register (next_frame, I386_ESP_REGNUM, buf);
906 cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset;
909 /* Now that we have the base address for the stack frame we can
910 calculate the value of %esp in the calling frame. */
911 cache->saved_sp = cache->base + 8;
913 /* Adjust all the saved registers such that they contain addresses
914 instead of offsets. */
915 for (i = 0; i < I386_NUM_SAVED_REGS; i++)
916 if (cache->saved_regs[i] != -1)
917 cache->saved_regs[i] += cache->base;
923 i386_frame_this_id (struct frame_info *next_frame, void **this_cache,
924 struct frame_id *this_id)
926 struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache);
928 /* This marks the outermost frame. */
929 if (cache->base == 0)
932 /* See the end of i386_push_dummy_call. */
933 (*this_id) = frame_id_build (cache->base + 8, cache->pc);
937 i386_frame_prev_register (struct frame_info *next_frame, void **this_cache,
938 int regnum, int *optimizedp,
939 enum lval_type *lvalp, CORE_ADDR *addrp,
940 int *realnump, void *valuep)
942 struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache);
944 gdb_assert (regnum >= 0);
946 /* The System V ABI says that:
948 "The flags register contains the system flags, such as the
949 direction flag and the carry flag. The direction flag must be
950 set to the forward (that is, zero) direction before entry and
951 upon exit from a function. Other user flags have no specified
952 role in the standard calling sequence and are not preserved."
954 To guarantee the "upon exit" part of that statement we fake a
955 saved flags register that has its direction flag cleared.
957 Note that GCC doesn't seem to rely on the fact that the direction
958 flag is cleared after a function return; it always explicitly
959 clears the flag before operations where it matters.
961 FIXME: kettenis/20030316: I'm not quite sure whether this is the
962 right thing to do. The way we fake the flags register here makes
963 it impossible to change it. */
965 if (regnum == I386_EFLAGS_REGNUM)
975 /* Clear the direction flag. */
976 val = frame_unwind_register_unsigned (next_frame,
979 store_unsigned_integer (valuep, 4, val);
985 if (regnum == I386_EIP_REGNUM && cache->pc_in_eax)
987 frame_register_unwind (next_frame, I386_EAX_REGNUM,
988 optimizedp, lvalp, addrp, realnump, valuep);
992 if (regnum == I386_ESP_REGNUM && cache->saved_sp)
1000 /* Store the value. */
1001 store_unsigned_integer (valuep, 4, cache->saved_sp);
1006 if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1)
1009 *lvalp = lval_memory;
1010 *addrp = cache->saved_regs[regnum];
1014 /* Read the value in from memory. */
1015 read_memory (*addrp, valuep,
1016 register_size (current_gdbarch, regnum));
1021 frame_register_unwind (next_frame, regnum,
1022 optimizedp, lvalp, addrp, realnump, valuep);
1025 static const struct frame_unwind i386_frame_unwind =
1029 i386_frame_prev_register
1032 static const struct frame_unwind *
1033 i386_frame_sniffer (struct frame_info *next_frame)
1035 return &i386_frame_unwind;
1039 /* Signal trampolines. */
1041 static struct i386_frame_cache *
1042 i386_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache)
1044 struct i386_frame_cache *cache;
1045 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1052 cache = i386_alloc_frame_cache ();
1054 frame_unwind_register (next_frame, I386_ESP_REGNUM, buf);
1055 cache->base = extract_unsigned_integer (buf, 4) - 4;
1057 addr = tdep->sigcontext_addr (next_frame);
1058 if (tdep->sc_reg_offset)
1062 gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS);
1064 for (i = 0; i < tdep->sc_num_regs; i++)
1065 if (tdep->sc_reg_offset[i] != -1)
1066 cache->saved_regs[i] = addr + tdep->sc_reg_offset[i];
1070 cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset;
1071 cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset;
1074 *this_cache = cache;
1079 i386_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache,
1080 struct frame_id *this_id)
1082 struct i386_frame_cache *cache =
1083 i386_sigtramp_frame_cache (next_frame, this_cache);
1085 /* See the end of i386_push_dummy_call. */
1086 (*this_id) = frame_id_build (cache->base + 8, frame_pc_unwind (next_frame));
1090 i386_sigtramp_frame_prev_register (struct frame_info *next_frame,
1092 int regnum, int *optimizedp,
1093 enum lval_type *lvalp, CORE_ADDR *addrp,
1094 int *realnump, void *valuep)
1096 /* Make sure we've initialized the cache. */
1097 i386_sigtramp_frame_cache (next_frame, this_cache);
1099 i386_frame_prev_register (next_frame, this_cache, regnum,
1100 optimizedp, lvalp, addrp, realnump, valuep);
1103 static const struct frame_unwind i386_sigtramp_frame_unwind =
1106 i386_sigtramp_frame_this_id,
1107 i386_sigtramp_frame_prev_register
1110 static const struct frame_unwind *
1111 i386_sigtramp_frame_sniffer (struct frame_info *next_frame)
1113 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (next_frame));
1115 /* We shouldn't even bother if we don't have a sigcontext_addr
1117 if (tdep->sigcontext_addr == NULL)
1120 if (tdep->sigtramp_p != NULL)
1122 if (tdep->sigtramp_p (next_frame))
1123 return &i386_sigtramp_frame_unwind;
1126 if (tdep->sigtramp_start != 0)
1128 CORE_ADDR pc = frame_pc_unwind (next_frame);
1130 gdb_assert (tdep->sigtramp_end != 0);
1131 if (pc >= tdep->sigtramp_start && pc < tdep->sigtramp_end)
1132 return &i386_sigtramp_frame_unwind;
1140 i386_frame_base_address (struct frame_info *next_frame, void **this_cache)
1142 struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache);
1147 static const struct frame_base i386_frame_base =
1150 i386_frame_base_address,
1151 i386_frame_base_address,
1152 i386_frame_base_address
1155 static struct frame_id
1156 i386_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1161 frame_unwind_register (next_frame, I386_EBP_REGNUM, buf);
1162 fp = extract_unsigned_integer (buf, 4);
1164 /* See the end of i386_push_dummy_call. */
1165 return frame_id_build (fp + 8, frame_pc_unwind (next_frame));
1169 /* Figure out where the longjmp will land. Slurp the args out of the
1170 stack. We expect the first arg to be a pointer to the jmp_buf
1171 structure from which we extract the address that we will land at.
1172 This address is copied into PC. This routine returns non-zero on
1175 This function is 64-bit safe. */
1178 i386_get_longjmp_target (CORE_ADDR *pc)
1181 CORE_ADDR sp, jb_addr;
1182 int jb_pc_offset = gdbarch_tdep (current_gdbarch)->jb_pc_offset;
1183 int len = TYPE_LENGTH (builtin_type_void_func_ptr);
1185 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1186 longjmp will land. */
1187 if (jb_pc_offset == -1)
1190 /* Don't use I386_ESP_REGNUM here, since this function is also used
1192 regcache_cooked_read (current_regcache, SP_REGNUM, buf);
1193 sp = extract_typed_address (buf, builtin_type_void_data_ptr);
1194 if (target_read_memory (sp + len, buf, len))
1197 jb_addr = extract_typed_address (buf, builtin_type_void_data_ptr);
1198 if (target_read_memory (jb_addr + jb_pc_offset, buf, len))
1201 *pc = extract_typed_address (buf, builtin_type_void_func_ptr);
1207 i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1208 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
1209 struct value **args, CORE_ADDR sp, int struct_return,
1210 CORE_ADDR struct_addr)
1215 /* Push arguments in reverse order. */
1216 for (i = nargs - 1; i >= 0; i--)
1218 int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args[i]));
1220 /* The System V ABI says that:
1222 "An argument's size is increased, if necessary, to make it a
1223 multiple of [32-bit] words. This may require tail padding,
1224 depending on the size of the argument."
1226 This makes sure the stack says word-aligned. */
1227 sp -= (len + 3) & ~3;
1228 write_memory (sp, VALUE_CONTENTS_ALL (args[i]), len);
1231 /* Push value address. */
1235 store_unsigned_integer (buf, 4, struct_addr);
1236 write_memory (sp, buf, 4);
1239 /* Store return address. */
1241 store_unsigned_integer (buf, 4, bp_addr);
1242 write_memory (sp, buf, 4);
1244 /* Finally, update the stack pointer... */
1245 store_unsigned_integer (buf, 4, sp);
1246 regcache_cooked_write (regcache, I386_ESP_REGNUM, buf);
1248 /* ...and fake a frame pointer. */
1249 regcache_cooked_write (regcache, I386_EBP_REGNUM, buf);
1251 /* MarkK wrote: This "+ 8" is all over the place:
1252 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1253 i386_unwind_dummy_id). It's there, since all frame unwinders for
1254 a given target have to agree (within a certain margin) on the
1255 definition of the stack address of a frame. Otherwise
1256 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1257 stack address *before* the function call as a frame's CFA. On
1258 the i386, when %ebp is used as a frame pointer, the offset
1259 between the contents %ebp and the CFA as defined by GCC. */
1263 /* These registers are used for returning integers (and on some
1264 targets also for returning `struct' and `union' values when their
1265 size and alignment match an integer type). */
1266 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1267 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1269 /* Read, for architecture GDBARCH, a function return value of TYPE
1270 from REGCACHE, and copy that into VALBUF. */
1273 i386_extract_return_value (struct gdbarch *gdbarch, struct type *type,
1274 struct regcache *regcache, void *valbuf)
1276 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1277 int len = TYPE_LENGTH (type);
1278 char buf[I386_MAX_REGISTER_SIZE];
1280 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1282 if (tdep->st0_regnum < 0)
1284 warning ("Cannot find floating-point return value.");
1285 memset (valbuf, 0, len);
1289 /* Floating-point return values can be found in %st(0). Convert
1290 its contents to the desired type. This is probably not
1291 exactly how it would happen on the target itself, but it is
1292 the best we can do. */
1293 regcache_raw_read (regcache, I386_ST0_REGNUM, buf);
1294 convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type);
1298 int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM);
1299 int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM);
1301 if (len <= low_size)
1303 regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf);
1304 memcpy (valbuf, buf, len);
1306 else if (len <= (low_size + high_size))
1308 regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf);
1309 memcpy (valbuf, buf, low_size);
1310 regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf);
1311 memcpy ((char *) valbuf + low_size, buf, len - low_size);
1314 internal_error (__FILE__, __LINE__,
1315 "Cannot extract return value of %d bytes long.", len);
1319 /* Write, for architecture GDBARCH, a function return value of TYPE
1320 from VALBUF into REGCACHE. */
1323 i386_store_return_value (struct gdbarch *gdbarch, struct type *type,
1324 struct regcache *regcache, const void *valbuf)
1326 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1327 int len = TYPE_LENGTH (type);
1329 /* Define I387_ST0_REGNUM such that we use the proper definitions
1330 for the architecture. */
1331 #define I387_ST0_REGNUM I386_ST0_REGNUM
1333 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1336 char buf[I386_MAX_REGISTER_SIZE];
1338 if (tdep->st0_regnum < 0)
1340 warning ("Cannot set floating-point return value.");
1344 /* Returning floating-point values is a bit tricky. Apart from
1345 storing the return value in %st(0), we have to simulate the
1346 state of the FPU at function return point. */
1348 /* Convert the value found in VALBUF to the extended
1349 floating-point format used by the FPU. This is probably
1350 not exactly how it would happen on the target itself, but
1351 it is the best we can do. */
1352 convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext);
1353 regcache_raw_write (regcache, I386_ST0_REGNUM, buf);
1355 /* Set the top of the floating-point register stack to 7. The
1356 actual value doesn't really matter, but 7 is what a normal
1357 function return would end up with if the program started out
1358 with a freshly initialized FPU. */
1359 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
1361 regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM, fstat);
1363 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1364 the floating-point register stack to 7, the appropriate value
1365 for the tag word is 0x3fff. */
1366 regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM, 0x3fff);
1370 int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM);
1371 int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM);
1373 if (len <= low_size)
1374 regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf);
1375 else if (len <= (low_size + high_size))
1377 regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf);
1378 regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0,
1379 len - low_size, (char *) valbuf + low_size);
1382 internal_error (__FILE__, __LINE__,
1383 "Cannot store return value of %d bytes long.", len);
1386 #undef I387_ST0_REGNUM
1390 /* This is the variable that is set with "set struct-convention", and
1391 its legitimate values. */
1392 static const char default_struct_convention[] = "default";
1393 static const char pcc_struct_convention[] = "pcc";
1394 static const char reg_struct_convention[] = "reg";
1395 static const char *valid_conventions[] =
1397 default_struct_convention,
1398 pcc_struct_convention,
1399 reg_struct_convention,
1402 static const char *struct_convention = default_struct_convention;
1404 /* Return non-zero if TYPE, which is assumed to be a structure or
1405 union type, should be returned in registers for architecture
1409 i386_reg_struct_return_p (struct gdbarch *gdbarch, struct type *type)
1411 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1412 enum type_code code = TYPE_CODE (type);
1413 int len = TYPE_LENGTH (type);
1415 gdb_assert (code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION);
1417 if (struct_convention == pcc_struct_convention
1418 || (struct_convention == default_struct_convention
1419 && tdep->struct_return == pcc_struct_return))
1422 return (len == 1 || len == 2 || len == 4 || len == 8);
1425 /* Determine, for architecture GDBARCH, how a return value of TYPE
1426 should be returned. If it is supposed to be returned in registers,
1427 and READBUF is non-zero, read the appropriate value from REGCACHE,
1428 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1429 from WRITEBUF into REGCACHE. */
1431 static enum return_value_convention
1432 i386_return_value (struct gdbarch *gdbarch, struct type *type,
1433 struct regcache *regcache, void *readbuf,
1434 const void *writebuf)
1436 enum type_code code = TYPE_CODE (type);
1438 if ((code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION)
1439 && !i386_reg_struct_return_p (gdbarch, type))
1441 /* The System V ABI says that:
1443 "A function that returns a structure or union also sets %eax
1444 to the value of the original address of the caller's area
1445 before it returns. Thus when the caller receives control
1446 again, the address of the returned object resides in register
1447 %eax and can be used to access the object."
1449 So the ABI guarantees that we can always find the return
1450 value just after the function has returned. */
1456 regcache_raw_read_unsigned (regcache, I386_EAX_REGNUM, &addr);
1457 read_memory (addr, readbuf, TYPE_LENGTH (type));
1460 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
1463 /* This special case is for structures consisting of a single
1464 `float' or `double' member. These structures are returned in
1465 %st(0). For these structures, we call ourselves recursively,
1466 changing TYPE into the type of the first member of the structure.
1467 Since that should work for all structures that have only one
1468 member, we don't bother to check the member's type here. */
1469 if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
1471 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1472 return i386_return_value (gdbarch, type, regcache, readbuf, writebuf);
1476 i386_extract_return_value (gdbarch, type, regcache, readbuf);
1478 i386_store_return_value (gdbarch, type, regcache, writebuf);
1480 return RETURN_VALUE_REGISTER_CONVENTION;
1484 /* Return the GDB type object for the "standard" data type of data in
1485 register REGNUM. Perhaps %esi and %edi should go here, but
1486 potentially they could be used for things other than address. */
1488 static struct type *
1489 i386_register_type (struct gdbarch *gdbarch, int regnum)
1491 if (regnum == I386_EIP_REGNUM
1492 || regnum == I386_EBP_REGNUM || regnum == I386_ESP_REGNUM)
1493 return lookup_pointer_type (builtin_type_void);
1495 if (i386_fp_regnum_p (regnum))
1496 return builtin_type_i387_ext;
1498 if (i386_sse_regnum_p (gdbarch, regnum))
1499 return builtin_type_vec128i;
1501 if (i386_mmx_regnum_p (gdbarch, regnum))
1502 return builtin_type_vec64i;
1504 return builtin_type_int;
1507 /* Map a cooked register onto a raw register or memory. For the i386,
1508 the MMX registers need to be mapped onto floating point registers. */
1511 i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum)
1513 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
1518 /* Define I387_ST0_REGNUM such that we use the proper definitions
1519 for REGCACHE's architecture. */
1520 #define I387_ST0_REGNUM tdep->st0_regnum
1522 mmxreg = regnum - tdep->mm0_regnum;
1523 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
1524 tos = (fstat >> 11) & 0x7;
1525 fpreg = (mmxreg + tos) % 8;
1527 return (I387_ST0_REGNUM + fpreg);
1529 #undef I387_ST0_REGNUM
1533 i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
1534 int regnum, void *buf)
1536 if (i386_mmx_regnum_p (gdbarch, regnum))
1538 char mmx_buf[MAX_REGISTER_SIZE];
1539 int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
1541 /* Extract (always little endian). */
1542 regcache_raw_read (regcache, fpnum, mmx_buf);
1543 memcpy (buf, mmx_buf, register_size (gdbarch, regnum));
1546 regcache_raw_read (regcache, regnum, buf);
1550 i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1551 int regnum, const void *buf)
1553 if (i386_mmx_regnum_p (gdbarch, regnum))
1555 char mmx_buf[MAX_REGISTER_SIZE];
1556 int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
1559 regcache_raw_read (regcache, fpnum, mmx_buf);
1560 /* ... Modify ... (always little endian). */
1561 memcpy (mmx_buf, buf, register_size (gdbarch, regnum));
1563 regcache_raw_write (regcache, fpnum, mmx_buf);
1566 regcache_raw_write (regcache, regnum, buf);
1570 /* Return the register number of the register allocated by GCC after
1571 REGNUM, or -1 if there is no such register. */
1574 i386_next_regnum (int regnum)
1576 /* GCC allocates the registers in the order:
1578 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1580 Since storing a variable in %esp doesn't make any sense we return
1581 -1 for %ebp and for %esp itself. */
1582 static int next_regnum[] =
1584 I386_EDX_REGNUM, /* Slot for %eax. */
1585 I386_EBX_REGNUM, /* Slot for %ecx. */
1586 I386_ECX_REGNUM, /* Slot for %edx. */
1587 I386_ESI_REGNUM, /* Slot for %ebx. */
1588 -1, -1, /* Slots for %esp and %ebp. */
1589 I386_EDI_REGNUM, /* Slot for %esi. */
1590 I386_EBP_REGNUM /* Slot for %edi. */
1593 if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0]))
1594 return next_regnum[regnum];
1599 /* Return nonzero if a value of type TYPE stored in register REGNUM
1600 needs any special handling. */
1603 i386_convert_register_p (int regnum, struct type *type)
1605 int len = TYPE_LENGTH (type);
1607 /* Values may be spread across multiple registers. Most debugging
1608 formats aren't expressive enough to specify the locations, so
1609 some heuristics is involved. Right now we only handle types that
1610 have a length that is a multiple of the word size, since GCC
1611 doesn't seem to put any other types into registers. */
1612 if (len > 4 && len % 4 == 0)
1614 int last_regnum = regnum;
1618 last_regnum = i386_next_regnum (last_regnum);
1622 if (last_regnum != -1)
1626 return i386_fp_regnum_p (regnum);
1629 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1630 return its contents in TO. */
1633 i386_register_to_value (struct frame_info *frame, int regnum,
1634 struct type *type, void *to)
1636 int len = TYPE_LENGTH (type);
1639 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1640 available in FRAME (i.e. if it wasn't saved)? */
1642 if (i386_fp_regnum_p (regnum))
1644 i387_register_to_value (frame, regnum, type, to);
1648 /* Read a value spread across multiple registers. */
1650 gdb_assert (len > 4 && len % 4 == 0);
1654 gdb_assert (regnum != -1);
1655 gdb_assert (register_size (current_gdbarch, regnum) == 4);
1657 get_frame_register (frame, regnum, buf);
1658 regnum = i386_next_regnum (regnum);
1664 /* Write the contents FROM of a value of type TYPE into register
1665 REGNUM in frame FRAME. */
1668 i386_value_to_register (struct frame_info *frame, int regnum,
1669 struct type *type, const void *from)
1671 int len = TYPE_LENGTH (type);
1672 const char *buf = from;
1674 if (i386_fp_regnum_p (regnum))
1676 i387_value_to_register (frame, regnum, type, from);
1680 /* Write a value spread across multiple registers. */
1682 gdb_assert (len > 4 && len % 4 == 0);
1686 gdb_assert (regnum != -1);
1687 gdb_assert (register_size (current_gdbarch, regnum) == 4);
1689 put_frame_register (frame, regnum, buf);
1690 regnum = i386_next_regnum (regnum);
1696 /* Supply register REGNUM from the buffer specified by GREGS and LEN
1697 in the general-purpose register set REGSET to register cache
1698 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
1701 i386_supply_gregset (const struct regset *regset, struct regcache *regcache,
1702 int regnum, const void *gregs, size_t len)
1704 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
1705 const char *regs = gregs;
1708 gdb_assert (len == tdep->sizeof_gregset);
1710 for (i = 0; i < tdep->gregset_num_regs; i++)
1712 if ((regnum == i || regnum == -1)
1713 && tdep->gregset_reg_offset[i] != -1)
1714 regcache_raw_supply (regcache, i, regs + tdep->gregset_reg_offset[i]);
1718 /* Collect register REGNUM from the register cache REGCACHE and store
1719 it in the buffer specified by GREGS and LEN as described by the
1720 general-purpose register set REGSET. If REGNUM is -1, do this for
1721 all registers in REGSET. */
1724 i386_collect_gregset (const struct regset *regset,
1725 const struct regcache *regcache,
1726 int regnum, void *gregs, size_t len)
1728 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
1732 gdb_assert (len == tdep->sizeof_gregset);
1734 for (i = 0; i < tdep->gregset_num_regs; i++)
1736 if ((regnum == i || regnum == -1)
1737 && tdep->gregset_reg_offset[i] != -1)
1738 regcache_raw_collect (regcache, i, regs + tdep->gregset_reg_offset[i]);
1742 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
1743 in the floating-point register set REGSET to register cache
1744 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
1747 i386_supply_fpregset (const struct regset *regset, struct regcache *regcache,
1748 int regnum, const void *fpregs, size_t len)
1750 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
1752 if (len == I387_SIZEOF_FXSAVE)
1754 i387_supply_fxsave (regcache, regnum, fpregs);
1758 gdb_assert (len == tdep->sizeof_fpregset);
1759 i387_supply_fsave (regcache, regnum, fpregs);
1762 /* Collect register REGNUM from the register cache REGCACHE and store
1763 it in the buffer specified by FPREGS and LEN as described by the
1764 floating-point register set REGSET. If REGNUM is -1, do this for
1765 all registers in REGSET. */
1768 i386_collect_fpregset (const struct regset *regset,
1769 const struct regcache *regcache,
1770 int regnum, void *fpregs, size_t len)
1772 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
1774 if (len == I387_SIZEOF_FXSAVE)
1776 i387_collect_fxsave (regcache, regnum, fpregs);
1780 gdb_assert (len == tdep->sizeof_fpregset);
1781 i387_collect_fsave (regcache, regnum, fpregs);
1784 /* Return the appropriate register set for the core section identified
1785 by SECT_NAME and SECT_SIZE. */
1787 const struct regset *
1788 i386_regset_from_core_section (struct gdbarch *gdbarch,
1789 const char *sect_name, size_t sect_size)
1791 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1793 if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset)
1795 if (tdep->gregset == NULL)
1796 tdep->gregset = regset_alloc (gdbarch, i386_supply_gregset,
1797 i386_collect_gregset);
1798 return tdep->gregset;
1801 if ((strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset)
1802 || (strcmp (sect_name, ".reg-xfp") == 0
1803 && sect_size == I387_SIZEOF_FXSAVE))
1805 if (tdep->fpregset == NULL)
1806 tdep->fpregset = regset_alloc (gdbarch, i386_supply_fpregset,
1807 i386_collect_fpregset);
1808 return tdep->fpregset;
1815 #ifdef STATIC_TRANSFORM_NAME
1816 /* SunPRO encodes the static variables. This is not related to C++
1817 mangling, it is done for C too. */
1820 sunpro_static_transform_name (char *name)
1823 if (IS_STATIC_TRANSFORM_NAME (name))
1825 /* For file-local statics there will be a period, a bunch of
1826 junk (the contents of which match a string given in the
1827 N_OPT), a period and the name. For function-local statics
1828 there will be a bunch of junk (which seems to change the
1829 second character from 'A' to 'B'), a period, the name of the
1830 function, and the name. So just skip everything before the
1832 p = strrchr (name, '.');
1838 #endif /* STATIC_TRANSFORM_NAME */
1841 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1844 i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name)
1846 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
1848 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
1849 struct minimal_symbol *indsym =
1850 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
1851 char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0;
1855 if (strncmp (symname, "__imp_", 6) == 0
1856 || strncmp (symname, "_imp_", 5) == 0)
1857 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
1860 return 0; /* Not a trampoline. */
1864 /* Return whether the frame preceding NEXT_FRAME corresponds to a
1865 sigtramp routine. */
1868 i386_sigtramp_p (struct frame_info *next_frame)
1870 CORE_ADDR pc = frame_pc_unwind (next_frame);
1873 find_pc_partial_function (pc, &name, NULL, NULL);
1874 return (name && strcmp ("_sigtramp", name) == 0);
1878 /* We have two flavours of disassembly. The machinery on this page
1879 deals with switching between those. */
1882 i386_print_insn (bfd_vma pc, struct disassemble_info *info)
1884 gdb_assert (disassembly_flavor == att_flavor
1885 || disassembly_flavor == intel_flavor);
1887 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1888 constified, cast to prevent a compiler warning. */
1889 info->disassembler_options = (char *) disassembly_flavor;
1890 info->mach = gdbarch_bfd_arch_info (current_gdbarch)->mach;
1892 return print_insn_i386 (pc, info);
1896 /* There are a few i386 architecture variants that differ only
1897 slightly from the generic i386 target. For now, we don't give them
1898 their own source file, but include them here. As a consequence,
1899 they'll always be included. */
1901 /* System V Release 4 (SVR4). */
1903 /* Return whether the frame preceding NEXT_FRAME corresponds to a SVR4
1904 sigtramp routine. */
1907 i386_svr4_sigtramp_p (struct frame_info *next_frame)
1909 CORE_ADDR pc = frame_pc_unwind (next_frame);
1912 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1913 currently unknown. */
1914 find_pc_partial_function (pc, &name, NULL, NULL);
1915 return (name && (strcmp ("_sigreturn", name) == 0
1916 || strcmp ("_sigacthandler", name) == 0
1917 || strcmp ("sigvechandler", name) == 0));
1920 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1921 routine, return the address of the associated sigcontext (ucontext)
1925 i386_svr4_sigcontext_addr (struct frame_info *next_frame)
1930 frame_unwind_register (next_frame, I386_ESP_REGNUM, buf);
1931 sp = extract_unsigned_integer (buf, 4);
1933 return read_memory_unsigned_integer (sp + 8, 4);
1940 i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1942 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
1943 set_gdbarch_stab_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
1946 /* System V Release 4 (SVR4). */
1949 i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1951 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1953 /* System V Release 4 uses ELF. */
1954 i386_elf_init_abi (info, gdbarch);
1956 /* System V Release 4 has shared libraries. */
1957 set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section);
1958 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
1960 tdep->sigtramp_p = i386_svr4_sigtramp_p;
1961 tdep->sigcontext_addr = i386_svr4_sigcontext_addr;
1962 tdep->sc_pc_offset = 36 + 14 * 4;
1963 tdep->sc_sp_offset = 36 + 17 * 4;
1965 tdep->jb_pc_offset = 20;
1971 i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1973 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1975 /* DJGPP doesn't have any special frames for signal handlers. */
1976 tdep->sigtramp_p = NULL;
1978 tdep->jb_pc_offset = 36;
1984 i386_nw_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1986 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1988 tdep->jb_pc_offset = 24;
1992 /* i386 register groups. In addition to the normal groups, add "mmx"
1995 static struct reggroup *i386_sse_reggroup;
1996 static struct reggroup *i386_mmx_reggroup;
1999 i386_init_reggroups (void)
2001 i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP);
2002 i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP);
2006 i386_add_reggroups (struct gdbarch *gdbarch)
2008 reggroup_add (gdbarch, i386_sse_reggroup);
2009 reggroup_add (gdbarch, i386_mmx_reggroup);
2010 reggroup_add (gdbarch, general_reggroup);
2011 reggroup_add (gdbarch, float_reggroup);
2012 reggroup_add (gdbarch, all_reggroup);
2013 reggroup_add (gdbarch, save_reggroup);
2014 reggroup_add (gdbarch, restore_reggroup);
2015 reggroup_add (gdbarch, vector_reggroup);
2016 reggroup_add (gdbarch, system_reggroup);
2020 i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
2021 struct reggroup *group)
2023 int sse_regnum_p = (i386_sse_regnum_p (gdbarch, regnum)
2024 || i386_mxcsr_regnum_p (gdbarch, regnum));
2025 int fp_regnum_p = (i386_fp_regnum_p (regnum)
2026 || i386_fpc_regnum_p (regnum));
2027 int mmx_regnum_p = (i386_mmx_regnum_p (gdbarch, regnum));
2029 if (group == i386_mmx_reggroup)
2030 return mmx_regnum_p;
2031 if (group == i386_sse_reggroup)
2032 return sse_regnum_p;
2033 if (group == vector_reggroup)
2034 return (mmx_regnum_p || sse_regnum_p);
2035 if (group == float_reggroup)
2037 if (group == general_reggroup)
2038 return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p);
2040 return default_register_reggroup_p (gdbarch, regnum, group);
2044 /* Get the ARGIth function argument for the current function. */
2047 i386_fetch_pointer_argument (struct frame_info *frame, int argi,
2050 CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM);
2051 return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4);
2055 static struct gdbarch *
2056 i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2058 struct gdbarch_tdep *tdep;
2059 struct gdbarch *gdbarch;
2061 /* If there is already a candidate, use it. */
2062 arches = gdbarch_list_lookup_by_info (arches, &info);
2064 return arches->gdbarch;
2066 /* Allocate space for the new architecture. */
2067 tdep = XMALLOC (struct gdbarch_tdep);
2068 gdbarch = gdbarch_alloc (&info, tdep);
2070 /* General-purpose registers. */
2071 tdep->gregset = NULL;
2072 tdep->gregset_reg_offset = NULL;
2073 tdep->gregset_num_regs = I386_NUM_GREGS;
2074 tdep->sizeof_gregset = 0;
2076 /* Floating-point registers. */
2077 tdep->fpregset = NULL;
2078 tdep->sizeof_fpregset = I387_SIZEOF_FSAVE;
2080 /* The default settings include the FPU registers, the MMX registers
2081 and the SSE registers. This can be overridden for a specific ABI
2082 by adjusting the members `st0_regnum', `mm0_regnum' and
2083 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
2084 will show up in the output of "info all-registers". Ideally we
2085 should try to autodetect whether they are available, such that we
2086 can prevent "info all-registers" from displaying registers that
2089 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
2090 [the SSE registers] always (even when they don't exist) or never
2091 showing them to the user (even when they do exist), I prefer the
2092 former over the latter. */
2094 tdep->st0_regnum = I386_ST0_REGNUM;
2096 /* The MMX registers are implemented as pseudo-registers. Put off
2097 calculating the register number for %mm0 until we know the number
2098 of raw registers. */
2099 tdep->mm0_regnum = 0;
2101 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
2102 tdep->num_xmm_regs = I386_NUM_XREGS - 1;
2104 tdep->jb_pc_offset = -1;
2105 tdep->struct_return = pcc_struct_return;
2106 tdep->sigtramp_start = 0;
2107 tdep->sigtramp_end = 0;
2108 tdep->sigtramp_p = i386_sigtramp_p;
2109 tdep->sigcontext_addr = NULL;
2110 tdep->sc_reg_offset = NULL;
2111 tdep->sc_pc_offset = -1;
2112 tdep->sc_sp_offset = -1;
2114 /* The format used for `long double' on almost all i386 targets is
2115 the i387 extended floating-point format. In fact, of all targets
2116 in the GCC 2.95 tree, only OSF/1 does it different, and insists
2117 on having a `long double' that's not `long' at all. */
2118 set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext);
2120 /* Although the i387 extended floating-point has only 80 significant
2121 bits, a `long double' actually takes up 96, probably to enforce
2123 set_gdbarch_long_double_bit (gdbarch, 96);
2125 /* The default ABI includes general-purpose registers,
2126 floating-point registers, and the SSE registers. */
2127 set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS);
2128 set_gdbarch_register_name (gdbarch, i386_register_name);
2129 set_gdbarch_register_type (gdbarch, i386_register_type);
2131 /* Register numbers of various important registers. */
2132 set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */
2133 set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */
2134 set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */
2135 set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */
2137 /* NOTE: kettenis/20040418: GCC does have two possible register
2138 numbering schemes on the i386: dbx and SVR4. These schemes
2139 differ in how they number %ebp, %esp, %eflags, and the
2140 floating-point registers, and are implemented by the arrays
2141 dbx_register_map[] and svr4_dbx_register_map in
2142 gcc/config/i386.c. GCC also defines a third numbering scheme in
2143 gcc/config/i386.c, which it designates as the "default" register
2144 map used in 64bit mode. This last register numbering scheme is
2145 implemented in dbx64_register_map, and is used for AMD64; see
2148 Currently, each GCC i386 target always uses the same register
2149 numbering scheme across all its supported debugging formats
2150 i.e. SDB (COFF), stabs and DWARF 2. This is because
2151 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
2152 DBX_REGISTER_NUMBER macro which is defined by each target's
2153 respective config header in a manner independent of the requested
2154 output debugging format.
2156 This does not match the arrangement below, which presumes that
2157 the SDB and stabs numbering schemes differ from the DWARF and
2158 DWARF 2 ones. The reason for this arrangement is that it is
2159 likely to get the numbering scheme for the target's
2160 default/native debug format right. For targets where GCC is the
2161 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
2162 targets where the native toolchain uses a different numbering
2163 scheme for a particular debug format (stabs-in-ELF on Solaris)
2164 the defaults below will have to be overridden, like
2165 i386_elf_init_abi() does. */
2167 /* Use the dbx register numbering scheme for stabs and COFF. */
2168 set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dbx_reg_to_regnum);
2169 set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_dbx_reg_to_regnum);
2171 /* Use the SVR4 register numbering scheme for DWARF and DWARF 2. */
2172 set_gdbarch_dwarf_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
2173 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
2175 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
2176 be in use on any of the supported i386 targets. */
2178 set_gdbarch_print_float_info (gdbarch, i387_print_float_info);
2180 set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target);
2182 /* Call dummy code. */
2183 set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call);
2185 set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p);
2186 set_gdbarch_register_to_value (gdbarch, i386_register_to_value);
2187 set_gdbarch_value_to_register (gdbarch, i386_value_to_register);
2189 set_gdbarch_return_value (gdbarch, i386_return_value);
2191 set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue);
2193 /* Stack grows downward. */
2194 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2196 set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc);
2197 set_gdbarch_decr_pc_after_break (gdbarch, 1);
2199 set_gdbarch_frame_args_skip (gdbarch, 8);
2201 /* Wire in the MMX registers. */
2202 set_gdbarch_num_pseudo_regs (gdbarch, i386_num_mmx_regs);
2203 set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read);
2204 set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write);
2206 set_gdbarch_print_insn (gdbarch, i386_print_insn);
2208 set_gdbarch_unwind_dummy_id (gdbarch, i386_unwind_dummy_id);
2210 set_gdbarch_unwind_pc (gdbarch, i386_unwind_pc);
2212 /* Add the i386 register groups. */
2213 i386_add_reggroups (gdbarch);
2214 set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p);
2216 /* Helper for function argument information. */
2217 set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument);
2219 /* Hook in the DWARF CFI frame unwinder. */
2220 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
2222 frame_base_set_default (gdbarch, &i386_frame_base);
2224 /* Hook in ABI-specific overrides, if they have been registered. */
2225 gdbarch_init_osabi (info, gdbarch);
2227 frame_unwind_append_sniffer (gdbarch, i386_sigtramp_frame_sniffer);
2228 frame_unwind_append_sniffer (gdbarch, i386_frame_sniffer);
2230 /* If we have a register mapping, enable the generic core file
2231 support, unless it has already been enabled. */
2232 if (tdep->gregset_reg_offset
2233 && !gdbarch_regset_from_core_section_p (gdbarch))
2234 set_gdbarch_regset_from_core_section (gdbarch,
2235 i386_regset_from_core_section);
2237 /* Unless support for MMX has been disabled, make %mm0 the first
2239 if (tdep->mm0_regnum == 0)
2240 tdep->mm0_regnum = gdbarch_num_regs (gdbarch);
2245 static enum gdb_osabi
2246 i386_coff_osabi_sniffer (bfd *abfd)
2248 if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0
2249 || strcmp (bfd_get_target (abfd), "coff-go32") == 0)
2250 return GDB_OSABI_GO32;
2252 return GDB_OSABI_UNKNOWN;
2255 static enum gdb_osabi
2256 i386_nlm_osabi_sniffer (bfd *abfd)
2258 return GDB_OSABI_NETWARE;
2262 /* Provide a prototype to silence -Wmissing-prototypes. */
2263 void _initialize_i386_tdep (void);
2266 _initialize_i386_tdep (void)
2268 register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init);
2270 /* Add the variable that controls the disassembly flavor. */
2272 struct cmd_list_element *new_cmd;
2274 new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
2276 &disassembly_flavor,
2278 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
2279 and the default value is \"att\".",
2281 deprecated_add_show_from_set (new_cmd, &showlist);
2284 /* Add the variable that controls the convention for returning
2287 struct cmd_list_element *new_cmd;
2289 new_cmd = add_set_enum_cmd ("struct-convention", no_class,
2291 &struct_convention, "\
2292 Set the convention for returning small structs, valid values \
2293 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
2295 deprecated_add_show_from_set (new_cmd, &showlist);
2298 gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour,
2299 i386_coff_osabi_sniffer);
2300 gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_nlm_flavour,
2301 i386_nlm_osabi_sniffer);
2303 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4,
2304 i386_svr4_init_abi);
2305 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32,
2306 i386_go32_init_abi);
2307 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_NETWARE,
2310 /* Initialize the i386 specific register groups. */
2311 i386_init_reggroups ();