1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
25 #include "arch-utils.h"
27 #include "dummy-frame.h"
28 #include "dwarf2-frame.h"
30 #include "floatformat.h"
32 #include "frame-base.h"
33 #include "frame-unwind.h"
40 #include "reggroups.h"
48 #include "gdb_assert.h"
49 #include "gdb_string.h"
51 #include "i386-tdep.h"
52 #include "i387-tdep.h"
56 static char *i386_register_names[] =
58 "eax", "ecx", "edx", "ebx",
59 "esp", "ebp", "esi", "edi",
60 "eip", "eflags", "cs", "ss",
61 "ds", "es", "fs", "gs",
62 "st0", "st1", "st2", "st3",
63 "st4", "st5", "st6", "st7",
64 "fctrl", "fstat", "ftag", "fiseg",
65 "fioff", "foseg", "fooff", "fop",
66 "xmm0", "xmm1", "xmm2", "xmm3",
67 "xmm4", "xmm5", "xmm6", "xmm7",
71 static const int i386_num_register_names = ARRAY_SIZE (i386_register_names);
73 /* Register names for MMX pseudo-registers. */
75 static char *i386_mmx_names[] =
77 "mm0", "mm1", "mm2", "mm3",
78 "mm4", "mm5", "mm6", "mm7"
81 static const int i386_num_mmx_regs = ARRAY_SIZE (i386_mmx_names);
84 i386_mmx_regnum_p (struct gdbarch *gdbarch, int regnum)
86 int mm0_regnum = gdbarch_tdep (gdbarch)->mm0_regnum;
91 return (regnum >= mm0_regnum && regnum < mm0_regnum + i386_num_mmx_regs);
97 i386_sse_regnum_p (struct gdbarch *gdbarch, int regnum)
99 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
101 #define I387_ST0_REGNUM tdep->st0_regnum
102 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
104 if (I387_NUM_XMM_REGS == 0)
107 return (I387_XMM0_REGNUM <= regnum && regnum < I387_MXCSR_REGNUM);
109 #undef I387_ST0_REGNUM
110 #undef I387_NUM_XMM_REGS
114 i386_mxcsr_regnum_p (struct gdbarch *gdbarch, int regnum)
116 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
118 #define I387_ST0_REGNUM tdep->st0_regnum
119 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
121 if (I387_NUM_XMM_REGS == 0)
124 return (regnum == I387_MXCSR_REGNUM);
126 #undef I387_ST0_REGNUM
127 #undef I387_NUM_XMM_REGS
130 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
131 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
132 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
137 i386_fp_regnum_p (int regnum)
139 if (I387_ST0_REGNUM < 0)
142 return (I387_ST0_REGNUM <= regnum && regnum < I387_FCTRL_REGNUM);
146 i386_fpc_regnum_p (int regnum)
148 if (I387_ST0_REGNUM < 0)
151 return (I387_FCTRL_REGNUM <= regnum && regnum < I387_XMM0_REGNUM);
154 /* Return the name of register REGNUM. */
157 i386_register_name (int regnum)
159 if (i386_mmx_regnum_p (current_gdbarch, regnum))
160 return i386_mmx_names[regnum - I387_MM0_REGNUM];
162 if (regnum >= 0 && regnum < i386_num_register_names)
163 return i386_register_names[regnum];
168 /* Convert a dbx register number REG to the appropriate register
169 number used by GDB. */
172 i386_dbx_reg_to_regnum (int reg)
174 /* This implements what GCC calls the "default" register map
175 (dbx_register_map[]). */
177 if (reg >= 0 && reg <= 7)
179 /* General-purpose registers. The debug info calls %ebp
180 register 4, and %esp register 5. */
187 else if (reg >= 12 && reg <= 19)
189 /* Floating-point registers. */
190 return reg - 12 + I387_ST0_REGNUM;
192 else if (reg >= 21 && reg <= 28)
195 return reg - 21 + I387_XMM0_REGNUM;
197 else if (reg >= 29 && reg <= 36)
200 return reg - 29 + I387_MM0_REGNUM;
203 /* This will hopefully provoke a warning. */
204 return NUM_REGS + NUM_PSEUDO_REGS;
207 /* Convert SVR4 register number REG to the appropriate register number
211 i386_svr4_reg_to_regnum (int reg)
213 /* This implements the GCC register map that tries to be compatible
214 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
216 /* The SVR4 register numbering includes %eip and %eflags, and
217 numbers the floating point registers differently. */
218 if (reg >= 0 && reg <= 9)
220 /* General-purpose registers. */
223 else if (reg >= 11 && reg <= 18)
225 /* Floating-point registers. */
226 return reg - 11 + I387_ST0_REGNUM;
230 /* The SSE and MMX registers have the same numbers as with dbx. */
231 return i386_dbx_reg_to_regnum (reg);
234 /* This will hopefully provoke a warning. */
235 return NUM_REGS + NUM_PSEUDO_REGS;
238 #undef I387_ST0_REGNUM
239 #undef I387_MM0_REGNUM
240 #undef I387_NUM_XMM_REGS
243 /* This is the variable that is set with "set disassembly-flavor", and
244 its legitimate values. */
245 static const char att_flavor[] = "att";
246 static const char intel_flavor[] = "intel";
247 static const char *valid_flavors[] =
253 static const char *disassembly_flavor = att_flavor;
256 /* Use the program counter to determine the contents and size of a
257 breakpoint instruction. Return a pointer to a string of bytes that
258 encode a breakpoint instruction, store the length of the string in
259 *LEN and optionally adjust *PC to point to the correct memory
260 location for inserting the breakpoint.
262 On the i386 we have a single breakpoint that fits in a single byte
263 and can be inserted anywhere.
265 This function is 64-bit safe. */
267 static const gdb_byte *
268 i386_breakpoint_from_pc (CORE_ADDR *pc, int *len)
270 static gdb_byte break_insn[] = { 0xcc }; /* int 3 */
272 *len = sizeof (break_insn);
276 #ifdef I386_REGNO_TO_SYMMETRY
277 #error "The Sequent Symmetry is no longer supported."
280 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
281 and %esp "belong" to the calling function. Therefore these
282 registers should be saved if they're going to be modified. */
284 /* The maximum number of saved registers. This should include all
285 registers mentioned above, and %eip. */
286 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
288 struct i386_frame_cache
295 /* Saved registers. */
296 CORE_ADDR saved_regs[I386_NUM_SAVED_REGS];
300 /* Stack space reserved for local variables. */
304 /* Allocate and initialize a frame cache. */
306 static struct i386_frame_cache *
307 i386_alloc_frame_cache (void)
309 struct i386_frame_cache *cache;
312 cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache);
316 cache->sp_offset = -4;
319 /* Saved registers. We initialize these to -1 since zero is a valid
320 offset (that's where %ebp is supposed to be stored). */
321 for (i = 0; i < I386_NUM_SAVED_REGS; i++)
322 cache->saved_regs[i] = -1;
324 cache->pc_in_eax = 0;
326 /* Frameless until proven otherwise. */
332 /* If the instruction at PC is a jump, return the address of its
333 target. Otherwise, return PC. */
336 i386_follow_jump (CORE_ADDR pc)
342 op = read_memory_unsigned_integer (pc, 1);
346 op = read_memory_unsigned_integer (pc + 1, 1);
352 /* Relative jump: if data16 == 0, disp32, else disp16. */
355 delta = read_memory_integer (pc + 2, 2);
357 /* Include the size of the jmp instruction (including the
363 delta = read_memory_integer (pc + 1, 4);
365 /* Include the size of the jmp instruction. */
370 /* Relative jump, disp8 (ignore data16). */
371 delta = read_memory_integer (pc + data16 + 1, 1);
380 /* Check whether PC points at a prologue for a function returning a
381 structure or union. If so, it updates CACHE and returns the
382 address of the first instruction after the code sequence that
383 removes the "hidden" argument from the stack or CURRENT_PC,
384 whichever is smaller. Otherwise, return PC. */
387 i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc,
388 struct i386_frame_cache *cache)
390 /* Functions that return a structure or union start with:
393 xchgl %eax, (%esp) 0x87 0x04 0x24
394 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
396 (the System V compiler puts out the second `xchg' instruction,
397 and the assembler doesn't try to optimize it, so the 'sib' form
398 gets generated). This sequence is used to get the address of the
399 return buffer for a function that returns a structure. */
400 static gdb_byte proto1[3] = { 0x87, 0x04, 0x24 };
401 static gdb_byte proto2[4] = { 0x87, 0x44, 0x24, 0x00 };
405 if (current_pc <= pc)
408 op = read_memory_unsigned_integer (pc, 1);
410 if (op != 0x58) /* popl %eax */
413 read_memory (pc + 1, buf, 4);
414 if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0)
417 if (current_pc == pc)
419 cache->sp_offset += 4;
423 if (current_pc == pc + 1)
425 cache->pc_in_eax = 1;
429 if (buf[1] == proto1[1])
436 i386_skip_probe (CORE_ADDR pc)
438 /* A function may start with
452 op = read_memory_unsigned_integer (pc, 1);
454 if (op == 0x68 || op == 0x6a)
458 /* Skip past the `pushl' instruction; it has either a one-byte or a
459 four-byte operand, depending on the opcode. */
465 /* Read the following 8 bytes, which should be `call _probe' (6
466 bytes) followed by `addl $4,%esp' (2 bytes). */
467 read_memory (pc + delta, buf, sizeof (buf));
468 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
469 pc += delta + sizeof (buf);
475 /* Maximum instruction length we need to handle. */
476 #define I386_MAX_INSN_LEN 6
478 /* Instruction description. */
482 gdb_byte insn[I386_MAX_INSN_LEN];
483 gdb_byte mask[I386_MAX_INSN_LEN];
486 /* Search for the instruction at PC in the list SKIP_INSNS. Return
487 the first instruction description that matches. Otherwise, return
490 static struct i386_insn *
491 i386_match_insn (CORE_ADDR pc, struct i386_insn *skip_insns)
493 struct i386_insn *insn;
496 op = read_memory_unsigned_integer (pc, 1);
498 for (insn = skip_insns; insn->len > 0; insn++)
500 if ((op & insn->mask[0]) == insn->insn[0])
502 unsigned char buf[I386_MAX_INSN_LEN - 1];
505 gdb_assert (insn->len > 1);
506 gdb_assert (insn->len <= I386_MAX_INSN_LEN);
508 read_memory (pc + 1, buf, insn->len - 1);
509 for (i = 1; i < insn->len; i++)
511 if ((buf[i - 1] & insn->mask[i]) != insn->insn[i])
522 /* Some special instructions that might be migrated by GCC into the
523 part of the prologue that sets up the new stack frame. Because the
524 stack frame hasn't been setup yet, no registers have been saved
525 yet, and only the scratch registers %eax, %ecx and %edx can be
528 struct i386_insn i386_frame_setup_skip_insns[] =
530 /* Check for `movb imm8, r' and `movl imm32, r'.
532 ??? Should we handle 16-bit operand-sizes here? */
534 /* `movb imm8, %al' and `movb imm8, %ah' */
535 /* `movb imm8, %cl' and `movb imm8, %ch' */
536 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
537 /* `movb imm8, %dl' and `movb imm8, %dh' */
538 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
539 /* `movl imm32, %eax' and `movl imm32, %ecx' */
540 { 5, { 0xb8 }, { 0xfe } },
541 /* `movl imm32, %edx' */
542 { 5, { 0xba }, { 0xff } },
544 /* Check for `mov imm32, r32'. Note that there is an alternative
545 encoding for `mov m32, %eax'.
547 ??? Should we handle SIB adressing here?
548 ??? Should we handle 16-bit operand-sizes here? */
550 /* `movl m32, %eax' */
551 { 5, { 0xa1 }, { 0xff } },
552 /* `movl m32, %eax' and `mov; m32, %ecx' */
553 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
554 /* `movl m32, %edx' */
555 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
557 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
558 Because of the symmetry, there are actually two ways to encode
559 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
560 opcode bytes 0x31 and 0x33 for `xorl'. */
562 /* `subl %eax, %eax' */
563 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
564 /* `subl %ecx, %ecx' */
565 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
566 /* `subl %edx, %edx' */
567 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
568 /* `xorl %eax, %eax' */
569 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
570 /* `xorl %ecx, %ecx' */
571 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
572 /* `xorl %edx, %edx' */
573 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
577 /* Check whether PC points at a code that sets up a new stack frame.
578 If so, it updates CACHE and returns the address of the first
579 instruction after the sequence that sets up the frame or LIMIT,
580 whichever is smaller. If we don't recognize the code, return PC. */
583 i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR limit,
584 struct i386_frame_cache *cache)
586 struct i386_insn *insn;
593 op = read_memory_unsigned_integer (pc, 1);
595 if (op == 0x55) /* pushl %ebp */
597 /* Take into account that we've executed the `pushl %ebp' that
598 starts this instruction sequence. */
599 cache->saved_regs[I386_EBP_REGNUM] = 0;
600 cache->sp_offset += 4;
603 /* If that's all, return now. */
607 /* Check for some special instructions that might be migrated by
608 GCC into the prologue and skip them. At this point in the
609 prologue, code should only touch the scratch registers %eax,
610 %ecx and %edx, so while the number of posibilities is sheer,
613 Make sure we only skip these instructions if we later see the
614 `movl %esp, %ebp' that actually sets up the frame. */
615 while (pc + skip < limit)
617 insn = i386_match_insn (pc + skip, i386_frame_setup_skip_insns);
624 /* If that's all, return now. */
625 if (limit <= pc + skip)
628 op = read_memory_unsigned_integer (pc + skip, 1);
630 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
634 if (read_memory_unsigned_integer (pc + skip + 1, 1) != 0xec)
638 if (read_memory_unsigned_integer (pc + skip + 1, 1) != 0xe5)
645 /* OK, we actually have a frame. We just don't know how large
646 it is yet. Set its size to zero. We'll adjust it if
647 necessary. We also now commit to skipping the special
648 instructions mentioned before. */
652 /* If that's all, return now. */
656 /* Check for stack adjustment
660 NOTE: You can't subtract a 16-bit immediate from a 32-bit
661 reg, so we don't have to worry about a data16 prefix. */
662 op = read_memory_unsigned_integer (pc, 1);
665 /* `subl' with 8-bit immediate. */
666 if (read_memory_unsigned_integer (pc + 1, 1) != 0xec)
667 /* Some instruction starting with 0x83 other than `subl'. */
670 /* `subl' with signed 8-bit immediate (though it wouldn't
671 make sense to be negative). */
672 cache->locals = read_memory_integer (pc + 2, 1);
677 /* Maybe it is `subl' with a 32-bit immediate. */
678 if (read_memory_unsigned_integer (pc + 1, 1) != 0xec)
679 /* Some instruction starting with 0x81 other than `subl'. */
682 /* It is `subl' with a 32-bit immediate. */
683 cache->locals = read_memory_integer (pc + 2, 4);
688 /* Some instruction other than `subl'. */
692 else if (op == 0xc8) /* enter */
694 cache->locals = read_memory_unsigned_integer (pc + 1, 2);
701 /* Check whether PC points at code that saves registers on the stack.
702 If so, it updates CACHE and returns the address of the first
703 instruction after the register saves or CURRENT_PC, whichever is
704 smaller. Otherwise, return PC. */
707 i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc,
708 struct i386_frame_cache *cache)
710 CORE_ADDR offset = 0;
714 if (cache->locals > 0)
715 offset -= cache->locals;
716 for (i = 0; i < 8 && pc < current_pc; i++)
718 op = read_memory_unsigned_integer (pc, 1);
719 if (op < 0x50 || op > 0x57)
723 cache->saved_regs[op - 0x50] = offset;
724 cache->sp_offset += 4;
731 /* Do a full analysis of the prologue at PC and update CACHE
732 accordingly. Bail out early if CURRENT_PC is reached. Return the
733 address where the analysis stopped.
735 We handle these cases:
737 The startup sequence can be at the start of the function, or the
738 function can start with a branch to startup code at the end.
740 %ebp can be set up with either the 'enter' instruction, or "pushl
741 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
742 once used in the System V compiler).
744 Local space is allocated just below the saved %ebp by either the
745 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
746 16-bit unsigned argument for space to allocate, and the 'addl'
747 instruction could have either a signed byte, or 32-bit immediate.
749 Next, the registers used by this function are pushed. With the
750 System V compiler they will always be in the order: %edi, %esi,
751 %ebx (and sometimes a harmless bug causes it to also save but not
752 restore %eax); however, the code below is willing to see the pushes
753 in any order, and will handle up to 8 of them.
755 If the setup sequence is at the end of the function, then the next
756 instruction will be a branch back to the start. */
759 i386_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
760 struct i386_frame_cache *cache)
762 pc = i386_follow_jump (pc);
763 pc = i386_analyze_struct_return (pc, current_pc, cache);
764 pc = i386_skip_probe (pc);
765 pc = i386_analyze_frame_setup (pc, current_pc, cache);
766 return i386_analyze_register_saves (pc, current_pc, cache);
769 /* Return PC of first real instruction. */
772 i386_skip_prologue (CORE_ADDR start_pc)
774 static gdb_byte pic_pat[6] =
776 0xe8, 0, 0, 0, 0, /* call 0x0 */
777 0x5b, /* popl %ebx */
779 struct i386_frame_cache cache;
785 pc = i386_analyze_prologue (start_pc, 0xffffffff, &cache);
786 if (cache.locals < 0)
789 /* Found valid frame setup. */
791 /* The native cc on SVR4 in -K PIC mode inserts the following code
792 to get the address of the global offset table (GOT) into register
797 movl %ebx,x(%ebp) (optional)
800 This code is with the rest of the prologue (at the end of the
801 function), so we have to skip it to get to the first real
802 instruction at the start of the function. */
804 for (i = 0; i < 6; i++)
806 op = read_memory_unsigned_integer (pc + i, 1);
807 if (pic_pat[i] != op)
814 op = read_memory_unsigned_integer (pc + delta, 1);
816 if (op == 0x89) /* movl %ebx, x(%ebp) */
818 op = read_memory_unsigned_integer (pc + delta + 1, 1);
820 if (op == 0x5d) /* One byte offset from %ebp. */
822 else if (op == 0x9d) /* Four byte offset from %ebp. */
824 else /* Unexpected instruction. */
827 op = read_memory_unsigned_integer (pc + delta, 1);
831 if (delta > 0 && op == 0x81
832 && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3);
838 /* If the function starts with a branch (to startup code at the end)
839 the last instruction should bring us back to the first
840 instruction of the real code. */
841 if (i386_follow_jump (start_pc) != start_pc)
842 pc = i386_follow_jump (pc);
847 /* This function is 64-bit safe. */
850 i386_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
854 frame_unwind_register (next_frame, PC_REGNUM, buf);
855 return extract_typed_address (buf, builtin_type_void_func_ptr);
861 static struct i386_frame_cache *
862 i386_frame_cache (struct frame_info *next_frame, void **this_cache)
864 struct i386_frame_cache *cache;
871 cache = i386_alloc_frame_cache ();
874 /* In principle, for normal frames, %ebp holds the frame pointer,
875 which holds the base address for the current stack frame.
876 However, for functions that don't need it, the frame pointer is
877 optional. For these "frameless" functions the frame pointer is
878 actually the frame pointer of the calling frame. Signal
879 trampolines are just a special case of a "frameless" function.
880 They (usually) share their frame pointer with the frame that was
881 in progress when the signal occurred. */
883 frame_unwind_register (next_frame, I386_EBP_REGNUM, buf);
884 cache->base = extract_unsigned_integer (buf, 4);
885 if (cache->base == 0)
888 /* For normal frames, %eip is stored at 4(%ebp). */
889 cache->saved_regs[I386_EIP_REGNUM] = 4;
891 cache->pc = frame_func_unwind (next_frame);
893 i386_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache);
895 if (cache->locals < 0)
897 /* We didn't find a valid frame, which means that CACHE->base
898 currently holds the frame pointer for our calling frame. If
899 we're at the start of a function, or somewhere half-way its
900 prologue, the function's frame probably hasn't been fully
901 setup yet. Try to reconstruct the base address for the stack
902 frame by looking at the stack pointer. For truly "frameless"
903 functions this might work too. */
905 frame_unwind_register (next_frame, I386_ESP_REGNUM, buf);
906 cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset;
909 /* Now that we have the base address for the stack frame we can
910 calculate the value of %esp in the calling frame. */
911 cache->saved_sp = cache->base + 8;
913 /* Adjust all the saved registers such that they contain addresses
914 instead of offsets. */
915 for (i = 0; i < I386_NUM_SAVED_REGS; i++)
916 if (cache->saved_regs[i] != -1)
917 cache->saved_regs[i] += cache->base;
923 i386_frame_this_id (struct frame_info *next_frame, void **this_cache,
924 struct frame_id *this_id)
926 struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache);
928 /* This marks the outermost frame. */
929 if (cache->base == 0)
932 /* See the end of i386_push_dummy_call. */
933 (*this_id) = frame_id_build (cache->base + 8, cache->pc);
937 i386_frame_prev_register (struct frame_info *next_frame, void **this_cache,
938 int regnum, int *optimizedp,
939 enum lval_type *lvalp, CORE_ADDR *addrp,
940 int *realnump, void *valuep)
942 struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache);
944 gdb_assert (regnum >= 0);
946 /* The System V ABI says that:
948 "The flags register contains the system flags, such as the
949 direction flag and the carry flag. The direction flag must be
950 set to the forward (that is, zero) direction before entry and
951 upon exit from a function. Other user flags have no specified
952 role in the standard calling sequence and are not preserved."
954 To guarantee the "upon exit" part of that statement we fake a
955 saved flags register that has its direction flag cleared.
957 Note that GCC doesn't seem to rely on the fact that the direction
958 flag is cleared after a function return; it always explicitly
959 clears the flag before operations where it matters.
961 FIXME: kettenis/20030316: I'm not quite sure whether this is the
962 right thing to do. The way we fake the flags register here makes
963 it impossible to change it. */
965 if (regnum == I386_EFLAGS_REGNUM)
975 /* Clear the direction flag. */
976 val = frame_unwind_register_unsigned (next_frame,
979 store_unsigned_integer (valuep, 4, val);
985 if (regnum == I386_EIP_REGNUM && cache->pc_in_eax)
988 *lvalp = lval_register;
990 *realnump = I386_EAX_REGNUM;
992 frame_unwind_register (next_frame, (*realnump), valuep);
996 if (regnum == I386_ESP_REGNUM && cache->saved_sp)
1004 /* Store the value. */
1005 store_unsigned_integer (valuep, 4, cache->saved_sp);
1010 if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1)
1013 *lvalp = lval_memory;
1014 *addrp = cache->saved_regs[regnum];
1018 /* Read the value in from memory. */
1019 read_memory (*addrp, valuep,
1020 register_size (current_gdbarch, regnum));
1026 *lvalp = lval_register;
1030 frame_unwind_register (next_frame, (*realnump), valuep);
1033 static const struct frame_unwind i386_frame_unwind =
1037 i386_frame_prev_register
1040 static const struct frame_unwind *
1041 i386_frame_sniffer (struct frame_info *next_frame)
1043 return &i386_frame_unwind;
1047 /* Signal trampolines. */
1049 static struct i386_frame_cache *
1050 i386_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache)
1052 struct i386_frame_cache *cache;
1053 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1060 cache = i386_alloc_frame_cache ();
1062 frame_unwind_register (next_frame, I386_ESP_REGNUM, buf);
1063 cache->base = extract_unsigned_integer (buf, 4) - 4;
1065 addr = tdep->sigcontext_addr (next_frame);
1066 if (tdep->sc_reg_offset)
1070 gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS);
1072 for (i = 0; i < tdep->sc_num_regs; i++)
1073 if (tdep->sc_reg_offset[i] != -1)
1074 cache->saved_regs[i] = addr + tdep->sc_reg_offset[i];
1078 cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset;
1079 cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset;
1082 *this_cache = cache;
1087 i386_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache,
1088 struct frame_id *this_id)
1090 struct i386_frame_cache *cache =
1091 i386_sigtramp_frame_cache (next_frame, this_cache);
1093 /* See the end of i386_push_dummy_call. */
1094 (*this_id) = frame_id_build (cache->base + 8, frame_pc_unwind (next_frame));
1098 i386_sigtramp_frame_prev_register (struct frame_info *next_frame,
1100 int regnum, int *optimizedp,
1101 enum lval_type *lvalp, CORE_ADDR *addrp,
1102 int *realnump, void *valuep)
1104 /* Make sure we've initialized the cache. */
1105 i386_sigtramp_frame_cache (next_frame, this_cache);
1107 i386_frame_prev_register (next_frame, this_cache, regnum,
1108 optimizedp, lvalp, addrp, realnump, valuep);
1111 static const struct frame_unwind i386_sigtramp_frame_unwind =
1114 i386_sigtramp_frame_this_id,
1115 i386_sigtramp_frame_prev_register
1118 static const struct frame_unwind *
1119 i386_sigtramp_frame_sniffer (struct frame_info *next_frame)
1121 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (next_frame));
1123 /* We shouldn't even bother if we don't have a sigcontext_addr
1125 if (tdep->sigcontext_addr == NULL)
1128 if (tdep->sigtramp_p != NULL)
1130 if (tdep->sigtramp_p (next_frame))
1131 return &i386_sigtramp_frame_unwind;
1134 if (tdep->sigtramp_start != 0)
1136 CORE_ADDR pc = frame_pc_unwind (next_frame);
1138 gdb_assert (tdep->sigtramp_end != 0);
1139 if (pc >= tdep->sigtramp_start && pc < tdep->sigtramp_end)
1140 return &i386_sigtramp_frame_unwind;
1148 i386_frame_base_address (struct frame_info *next_frame, void **this_cache)
1150 struct i386_frame_cache *cache = i386_frame_cache (next_frame, this_cache);
1155 static const struct frame_base i386_frame_base =
1158 i386_frame_base_address,
1159 i386_frame_base_address,
1160 i386_frame_base_address
1163 static struct frame_id
1164 i386_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1169 frame_unwind_register (next_frame, I386_EBP_REGNUM, buf);
1170 fp = extract_unsigned_integer (buf, 4);
1172 /* See the end of i386_push_dummy_call. */
1173 return frame_id_build (fp + 8, frame_pc_unwind (next_frame));
1177 /* Figure out where the longjmp will land. Slurp the args out of the
1178 stack. We expect the first arg to be a pointer to the jmp_buf
1179 structure from which we extract the address that we will land at.
1180 This address is copied into PC. This routine returns non-zero on
1183 This function is 64-bit safe. */
1186 i386_get_longjmp_target (CORE_ADDR *pc)
1189 CORE_ADDR sp, jb_addr;
1190 int jb_pc_offset = gdbarch_tdep (current_gdbarch)->jb_pc_offset;
1191 int len = TYPE_LENGTH (builtin_type_void_func_ptr);
1193 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1194 longjmp will land. */
1195 if (jb_pc_offset == -1)
1198 /* Don't use I386_ESP_REGNUM here, since this function is also used
1200 regcache_cooked_read (current_regcache, SP_REGNUM, buf);
1201 sp = extract_typed_address (buf, builtin_type_void_data_ptr);
1202 if (target_read_memory (sp + len, buf, len))
1205 jb_addr = extract_typed_address (buf, builtin_type_void_data_ptr);
1206 if (target_read_memory (jb_addr + jb_pc_offset, buf, len))
1209 *pc = extract_typed_address (buf, builtin_type_void_func_ptr);
1215 i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1216 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
1217 struct value **args, CORE_ADDR sp, int struct_return,
1218 CORE_ADDR struct_addr)
1223 /* Push arguments in reverse order. */
1224 for (i = nargs - 1; i >= 0; i--)
1226 int len = TYPE_LENGTH (value_enclosing_type (args[i]));
1228 /* The System V ABI says that:
1230 "An argument's size is increased, if necessary, to make it a
1231 multiple of [32-bit] words. This may require tail padding,
1232 depending on the size of the argument."
1234 This makes sure the stack says word-aligned. */
1235 sp -= (len + 3) & ~3;
1236 write_memory (sp, value_contents_all (args[i]), len);
1239 /* Push value address. */
1243 store_unsigned_integer (buf, 4, struct_addr);
1244 write_memory (sp, buf, 4);
1247 /* Store return address. */
1249 store_unsigned_integer (buf, 4, bp_addr);
1250 write_memory (sp, buf, 4);
1252 /* Finally, update the stack pointer... */
1253 store_unsigned_integer (buf, 4, sp);
1254 regcache_cooked_write (regcache, I386_ESP_REGNUM, buf);
1256 /* ...and fake a frame pointer. */
1257 regcache_cooked_write (regcache, I386_EBP_REGNUM, buf);
1259 /* MarkK wrote: This "+ 8" is all over the place:
1260 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1261 i386_unwind_dummy_id). It's there, since all frame unwinders for
1262 a given target have to agree (within a certain margin) on the
1263 definition of the stack address of a frame. Otherwise
1264 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1265 stack address *before* the function call as a frame's CFA. On
1266 the i386, when %ebp is used as a frame pointer, the offset
1267 between the contents %ebp and the CFA as defined by GCC. */
1271 /* These registers are used for returning integers (and on some
1272 targets also for returning `struct' and `union' values when their
1273 size and alignment match an integer type). */
1274 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1275 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1277 /* Read, for architecture GDBARCH, a function return value of TYPE
1278 from REGCACHE, and copy that into VALBUF. */
1281 i386_extract_return_value (struct gdbarch *gdbarch, struct type *type,
1282 struct regcache *regcache, gdb_byte *valbuf)
1284 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1285 int len = TYPE_LENGTH (type);
1286 gdb_byte buf[I386_MAX_REGISTER_SIZE];
1288 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1290 if (tdep->st0_regnum < 0)
1292 warning (_("Cannot find floating-point return value."));
1293 memset (valbuf, 0, len);
1297 /* Floating-point return values can be found in %st(0). Convert
1298 its contents to the desired type. This is probably not
1299 exactly how it would happen on the target itself, but it is
1300 the best we can do. */
1301 regcache_raw_read (regcache, I386_ST0_REGNUM, buf);
1302 convert_typed_floating (buf, builtin_type_i387_ext, valbuf, type);
1306 int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM);
1307 int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM);
1309 if (len <= low_size)
1311 regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf);
1312 memcpy (valbuf, buf, len);
1314 else if (len <= (low_size + high_size))
1316 regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf);
1317 memcpy (valbuf, buf, low_size);
1318 regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf);
1319 memcpy (valbuf + low_size, buf, len - low_size);
1322 internal_error (__FILE__, __LINE__,
1323 _("Cannot extract return value of %d bytes long."), len);
1327 /* Write, for architecture GDBARCH, a function return value of TYPE
1328 from VALBUF into REGCACHE. */
1331 i386_store_return_value (struct gdbarch *gdbarch, struct type *type,
1332 struct regcache *regcache, const gdb_byte *valbuf)
1334 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1335 int len = TYPE_LENGTH (type);
1337 /* Define I387_ST0_REGNUM such that we use the proper definitions
1338 for the architecture. */
1339 #define I387_ST0_REGNUM I386_ST0_REGNUM
1341 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1344 gdb_byte buf[I386_MAX_REGISTER_SIZE];
1346 if (tdep->st0_regnum < 0)
1348 warning (_("Cannot set floating-point return value."));
1352 /* Returning floating-point values is a bit tricky. Apart from
1353 storing the return value in %st(0), we have to simulate the
1354 state of the FPU at function return point. */
1356 /* Convert the value found in VALBUF to the extended
1357 floating-point format used by the FPU. This is probably
1358 not exactly how it would happen on the target itself, but
1359 it is the best we can do. */
1360 convert_typed_floating (valbuf, type, buf, builtin_type_i387_ext);
1361 regcache_raw_write (regcache, I386_ST0_REGNUM, buf);
1363 /* Set the top of the floating-point register stack to 7. The
1364 actual value doesn't really matter, but 7 is what a normal
1365 function return would end up with if the program started out
1366 with a freshly initialized FPU. */
1367 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
1369 regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM, fstat);
1371 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1372 the floating-point register stack to 7, the appropriate value
1373 for the tag word is 0x3fff. */
1374 regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM, 0x3fff);
1378 int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM);
1379 int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM);
1381 if (len <= low_size)
1382 regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf);
1383 else if (len <= (low_size + high_size))
1385 regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf);
1386 regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0,
1387 len - low_size, valbuf + low_size);
1390 internal_error (__FILE__, __LINE__,
1391 _("Cannot store return value of %d bytes long."), len);
1394 #undef I387_ST0_REGNUM
1398 /* This is the variable that is set with "set struct-convention", and
1399 its legitimate values. */
1400 static const char default_struct_convention[] = "default";
1401 static const char pcc_struct_convention[] = "pcc";
1402 static const char reg_struct_convention[] = "reg";
1403 static const char *valid_conventions[] =
1405 default_struct_convention,
1406 pcc_struct_convention,
1407 reg_struct_convention,
1410 static const char *struct_convention = default_struct_convention;
1412 /* Return non-zero if TYPE, which is assumed to be a structure or
1413 union type, should be returned in registers for architecture
1417 i386_reg_struct_return_p (struct gdbarch *gdbarch, struct type *type)
1419 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1420 enum type_code code = TYPE_CODE (type);
1421 int len = TYPE_LENGTH (type);
1423 gdb_assert (code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION);
1425 if (struct_convention == pcc_struct_convention
1426 || (struct_convention == default_struct_convention
1427 && tdep->struct_return == pcc_struct_return))
1430 return (len == 1 || len == 2 || len == 4 || len == 8);
1433 /* Determine, for architecture GDBARCH, how a return value of TYPE
1434 should be returned. If it is supposed to be returned in registers,
1435 and READBUF is non-zero, read the appropriate value from REGCACHE,
1436 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1437 from WRITEBUF into REGCACHE. */
1439 static enum return_value_convention
1440 i386_return_value (struct gdbarch *gdbarch, struct type *type,
1441 struct regcache *regcache, gdb_byte *readbuf,
1442 const gdb_byte *writebuf)
1444 enum type_code code = TYPE_CODE (type);
1446 if ((code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION)
1447 && !i386_reg_struct_return_p (gdbarch, type))
1449 /* The System V ABI says that:
1451 "A function that returns a structure or union also sets %eax
1452 to the value of the original address of the caller's area
1453 before it returns. Thus when the caller receives control
1454 again, the address of the returned object resides in register
1455 %eax and can be used to access the object."
1457 So the ABI guarantees that we can always find the return
1458 value just after the function has returned. */
1464 regcache_raw_read_unsigned (regcache, I386_EAX_REGNUM, &addr);
1465 read_memory (addr, readbuf, TYPE_LENGTH (type));
1468 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
1471 /* This special case is for structures consisting of a single
1472 `float' or `double' member. These structures are returned in
1473 %st(0). For these structures, we call ourselves recursively,
1474 changing TYPE into the type of the first member of the structure.
1475 Since that should work for all structures that have only one
1476 member, we don't bother to check the member's type here. */
1477 if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
1479 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1480 return i386_return_value (gdbarch, type, regcache, readbuf, writebuf);
1484 i386_extract_return_value (gdbarch, type, regcache, readbuf);
1486 i386_store_return_value (gdbarch, type, regcache, writebuf);
1488 return RETURN_VALUE_REGISTER_CONVENTION;
1492 /* Types for the MMX and SSE registers. */
1493 static struct type *i386_mmx_type;
1494 static struct type *i386_sse_type;
1496 /* Construct the type for MMX registers. */
1497 static struct type *
1498 i386_build_mmx_type (void)
1500 /* The type we're building is this: */
1502 union __gdb_builtin_type_vec64i
1505 int32_t v2_int32[2];
1506 int16_t v4_int16[4];
1511 if (! i386_mmx_type)
1515 t = init_composite_type ("__gdb_builtin_type_vec64i", TYPE_CODE_UNION);
1516 append_composite_type_field (t, "uint64", builtin_type_int64);
1517 append_composite_type_field (t, "v2_int32", builtin_type_v2_int32);
1518 append_composite_type_field (t, "v4_int16", builtin_type_v4_int16);
1519 append_composite_type_field (t, "v8_int8", builtin_type_v8_int8);
1521 TYPE_FLAGS (t) |= TYPE_FLAG_VECTOR;
1522 TYPE_NAME (t) = "builtin_type_vec64i";
1527 return i386_mmx_type;
1530 /* Construct the type for SSE registers. */
1531 static struct type *
1532 i386_build_sse_type (void)
1534 if (! i386_sse_type)
1538 t = init_composite_type ("__gdb_builtin_type_vec128i", TYPE_CODE_UNION);
1539 append_composite_type_field (t, "v4_float", builtin_type_v4_float);
1540 append_composite_type_field (t, "v2_double", builtin_type_v2_double);
1541 append_composite_type_field (t, "v16_int8", builtin_type_v16_int8);
1542 append_composite_type_field (t, "v8_int16", builtin_type_v8_int16);
1543 append_composite_type_field (t, "v4_int32", builtin_type_v4_int32);
1544 append_composite_type_field (t, "v2_int64", builtin_type_v2_int64);
1545 append_composite_type_field (t, "uint128", builtin_type_int128);
1547 TYPE_FLAGS (t) |= TYPE_FLAG_VECTOR;
1548 TYPE_NAME (t) = "builtin_type_vec128i";
1553 return i386_sse_type;
1556 /* Return the GDB type object for the "standard" data type of data in
1557 register REGNUM. Perhaps %esi and %edi should go here, but
1558 potentially they could be used for things other than address. */
1560 static struct type *
1561 i386_register_type (struct gdbarch *gdbarch, int regnum)
1563 if (regnum == I386_EIP_REGNUM
1564 || regnum == I386_EBP_REGNUM || regnum == I386_ESP_REGNUM)
1565 return lookup_pointer_type (builtin_type_void);
1567 if (i386_fp_regnum_p (regnum))
1568 return builtin_type_i387_ext;
1570 if (i386_sse_regnum_p (gdbarch, regnum))
1571 return i386_build_sse_type ();
1573 if (i386_mmx_regnum_p (gdbarch, regnum))
1574 return i386_build_mmx_type ();
1576 return builtin_type_int;
1579 /* Map a cooked register onto a raw register or memory. For the i386,
1580 the MMX registers need to be mapped onto floating point registers. */
1583 i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum)
1585 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
1590 /* Define I387_ST0_REGNUM such that we use the proper definitions
1591 for REGCACHE's architecture. */
1592 #define I387_ST0_REGNUM tdep->st0_regnum
1594 mmxreg = regnum - tdep->mm0_regnum;
1595 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
1596 tos = (fstat >> 11) & 0x7;
1597 fpreg = (mmxreg + tos) % 8;
1599 return (I387_ST0_REGNUM + fpreg);
1601 #undef I387_ST0_REGNUM
1605 i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
1606 int regnum, gdb_byte *buf)
1608 if (i386_mmx_regnum_p (gdbarch, regnum))
1610 gdb_byte mmx_buf[MAX_REGISTER_SIZE];
1611 int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
1613 /* Extract (always little endian). */
1614 regcache_raw_read (regcache, fpnum, mmx_buf);
1615 memcpy (buf, mmx_buf, register_size (gdbarch, regnum));
1618 regcache_raw_read (regcache, regnum, buf);
1622 i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1623 int regnum, const gdb_byte *buf)
1625 if (i386_mmx_regnum_p (gdbarch, regnum))
1627 gdb_byte mmx_buf[MAX_REGISTER_SIZE];
1628 int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
1631 regcache_raw_read (regcache, fpnum, mmx_buf);
1632 /* ... Modify ... (always little endian). */
1633 memcpy (mmx_buf, buf, register_size (gdbarch, regnum));
1635 regcache_raw_write (regcache, fpnum, mmx_buf);
1638 regcache_raw_write (regcache, regnum, buf);
1642 /* Return the register number of the register allocated by GCC after
1643 REGNUM, or -1 if there is no such register. */
1646 i386_next_regnum (int regnum)
1648 /* GCC allocates the registers in the order:
1650 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1652 Since storing a variable in %esp doesn't make any sense we return
1653 -1 for %ebp and for %esp itself. */
1654 static int next_regnum[] =
1656 I386_EDX_REGNUM, /* Slot for %eax. */
1657 I386_EBX_REGNUM, /* Slot for %ecx. */
1658 I386_ECX_REGNUM, /* Slot for %edx. */
1659 I386_ESI_REGNUM, /* Slot for %ebx. */
1660 -1, -1, /* Slots for %esp and %ebp. */
1661 I386_EDI_REGNUM, /* Slot for %esi. */
1662 I386_EBP_REGNUM /* Slot for %edi. */
1665 if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0]))
1666 return next_regnum[regnum];
1671 /* Return nonzero if a value of type TYPE stored in register REGNUM
1672 needs any special handling. */
1675 i386_convert_register_p (int regnum, struct type *type)
1677 int len = TYPE_LENGTH (type);
1679 /* Values may be spread across multiple registers. Most debugging
1680 formats aren't expressive enough to specify the locations, so
1681 some heuristics is involved. Right now we only handle types that
1682 have a length that is a multiple of the word size, since GCC
1683 doesn't seem to put any other types into registers. */
1684 if (len > 4 && len % 4 == 0)
1686 int last_regnum = regnum;
1690 last_regnum = i386_next_regnum (last_regnum);
1694 if (last_regnum != -1)
1698 return i386_fp_regnum_p (regnum);
1701 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1702 return its contents in TO. */
1705 i386_register_to_value (struct frame_info *frame, int regnum,
1706 struct type *type, gdb_byte *to)
1708 int len = TYPE_LENGTH (type);
1710 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1711 available in FRAME (i.e. if it wasn't saved)? */
1713 if (i386_fp_regnum_p (regnum))
1715 i387_register_to_value (frame, regnum, type, to);
1719 /* Read a value spread across multiple registers. */
1721 gdb_assert (len > 4 && len % 4 == 0);
1725 gdb_assert (regnum != -1);
1726 gdb_assert (register_size (current_gdbarch, regnum) == 4);
1728 get_frame_register (frame, regnum, to);
1729 regnum = i386_next_regnum (regnum);
1735 /* Write the contents FROM of a value of type TYPE into register
1736 REGNUM in frame FRAME. */
1739 i386_value_to_register (struct frame_info *frame, int regnum,
1740 struct type *type, const gdb_byte *from)
1742 int len = TYPE_LENGTH (type);
1744 if (i386_fp_regnum_p (regnum))
1746 i387_value_to_register (frame, regnum, type, from);
1750 /* Write a value spread across multiple registers. */
1752 gdb_assert (len > 4 && len % 4 == 0);
1756 gdb_assert (regnum != -1);
1757 gdb_assert (register_size (current_gdbarch, regnum) == 4);
1759 put_frame_register (frame, regnum, from);
1760 regnum = i386_next_regnum (regnum);
1766 /* Supply register REGNUM from the buffer specified by GREGS and LEN
1767 in the general-purpose register set REGSET to register cache
1768 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
1771 i386_supply_gregset (const struct regset *regset, struct regcache *regcache,
1772 int regnum, const void *gregs, size_t len)
1774 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
1775 const gdb_byte *regs = gregs;
1778 gdb_assert (len == tdep->sizeof_gregset);
1780 for (i = 0; i < tdep->gregset_num_regs; i++)
1782 if ((regnum == i || regnum == -1)
1783 && tdep->gregset_reg_offset[i] != -1)
1784 regcache_raw_supply (regcache, i, regs + tdep->gregset_reg_offset[i]);
1788 /* Collect register REGNUM from the register cache REGCACHE and store
1789 it in the buffer specified by GREGS and LEN as described by the
1790 general-purpose register set REGSET. If REGNUM is -1, do this for
1791 all registers in REGSET. */
1794 i386_collect_gregset (const struct regset *regset,
1795 const struct regcache *regcache,
1796 int regnum, void *gregs, size_t len)
1798 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
1799 gdb_byte *regs = gregs;
1802 gdb_assert (len == tdep->sizeof_gregset);
1804 for (i = 0; i < tdep->gregset_num_regs; i++)
1806 if ((regnum == i || regnum == -1)
1807 && tdep->gregset_reg_offset[i] != -1)
1808 regcache_raw_collect (regcache, i, regs + tdep->gregset_reg_offset[i]);
1812 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
1813 in the floating-point register set REGSET to register cache
1814 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
1817 i386_supply_fpregset (const struct regset *regset, struct regcache *regcache,
1818 int regnum, const void *fpregs, size_t len)
1820 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
1822 if (len == I387_SIZEOF_FXSAVE)
1824 i387_supply_fxsave (regcache, regnum, fpregs);
1828 gdb_assert (len == tdep->sizeof_fpregset);
1829 i387_supply_fsave (regcache, regnum, fpregs);
1832 /* Collect register REGNUM from the register cache REGCACHE and store
1833 it in the buffer specified by FPREGS and LEN as described by the
1834 floating-point register set REGSET. If REGNUM is -1, do this for
1835 all registers in REGSET. */
1838 i386_collect_fpregset (const struct regset *regset,
1839 const struct regcache *regcache,
1840 int regnum, void *fpregs, size_t len)
1842 const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
1844 if (len == I387_SIZEOF_FXSAVE)
1846 i387_collect_fxsave (regcache, regnum, fpregs);
1850 gdb_assert (len == tdep->sizeof_fpregset);
1851 i387_collect_fsave (regcache, regnum, fpregs);
1854 /* Return the appropriate register set for the core section identified
1855 by SECT_NAME and SECT_SIZE. */
1857 const struct regset *
1858 i386_regset_from_core_section (struct gdbarch *gdbarch,
1859 const char *sect_name, size_t sect_size)
1861 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1863 if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset)
1865 if (tdep->gregset == NULL)
1866 tdep->gregset = regset_alloc (gdbarch, i386_supply_gregset,
1867 i386_collect_gregset);
1868 return tdep->gregset;
1871 if ((strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset)
1872 || (strcmp (sect_name, ".reg-xfp") == 0
1873 && sect_size == I387_SIZEOF_FXSAVE))
1875 if (tdep->fpregset == NULL)
1876 tdep->fpregset = regset_alloc (gdbarch, i386_supply_fpregset,
1877 i386_collect_fpregset);
1878 return tdep->fpregset;
1885 #ifdef STATIC_TRANSFORM_NAME
1886 /* SunPRO encodes the static variables. This is not related to C++
1887 mangling, it is done for C too. */
1890 sunpro_static_transform_name (char *name)
1893 if (IS_STATIC_TRANSFORM_NAME (name))
1895 /* For file-local statics there will be a period, a bunch of
1896 junk (the contents of which match a string given in the
1897 N_OPT), a period and the name. For function-local statics
1898 there will be a bunch of junk (which seems to change the
1899 second character from 'A' to 'B'), a period, the name of the
1900 function, and the name. So just skip everything before the
1902 p = strrchr (name, '.');
1908 #endif /* STATIC_TRANSFORM_NAME */
1911 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1914 i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name)
1916 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
1918 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
1919 struct minimal_symbol *indsym =
1920 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
1921 char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0;
1925 if (strncmp (symname, "__imp_", 6) == 0
1926 || strncmp (symname, "_imp_", 5) == 0)
1927 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
1930 return 0; /* Not a trampoline. */
1934 /* Return whether the frame preceding NEXT_FRAME corresponds to a
1935 sigtramp routine. */
1938 i386_sigtramp_p (struct frame_info *next_frame)
1940 CORE_ADDR pc = frame_pc_unwind (next_frame);
1943 find_pc_partial_function (pc, &name, NULL, NULL);
1944 return (name && strcmp ("_sigtramp", name) == 0);
1948 /* We have two flavours of disassembly. The machinery on this page
1949 deals with switching between those. */
1952 i386_print_insn (bfd_vma pc, struct disassemble_info *info)
1954 gdb_assert (disassembly_flavor == att_flavor
1955 || disassembly_flavor == intel_flavor);
1957 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1958 constified, cast to prevent a compiler warning. */
1959 info->disassembler_options = (char *) disassembly_flavor;
1960 info->mach = gdbarch_bfd_arch_info (current_gdbarch)->mach;
1962 return print_insn_i386 (pc, info);
1966 /* There are a few i386 architecture variants that differ only
1967 slightly from the generic i386 target. For now, we don't give them
1968 their own source file, but include them here. As a consequence,
1969 they'll always be included. */
1971 /* System V Release 4 (SVR4). */
1973 /* Return whether the frame preceding NEXT_FRAME corresponds to a SVR4
1974 sigtramp routine. */
1977 i386_svr4_sigtramp_p (struct frame_info *next_frame)
1979 CORE_ADDR pc = frame_pc_unwind (next_frame);
1982 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1983 currently unknown. */
1984 find_pc_partial_function (pc, &name, NULL, NULL);
1985 return (name && (strcmp ("_sigreturn", name) == 0
1986 || strcmp ("_sigacthandler", name) == 0
1987 || strcmp ("sigvechandler", name) == 0));
1990 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1991 routine, return the address of the associated sigcontext (ucontext)
1995 i386_svr4_sigcontext_addr (struct frame_info *next_frame)
2000 frame_unwind_register (next_frame, I386_ESP_REGNUM, buf);
2001 sp = extract_unsigned_integer (buf, 4);
2003 return read_memory_unsigned_integer (sp + 8, 4);
2010 i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
2012 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
2013 set_gdbarch_stab_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
2016 /* System V Release 4 (SVR4). */
2019 i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
2021 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2023 /* System V Release 4 uses ELF. */
2024 i386_elf_init_abi (info, gdbarch);
2026 /* System V Release 4 has shared libraries. */
2027 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
2029 tdep->sigtramp_p = i386_svr4_sigtramp_p;
2030 tdep->sigcontext_addr = i386_svr4_sigcontext_addr;
2031 tdep->sc_pc_offset = 36 + 14 * 4;
2032 tdep->sc_sp_offset = 36 + 17 * 4;
2034 tdep->jb_pc_offset = 20;
2040 i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
2042 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2044 /* DJGPP doesn't have any special frames for signal handlers. */
2045 tdep->sigtramp_p = NULL;
2047 tdep->jb_pc_offset = 36;
2053 i386_nw_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
2055 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2057 tdep->jb_pc_offset = 24;
2061 /* i386 register groups. In addition to the normal groups, add "mmx"
2064 static struct reggroup *i386_sse_reggroup;
2065 static struct reggroup *i386_mmx_reggroup;
2068 i386_init_reggroups (void)
2070 i386_sse_reggroup = reggroup_new ("sse", USER_REGGROUP);
2071 i386_mmx_reggroup = reggroup_new ("mmx", USER_REGGROUP);
2075 i386_add_reggroups (struct gdbarch *gdbarch)
2077 reggroup_add (gdbarch, i386_sse_reggroup);
2078 reggroup_add (gdbarch, i386_mmx_reggroup);
2079 reggroup_add (gdbarch, general_reggroup);
2080 reggroup_add (gdbarch, float_reggroup);
2081 reggroup_add (gdbarch, all_reggroup);
2082 reggroup_add (gdbarch, save_reggroup);
2083 reggroup_add (gdbarch, restore_reggroup);
2084 reggroup_add (gdbarch, vector_reggroup);
2085 reggroup_add (gdbarch, system_reggroup);
2089 i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
2090 struct reggroup *group)
2092 int sse_regnum_p = (i386_sse_regnum_p (gdbarch, regnum)
2093 || i386_mxcsr_regnum_p (gdbarch, regnum));
2094 int fp_regnum_p = (i386_fp_regnum_p (regnum)
2095 || i386_fpc_regnum_p (regnum));
2096 int mmx_regnum_p = (i386_mmx_regnum_p (gdbarch, regnum));
2098 if (group == i386_mmx_reggroup)
2099 return mmx_regnum_p;
2100 if (group == i386_sse_reggroup)
2101 return sse_regnum_p;
2102 if (group == vector_reggroup)
2103 return (mmx_regnum_p || sse_regnum_p);
2104 if (group == float_reggroup)
2106 if (group == general_reggroup)
2107 return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p);
2109 return default_register_reggroup_p (gdbarch, regnum, group);
2113 /* Get the ARGIth function argument for the current function. */
2116 i386_fetch_pointer_argument (struct frame_info *frame, int argi,
2119 CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM);
2120 return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4);
2124 static struct gdbarch *
2125 i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2127 struct gdbarch_tdep *tdep;
2128 struct gdbarch *gdbarch;
2130 /* If there is already a candidate, use it. */
2131 arches = gdbarch_list_lookup_by_info (arches, &info);
2133 return arches->gdbarch;
2135 /* Allocate space for the new architecture. */
2136 tdep = XMALLOC (struct gdbarch_tdep);
2137 gdbarch = gdbarch_alloc (&info, tdep);
2139 /* General-purpose registers. */
2140 tdep->gregset = NULL;
2141 tdep->gregset_reg_offset = NULL;
2142 tdep->gregset_num_regs = I386_NUM_GREGS;
2143 tdep->sizeof_gregset = 0;
2145 /* Floating-point registers. */
2146 tdep->fpregset = NULL;
2147 tdep->sizeof_fpregset = I387_SIZEOF_FSAVE;
2149 /* The default settings include the FPU registers, the MMX registers
2150 and the SSE registers. This can be overridden for a specific ABI
2151 by adjusting the members `st0_regnum', `mm0_regnum' and
2152 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
2153 will show up in the output of "info all-registers". Ideally we
2154 should try to autodetect whether they are available, such that we
2155 can prevent "info all-registers" from displaying registers that
2158 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
2159 [the SSE registers] always (even when they don't exist) or never
2160 showing them to the user (even when they do exist), I prefer the
2161 former over the latter. */
2163 tdep->st0_regnum = I386_ST0_REGNUM;
2165 /* The MMX registers are implemented as pseudo-registers. Put off
2166 calculating the register number for %mm0 until we know the number
2167 of raw registers. */
2168 tdep->mm0_regnum = 0;
2170 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
2171 tdep->num_xmm_regs = I386_NUM_XREGS - 1;
2173 tdep->jb_pc_offset = -1;
2174 tdep->struct_return = pcc_struct_return;
2175 tdep->sigtramp_start = 0;
2176 tdep->sigtramp_end = 0;
2177 tdep->sigtramp_p = i386_sigtramp_p;
2178 tdep->sigcontext_addr = NULL;
2179 tdep->sc_reg_offset = NULL;
2180 tdep->sc_pc_offset = -1;
2181 tdep->sc_sp_offset = -1;
2183 /* The format used for `long double' on almost all i386 targets is
2184 the i387 extended floating-point format. In fact, of all targets
2185 in the GCC 2.95 tree, only OSF/1 does it different, and insists
2186 on having a `long double' that's not `long' at all. */
2187 set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext);
2189 /* Although the i387 extended floating-point has only 80 significant
2190 bits, a `long double' actually takes up 96, probably to enforce
2192 set_gdbarch_long_double_bit (gdbarch, 96);
2194 /* The default ABI includes general-purpose registers,
2195 floating-point registers, and the SSE registers. */
2196 set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS);
2197 set_gdbarch_register_name (gdbarch, i386_register_name);
2198 set_gdbarch_register_type (gdbarch, i386_register_type);
2200 /* Register numbers of various important registers. */
2201 set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */
2202 set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */
2203 set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */
2204 set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */
2206 /* NOTE: kettenis/20040418: GCC does have two possible register
2207 numbering schemes on the i386: dbx and SVR4. These schemes
2208 differ in how they number %ebp, %esp, %eflags, and the
2209 floating-point registers, and are implemented by the arrays
2210 dbx_register_map[] and svr4_dbx_register_map in
2211 gcc/config/i386.c. GCC also defines a third numbering scheme in
2212 gcc/config/i386.c, which it designates as the "default" register
2213 map used in 64bit mode. This last register numbering scheme is
2214 implemented in dbx64_register_map, and is used for AMD64; see
2217 Currently, each GCC i386 target always uses the same register
2218 numbering scheme across all its supported debugging formats
2219 i.e. SDB (COFF), stabs and DWARF 2. This is because
2220 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
2221 DBX_REGISTER_NUMBER macro which is defined by each target's
2222 respective config header in a manner independent of the requested
2223 output debugging format.
2225 This does not match the arrangement below, which presumes that
2226 the SDB and stabs numbering schemes differ from the DWARF and
2227 DWARF 2 ones. The reason for this arrangement is that it is
2228 likely to get the numbering scheme for the target's
2229 default/native debug format right. For targets where GCC is the
2230 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
2231 targets where the native toolchain uses a different numbering
2232 scheme for a particular debug format (stabs-in-ELF on Solaris)
2233 the defaults below will have to be overridden, like
2234 i386_elf_init_abi() does. */
2236 /* Use the dbx register numbering scheme for stabs and COFF. */
2237 set_gdbarch_stab_reg_to_regnum (gdbarch, i386_dbx_reg_to_regnum);
2238 set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_dbx_reg_to_regnum);
2240 /* Use the SVR4 register numbering scheme for DWARF and DWARF 2. */
2241 set_gdbarch_dwarf_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
2242 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
2244 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
2245 be in use on any of the supported i386 targets. */
2247 set_gdbarch_print_float_info (gdbarch, i387_print_float_info);
2249 set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target);
2251 /* Call dummy code. */
2252 set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call);
2254 set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p);
2255 set_gdbarch_register_to_value (gdbarch, i386_register_to_value);
2256 set_gdbarch_value_to_register (gdbarch, i386_value_to_register);
2258 set_gdbarch_return_value (gdbarch, i386_return_value);
2260 set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue);
2262 /* Stack grows downward. */
2263 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2265 set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc);
2266 set_gdbarch_decr_pc_after_break (gdbarch, 1);
2268 set_gdbarch_frame_args_skip (gdbarch, 8);
2270 /* Wire in the MMX registers. */
2271 set_gdbarch_num_pseudo_regs (gdbarch, i386_num_mmx_regs);
2272 set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read);
2273 set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write);
2275 set_gdbarch_print_insn (gdbarch, i386_print_insn);
2277 set_gdbarch_unwind_dummy_id (gdbarch, i386_unwind_dummy_id);
2279 set_gdbarch_unwind_pc (gdbarch, i386_unwind_pc);
2281 /* Add the i386 register groups. */
2282 i386_add_reggroups (gdbarch);
2283 set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p);
2285 /* Helper for function argument information. */
2286 set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument);
2288 /* Hook in the DWARF CFI frame unwinder. */
2289 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
2291 frame_base_set_default (gdbarch, &i386_frame_base);
2293 /* Hook in ABI-specific overrides, if they have been registered. */
2294 gdbarch_init_osabi (info, gdbarch);
2296 frame_unwind_append_sniffer (gdbarch, i386_sigtramp_frame_sniffer);
2297 frame_unwind_append_sniffer (gdbarch, i386_frame_sniffer);
2299 /* If we have a register mapping, enable the generic core file
2300 support, unless it has already been enabled. */
2301 if (tdep->gregset_reg_offset
2302 && !gdbarch_regset_from_core_section_p (gdbarch))
2303 set_gdbarch_regset_from_core_section (gdbarch,
2304 i386_regset_from_core_section);
2306 /* Unless support for MMX has been disabled, make %mm0 the first
2308 if (tdep->mm0_regnum == 0)
2309 tdep->mm0_regnum = gdbarch_num_regs (gdbarch);
2314 static enum gdb_osabi
2315 i386_coff_osabi_sniffer (bfd *abfd)
2317 if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0
2318 || strcmp (bfd_get_target (abfd), "coff-go32") == 0)
2319 return GDB_OSABI_GO32;
2321 return GDB_OSABI_UNKNOWN;
2324 static enum gdb_osabi
2325 i386_nlm_osabi_sniffer (bfd *abfd)
2327 return GDB_OSABI_NETWARE;
2331 /* Provide a prototype to silence -Wmissing-prototypes. */
2332 void _initialize_i386_tdep (void);
2335 _initialize_i386_tdep (void)
2337 register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init);
2339 /* Add the variable that controls the disassembly flavor. */
2340 add_setshow_enum_cmd ("disassembly-flavor", no_class, valid_flavors,
2341 &disassembly_flavor, _("\
2342 Set the disassembly flavor."), _("\
2343 Show the disassembly flavor."), _("\
2344 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
2346 NULL, /* FIXME: i18n: */
2347 &setlist, &showlist);
2349 /* Add the variable that controls the convention for returning
2351 add_setshow_enum_cmd ("struct-convention", no_class, valid_conventions,
2352 &struct_convention, _("\
2353 Set the convention for returning small structs."), _("\
2354 Show the convention for returning small structs."), _("\
2355 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
2358 NULL, /* FIXME: i18n: */
2359 &setlist, &showlist);
2361 gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour,
2362 i386_coff_osabi_sniffer);
2363 gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_nlm_flavour,
2364 i386_nlm_osabi_sniffer);
2366 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4,
2367 i386_svr4_init_abi);
2368 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32,
2369 i386_go32_init_abi);
2370 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_NETWARE,
2373 /* Initialize the i386 specific register groups. */
2374 i386_init_reggroups ();