1 /* Target-dependent code for QNX Neutrino x86.
3 Copyright (C) 2003-2014 Free Software Foundation, Inc.
5 Contributed by QNX Software Systems Ltd.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
30 #include "i386-tdep.h"
31 #include "i387-tdep.h"
34 #include "solib-svr4.h"
37 #define X86_CPU_FXSR (1L << 12)
40 /* Why 13? Look in our /usr/include/x86/context.h header at the
41 x86_cpu_registers structure and you'll see an 'exx' junk register
42 that is just filler. Don't ask me, ask the kernel guys. */
45 /* Mapping between the general-purpose registers in `struct xxx'
46 format and GDB's register cache layout. */
48 /* From <x86/context.h>. */
49 static int i386nto_gregset_reg_offset[] =
66 /* Given a GDB register number REGNUM, return the offset into
67 Neutrino's register structure or -1 if the register is unknown. */
70 nto_reg_offset (int regnum)
72 if (regnum >= 0 && regnum < ARRAY_SIZE (i386nto_gregset_reg_offset))
73 return i386nto_gregset_reg_offset[regnum];
79 i386nto_supply_gregset (struct regcache *regcache, char *gpregs)
81 struct gdbarch *gdbarch = get_regcache_arch (regcache);
82 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
84 gdb_assert (tdep->gregset_reg_offset == i386nto_gregset_reg_offset);
85 i386_gregset.supply_regset (&i386_gregset, regcache, -1,
86 gpregs, NUM_GPREGS * 4);
90 i386nto_supply_fpregset (struct regcache *regcache, char *fpregs)
92 if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
93 i387_supply_fxsave (regcache, -1, fpregs);
95 i387_supply_fsave (regcache, -1, fpregs);
99 i386nto_supply_regset (struct regcache *regcache, int regset, char *data)
103 case NTO_REG_GENERAL:
104 i386nto_supply_gregset (regcache, data);
107 i386nto_supply_fpregset (regcache, data);
113 i386nto_regset_id (int regno)
117 else if (regno < I386_NUM_GREGS)
118 return NTO_REG_GENERAL;
119 else if (regno < I386_NUM_GREGS + I387_NUM_REGS)
120 return NTO_REG_FLOAT;
121 else if (regno < I386_SSE_NUM_REGS)
122 return NTO_REG_FLOAT; /* We store xmm registers in fxsave_area. */
124 return -1; /* Error. */
128 i386nto_register_area (struct gdbarch *gdbarch,
129 int regno, int regset, unsigned *off)
131 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
134 if (regset == NTO_REG_GENERAL)
137 return NUM_GPREGS * 4;
139 *off = nto_reg_offset (regno);
144 else if (regset == NTO_REG_FLOAT)
146 unsigned off_adjust, regsize, regset_size, regno_base;
147 /* The following are flags indicating number in our fxsave_area. */
148 int first_four = (regno >= I387_FCTRL_REGNUM (tdep)
149 && regno <= I387_FISEG_REGNUM (tdep));
150 int second_four = (regno > I387_FISEG_REGNUM (tdep)
151 && regno <= I387_FOP_REGNUM (tdep));
152 int st_reg = (regno >= I387_ST0_REGNUM (tdep)
153 && regno < I387_ST0_REGNUM (tdep) + 8);
154 int xmm_reg = (regno >= I387_XMM0_REGNUM (tdep)
155 && regno < I387_MXCSR_REGNUM (tdep));
157 if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
162 /* fxsave_area structure. */
165 /* fpu_control_word, fpu_status_word, fpu_tag_word, fpu_operand
167 regsize = 2; /* Two bytes each. */
169 regno_base = I387_FCTRL_REGNUM (tdep);
171 else if (second_four)
173 /* fpu_ip, fpu_cs, fpu_op, fpu_ds registers. */
176 regno_base = I387_FISEG_REGNUM (tdep) + 1;
183 regno_base = I387_ST0_REGNUM (tdep);
190 regno_base = I387_XMM0_REGNUM (tdep);
192 else if (regno == I387_MXCSR_REGNUM (tdep))
196 regno_base = I387_MXCSR_REGNUM (tdep);
201 gdb_assert (regno == -1);
204 regsize = regset_size;
210 /* fsave_area structure. */
211 if (first_four || second_four)
213 /* fpu_control_word, ... , fpu_ds registers. */
216 regno_base = I387_FCTRL_REGNUM (tdep);
220 /* One of ST registers. */
223 regno_base = I387_ST0_REGNUM (tdep);
228 gdb_assert (regno == -1);
231 regsize = regset_size;
236 *off = off_adjust + (regno - regno_base) * regsize;
245 i386nto_regset_fill (const struct regcache *regcache, int regset, char *data)
247 if (regset == NTO_REG_GENERAL)
251 for (regno = 0; regno < NUM_GPREGS; regno++)
253 int offset = nto_reg_offset (regno);
255 regcache_raw_collect (regcache, regno, data + offset);
258 else if (regset == NTO_REG_FLOAT)
260 if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
261 i387_collect_fxsave (regcache, -1, data);
263 i387_collect_fsave (regcache, -1, data);
271 /* Return whether THIS_FRAME corresponds to a QNX Neutrino sigtramp
275 i386nto_sigtramp_p (struct frame_info *this_frame)
277 CORE_ADDR pc = get_frame_pc (this_frame);
280 find_pc_partial_function (pc, &name, NULL, NULL);
281 return name && strcmp ("__signalstub", name) == 0;
284 /* Assuming THIS_FRAME is a QNX Neutrino sigtramp routine, return the
285 address of the associated sigcontext structure. */
288 i386nto_sigcontext_addr (struct frame_info *this_frame)
290 struct gdbarch *gdbarch = get_frame_arch (this_frame);
291 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
295 /* We store __ucontext_t addr in EDI register. */
296 get_frame_register (this_frame, I386_EDI_REGNUM, buf);
297 ptrctx = extract_unsigned_integer (buf, 4, byte_order);
298 ptrctx += 24 /* Context pointer is at this offset. */;
304 init_i386nto_ops (void)
306 nto_regset_id = i386nto_regset_id;
307 nto_supply_gregset = i386nto_supply_gregset;
308 nto_supply_fpregset = i386nto_supply_fpregset;
309 nto_supply_altregset = nto_dummy_supply_regset;
310 nto_supply_regset = i386nto_supply_regset;
311 nto_register_area = i386nto_register_area;
312 nto_regset_fill = i386nto_regset_fill;
313 nto_fetch_link_map_offsets =
314 svr4_ilp32_fetch_link_map_offsets;
318 i386nto_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
320 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
321 static struct target_so_ops nto_svr4_so_ops;
323 /* Deal with our strange signals. */
324 nto_initialize_signals ();
327 i386_elf_init_abi (info, gdbarch);
329 /* Neutrino rewinds to look more normal. Need to override the i386
330 default which is [unfortunately] to decrement the PC. */
331 set_gdbarch_decr_pc_after_break (gdbarch, 0);
333 tdep->gregset_reg_offset = i386nto_gregset_reg_offset;
334 tdep->gregset_num_regs = ARRAY_SIZE (i386nto_gregset_reg_offset);
335 tdep->sizeof_gregset = NUM_GPREGS * 4;
337 tdep->sigtramp_p = i386nto_sigtramp_p;
338 tdep->sigcontext_addr = i386nto_sigcontext_addr;
339 tdep->sc_reg_offset = i386nto_gregset_reg_offset;
340 tdep->sc_num_regs = ARRAY_SIZE (i386nto_gregset_reg_offset);
342 /* Setjmp()'s return PC saved in EDX (5). */
343 tdep->jb_pc_offset = 20; /* 5x32 bit ints in. */
345 set_solib_svr4_fetch_link_map_offsets
346 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
348 /* Initialize this lazily, to avoid an initialization order
349 dependency on solib-svr4.c's _initialize routine. */
350 if (nto_svr4_so_ops.in_dynsym_resolve_code == NULL)
352 nto_svr4_so_ops = svr4_so_ops;
354 /* Our loader handles solib relocations differently than svr4. */
355 nto_svr4_so_ops.relocate_section_addresses
356 = nto_relocate_section_addresses;
358 /* Supply a nice function to find our solibs. */
359 nto_svr4_so_ops.find_and_open_solib
360 = nto_find_and_open_solib;
362 /* Our linker code is in libc. */
363 nto_svr4_so_ops.in_dynsym_resolve_code
364 = nto_in_dynsym_resolve_code;
366 set_solib_ops (gdbarch, &nto_svr4_so_ops);
369 /* Provide a prototype to silence -Wmissing-prototypes. */
370 extern initialize_file_ftype _initialize_i386nto_tdep;
373 _initialize_i386nto_tdep (void)
376 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_QNXNTO,
378 gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_elf_flavour,
379 nto_elf_osabi_sniffer);