1 /* Target-dependent code for QNX Neutrino x86.
3 Copyright (C) 2003-2017 Free Software Foundation, Inc.
5 Contributed by QNX Software Systems Ltd.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
28 #include "i386-tdep.h"
29 #include "i387-tdep.h"
32 #include "solib-svr4.h"
35 #define X86_CPU_FXSR (1L << 12)
38 /* Why 13? Look in our /usr/include/x86/context.h header at the
39 x86_cpu_registers structure and you'll see an 'exx' junk register
40 that is just filler. Don't ask me, ask the kernel guys. */
43 /* Mapping between the general-purpose registers in `struct xxx'
44 format and GDB's register cache layout. */
46 /* From <x86/context.h>. */
47 static int i386nto_gregset_reg_offset[] =
64 /* Given a GDB register number REGNUM, return the offset into
65 Neutrino's register structure or -1 if the register is unknown. */
68 nto_reg_offset (int regnum)
70 if (regnum >= 0 && regnum < ARRAY_SIZE (i386nto_gregset_reg_offset))
71 return i386nto_gregset_reg_offset[regnum];
77 i386nto_supply_gregset (struct regcache *regcache, char *gpregs)
79 struct gdbarch *gdbarch = regcache->arch ();
80 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
82 gdb_assert (tdep->gregset_reg_offset == i386nto_gregset_reg_offset);
83 i386_gregset.supply_regset (&i386_gregset, regcache, -1,
84 gpregs, NUM_GPREGS * 4);
88 i386nto_supply_fpregset (struct regcache *regcache, char *fpregs)
90 if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
91 i387_supply_fxsave (regcache, -1, fpregs);
93 i387_supply_fsave (regcache, -1, fpregs);
97 i386nto_supply_regset (struct regcache *regcache, int regset, char *data)
101 case NTO_REG_GENERAL:
102 i386nto_supply_gregset (regcache, data);
105 i386nto_supply_fpregset (regcache, data);
111 i386nto_regset_id (int regno)
115 else if (regno < I386_NUM_GREGS)
116 return NTO_REG_GENERAL;
117 else if (regno < I386_NUM_GREGS + I387_NUM_REGS)
118 return NTO_REG_FLOAT;
119 else if (regno < I386_SSE_NUM_REGS)
120 return NTO_REG_FLOAT; /* We store xmm registers in fxsave_area. */
122 return -1; /* Error. */
126 i386nto_register_area (struct gdbarch *gdbarch,
127 int regno, int regset, unsigned *off)
129 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
132 if (regset == NTO_REG_GENERAL)
135 return NUM_GPREGS * 4;
137 *off = nto_reg_offset (regno);
142 else if (regset == NTO_REG_FLOAT)
144 unsigned off_adjust, regsize, regset_size, regno_base;
145 /* The following are flags indicating number in our fxsave_area. */
146 int first_four = (regno >= I387_FCTRL_REGNUM (tdep)
147 && regno <= I387_FISEG_REGNUM (tdep));
148 int second_four = (regno > I387_FISEG_REGNUM (tdep)
149 && regno <= I387_FOP_REGNUM (tdep));
150 int st_reg = (regno >= I387_ST0_REGNUM (tdep)
151 && regno < I387_ST0_REGNUM (tdep) + 8);
152 int xmm_reg = (regno >= I387_XMM0_REGNUM (tdep)
153 && regno < I387_MXCSR_REGNUM (tdep));
155 if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
160 /* fxsave_area structure. */
163 /* fpu_control_word, fpu_status_word, fpu_tag_word, fpu_operand
165 regsize = 2; /* Two bytes each. */
167 regno_base = I387_FCTRL_REGNUM (tdep);
169 else if (second_four)
171 /* fpu_ip, fpu_cs, fpu_op, fpu_ds registers. */
174 regno_base = I387_FISEG_REGNUM (tdep) + 1;
181 regno_base = I387_ST0_REGNUM (tdep);
188 regno_base = I387_XMM0_REGNUM (tdep);
190 else if (regno == I387_MXCSR_REGNUM (tdep))
194 regno_base = I387_MXCSR_REGNUM (tdep);
199 gdb_assert (regno == -1);
202 regsize = regset_size;
208 /* fsave_area structure. */
209 if (first_four || second_four)
211 /* fpu_control_word, ... , fpu_ds registers. */
214 regno_base = I387_FCTRL_REGNUM (tdep);
218 /* One of ST registers. */
221 regno_base = I387_ST0_REGNUM (tdep);
226 gdb_assert (regno == -1);
229 regsize = regset_size;
234 *off = off_adjust + (regno - regno_base) * regsize;
243 i386nto_regset_fill (const struct regcache *regcache, int regset, char *data)
245 if (regset == NTO_REG_GENERAL)
249 for (regno = 0; regno < NUM_GPREGS; regno++)
251 int offset = nto_reg_offset (regno);
253 regcache_raw_collect (regcache, regno, data + offset);
256 else if (regset == NTO_REG_FLOAT)
258 if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
259 i387_collect_fxsave (regcache, -1, data);
261 i387_collect_fsave (regcache, -1, data);
269 /* Return whether THIS_FRAME corresponds to a QNX Neutrino sigtramp
273 i386nto_sigtramp_p (struct frame_info *this_frame)
275 CORE_ADDR pc = get_frame_pc (this_frame);
278 find_pc_partial_function (pc, &name, NULL, NULL);
279 return name && strcmp ("__signalstub", name) == 0;
282 /* Assuming THIS_FRAME is a QNX Neutrino sigtramp routine, return the
283 address of the associated sigcontext structure. */
286 i386nto_sigcontext_addr (struct frame_info *this_frame)
288 struct gdbarch *gdbarch = get_frame_arch (this_frame);
289 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
293 /* We store __ucontext_t addr in EDI register. */
294 get_frame_register (this_frame, I386_EDI_REGNUM, buf);
295 ptrctx = extract_unsigned_integer (buf, 4, byte_order);
296 ptrctx += 24 /* Context pointer is at this offset. */;
302 init_i386nto_ops (void)
304 nto_regset_id = i386nto_regset_id;
305 nto_supply_gregset = i386nto_supply_gregset;
306 nto_supply_fpregset = i386nto_supply_fpregset;
307 nto_supply_altregset = nto_dummy_supply_regset;
308 nto_supply_regset = i386nto_supply_regset;
309 nto_register_area = i386nto_register_area;
310 nto_regset_fill = i386nto_regset_fill;
311 nto_fetch_link_map_offsets =
312 svr4_ilp32_fetch_link_map_offsets;
316 i386nto_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
318 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
319 static struct target_so_ops nto_svr4_so_ops;
321 /* Deal with our strange signals. */
322 nto_initialize_signals ();
325 i386_elf_init_abi (info, gdbarch);
327 /* Neutrino rewinds to look more normal. Need to override the i386
328 default which is [unfortunately] to decrement the PC. */
329 set_gdbarch_decr_pc_after_break (gdbarch, 0);
331 tdep->gregset_reg_offset = i386nto_gregset_reg_offset;
332 tdep->gregset_num_regs = ARRAY_SIZE (i386nto_gregset_reg_offset);
333 tdep->sizeof_gregset = NUM_GPREGS * 4;
335 tdep->sigtramp_p = i386nto_sigtramp_p;
336 tdep->sigcontext_addr = i386nto_sigcontext_addr;
337 tdep->sc_reg_offset = i386nto_gregset_reg_offset;
338 tdep->sc_num_regs = ARRAY_SIZE (i386nto_gregset_reg_offset);
340 /* Setjmp()'s return PC saved in EDX (5). */
341 tdep->jb_pc_offset = 20; /* 5x32 bit ints in. */
343 set_solib_svr4_fetch_link_map_offsets
344 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
346 /* Initialize this lazily, to avoid an initialization order
347 dependency on solib-svr4.c's _initialize routine. */
348 if (nto_svr4_so_ops.in_dynsym_resolve_code == NULL)
350 nto_svr4_so_ops = svr4_so_ops;
352 /* Our loader handles solib relocations differently than svr4. */
353 nto_svr4_so_ops.relocate_section_addresses
354 = nto_relocate_section_addresses;
356 /* Supply a nice function to find our solibs. */
357 nto_svr4_so_ops.find_and_open_solib
358 = nto_find_and_open_solib;
360 /* Our linker code is in libc. */
361 nto_svr4_so_ops.in_dynsym_resolve_code
362 = nto_in_dynsym_resolve_code;
364 set_solib_ops (gdbarch, &nto_svr4_so_ops);
366 set_gdbarch_wchar_bit (gdbarch, 32);
367 set_gdbarch_wchar_signed (gdbarch, 0);
371 _initialize_i386nto_tdep (void)
374 gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_QNXNTO,
376 gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_elf_flavour,
377 nto_elf_osabi_sniffer);