1 /* GNU/Linux/x86-64 specific low level interface, for the remote server
3 Copyright (C) 2002-2015 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "linux-low.h"
27 #include "x86-xstate.h"
29 #include "gdb_proc_service.h"
30 /* Don't include elf/common.h if linux/elf.h got included by
31 gdb_proc_service.h. */
33 #include "elf/common.h"
38 #include "tracepoint.h"
40 #include "nat/linux-nat.h"
41 #include "nat/x86-linux.h"
42 #include "nat/x86-linux-dregs.h"
45 /* Defined in auto-generated file amd64-linux.c. */
46 void init_registers_amd64_linux (void);
47 extern const struct target_desc *tdesc_amd64_linux;
49 /* Defined in auto-generated file amd64-avx-linux.c. */
50 void init_registers_amd64_avx_linux (void);
51 extern const struct target_desc *tdesc_amd64_avx_linux;
53 /* Defined in auto-generated file amd64-avx512-linux.c. */
54 void init_registers_amd64_avx512_linux (void);
55 extern const struct target_desc *tdesc_amd64_avx512_linux;
57 /* Defined in auto-generated file amd64-mpx-linux.c. */
58 void init_registers_amd64_mpx_linux (void);
59 extern const struct target_desc *tdesc_amd64_mpx_linux;
61 /* Defined in auto-generated file x32-linux.c. */
62 void init_registers_x32_linux (void);
63 extern const struct target_desc *tdesc_x32_linux;
65 /* Defined in auto-generated file x32-avx-linux.c. */
66 void init_registers_x32_avx_linux (void);
67 extern const struct target_desc *tdesc_x32_avx_linux;
69 /* Defined in auto-generated file x32-avx512-linux.c. */
70 void init_registers_x32_avx512_linux (void);
71 extern const struct target_desc *tdesc_x32_avx512_linux;
75 /* Defined in auto-generated file i386-linux.c. */
76 void init_registers_i386_linux (void);
77 extern const struct target_desc *tdesc_i386_linux;
79 /* Defined in auto-generated file i386-mmx-linux.c. */
80 void init_registers_i386_mmx_linux (void);
81 extern const struct target_desc *tdesc_i386_mmx_linux;
83 /* Defined in auto-generated file i386-avx-linux.c. */
84 void init_registers_i386_avx_linux (void);
85 extern const struct target_desc *tdesc_i386_avx_linux;
87 /* Defined in auto-generated file i386-avx512-linux.c. */
88 void init_registers_i386_avx512_linux (void);
89 extern const struct target_desc *tdesc_i386_avx512_linux;
91 /* Defined in auto-generated file i386-mpx-linux.c. */
92 void init_registers_i386_mpx_linux (void);
93 extern const struct target_desc *tdesc_i386_mpx_linux;
96 static struct target_desc *tdesc_amd64_linux_no_xml;
98 static struct target_desc *tdesc_i386_linux_no_xml;
101 static unsigned char jump_insn[] = { 0xe9, 0, 0, 0, 0 };
102 static unsigned char small_jump_insn[] = { 0x66, 0xe9, 0, 0 };
104 /* Backward compatibility for gdb without XML support. */
106 static const char *xmltarget_i386_linux_no_xml = "@<target>\
107 <architecture>i386</architecture>\
108 <osabi>GNU/Linux</osabi>\
112 static const char *xmltarget_amd64_linux_no_xml = "@<target>\
113 <architecture>i386:x86-64</architecture>\
114 <osabi>GNU/Linux</osabi>\
119 #include <sys/procfs.h>
120 #include <sys/ptrace.h>
123 #ifndef PTRACE_GET_THREAD_AREA
124 #define PTRACE_GET_THREAD_AREA 25
127 /* This definition comes from prctl.h, but some kernels may not have it. */
128 #ifndef PTRACE_ARCH_PRCTL
129 #define PTRACE_ARCH_PRCTL 30
132 /* The following definitions come from prctl.h, but may be absent
133 for certain configurations. */
135 #define ARCH_SET_GS 0x1001
136 #define ARCH_SET_FS 0x1002
137 #define ARCH_GET_FS 0x1003
138 #define ARCH_GET_GS 0x1004
141 /* Per-process arch-specific data we want to keep. */
143 struct arch_process_info
145 struct x86_debug_reg_state debug_reg_state;
150 /* Mapping between the general-purpose registers in `struct user'
151 format and GDB's register array layout.
152 Note that the transfer layout uses 64-bit regs. */
153 static /*const*/ int i386_regmap[] =
155 RAX * 8, RCX * 8, RDX * 8, RBX * 8,
156 RSP * 8, RBP * 8, RSI * 8, RDI * 8,
157 RIP * 8, EFLAGS * 8, CS * 8, SS * 8,
158 DS * 8, ES * 8, FS * 8, GS * 8
161 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
163 /* So code below doesn't have to care, i386 or amd64. */
164 #define ORIG_EAX ORIG_RAX
167 static const int x86_64_regmap[] =
169 RAX * 8, RBX * 8, RCX * 8, RDX * 8,
170 RSI * 8, RDI * 8, RBP * 8, RSP * 8,
171 R8 * 8, R9 * 8, R10 * 8, R11 * 8,
172 R12 * 8, R13 * 8, R14 * 8, R15 * 8,
173 RIP * 8, EFLAGS * 8, CS * 8, SS * 8,
174 DS * 8, ES * 8, FS * 8, GS * 8,
175 -1, -1, -1, -1, -1, -1, -1, -1,
176 -1, -1, -1, -1, -1, -1, -1, -1,
177 -1, -1, -1, -1, -1, -1, -1, -1,
179 -1, -1, -1, -1, -1, -1, -1, -1,
181 -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
182 -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
183 -1, -1, -1, -1, -1, -1, -1, -1, /* xmm16 ... xmm31 (AVX512) */
184 -1, -1, -1, -1, -1, -1, -1, -1,
185 -1, -1, -1, -1, -1, -1, -1, -1, /* ymm16 ... ymm31 (AVX512) */
186 -1, -1, -1, -1, -1, -1, -1, -1,
187 -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
188 -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm31 (AVX512) */
189 -1, -1, -1, -1, -1, -1, -1, -1,
190 -1, -1, -1, -1, -1, -1, -1, -1,
191 -1, -1, -1, -1, -1, -1, -1, -1
194 #define X86_64_NUM_REGS (sizeof (x86_64_regmap) / sizeof (x86_64_regmap[0]))
195 #define X86_64_USER_REGS (GS + 1)
197 #else /* ! __x86_64__ */
199 /* Mapping between the general-purpose registers in `struct user'
200 format and GDB's register array layout. */
201 static /*const*/ int i386_regmap[] =
203 EAX * 4, ECX * 4, EDX * 4, EBX * 4,
204 UESP * 4, EBP * 4, ESI * 4, EDI * 4,
205 EIP * 4, EFL * 4, CS * 4, SS * 4,
206 DS * 4, ES * 4, FS * 4, GS * 4
209 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
217 /* Returns true if the current inferior belongs to a x86-64 process,
221 is_64bit_tdesc (void)
223 struct regcache *regcache = get_thread_regcache (current_thread, 0);
225 return register_size (regcache->tdesc, 0) == 8;
231 /* Called by libthread_db. */
234 ps_get_thread_area (const struct ps_prochandle *ph,
235 lwpid_t lwpid, int idx, void **base)
238 int use_64bit = is_64bit_tdesc ();
245 if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_FS) == 0)
249 if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_GS) == 0)
260 unsigned int desc[4];
262 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid,
263 (void *) (intptr_t) idx, (unsigned long) &desc) < 0)
266 /* Ensure we properly extend the value to 64-bits for x86_64. */
267 *base = (void *) (uintptr_t) desc[1];
272 /* Get the thread area address. This is used to recognize which
273 thread is which when tracing with the in-process agent library. We
274 don't read anything from the address, and treat it as opaque; it's
275 the address itself that we assume is unique per-thread. */
278 x86_get_thread_area (int lwpid, CORE_ADDR *addr)
281 int use_64bit = is_64bit_tdesc ();
286 if (ptrace (PTRACE_ARCH_PRCTL, lwpid, &base, ARCH_GET_FS) == 0)
288 *addr = (CORE_ADDR) (uintptr_t) base;
297 struct lwp_info *lwp = find_lwp_pid (pid_to_ptid (lwpid));
298 struct thread_info *thr = get_lwp_thread (lwp);
299 struct regcache *regcache = get_thread_regcache (thr, 1);
300 unsigned int desc[4];
302 const int reg_thread_area = 3; /* bits to scale down register value. */
305 collect_register_by_name (regcache, "gs", &gs);
307 idx = gs >> reg_thread_area;
309 if (ptrace (PTRACE_GET_THREAD_AREA,
311 (void *) (long) idx, (unsigned long) &desc) < 0)
322 x86_cannot_store_register (int regno)
325 if (is_64bit_tdesc ())
329 return regno >= I386_NUM_REGS;
333 x86_cannot_fetch_register (int regno)
336 if (is_64bit_tdesc ())
340 return regno >= I386_NUM_REGS;
344 x86_fill_gregset (struct regcache *regcache, void *buf)
349 if (register_size (regcache->tdesc, 0) == 8)
351 for (i = 0; i < X86_64_NUM_REGS; i++)
352 if (x86_64_regmap[i] != -1)
353 collect_register (regcache, i, ((char *) buf) + x86_64_regmap[i]);
357 /* 32-bit inferior registers need to be zero-extended.
358 Callers would read uninitialized memory otherwise. */
359 memset (buf, 0x00, X86_64_USER_REGS * 8);
362 for (i = 0; i < I386_NUM_REGS; i++)
363 collect_register (regcache, i, ((char *) buf) + i386_regmap[i]);
365 collect_register_by_name (regcache, "orig_eax",
366 ((char *) buf) + ORIG_EAX * REGSIZE);
370 x86_store_gregset (struct regcache *regcache, const void *buf)
375 if (register_size (regcache->tdesc, 0) == 8)
377 for (i = 0; i < X86_64_NUM_REGS; i++)
378 if (x86_64_regmap[i] != -1)
379 supply_register (regcache, i, ((char *) buf) + x86_64_regmap[i]);
384 for (i = 0; i < I386_NUM_REGS; i++)
385 supply_register (regcache, i, ((char *) buf) + i386_regmap[i]);
387 supply_register_by_name (regcache, "orig_eax",
388 ((char *) buf) + ORIG_EAX * REGSIZE);
392 x86_fill_fpregset (struct regcache *regcache, void *buf)
395 i387_cache_to_fxsave (regcache, buf);
397 i387_cache_to_fsave (regcache, buf);
402 x86_store_fpregset (struct regcache *regcache, const void *buf)
405 i387_fxsave_to_cache (regcache, buf);
407 i387_fsave_to_cache (regcache, buf);
414 x86_fill_fpxregset (struct regcache *regcache, void *buf)
416 i387_cache_to_fxsave (regcache, buf);
420 x86_store_fpxregset (struct regcache *regcache, const void *buf)
422 i387_fxsave_to_cache (regcache, buf);
428 x86_fill_xstateregset (struct regcache *regcache, void *buf)
430 i387_cache_to_xsave (regcache, buf);
434 x86_store_xstateregset (struct regcache *regcache, const void *buf)
436 i387_xsave_to_cache (regcache, buf);
439 /* ??? The non-biarch i386 case stores all the i387 regs twice.
440 Once in i387_.*fsave.* and once in i387_.*fxsave.*.
441 This is, presumably, to handle the case where PTRACE_[GS]ETFPXREGS
442 doesn't work. IWBN to avoid the duplication in the case where it
443 does work. Maybe the arch_setup routine could check whether it works
444 and update the supported regsets accordingly. */
446 static struct regset_info x86_regsets[] =
448 #ifdef HAVE_PTRACE_GETREGS
449 { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t),
451 x86_fill_gregset, x86_store_gregset },
452 { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_X86_XSTATE, 0,
453 EXTENDED_REGS, x86_fill_xstateregset, x86_store_xstateregset },
455 # ifdef HAVE_PTRACE_GETFPXREGS
456 { PTRACE_GETFPXREGS, PTRACE_SETFPXREGS, 0, sizeof (elf_fpxregset_t),
458 x86_fill_fpxregset, x86_store_fpxregset },
461 { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, sizeof (elf_fpregset_t),
463 x86_fill_fpregset, x86_store_fpregset },
464 #endif /* HAVE_PTRACE_GETREGS */
465 { 0, 0, 0, -1, -1, NULL, NULL }
469 x86_get_pc (struct regcache *regcache)
471 int use_64bit = register_size (regcache->tdesc, 0) == 8;
476 collect_register_by_name (regcache, "rip", &pc);
477 return (CORE_ADDR) pc;
482 collect_register_by_name (regcache, "eip", &pc);
483 return (CORE_ADDR) pc;
488 x86_set_pc (struct regcache *regcache, CORE_ADDR pc)
490 int use_64bit = register_size (regcache->tdesc, 0) == 8;
494 unsigned long newpc = pc;
495 supply_register_by_name (regcache, "rip", &newpc);
499 unsigned int newpc = pc;
500 supply_register_by_name (regcache, "eip", &newpc);
504 static const unsigned char x86_breakpoint[] = { 0xCC };
505 #define x86_breakpoint_len 1
508 x86_breakpoint_at (CORE_ADDR pc)
512 (*the_target->read_memory) (pc, &c, 1);
519 /* Low-level function vector. */
520 struct x86_dr_low_type x86_dr_low =
522 x86_linux_dr_set_control,
523 x86_linux_dr_set_addr,
524 x86_linux_dr_get_addr,
525 x86_linux_dr_get_status,
526 x86_linux_dr_get_control,
530 /* Breakpoint/Watchpoint support. */
533 x86_supports_z_point_type (char z_type)
539 case Z_PACKET_WRITE_WP:
540 case Z_PACKET_ACCESS_WP:
548 x86_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
549 int size, struct raw_breakpoint *bp)
551 struct process_info *proc = current_process ();
555 case raw_bkpt_type_hw:
556 case raw_bkpt_type_write_wp:
557 case raw_bkpt_type_access_wp:
559 enum target_hw_bp_type hw_type
560 = raw_bkpt_type_to_target_hw_bp_type (type);
561 struct x86_debug_reg_state *state
562 = &proc->priv->arch_private->debug_reg_state;
564 return x86_dr_insert_watchpoint (state, hw_type, addr, size);
574 x86_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
575 int size, struct raw_breakpoint *bp)
577 struct process_info *proc = current_process ();
581 case raw_bkpt_type_hw:
582 case raw_bkpt_type_write_wp:
583 case raw_bkpt_type_access_wp:
585 enum target_hw_bp_type hw_type
586 = raw_bkpt_type_to_target_hw_bp_type (type);
587 struct x86_debug_reg_state *state
588 = &proc->priv->arch_private->debug_reg_state;
590 return x86_dr_remove_watchpoint (state, hw_type, addr, size);
599 x86_stopped_by_watchpoint (void)
601 struct process_info *proc = current_process ();
602 return x86_dr_stopped_by_watchpoint (&proc->priv->arch_private->debug_reg_state);
606 x86_stopped_data_address (void)
608 struct process_info *proc = current_process ();
610 if (x86_dr_stopped_data_address (&proc->priv->arch_private->debug_reg_state,
616 /* Called when a new process is created. */
618 static struct arch_process_info *
619 x86_linux_new_process (void)
621 struct arch_process_info *info = XCNEW (struct arch_process_info);
623 x86_low_init_dregs (&info->debug_reg_state);
628 /* Target routine for linux_new_fork. */
631 x86_linux_new_fork (struct process_info *parent, struct process_info *child)
633 /* These are allocated by linux_add_process. */
634 gdb_assert (parent->priv != NULL
635 && parent->priv->arch_private != NULL);
636 gdb_assert (child->priv != NULL
637 && child->priv->arch_private != NULL);
639 /* Linux kernel before 2.6.33 commit
640 72f674d203cd230426437cdcf7dd6f681dad8b0d
641 will inherit hardware debug registers from parent
642 on fork/vfork/clone. Newer Linux kernels create such tasks with
643 zeroed debug registers.
645 GDB core assumes the child inherits the watchpoints/hw
646 breakpoints of the parent, and will remove them all from the
647 forked off process. Copy the debug registers mirrors into the
648 new process so that all breakpoints and watchpoints can be
649 removed together. The debug registers mirror will become zeroed
650 in the end before detaching the forked off process, thus making
651 this compatible with older Linux kernels too. */
653 *child->priv->arch_private = *parent->priv->arch_private;
656 /* See nat/x86-dregs.h. */
658 struct x86_debug_reg_state *
659 x86_debug_reg_state (pid_t pid)
661 struct process_info *proc = find_process_pid (pid);
663 return &proc->priv->arch_private->debug_reg_state;
666 /* When GDBSERVER is built as a 64-bit application on linux, the
667 PTRACE_GETSIGINFO data is always presented in 64-bit layout. Since
668 debugging a 32-bit inferior with a 64-bit GDBSERVER should look the same
669 as debugging it with a 32-bit GDBSERVER, we do the 32-bit <-> 64-bit
670 conversion in-place ourselves. */
672 /* These types below (compat_*) define a siginfo type that is layout
673 compatible with the siginfo type exported by the 32-bit userspace
678 typedef int compat_int_t;
679 typedef unsigned int compat_uptr_t;
681 typedef int compat_time_t;
682 typedef int compat_timer_t;
683 typedef int compat_clock_t;
685 struct compat_timeval
687 compat_time_t tv_sec;
691 typedef union compat_sigval
693 compat_int_t sival_int;
694 compat_uptr_t sival_ptr;
697 typedef struct compat_siginfo
705 int _pad[((128 / sizeof (int)) - 3)];
714 /* POSIX.1b timers */
719 compat_sigval_t _sigval;
722 /* POSIX.1b signals */
727 compat_sigval_t _sigval;
736 compat_clock_t _utime;
737 compat_clock_t _stime;
740 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
755 /* For x32, clock_t in _sigchld is 64bit aligned at 4 bytes. */
756 typedef long __attribute__ ((__aligned__ (4))) compat_x32_clock_t;
758 typedef struct compat_x32_siginfo
766 int _pad[((128 / sizeof (int)) - 3)];
775 /* POSIX.1b timers */
780 compat_sigval_t _sigval;
783 /* POSIX.1b signals */
788 compat_sigval_t _sigval;
797 compat_x32_clock_t _utime;
798 compat_x32_clock_t _stime;
801 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
814 } compat_x32_siginfo_t __attribute__ ((__aligned__ (8)));
816 #define cpt_si_pid _sifields._kill._pid
817 #define cpt_si_uid _sifields._kill._uid
818 #define cpt_si_timerid _sifields._timer._tid
819 #define cpt_si_overrun _sifields._timer._overrun
820 #define cpt_si_status _sifields._sigchld._status
821 #define cpt_si_utime _sifields._sigchld._utime
822 #define cpt_si_stime _sifields._sigchld._stime
823 #define cpt_si_ptr _sifields._rt._sigval.sival_ptr
824 #define cpt_si_addr _sifields._sigfault._addr
825 #define cpt_si_band _sifields._sigpoll._band
826 #define cpt_si_fd _sifields._sigpoll._fd
828 /* glibc at least up to 2.3.2 doesn't have si_timerid, si_overrun.
829 In their place is si_timer1,si_timer2. */
831 #define si_timerid si_timer1
834 #define si_overrun si_timer2
838 compat_siginfo_from_siginfo (compat_siginfo_t *to, siginfo_t *from)
840 memset (to, 0, sizeof (*to));
842 to->si_signo = from->si_signo;
843 to->si_errno = from->si_errno;
844 to->si_code = from->si_code;
846 if (to->si_code == SI_TIMER)
848 to->cpt_si_timerid = from->si_timerid;
849 to->cpt_si_overrun = from->si_overrun;
850 to->cpt_si_ptr = (intptr_t) from->si_ptr;
852 else if (to->si_code == SI_USER)
854 to->cpt_si_pid = from->si_pid;
855 to->cpt_si_uid = from->si_uid;
857 else if (to->si_code < 0)
859 to->cpt_si_pid = from->si_pid;
860 to->cpt_si_uid = from->si_uid;
861 to->cpt_si_ptr = (intptr_t) from->si_ptr;
865 switch (to->si_signo)
868 to->cpt_si_pid = from->si_pid;
869 to->cpt_si_uid = from->si_uid;
870 to->cpt_si_status = from->si_status;
871 to->cpt_si_utime = from->si_utime;
872 to->cpt_si_stime = from->si_stime;
878 to->cpt_si_addr = (intptr_t) from->si_addr;
881 to->cpt_si_band = from->si_band;
882 to->cpt_si_fd = from->si_fd;
885 to->cpt_si_pid = from->si_pid;
886 to->cpt_si_uid = from->si_uid;
887 to->cpt_si_ptr = (intptr_t) from->si_ptr;
894 siginfo_from_compat_siginfo (siginfo_t *to, compat_siginfo_t *from)
896 memset (to, 0, sizeof (*to));
898 to->si_signo = from->si_signo;
899 to->si_errno = from->si_errno;
900 to->si_code = from->si_code;
902 if (to->si_code == SI_TIMER)
904 to->si_timerid = from->cpt_si_timerid;
905 to->si_overrun = from->cpt_si_overrun;
906 to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr;
908 else if (to->si_code == SI_USER)
910 to->si_pid = from->cpt_si_pid;
911 to->si_uid = from->cpt_si_uid;
913 else if (to->si_code < 0)
915 to->si_pid = from->cpt_si_pid;
916 to->si_uid = from->cpt_si_uid;
917 to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr;
921 switch (to->si_signo)
924 to->si_pid = from->cpt_si_pid;
925 to->si_uid = from->cpt_si_uid;
926 to->si_status = from->cpt_si_status;
927 to->si_utime = from->cpt_si_utime;
928 to->si_stime = from->cpt_si_stime;
934 to->si_addr = (void *) (intptr_t) from->cpt_si_addr;
937 to->si_band = from->cpt_si_band;
938 to->si_fd = from->cpt_si_fd;
941 to->si_pid = from->cpt_si_pid;
942 to->si_uid = from->cpt_si_uid;
943 to->si_ptr = (void* ) (intptr_t) from->cpt_si_ptr;
950 compat_x32_siginfo_from_siginfo (compat_x32_siginfo_t *to,
953 memset (to, 0, sizeof (*to));
955 to->si_signo = from->si_signo;
956 to->si_errno = from->si_errno;
957 to->si_code = from->si_code;
959 if (to->si_code == SI_TIMER)
961 to->cpt_si_timerid = from->si_timerid;
962 to->cpt_si_overrun = from->si_overrun;
963 to->cpt_si_ptr = (intptr_t) from->si_ptr;
965 else if (to->si_code == SI_USER)
967 to->cpt_si_pid = from->si_pid;
968 to->cpt_si_uid = from->si_uid;
970 else if (to->si_code < 0)
972 to->cpt_si_pid = from->si_pid;
973 to->cpt_si_uid = from->si_uid;
974 to->cpt_si_ptr = (intptr_t) from->si_ptr;
978 switch (to->si_signo)
981 to->cpt_si_pid = from->si_pid;
982 to->cpt_si_uid = from->si_uid;
983 to->cpt_si_status = from->si_status;
984 to->cpt_si_utime = from->si_utime;
985 to->cpt_si_stime = from->si_stime;
991 to->cpt_si_addr = (intptr_t) from->si_addr;
994 to->cpt_si_band = from->si_band;
995 to->cpt_si_fd = from->si_fd;
998 to->cpt_si_pid = from->si_pid;
999 to->cpt_si_uid = from->si_uid;
1000 to->cpt_si_ptr = (intptr_t) from->si_ptr;
1007 siginfo_from_compat_x32_siginfo (siginfo_t *to,
1008 compat_x32_siginfo_t *from)
1010 memset (to, 0, sizeof (*to));
1012 to->si_signo = from->si_signo;
1013 to->si_errno = from->si_errno;
1014 to->si_code = from->si_code;
1016 if (to->si_code == SI_TIMER)
1018 to->si_timerid = from->cpt_si_timerid;
1019 to->si_overrun = from->cpt_si_overrun;
1020 to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr;
1022 else if (to->si_code == SI_USER)
1024 to->si_pid = from->cpt_si_pid;
1025 to->si_uid = from->cpt_si_uid;
1027 else if (to->si_code < 0)
1029 to->si_pid = from->cpt_si_pid;
1030 to->si_uid = from->cpt_si_uid;
1031 to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr;
1035 switch (to->si_signo)
1038 to->si_pid = from->cpt_si_pid;
1039 to->si_uid = from->cpt_si_uid;
1040 to->si_status = from->cpt_si_status;
1041 to->si_utime = from->cpt_si_utime;
1042 to->si_stime = from->cpt_si_stime;
1048 to->si_addr = (void *) (intptr_t) from->cpt_si_addr;
1051 to->si_band = from->cpt_si_band;
1052 to->si_fd = from->cpt_si_fd;
1055 to->si_pid = from->cpt_si_pid;
1056 to->si_uid = from->cpt_si_uid;
1057 to->si_ptr = (void* ) (intptr_t) from->cpt_si_ptr;
1063 #endif /* __x86_64__ */
1065 /* Convert a native/host siginfo object, into/from the siginfo in the
1066 layout of the inferiors' architecture. Returns true if any
1067 conversion was done; false otherwise. If DIRECTION is 1, then copy
1068 from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to
1072 x86_siginfo_fixup (siginfo_t *native, void *inf, int direction)
1075 unsigned int machine;
1076 int tid = lwpid_of (current_thread);
1077 int is_elf64 = linux_pid_exe_is_elf_64_file (tid, &machine);
1079 /* Is the inferior 32-bit? If so, then fixup the siginfo object. */
1080 if (!is_64bit_tdesc ())
1082 gdb_assert (sizeof (siginfo_t) == sizeof (compat_siginfo_t));
1085 compat_siginfo_from_siginfo ((struct compat_siginfo *) inf, native);
1087 siginfo_from_compat_siginfo (native, (struct compat_siginfo *) inf);
1091 /* No fixup for native x32 GDB. */
1092 else if (!is_elf64 && sizeof (void *) == 8)
1094 gdb_assert (sizeof (siginfo_t) == sizeof (compat_x32_siginfo_t));
1097 compat_x32_siginfo_from_siginfo ((struct compat_x32_siginfo *) inf,
1100 siginfo_from_compat_x32_siginfo (native,
1101 (struct compat_x32_siginfo *) inf);
1112 /* Format of XSAVE extended state is:
1115 fxsave_bytes[0..463]
1116 sw_usable_bytes[464..511]
1117 xstate_hdr_bytes[512..575]
1122 Same memory layout will be used for the coredump NT_X86_XSTATE
1123 representing the XSAVE extended state registers.
1125 The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled
1126 extended state mask, which is the same as the extended control register
1127 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask
1128 together with the mask saved in the xstate_hdr_bytes to determine what
1129 states the processor/OS supports and what state, used or initialized,
1130 the process/thread is in. */
1131 #define I386_LINUX_XSAVE_XCR0_OFFSET 464
1133 /* Does the current host support the GETFPXREGS request? The header
1134 file may or may not define it, and even if it is defined, the
1135 kernel will return EIO if it's running on a pre-SSE processor. */
1136 int have_ptrace_getfpxregs =
1137 #ifdef HAVE_PTRACE_GETFPXREGS
1144 /* Does the current host support PTRACE_GETREGSET? */
1145 static int have_ptrace_getregset = -1;
1147 /* Get Linux/x86 target description from running target. */
1149 static const struct target_desc *
1150 x86_linux_read_description (void)
1152 unsigned int machine;
1156 static uint64_t xcr0;
1157 struct regset_info *regset;
1159 tid = lwpid_of (current_thread);
1161 is_elf64 = linux_pid_exe_is_elf_64_file (tid, &machine);
1163 if (sizeof (void *) == 4)
1166 error (_("Can't debug 64-bit process with 32-bit GDBserver"));
1168 else if (machine == EM_X86_64)
1169 error (_("Can't debug x86-64 process with 32-bit GDBserver"));
1173 #if !defined __x86_64__ && defined HAVE_PTRACE_GETFPXREGS
1174 if (machine == EM_386 && have_ptrace_getfpxregs == -1)
1176 elf_fpxregset_t fpxregs;
1178 if (ptrace (PTRACE_GETFPXREGS, tid, 0, (long) &fpxregs) < 0)
1180 have_ptrace_getfpxregs = 0;
1181 have_ptrace_getregset = 0;
1182 return tdesc_i386_mmx_linux;
1185 have_ptrace_getfpxregs = 1;
1191 x86_xcr0 = X86_XSTATE_SSE_MASK;
1193 /* Don't use XML. */
1195 if (machine == EM_X86_64)
1196 return tdesc_amd64_linux_no_xml;
1199 return tdesc_i386_linux_no_xml;
1202 if (have_ptrace_getregset == -1)
1204 uint64_t xstateregs[(X86_XSTATE_SSE_SIZE / sizeof (uint64_t))];
1207 iov.iov_base = xstateregs;
1208 iov.iov_len = sizeof (xstateregs);
1210 /* Check if PTRACE_GETREGSET works. */
1211 if (ptrace (PTRACE_GETREGSET, tid,
1212 (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
1213 have_ptrace_getregset = 0;
1216 have_ptrace_getregset = 1;
1218 /* Get XCR0 from XSAVE extended state. */
1219 xcr0 = xstateregs[(I386_LINUX_XSAVE_XCR0_OFFSET
1220 / sizeof (uint64_t))];
1222 /* Use PTRACE_GETREGSET if it is available. */
1223 for (regset = x86_regsets;
1224 regset->fill_function != NULL; regset++)
1225 if (regset->get_request == PTRACE_GETREGSET)
1226 regset->size = X86_XSTATE_SIZE (xcr0);
1227 else if (regset->type != GENERAL_REGS)
1232 /* Check the native XCR0 only if PTRACE_GETREGSET is available. */
1233 xcr0_features = (have_ptrace_getregset
1234 && (xcr0 & X86_XSTATE_ALL_MASK));
1239 if (machine == EM_X86_64)
1246 switch (xcr0 & X86_XSTATE_ALL_MASK)
1248 case X86_XSTATE_AVX512_MASK:
1249 return tdesc_amd64_avx512_linux;
1251 case X86_XSTATE_MPX_MASK:
1252 return tdesc_amd64_mpx_linux;
1254 case X86_XSTATE_AVX_MASK:
1255 return tdesc_amd64_avx_linux;
1258 return tdesc_amd64_linux;
1262 return tdesc_amd64_linux;
1268 switch (xcr0 & X86_XSTATE_ALL_MASK)
1270 case X86_XSTATE_AVX512_MASK:
1271 return tdesc_x32_avx512_linux;
1273 case X86_XSTATE_MPX_MASK: /* No MPX on x32. */
1274 case X86_XSTATE_AVX_MASK:
1275 return tdesc_x32_avx_linux;
1278 return tdesc_x32_linux;
1282 return tdesc_x32_linux;
1290 switch (xcr0 & X86_XSTATE_ALL_MASK)
1292 case (X86_XSTATE_AVX512_MASK):
1293 return tdesc_i386_avx512_linux;
1295 case (X86_XSTATE_MPX_MASK):
1296 return tdesc_i386_mpx_linux;
1298 case (X86_XSTATE_AVX_MASK):
1299 return tdesc_i386_avx_linux;
1302 return tdesc_i386_linux;
1306 return tdesc_i386_linux;
1309 gdb_assert_not_reached ("failed to return tdesc");
1312 /* Callback for find_inferior. Stops iteration when a thread with a
1313 given PID is found. */
1316 same_process_callback (struct inferior_list_entry *entry, void *data)
1318 int pid = *(int *) data;
1320 return (ptid_get_pid (entry->id) == pid);
1323 /* Callback for for_each_inferior. Calls the arch_setup routine for
1327 x86_arch_setup_process_callback (struct inferior_list_entry *entry)
1329 int pid = ptid_get_pid (entry->id);
1331 /* Look up any thread of this processes. */
1333 = (struct thread_info *) find_inferior (&all_threads,
1334 same_process_callback, &pid);
1336 the_low_target.arch_setup ();
1339 /* Update all the target description of all processes; a new GDB
1340 connected, and it may or not support xml target descriptions. */
1343 x86_linux_update_xmltarget (void)
1345 struct thread_info *saved_thread = current_thread;
1347 /* Before changing the register cache's internal layout, flush the
1348 contents of the current valid caches back to the threads, and
1349 release the current regcache objects. */
1350 regcache_release ();
1352 for_each_inferior (&all_processes, x86_arch_setup_process_callback);
1354 current_thread = saved_thread;
1357 /* Process qSupported query, "xmlRegisters=". Update the buffer size for
1358 PTRACE_GETREGSET. */
1361 x86_linux_process_qsupported (const char *query)
1363 /* Return if gdb doesn't support XML. If gdb sends "xmlRegisters="
1364 with "i386" in qSupported query, it supports x86 XML target
1367 if (query != NULL && startswith (query, "xmlRegisters="))
1369 char *copy = xstrdup (query + 13);
1372 for (p = strtok (copy, ","); p != NULL; p = strtok (NULL, ","))
1374 if (strcmp (p, "i386") == 0)
1384 x86_linux_update_xmltarget ();
1387 /* Common for x86/x86-64. */
1389 static struct regsets_info x86_regsets_info =
1391 x86_regsets, /* regsets */
1392 0, /* num_regsets */
1393 NULL, /* disabled_regsets */
1397 static struct regs_info amd64_linux_regs_info =
1399 NULL, /* regset_bitmap */
1400 NULL, /* usrregs_info */
1404 static struct usrregs_info i386_linux_usrregs_info =
1410 static struct regs_info i386_linux_regs_info =
1412 NULL, /* regset_bitmap */
1413 &i386_linux_usrregs_info,
1417 const struct regs_info *
1418 x86_linux_regs_info (void)
1421 if (is_64bit_tdesc ())
1422 return &amd64_linux_regs_info;
1425 return &i386_linux_regs_info;
1428 /* Initialize the target description for the architecture of the
1432 x86_arch_setup (void)
1434 current_process ()->tdesc = x86_linux_read_description ();
1438 x86_supports_tracepoints (void)
1444 append_insns (CORE_ADDR *to, size_t len, const unsigned char *buf)
1446 write_inferior_memory (*to, buf, len);
1451 push_opcode (unsigned char *buf, char *op)
1453 unsigned char *buf_org = buf;
1458 unsigned long ul = strtoul (op, &endptr, 16);
1467 return buf - buf_org;
1472 /* Build a jump pad that saves registers and calls a collection
1473 function. Writes a jump instruction to the jump pad to
1474 JJUMPAD_INSN. The caller is responsible to write it in at the
1475 tracepoint address. */
1478 amd64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, CORE_ADDR tpaddr,
1479 CORE_ADDR collector,
1482 CORE_ADDR *jump_entry,
1483 CORE_ADDR *trampoline,
1484 ULONGEST *trampoline_size,
1485 unsigned char *jjump_pad_insn,
1486 ULONGEST *jjump_pad_insn_size,
1487 CORE_ADDR *adjusted_insn_addr,
1488 CORE_ADDR *adjusted_insn_addr_end,
1491 unsigned char buf[40];
1495 CORE_ADDR buildaddr = *jump_entry;
1497 /* Build the jump pad. */
1499 /* First, do tracepoint data collection. Save registers. */
1501 /* Need to ensure stack pointer saved first. */
1502 buf[i++] = 0x54; /* push %rsp */
1503 buf[i++] = 0x55; /* push %rbp */
1504 buf[i++] = 0x57; /* push %rdi */
1505 buf[i++] = 0x56; /* push %rsi */
1506 buf[i++] = 0x52; /* push %rdx */
1507 buf[i++] = 0x51; /* push %rcx */
1508 buf[i++] = 0x53; /* push %rbx */
1509 buf[i++] = 0x50; /* push %rax */
1510 buf[i++] = 0x41; buf[i++] = 0x57; /* push %r15 */
1511 buf[i++] = 0x41; buf[i++] = 0x56; /* push %r14 */
1512 buf[i++] = 0x41; buf[i++] = 0x55; /* push %r13 */
1513 buf[i++] = 0x41; buf[i++] = 0x54; /* push %r12 */
1514 buf[i++] = 0x41; buf[i++] = 0x53; /* push %r11 */
1515 buf[i++] = 0x41; buf[i++] = 0x52; /* push %r10 */
1516 buf[i++] = 0x41; buf[i++] = 0x51; /* push %r9 */
1517 buf[i++] = 0x41; buf[i++] = 0x50; /* push %r8 */
1518 buf[i++] = 0x9c; /* pushfq */
1519 buf[i++] = 0x48; /* movl <addr>,%rdi */
1521 *((unsigned long *)(buf + i)) = (unsigned long) tpaddr;
1522 i += sizeof (unsigned long);
1523 buf[i++] = 0x57; /* push %rdi */
1524 append_insns (&buildaddr, i, buf);
1526 /* Stack space for the collecting_t object. */
1528 i += push_opcode (&buf[i], "48 83 ec 18"); /* sub $0x18,%rsp */
1529 i += push_opcode (&buf[i], "48 b8"); /* mov <tpoint>,%rax */
1530 memcpy (buf + i, &tpoint, 8);
1532 i += push_opcode (&buf[i], "48 89 04 24"); /* mov %rax,(%rsp) */
1533 i += push_opcode (&buf[i],
1534 "64 48 8b 04 25 00 00 00 00"); /* mov %fs:0x0,%rax */
1535 i += push_opcode (&buf[i], "48 89 44 24 08"); /* mov %rax,0x8(%rsp) */
1536 append_insns (&buildaddr, i, buf);
1540 i += push_opcode (&buf[i], "48 be"); /* movl <lockaddr>,%rsi */
1541 memcpy (&buf[i], (void *) &lockaddr, 8);
1543 i += push_opcode (&buf[i], "48 89 e1"); /* mov %rsp,%rcx */
1544 i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */
1545 i += push_opcode (&buf[i], "f0 48 0f b1 0e"); /* lock cmpxchg %rcx,(%rsi) */
1546 i += push_opcode (&buf[i], "48 85 c0"); /* test %rax,%rax */
1547 i += push_opcode (&buf[i], "75 f4"); /* jne <again> */
1548 append_insns (&buildaddr, i, buf);
1550 /* Set up the gdb_collect call. */
1551 /* At this point, (stack pointer + 0x18) is the base of our saved
1555 i += push_opcode (&buf[i], "48 89 e6"); /* mov %rsp,%rsi */
1556 i += push_opcode (&buf[i], "48 83 c6 18"); /* add $0x18,%rsi */
1558 /* tpoint address may be 64-bit wide. */
1559 i += push_opcode (&buf[i], "48 bf"); /* movl <addr>,%rdi */
1560 memcpy (buf + i, &tpoint, 8);
1562 append_insns (&buildaddr, i, buf);
1564 /* The collector function being in the shared library, may be
1565 >31-bits away off the jump pad. */
1567 i += push_opcode (&buf[i], "48 b8"); /* mov $collector,%rax */
1568 memcpy (buf + i, &collector, 8);
1570 i += push_opcode (&buf[i], "ff d0"); /* callq *%rax */
1571 append_insns (&buildaddr, i, buf);
1573 /* Clear the spin-lock. */
1575 i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */
1576 i += push_opcode (&buf[i], "48 a3"); /* mov %rax, lockaddr */
1577 memcpy (buf + i, &lockaddr, 8);
1579 append_insns (&buildaddr, i, buf);
1581 /* Remove stack that had been used for the collect_t object. */
1583 i += push_opcode (&buf[i], "48 83 c4 18"); /* add $0x18,%rsp */
1584 append_insns (&buildaddr, i, buf);
1586 /* Restore register state. */
1588 buf[i++] = 0x48; /* add $0x8,%rsp */
1592 buf[i++] = 0x9d; /* popfq */
1593 buf[i++] = 0x41; buf[i++] = 0x58; /* pop %r8 */
1594 buf[i++] = 0x41; buf[i++] = 0x59; /* pop %r9 */
1595 buf[i++] = 0x41; buf[i++] = 0x5a; /* pop %r10 */
1596 buf[i++] = 0x41; buf[i++] = 0x5b; /* pop %r11 */
1597 buf[i++] = 0x41; buf[i++] = 0x5c; /* pop %r12 */
1598 buf[i++] = 0x41; buf[i++] = 0x5d; /* pop %r13 */
1599 buf[i++] = 0x41; buf[i++] = 0x5e; /* pop %r14 */
1600 buf[i++] = 0x41; buf[i++] = 0x5f; /* pop %r15 */
1601 buf[i++] = 0x58; /* pop %rax */
1602 buf[i++] = 0x5b; /* pop %rbx */
1603 buf[i++] = 0x59; /* pop %rcx */
1604 buf[i++] = 0x5a; /* pop %rdx */
1605 buf[i++] = 0x5e; /* pop %rsi */
1606 buf[i++] = 0x5f; /* pop %rdi */
1607 buf[i++] = 0x5d; /* pop %rbp */
1608 buf[i++] = 0x5c; /* pop %rsp */
1609 append_insns (&buildaddr, i, buf);
1611 /* Now, adjust the original instruction to execute in the jump
1613 *adjusted_insn_addr = buildaddr;
1614 relocate_instruction (&buildaddr, tpaddr);
1615 *adjusted_insn_addr_end = buildaddr;
1617 /* Finally, write a jump back to the program. */
1619 loffset = (tpaddr + orig_size) - (buildaddr + sizeof (jump_insn));
1620 if (loffset > INT_MAX || loffset < INT_MIN)
1623 "E.Jump back from jump pad too far from tracepoint "
1624 "(offset 0x%" PRIx64 " > int32).", loffset);
1628 offset = (int) loffset;
1629 memcpy (buf, jump_insn, sizeof (jump_insn));
1630 memcpy (buf + 1, &offset, 4);
1631 append_insns (&buildaddr, sizeof (jump_insn), buf);
1633 /* The jump pad is now built. Wire in a jump to our jump pad. This
1634 is always done last (by our caller actually), so that we can
1635 install fast tracepoints with threads running. This relies on
1636 the agent's atomic write support. */
1637 loffset = *jump_entry - (tpaddr + sizeof (jump_insn));
1638 if (loffset > INT_MAX || loffset < INT_MIN)
1641 "E.Jump pad too far from tracepoint "
1642 "(offset 0x%" PRIx64 " > int32).", loffset);
1646 offset = (int) loffset;
1648 memcpy (buf, jump_insn, sizeof (jump_insn));
1649 memcpy (buf + 1, &offset, 4);
1650 memcpy (jjump_pad_insn, buf, sizeof (jump_insn));
1651 *jjump_pad_insn_size = sizeof (jump_insn);
1653 /* Return the end address of our pad. */
1654 *jump_entry = buildaddr;
1659 #endif /* __x86_64__ */
1661 /* Build a jump pad that saves registers and calls a collection
1662 function. Writes a jump instruction to the jump pad to
1663 JJUMPAD_INSN. The caller is responsible to write it in at the
1664 tracepoint address. */
1667 i386_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, CORE_ADDR tpaddr,
1668 CORE_ADDR collector,
1671 CORE_ADDR *jump_entry,
1672 CORE_ADDR *trampoline,
1673 ULONGEST *trampoline_size,
1674 unsigned char *jjump_pad_insn,
1675 ULONGEST *jjump_pad_insn_size,
1676 CORE_ADDR *adjusted_insn_addr,
1677 CORE_ADDR *adjusted_insn_addr_end,
1680 unsigned char buf[0x100];
1682 CORE_ADDR buildaddr = *jump_entry;
1684 /* Build the jump pad. */
1686 /* First, do tracepoint data collection. Save registers. */
1688 buf[i++] = 0x60; /* pushad */
1689 buf[i++] = 0x68; /* push tpaddr aka $pc */
1690 *((int *)(buf + i)) = (int) tpaddr;
1692 buf[i++] = 0x9c; /* pushf */
1693 buf[i++] = 0x1e; /* push %ds */
1694 buf[i++] = 0x06; /* push %es */
1695 buf[i++] = 0x0f; /* push %fs */
1697 buf[i++] = 0x0f; /* push %gs */
1699 buf[i++] = 0x16; /* push %ss */
1700 buf[i++] = 0x0e; /* push %cs */
1701 append_insns (&buildaddr, i, buf);
1703 /* Stack space for the collecting_t object. */
1705 i += push_opcode (&buf[i], "83 ec 08"); /* sub $0x8,%esp */
1707 /* Build the object. */
1708 i += push_opcode (&buf[i], "b8"); /* mov <tpoint>,%eax */
1709 memcpy (buf + i, &tpoint, 4);
1711 i += push_opcode (&buf[i], "89 04 24"); /* mov %eax,(%esp) */
1713 i += push_opcode (&buf[i], "65 a1 00 00 00 00"); /* mov %gs:0x0,%eax */
1714 i += push_opcode (&buf[i], "89 44 24 04"); /* mov %eax,0x4(%esp) */
1715 append_insns (&buildaddr, i, buf);
1717 /* spin-lock. Note this is using cmpxchg, which leaves i386 behind.
1718 If we cared for it, this could be using xchg alternatively. */
1721 i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */
1722 i += push_opcode (&buf[i], "f0 0f b1 25"); /* lock cmpxchg
1724 memcpy (&buf[i], (void *) &lockaddr, 4);
1726 i += push_opcode (&buf[i], "85 c0"); /* test %eax,%eax */
1727 i += push_opcode (&buf[i], "75 f2"); /* jne <again> */
1728 append_insns (&buildaddr, i, buf);
1731 /* Set up arguments to the gdb_collect call. */
1733 i += push_opcode (&buf[i], "89 e0"); /* mov %esp,%eax */
1734 i += push_opcode (&buf[i], "83 c0 08"); /* add $0x08,%eax */
1735 i += push_opcode (&buf[i], "89 44 24 fc"); /* mov %eax,-0x4(%esp) */
1736 append_insns (&buildaddr, i, buf);
1739 i += push_opcode (&buf[i], "83 ec 08"); /* sub $0x8,%esp */
1740 append_insns (&buildaddr, i, buf);
1743 i += push_opcode (&buf[i], "c7 04 24"); /* movl <addr>,(%esp) */
1744 memcpy (&buf[i], (void *) &tpoint, 4);
1746 append_insns (&buildaddr, i, buf);
1748 buf[0] = 0xe8; /* call <reladdr> */
1749 offset = collector - (buildaddr + sizeof (jump_insn));
1750 memcpy (buf + 1, &offset, 4);
1751 append_insns (&buildaddr, 5, buf);
1752 /* Clean up after the call. */
1753 buf[0] = 0x83; /* add $0x8,%esp */
1756 append_insns (&buildaddr, 3, buf);
1759 /* Clear the spin-lock. This would need the LOCK prefix on older
1762 i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */
1763 i += push_opcode (&buf[i], "a3"); /* mov %eax, lockaddr */
1764 memcpy (buf + i, &lockaddr, 4);
1766 append_insns (&buildaddr, i, buf);
1769 /* Remove stack that had been used for the collect_t object. */
1771 i += push_opcode (&buf[i], "83 c4 08"); /* add $0x08,%esp */
1772 append_insns (&buildaddr, i, buf);
1775 buf[i++] = 0x83; /* add $0x4,%esp (no pop of %cs, assume unchanged) */
1778 buf[i++] = 0x17; /* pop %ss */
1779 buf[i++] = 0x0f; /* pop %gs */
1781 buf[i++] = 0x0f; /* pop %fs */
1783 buf[i++] = 0x07; /* pop %es */
1784 buf[i++] = 0x1f; /* pop %ds */
1785 buf[i++] = 0x9d; /* popf */
1786 buf[i++] = 0x83; /* add $0x4,%esp (pop of tpaddr aka $pc) */
1789 buf[i++] = 0x61; /* popad */
1790 append_insns (&buildaddr, i, buf);
1792 /* Now, adjust the original instruction to execute in the jump
1794 *adjusted_insn_addr = buildaddr;
1795 relocate_instruction (&buildaddr, tpaddr);
1796 *adjusted_insn_addr_end = buildaddr;
1798 /* Write the jump back to the program. */
1799 offset = (tpaddr + orig_size) - (buildaddr + sizeof (jump_insn));
1800 memcpy (buf, jump_insn, sizeof (jump_insn));
1801 memcpy (buf + 1, &offset, 4);
1802 append_insns (&buildaddr, sizeof (jump_insn), buf);
1804 /* The jump pad is now built. Wire in a jump to our jump pad. This
1805 is always done last (by our caller actually), so that we can
1806 install fast tracepoints with threads running. This relies on
1807 the agent's atomic write support. */
1810 /* Create a trampoline. */
1811 *trampoline_size = sizeof (jump_insn);
1812 if (!claim_trampoline_space (*trampoline_size, trampoline))
1814 /* No trampoline space available. */
1816 "E.Cannot allocate trampoline space needed for fast "
1817 "tracepoints on 4-byte instructions.");
1821 offset = *jump_entry - (*trampoline + sizeof (jump_insn));
1822 memcpy (buf, jump_insn, sizeof (jump_insn));
1823 memcpy (buf + 1, &offset, 4);
1824 write_inferior_memory (*trampoline, buf, sizeof (jump_insn));
1826 /* Use a 16-bit relative jump instruction to jump to the trampoline. */
1827 offset = (*trampoline - (tpaddr + sizeof (small_jump_insn))) & 0xffff;
1828 memcpy (buf, small_jump_insn, sizeof (small_jump_insn));
1829 memcpy (buf + 2, &offset, 2);
1830 memcpy (jjump_pad_insn, buf, sizeof (small_jump_insn));
1831 *jjump_pad_insn_size = sizeof (small_jump_insn);
1835 /* Else use a 32-bit relative jump instruction. */
1836 offset = *jump_entry - (tpaddr + sizeof (jump_insn));
1837 memcpy (buf, jump_insn, sizeof (jump_insn));
1838 memcpy (buf + 1, &offset, 4);
1839 memcpy (jjump_pad_insn, buf, sizeof (jump_insn));
1840 *jjump_pad_insn_size = sizeof (jump_insn);
1843 /* Return the end address of our pad. */
1844 *jump_entry = buildaddr;
1850 x86_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, CORE_ADDR tpaddr,
1851 CORE_ADDR collector,
1854 CORE_ADDR *jump_entry,
1855 CORE_ADDR *trampoline,
1856 ULONGEST *trampoline_size,
1857 unsigned char *jjump_pad_insn,
1858 ULONGEST *jjump_pad_insn_size,
1859 CORE_ADDR *adjusted_insn_addr,
1860 CORE_ADDR *adjusted_insn_addr_end,
1864 if (is_64bit_tdesc ())
1865 return amd64_install_fast_tracepoint_jump_pad (tpoint, tpaddr,
1866 collector, lockaddr,
1867 orig_size, jump_entry,
1868 trampoline, trampoline_size,
1870 jjump_pad_insn_size,
1872 adjusted_insn_addr_end,
1876 return i386_install_fast_tracepoint_jump_pad (tpoint, tpaddr,
1877 collector, lockaddr,
1878 orig_size, jump_entry,
1879 trampoline, trampoline_size,
1881 jjump_pad_insn_size,
1883 adjusted_insn_addr_end,
1887 /* Return the minimum instruction length for fast tracepoints on x86/x86-64
1891 x86_get_min_fast_tracepoint_insn_len (void)
1893 static int warned_about_fast_tracepoints = 0;
1896 /* On x86-64, 5-byte jump instructions with a 4-byte offset are always
1897 used for fast tracepoints. */
1898 if (is_64bit_tdesc ())
1902 if (agent_loaded_p ())
1904 char errbuf[IPA_BUFSIZ];
1908 /* On x86, if trampolines are available, then 4-byte jump instructions
1909 with a 2-byte offset may be used, otherwise 5-byte jump instructions
1910 with a 4-byte offset are used instead. */
1911 if (have_fast_tracepoint_trampoline_buffer (errbuf))
1915 /* GDB has no channel to explain to user why a shorter fast
1916 tracepoint is not possible, but at least make GDBserver
1917 mention that something has gone awry. */
1918 if (!warned_about_fast_tracepoints)
1920 warning ("4-byte fast tracepoints not available; %s\n", errbuf);
1921 warned_about_fast_tracepoints = 1;
1928 /* Indicate that the minimum length is currently unknown since the IPA
1929 has not loaded yet. */
1935 add_insns (unsigned char *start, int len)
1937 CORE_ADDR buildaddr = current_insn_ptr;
1940 debug_printf ("Adding %d bytes of insn at %s\n",
1941 len, paddress (buildaddr));
1943 append_insns (&buildaddr, len, start);
1944 current_insn_ptr = buildaddr;
1947 /* Our general strategy for emitting code is to avoid specifying raw
1948 bytes whenever possible, and instead copy a block of inline asm
1949 that is embedded in the function. This is a little messy, because
1950 we need to keep the compiler from discarding what looks like dead
1951 code, plus suppress various warnings. */
1953 #define EMIT_ASM(NAME, INSNS) \
1956 extern unsigned char start_ ## NAME, end_ ## NAME; \
1957 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
1958 __asm__ ("jmp end_" #NAME "\n" \
1959 "\t" "start_" #NAME ":" \
1961 "\t" "end_" #NAME ":"); \
1966 #define EMIT_ASM32(NAME,INSNS) \
1969 extern unsigned char start_ ## NAME, end_ ## NAME; \
1970 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
1971 __asm__ (".code32\n" \
1972 "\t" "jmp end_" #NAME "\n" \
1973 "\t" "start_" #NAME ":\n" \
1975 "\t" "end_" #NAME ":\n" \
1981 #define EMIT_ASM32(NAME,INSNS) EMIT_ASM(NAME,INSNS)
1988 amd64_emit_prologue (void)
1990 EMIT_ASM (amd64_prologue,
1992 "movq %rsp,%rbp\n\t"
1993 "sub $0x20,%rsp\n\t"
1994 "movq %rdi,-8(%rbp)\n\t"
1995 "movq %rsi,-16(%rbp)");
2000 amd64_emit_epilogue (void)
2002 EMIT_ASM (amd64_epilogue,
2003 "movq -16(%rbp),%rdi\n\t"
2004 "movq %rax,(%rdi)\n\t"
2011 amd64_emit_add (void)
2013 EMIT_ASM (amd64_add,
2014 "add (%rsp),%rax\n\t"
2015 "lea 0x8(%rsp),%rsp");
2019 amd64_emit_sub (void)
2021 EMIT_ASM (amd64_sub,
2022 "sub %rax,(%rsp)\n\t"
2027 amd64_emit_mul (void)
2033 amd64_emit_lsh (void)
2039 amd64_emit_rsh_signed (void)
2045 amd64_emit_rsh_unsigned (void)
2051 amd64_emit_ext (int arg)
2056 EMIT_ASM (amd64_ext_8,
2062 EMIT_ASM (amd64_ext_16,
2067 EMIT_ASM (amd64_ext_32,
2076 amd64_emit_log_not (void)
2078 EMIT_ASM (amd64_log_not,
2079 "test %rax,%rax\n\t"
2085 amd64_emit_bit_and (void)
2087 EMIT_ASM (amd64_and,
2088 "and (%rsp),%rax\n\t"
2089 "lea 0x8(%rsp),%rsp");
2093 amd64_emit_bit_or (void)
2096 "or (%rsp),%rax\n\t"
2097 "lea 0x8(%rsp),%rsp");
2101 amd64_emit_bit_xor (void)
2103 EMIT_ASM (amd64_xor,
2104 "xor (%rsp),%rax\n\t"
2105 "lea 0x8(%rsp),%rsp");
2109 amd64_emit_bit_not (void)
2111 EMIT_ASM (amd64_bit_not,
2112 "xorq $0xffffffffffffffff,%rax");
2116 amd64_emit_equal (void)
2118 EMIT_ASM (amd64_equal,
2119 "cmp %rax,(%rsp)\n\t"
2120 "je .Lamd64_equal_true\n\t"
2122 "jmp .Lamd64_equal_end\n\t"
2123 ".Lamd64_equal_true:\n\t"
2125 ".Lamd64_equal_end:\n\t"
2126 "lea 0x8(%rsp),%rsp");
2130 amd64_emit_less_signed (void)
2132 EMIT_ASM (amd64_less_signed,
2133 "cmp %rax,(%rsp)\n\t"
2134 "jl .Lamd64_less_signed_true\n\t"
2136 "jmp .Lamd64_less_signed_end\n\t"
2137 ".Lamd64_less_signed_true:\n\t"
2139 ".Lamd64_less_signed_end:\n\t"
2140 "lea 0x8(%rsp),%rsp");
2144 amd64_emit_less_unsigned (void)
2146 EMIT_ASM (amd64_less_unsigned,
2147 "cmp %rax,(%rsp)\n\t"
2148 "jb .Lamd64_less_unsigned_true\n\t"
2150 "jmp .Lamd64_less_unsigned_end\n\t"
2151 ".Lamd64_less_unsigned_true:\n\t"
2153 ".Lamd64_less_unsigned_end:\n\t"
2154 "lea 0x8(%rsp),%rsp");
2158 amd64_emit_ref (int size)
2163 EMIT_ASM (amd64_ref1,
2167 EMIT_ASM (amd64_ref2,
2171 EMIT_ASM (amd64_ref4,
2172 "movl (%rax),%eax");
2175 EMIT_ASM (amd64_ref8,
2176 "movq (%rax),%rax");
2182 amd64_emit_if_goto (int *offset_p, int *size_p)
2184 EMIT_ASM (amd64_if_goto,
2188 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2196 amd64_emit_goto (int *offset_p, int *size_p)
2198 EMIT_ASM (amd64_goto,
2199 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2207 amd64_write_goto_address (CORE_ADDR from, CORE_ADDR to, int size)
2209 int diff = (to - (from + size));
2210 unsigned char buf[sizeof (int)];
2218 memcpy (buf, &diff, sizeof (int));
2219 write_inferior_memory (from, buf, sizeof (int));
2223 amd64_emit_const (LONGEST num)
2225 unsigned char buf[16];
2227 CORE_ADDR buildaddr = current_insn_ptr;
2230 buf[i++] = 0x48; buf[i++] = 0xb8; /* mov $<n>,%rax */
2231 memcpy (&buf[i], &num, sizeof (num));
2233 append_insns (&buildaddr, i, buf);
2234 current_insn_ptr = buildaddr;
2238 amd64_emit_call (CORE_ADDR fn)
2240 unsigned char buf[16];
2242 CORE_ADDR buildaddr;
2245 /* The destination function being in the shared library, may be
2246 >31-bits away off the compiled code pad. */
2248 buildaddr = current_insn_ptr;
2250 offset64 = fn - (buildaddr + 1 /* call op */ + 4 /* 32-bit offset */);
2254 if (offset64 > INT_MAX || offset64 < INT_MIN)
2256 /* Offset is too large for a call. Use callq, but that requires
2257 a register, so avoid it if possible. Use r10, since it is
2258 call-clobbered, we don't have to push/pop it. */
2259 buf[i++] = 0x48; /* mov $fn,%r10 */
2261 memcpy (buf + i, &fn, 8);
2263 buf[i++] = 0xff; /* callq *%r10 */
2268 int offset32 = offset64; /* we know we can't overflow here. */
2269 memcpy (buf + i, &offset32, 4);
2273 append_insns (&buildaddr, i, buf);
2274 current_insn_ptr = buildaddr;
2278 amd64_emit_reg (int reg)
2280 unsigned char buf[16];
2282 CORE_ADDR buildaddr;
2284 /* Assume raw_regs is still in %rdi. */
2285 buildaddr = current_insn_ptr;
2287 buf[i++] = 0xbe; /* mov $<n>,%esi */
2288 memcpy (&buf[i], ®, sizeof (reg));
2290 append_insns (&buildaddr, i, buf);
2291 current_insn_ptr = buildaddr;
2292 amd64_emit_call (get_raw_reg_func_addr ());
2296 amd64_emit_pop (void)
2298 EMIT_ASM (amd64_pop,
2303 amd64_emit_stack_flush (void)
2305 EMIT_ASM (amd64_stack_flush,
2310 amd64_emit_zero_ext (int arg)
2315 EMIT_ASM (amd64_zero_ext_8,
2319 EMIT_ASM (amd64_zero_ext_16,
2320 "and $0xffff,%rax");
2323 EMIT_ASM (amd64_zero_ext_32,
2324 "mov $0xffffffff,%rcx\n\t"
2333 amd64_emit_swap (void)
2335 EMIT_ASM (amd64_swap,
2342 amd64_emit_stack_adjust (int n)
2344 unsigned char buf[16];
2346 CORE_ADDR buildaddr = current_insn_ptr;
2349 buf[i++] = 0x48; /* lea $<n>(%rsp),%rsp */
2353 /* This only handles adjustments up to 16, but we don't expect any more. */
2355 append_insns (&buildaddr, i, buf);
2356 current_insn_ptr = buildaddr;
2359 /* FN's prototype is `LONGEST(*fn)(int)'. */
2362 amd64_emit_int_call_1 (CORE_ADDR fn, int arg1)
2364 unsigned char buf[16];
2366 CORE_ADDR buildaddr;
2368 buildaddr = current_insn_ptr;
2370 buf[i++] = 0xbf; /* movl $<n>,%edi */
2371 memcpy (&buf[i], &arg1, sizeof (arg1));
2373 append_insns (&buildaddr, i, buf);
2374 current_insn_ptr = buildaddr;
2375 amd64_emit_call (fn);
2378 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
2381 amd64_emit_void_call_2 (CORE_ADDR fn, int arg1)
2383 unsigned char buf[16];
2385 CORE_ADDR buildaddr;
2387 buildaddr = current_insn_ptr;
2389 buf[i++] = 0xbf; /* movl $<n>,%edi */
2390 memcpy (&buf[i], &arg1, sizeof (arg1));
2392 append_insns (&buildaddr, i, buf);
2393 current_insn_ptr = buildaddr;
2394 EMIT_ASM (amd64_void_call_2_a,
2395 /* Save away a copy of the stack top. */
2397 /* Also pass top as the second argument. */
2399 amd64_emit_call (fn);
2400 EMIT_ASM (amd64_void_call_2_b,
2401 /* Restore the stack top, %rax may have been trashed. */
2406 amd64_emit_eq_goto (int *offset_p, int *size_p)
2409 "cmp %rax,(%rsp)\n\t"
2410 "jne .Lamd64_eq_fallthru\n\t"
2411 "lea 0x8(%rsp),%rsp\n\t"
2413 /* jmp, but don't trust the assembler to choose the right jump */
2414 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2415 ".Lamd64_eq_fallthru:\n\t"
2416 "lea 0x8(%rsp),%rsp\n\t"
2426 amd64_emit_ne_goto (int *offset_p, int *size_p)
2429 "cmp %rax,(%rsp)\n\t"
2430 "je .Lamd64_ne_fallthru\n\t"
2431 "lea 0x8(%rsp),%rsp\n\t"
2433 /* jmp, but don't trust the assembler to choose the right jump */
2434 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2435 ".Lamd64_ne_fallthru:\n\t"
2436 "lea 0x8(%rsp),%rsp\n\t"
2446 amd64_emit_lt_goto (int *offset_p, int *size_p)
2449 "cmp %rax,(%rsp)\n\t"
2450 "jnl .Lamd64_lt_fallthru\n\t"
2451 "lea 0x8(%rsp),%rsp\n\t"
2453 /* jmp, but don't trust the assembler to choose the right jump */
2454 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2455 ".Lamd64_lt_fallthru:\n\t"
2456 "lea 0x8(%rsp),%rsp\n\t"
2466 amd64_emit_le_goto (int *offset_p, int *size_p)
2469 "cmp %rax,(%rsp)\n\t"
2470 "jnle .Lamd64_le_fallthru\n\t"
2471 "lea 0x8(%rsp),%rsp\n\t"
2473 /* jmp, but don't trust the assembler to choose the right jump */
2474 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2475 ".Lamd64_le_fallthru:\n\t"
2476 "lea 0x8(%rsp),%rsp\n\t"
2486 amd64_emit_gt_goto (int *offset_p, int *size_p)
2489 "cmp %rax,(%rsp)\n\t"
2490 "jng .Lamd64_gt_fallthru\n\t"
2491 "lea 0x8(%rsp),%rsp\n\t"
2493 /* jmp, but don't trust the assembler to choose the right jump */
2494 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2495 ".Lamd64_gt_fallthru:\n\t"
2496 "lea 0x8(%rsp),%rsp\n\t"
2506 amd64_emit_ge_goto (int *offset_p, int *size_p)
2509 "cmp %rax,(%rsp)\n\t"
2510 "jnge .Lamd64_ge_fallthru\n\t"
2511 ".Lamd64_ge_jump:\n\t"
2512 "lea 0x8(%rsp),%rsp\n\t"
2514 /* jmp, but don't trust the assembler to choose the right jump */
2515 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2516 ".Lamd64_ge_fallthru:\n\t"
2517 "lea 0x8(%rsp),%rsp\n\t"
2526 struct emit_ops amd64_emit_ops =
2528 amd64_emit_prologue,
2529 amd64_emit_epilogue,
2534 amd64_emit_rsh_signed,
2535 amd64_emit_rsh_unsigned,
2543 amd64_emit_less_signed,
2544 amd64_emit_less_unsigned,
2548 amd64_write_goto_address,
2553 amd64_emit_stack_flush,
2554 amd64_emit_zero_ext,
2556 amd64_emit_stack_adjust,
2557 amd64_emit_int_call_1,
2558 amd64_emit_void_call_2,
2567 #endif /* __x86_64__ */
2570 i386_emit_prologue (void)
2572 EMIT_ASM32 (i386_prologue,
2576 /* At this point, the raw regs base address is at 8(%ebp), and the
2577 value pointer is at 12(%ebp). */
2581 i386_emit_epilogue (void)
2583 EMIT_ASM32 (i386_epilogue,
2584 "mov 12(%ebp),%ecx\n\t"
2585 "mov %eax,(%ecx)\n\t"
2586 "mov %ebx,0x4(%ecx)\n\t"
2594 i386_emit_add (void)
2596 EMIT_ASM32 (i386_add,
2597 "add (%esp),%eax\n\t"
2598 "adc 0x4(%esp),%ebx\n\t"
2599 "lea 0x8(%esp),%esp");
2603 i386_emit_sub (void)
2605 EMIT_ASM32 (i386_sub,
2606 "subl %eax,(%esp)\n\t"
2607 "sbbl %ebx,4(%esp)\n\t"
2613 i386_emit_mul (void)
2619 i386_emit_lsh (void)
2625 i386_emit_rsh_signed (void)
2631 i386_emit_rsh_unsigned (void)
2637 i386_emit_ext (int arg)
2642 EMIT_ASM32 (i386_ext_8,
2645 "movl %eax,%ebx\n\t"
2649 EMIT_ASM32 (i386_ext_16,
2651 "movl %eax,%ebx\n\t"
2655 EMIT_ASM32 (i386_ext_32,
2656 "movl %eax,%ebx\n\t"
2665 i386_emit_log_not (void)
2667 EMIT_ASM32 (i386_log_not,
2669 "test %eax,%eax\n\t"
2676 i386_emit_bit_and (void)
2678 EMIT_ASM32 (i386_and,
2679 "and (%esp),%eax\n\t"
2680 "and 0x4(%esp),%ebx\n\t"
2681 "lea 0x8(%esp),%esp");
2685 i386_emit_bit_or (void)
2687 EMIT_ASM32 (i386_or,
2688 "or (%esp),%eax\n\t"
2689 "or 0x4(%esp),%ebx\n\t"
2690 "lea 0x8(%esp),%esp");
2694 i386_emit_bit_xor (void)
2696 EMIT_ASM32 (i386_xor,
2697 "xor (%esp),%eax\n\t"
2698 "xor 0x4(%esp),%ebx\n\t"
2699 "lea 0x8(%esp),%esp");
2703 i386_emit_bit_not (void)
2705 EMIT_ASM32 (i386_bit_not,
2706 "xor $0xffffffff,%eax\n\t"
2707 "xor $0xffffffff,%ebx\n\t");
2711 i386_emit_equal (void)
2713 EMIT_ASM32 (i386_equal,
2714 "cmpl %ebx,4(%esp)\n\t"
2715 "jne .Li386_equal_false\n\t"
2716 "cmpl %eax,(%esp)\n\t"
2717 "je .Li386_equal_true\n\t"
2718 ".Li386_equal_false:\n\t"
2720 "jmp .Li386_equal_end\n\t"
2721 ".Li386_equal_true:\n\t"
2723 ".Li386_equal_end:\n\t"
2725 "lea 0x8(%esp),%esp");
2729 i386_emit_less_signed (void)
2731 EMIT_ASM32 (i386_less_signed,
2732 "cmpl %ebx,4(%esp)\n\t"
2733 "jl .Li386_less_signed_true\n\t"
2734 "jne .Li386_less_signed_false\n\t"
2735 "cmpl %eax,(%esp)\n\t"
2736 "jl .Li386_less_signed_true\n\t"
2737 ".Li386_less_signed_false:\n\t"
2739 "jmp .Li386_less_signed_end\n\t"
2740 ".Li386_less_signed_true:\n\t"
2742 ".Li386_less_signed_end:\n\t"
2744 "lea 0x8(%esp),%esp");
2748 i386_emit_less_unsigned (void)
2750 EMIT_ASM32 (i386_less_unsigned,
2751 "cmpl %ebx,4(%esp)\n\t"
2752 "jb .Li386_less_unsigned_true\n\t"
2753 "jne .Li386_less_unsigned_false\n\t"
2754 "cmpl %eax,(%esp)\n\t"
2755 "jb .Li386_less_unsigned_true\n\t"
2756 ".Li386_less_unsigned_false:\n\t"
2758 "jmp .Li386_less_unsigned_end\n\t"
2759 ".Li386_less_unsigned_true:\n\t"
2761 ".Li386_less_unsigned_end:\n\t"
2763 "lea 0x8(%esp),%esp");
2767 i386_emit_ref (int size)
2772 EMIT_ASM32 (i386_ref1,
2776 EMIT_ASM32 (i386_ref2,
2780 EMIT_ASM32 (i386_ref4,
2781 "movl (%eax),%eax");
2784 EMIT_ASM32 (i386_ref8,
2785 "movl 4(%eax),%ebx\n\t"
2786 "movl (%eax),%eax");
2792 i386_emit_if_goto (int *offset_p, int *size_p)
2794 EMIT_ASM32 (i386_if_goto,
2800 /* Don't trust the assembler to choose the right jump */
2801 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2804 *offset_p = 11; /* be sure that this matches the sequence above */
2810 i386_emit_goto (int *offset_p, int *size_p)
2812 EMIT_ASM32 (i386_goto,
2813 /* Don't trust the assembler to choose the right jump */
2814 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2822 i386_write_goto_address (CORE_ADDR from, CORE_ADDR to, int size)
2824 int diff = (to - (from + size));
2825 unsigned char buf[sizeof (int)];
2827 /* We're only doing 4-byte sizes at the moment. */
2834 memcpy (buf, &diff, sizeof (int));
2835 write_inferior_memory (from, buf, sizeof (int));
2839 i386_emit_const (LONGEST num)
2841 unsigned char buf[16];
2843 CORE_ADDR buildaddr = current_insn_ptr;
2846 buf[i++] = 0xb8; /* mov $<n>,%eax */
2847 lo = num & 0xffffffff;
2848 memcpy (&buf[i], &lo, sizeof (lo));
2850 hi = ((num >> 32) & 0xffffffff);
2853 buf[i++] = 0xbb; /* mov $<n>,%ebx */
2854 memcpy (&buf[i], &hi, sizeof (hi));
2859 buf[i++] = 0x31; buf[i++] = 0xdb; /* xor %ebx,%ebx */
2861 append_insns (&buildaddr, i, buf);
2862 current_insn_ptr = buildaddr;
2866 i386_emit_call (CORE_ADDR fn)
2868 unsigned char buf[16];
2870 CORE_ADDR buildaddr;
2872 buildaddr = current_insn_ptr;
2874 buf[i++] = 0xe8; /* call <reladdr> */
2875 offset = ((int) fn) - (buildaddr + 5);
2876 memcpy (buf + 1, &offset, 4);
2877 append_insns (&buildaddr, 5, buf);
2878 current_insn_ptr = buildaddr;
2882 i386_emit_reg (int reg)
2884 unsigned char buf[16];
2886 CORE_ADDR buildaddr;
2888 EMIT_ASM32 (i386_reg_a,
2890 buildaddr = current_insn_ptr;
2892 buf[i++] = 0xb8; /* mov $<n>,%eax */
2893 memcpy (&buf[i], ®, sizeof (reg));
2895 append_insns (&buildaddr, i, buf);
2896 current_insn_ptr = buildaddr;
2897 EMIT_ASM32 (i386_reg_b,
2898 "mov %eax,4(%esp)\n\t"
2899 "mov 8(%ebp),%eax\n\t"
2901 i386_emit_call (get_raw_reg_func_addr ());
2902 EMIT_ASM32 (i386_reg_c,
2904 "lea 0x8(%esp),%esp");
2908 i386_emit_pop (void)
2910 EMIT_ASM32 (i386_pop,
2916 i386_emit_stack_flush (void)
2918 EMIT_ASM32 (i386_stack_flush,
2924 i386_emit_zero_ext (int arg)
2929 EMIT_ASM32 (i386_zero_ext_8,
2930 "and $0xff,%eax\n\t"
2934 EMIT_ASM32 (i386_zero_ext_16,
2935 "and $0xffff,%eax\n\t"
2939 EMIT_ASM32 (i386_zero_ext_32,
2948 i386_emit_swap (void)
2950 EMIT_ASM32 (i386_swap,
2960 i386_emit_stack_adjust (int n)
2962 unsigned char buf[16];
2964 CORE_ADDR buildaddr = current_insn_ptr;
2967 buf[i++] = 0x8d; /* lea $<n>(%esp),%esp */
2971 append_insns (&buildaddr, i, buf);
2972 current_insn_ptr = buildaddr;
2975 /* FN's prototype is `LONGEST(*fn)(int)'. */
2978 i386_emit_int_call_1 (CORE_ADDR fn, int arg1)
2980 unsigned char buf[16];
2982 CORE_ADDR buildaddr;
2984 EMIT_ASM32 (i386_int_call_1_a,
2985 /* Reserve a bit of stack space. */
2987 /* Put the one argument on the stack. */
2988 buildaddr = current_insn_ptr;
2990 buf[i++] = 0xc7; /* movl $<arg1>,(%esp) */
2993 memcpy (&buf[i], &arg1, sizeof (arg1));
2995 append_insns (&buildaddr, i, buf);
2996 current_insn_ptr = buildaddr;
2997 i386_emit_call (fn);
2998 EMIT_ASM32 (i386_int_call_1_c,
3000 "lea 0x8(%esp),%esp");
3003 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
3006 i386_emit_void_call_2 (CORE_ADDR fn, int arg1)
3008 unsigned char buf[16];
3010 CORE_ADDR buildaddr;
3012 EMIT_ASM32 (i386_void_call_2_a,
3013 /* Preserve %eax only; we don't have to worry about %ebx. */
3015 /* Reserve a bit of stack space for arguments. */
3016 "sub $0x10,%esp\n\t"
3017 /* Copy "top" to the second argument position. (Note that
3018 we can't assume function won't scribble on its
3019 arguments, so don't try to restore from this.) */
3020 "mov %eax,4(%esp)\n\t"
3021 "mov %ebx,8(%esp)");
3022 /* Put the first argument on the stack. */
3023 buildaddr = current_insn_ptr;
3025 buf[i++] = 0xc7; /* movl $<arg1>,(%esp) */
3028 memcpy (&buf[i], &arg1, sizeof (arg1));
3030 append_insns (&buildaddr, i, buf);
3031 current_insn_ptr = buildaddr;
3032 i386_emit_call (fn);
3033 EMIT_ASM32 (i386_void_call_2_b,
3034 "lea 0x10(%esp),%esp\n\t"
3035 /* Restore original stack top. */
3041 i386_emit_eq_goto (int *offset_p, int *size_p)
3044 /* Check low half first, more likely to be decider */
3045 "cmpl %eax,(%esp)\n\t"
3046 "jne .Leq_fallthru\n\t"
3047 "cmpl %ebx,4(%esp)\n\t"
3048 "jne .Leq_fallthru\n\t"
3049 "lea 0x8(%esp),%esp\n\t"
3052 /* jmp, but don't trust the assembler to choose the right jump */
3053 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3054 ".Leq_fallthru:\n\t"
3055 "lea 0x8(%esp),%esp\n\t"
3066 i386_emit_ne_goto (int *offset_p, int *size_p)
3069 /* Check low half first, more likely to be decider */
3070 "cmpl %eax,(%esp)\n\t"
3072 "cmpl %ebx,4(%esp)\n\t"
3073 "je .Lne_fallthru\n\t"
3075 "lea 0x8(%esp),%esp\n\t"
3078 /* jmp, but don't trust the assembler to choose the right jump */
3079 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3080 ".Lne_fallthru:\n\t"
3081 "lea 0x8(%esp),%esp\n\t"
3092 i386_emit_lt_goto (int *offset_p, int *size_p)
3095 "cmpl %ebx,4(%esp)\n\t"
3097 "jne .Llt_fallthru\n\t"
3098 "cmpl %eax,(%esp)\n\t"
3099 "jnl .Llt_fallthru\n\t"
3101 "lea 0x8(%esp),%esp\n\t"
3104 /* jmp, but don't trust the assembler to choose the right jump */
3105 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3106 ".Llt_fallthru:\n\t"
3107 "lea 0x8(%esp),%esp\n\t"
3118 i386_emit_le_goto (int *offset_p, int *size_p)
3121 "cmpl %ebx,4(%esp)\n\t"
3123 "jne .Lle_fallthru\n\t"
3124 "cmpl %eax,(%esp)\n\t"
3125 "jnle .Lle_fallthru\n\t"
3127 "lea 0x8(%esp),%esp\n\t"
3130 /* jmp, but don't trust the assembler to choose the right jump */
3131 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3132 ".Lle_fallthru:\n\t"
3133 "lea 0x8(%esp),%esp\n\t"
3144 i386_emit_gt_goto (int *offset_p, int *size_p)
3147 "cmpl %ebx,4(%esp)\n\t"
3149 "jne .Lgt_fallthru\n\t"
3150 "cmpl %eax,(%esp)\n\t"
3151 "jng .Lgt_fallthru\n\t"
3153 "lea 0x8(%esp),%esp\n\t"
3156 /* jmp, but don't trust the assembler to choose the right jump */
3157 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3158 ".Lgt_fallthru:\n\t"
3159 "lea 0x8(%esp),%esp\n\t"
3170 i386_emit_ge_goto (int *offset_p, int *size_p)
3173 "cmpl %ebx,4(%esp)\n\t"
3175 "jne .Lge_fallthru\n\t"
3176 "cmpl %eax,(%esp)\n\t"
3177 "jnge .Lge_fallthru\n\t"
3179 "lea 0x8(%esp),%esp\n\t"
3182 /* jmp, but don't trust the assembler to choose the right jump */
3183 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
3184 ".Lge_fallthru:\n\t"
3185 "lea 0x8(%esp),%esp\n\t"
3195 struct emit_ops i386_emit_ops =
3203 i386_emit_rsh_signed,
3204 i386_emit_rsh_unsigned,
3212 i386_emit_less_signed,
3213 i386_emit_less_unsigned,
3217 i386_write_goto_address,
3222 i386_emit_stack_flush,
3225 i386_emit_stack_adjust,
3226 i386_emit_int_call_1,
3227 i386_emit_void_call_2,
3237 static struct emit_ops *
3241 if (is_64bit_tdesc ())
3242 return &amd64_emit_ops;
3245 return &i386_emit_ops;
3249 x86_supports_range_stepping (void)
3254 /* This is initialized assuming an amd64 target.
3255 x86_arch_setup will correct it for i386 or amd64 targets. */
3257 struct linux_target_ops the_low_target =
3260 x86_linux_regs_info,
3261 x86_cannot_fetch_register,
3262 x86_cannot_store_register,
3263 NULL, /* fetch_register */
3271 x86_supports_z_point_type,
3274 x86_stopped_by_watchpoint,
3275 x86_stopped_data_address,
3276 /* collect_ptrace_register/supply_ptrace_register are not needed in the
3277 native i386 case (no registers smaller than an xfer unit), and are not
3278 used in the biarch case (HAVE_LINUX_USRREGS is not defined). */
3281 /* need to fix up i386 siginfo if host is amd64 */
3283 x86_linux_new_process,
3284 x86_linux_new_thread,
3286 x86_linux_prepare_to_resume,
3287 x86_linux_process_qsupported,
3288 x86_supports_tracepoints,
3289 x86_get_thread_area,
3290 x86_install_fast_tracepoint_jump_pad,
3292 x86_get_min_fast_tracepoint_insn_len,
3293 x86_supports_range_stepping,
3297 initialize_low_arch (void)
3299 /* Initialize the Linux target descriptions. */
3301 init_registers_amd64_linux ();
3302 init_registers_amd64_avx_linux ();
3303 init_registers_amd64_avx512_linux ();
3304 init_registers_amd64_mpx_linux ();
3306 init_registers_x32_linux ();
3307 init_registers_x32_avx_linux ();
3308 init_registers_x32_avx512_linux ();
3310 tdesc_amd64_linux_no_xml = xmalloc (sizeof (struct target_desc));
3311 copy_target_description (tdesc_amd64_linux_no_xml, tdesc_amd64_linux);
3312 tdesc_amd64_linux_no_xml->xmltarget = xmltarget_amd64_linux_no_xml;
3314 init_registers_i386_linux ();
3315 init_registers_i386_mmx_linux ();
3316 init_registers_i386_avx_linux ();
3317 init_registers_i386_avx512_linux ();
3318 init_registers_i386_mpx_linux ();
3320 tdesc_i386_linux_no_xml = xmalloc (sizeof (struct target_desc));
3321 copy_target_description (tdesc_i386_linux_no_xml, tdesc_i386_linux);
3322 tdesc_i386_linux_no_xml->xmltarget = xmltarget_i386_linux_no_xml;
3324 initialize_regsets_info (&x86_regsets_info);