1 /* GNU/Linux/CRIS specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2016 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 #include "linux-low.h"
21 #include "nat/gdb_ptrace.h"
23 /* Defined in auto-generated file reg-crisv32.c. */
24 void init_registers_crisv32 (void);
25 extern const struct target_desc *tdesc_crisv32;
28 #define cris_num_regs 49
30 #ifndef PTRACE_GET_THREAD_AREA
31 #define PTRACE_GET_THREAD_AREA 25
34 /* Note: Ignoring USP (having the stack pointer in two locations causes trouble
35 without any significant gain). */
37 /* Locations need to match <include/asm/arch/ptrace.h>. */
38 static int cris_regmap[] = {
41 9*4, 10*4, 11*4, 12*4,
42 13*4, 14*4, 24*4, 15*4,
52 30*4, 31*4, 32*4, 33*4,
53 34*4, 35*4, 36*4, 37*4,
58 static const unsigned short cris_breakpoint = 0xe938;
59 #define cris_breakpoint_len 2
61 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
63 static const gdb_byte *
64 cris_sw_breakpoint_from_kind (int kind, int *size)
66 *size = cris_breakpoint_len;
67 return (const gdb_byte *) &cris_breakpoint;
71 cris_breakpoint_at (CORE_ADDR where)
75 (*the_target->read_memory) (where, (unsigned char *) &insn,
77 if (insn == cris_breakpoint)
80 /* If necessary, recognize more trap instructions here. GDB only uses the
86 cris_write_data_breakpoint (struct regcache *regcache,
87 int bp, unsigned long start, unsigned long end)
92 supply_register_by_name (regcache, "s3", &start);
93 supply_register_by_name (regcache, "s4", &end);
96 supply_register_by_name (regcache, "s5", &start);
97 supply_register_by_name (regcache, "s6", &end);
100 supply_register_by_name (regcache, "s7", &start);
101 supply_register_by_name (regcache, "s8", &end);
104 supply_register_by_name (regcache, "s9", &start);
105 supply_register_by_name (regcache, "s10", &end);
108 supply_register_by_name (regcache, "s11", &start);
109 supply_register_by_name (regcache, "s12", &end);
112 supply_register_by_name (regcache, "s13", &start);
113 supply_register_by_name (regcache, "s14", &end);
119 cris_supports_z_point_type (char z_type)
123 case Z_PACKET_WRITE_WP:
124 case Z_PACKET_READ_WP:
125 case Z_PACKET_ACCESS_WP:
133 cris_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
134 int len, struct raw_breakpoint *bp)
137 unsigned long bp_ctrl;
138 unsigned long start, end;
140 struct regcache *regcache;
142 regcache = get_thread_regcache (current_thread, 1);
144 /* Read watchpoints are set as access watchpoints, because of GDB's
145 inability to deal with pure read watchpoints. */
146 if (type == raw_bkpt_type_read_wp)
147 type = raw_bkpt_type_access_wp;
149 /* Get the configuration register. */
150 collect_register_by_name (regcache, "s0", &bp_ctrl);
152 /* The watchpoint allocation scheme is the simplest possible.
153 For example, if a region is watched for read and
154 a write watch is requested, a new watchpoint will
155 be used. Also, if a watch for a region that is already
156 covered by one or more existing watchpoints, a new
157 watchpoint will be used. */
159 /* First, find a free data watchpoint. */
160 for (bp = 0; bp < 6; bp++)
162 /* Each data watchpoint's control registers occupy 2 bits
163 (hence the 3), starting at bit 2 for D0 (hence the 2)
164 with 4 bits between for each watchpoint (yes, the 4). */
165 if (!(bp_ctrl & (0x3 << (2 + (bp * 4)))))
171 /* We're out of watchpoints. */
175 /* Configure the control register first. */
176 if (type == raw_bkpt_type_read_wp || type == raw_bkpt_type_access_wp)
178 /* Trigger on read. */
179 bp_ctrl |= (1 << (2 + bp * 4));
181 if (type == raw_bkpt_type_write_wp || type == raw_bkpt_type_access_wp)
183 /* Trigger on write. */
184 bp_ctrl |= (2 << (2 + bp * 4));
187 /* Setup the configuration register. */
188 supply_register_by_name (regcache, "s0", &bp_ctrl);
190 /* Setup the range. */
192 end = addr + len - 1;
194 /* Configure the watchpoint register. */
195 cris_write_data_breakpoint (regcache, bp, start, end);
197 collect_register_by_name (regcache, "ccs", &ccs);
198 /* Set the S1 flag to enable watchpoints. */
200 supply_register_by_name (regcache, "ccs", &ccs);
206 cris_remove_point (enum raw_bkpt_type type, CORE_ADDR addr, int len,
207 struct raw_breakpoint *bp)
210 unsigned long bp_ctrl;
211 unsigned long start, end;
212 struct regcache *regcache;
213 unsigned long bp_d_regs[12];
215 regcache = get_thread_regcache (current_thread, 1);
217 /* Read watchpoints are set as access watchpoints, because of GDB's
218 inability to deal with pure read watchpoints. */
219 if (type == raw_bkpt_type_read_wp)
220 type = raw_bkpt_type_access_wp;
222 /* Get the configuration register. */
223 collect_register_by_name (regcache, "s0", &bp_ctrl);
225 /* Try to find a watchpoint that is configured for the
226 specified range, then check that read/write also matches. */
228 /* Ugly pointer arithmetic, since I cannot rely on a
229 single switch (addr) as there may be several watchpoints with
230 the same start address for example. */
232 /* Get all range registers to simplify search. */
233 collect_register_by_name (regcache, "s3", &bp_d_regs[0]);
234 collect_register_by_name (regcache, "s4", &bp_d_regs[1]);
235 collect_register_by_name (regcache, "s5", &bp_d_regs[2]);
236 collect_register_by_name (regcache, "s6", &bp_d_regs[3]);
237 collect_register_by_name (regcache, "s7", &bp_d_regs[4]);
238 collect_register_by_name (regcache, "s8", &bp_d_regs[5]);
239 collect_register_by_name (regcache, "s9", &bp_d_regs[6]);
240 collect_register_by_name (regcache, "s10", &bp_d_regs[7]);
241 collect_register_by_name (regcache, "s11", &bp_d_regs[8]);
242 collect_register_by_name (regcache, "s12", &bp_d_regs[9]);
243 collect_register_by_name (regcache, "s13", &bp_d_regs[10]);
244 collect_register_by_name (regcache, "s14", &bp_d_regs[11]);
246 for (bp = 0; bp < 6; bp++)
248 if (bp_d_regs[bp * 2] == addr
249 && bp_d_regs[bp * 2 + 1] == (addr + len - 1)) {
250 /* Matching range. */
251 int bitpos = 2 + bp * 4;
254 /* Read/write bits for this BP. */
255 rw_bits = (bp_ctrl & (0x3 << bitpos)) >> bitpos;
257 if ((type == raw_bkpt_type_read_wp && rw_bits == 0x1)
258 || (type == raw_bkpt_type_write_wp && rw_bits == 0x2)
259 || (type == raw_bkpt_type_access_wp && rw_bits == 0x3))
261 /* Read/write matched. */
269 /* No watchpoint matched. */
273 /* Found a matching watchpoint. Now, deconfigure it by
274 both disabling read/write in bp_ctrl and zeroing its
275 start/end addresses. */
276 bp_ctrl &= ~(3 << (2 + (bp * 4)));
277 /* Setup the configuration register. */
278 supply_register_by_name (regcache, "s0", &bp_ctrl);
281 /* Configure the watchpoint register. */
282 cris_write_data_breakpoint (regcache, bp, start, end);
284 /* Note that we don't clear the S1 flag here. It's done when continuing. */
289 cris_stopped_by_watchpoint (void)
292 struct regcache *regcache = get_thread_regcache (current_thread, 1);
294 collect_register_by_name (regcache, "exs", &exs);
296 return (((exs & 0xff00) >> 8) == 0xc);
300 cris_stopped_data_address (void)
303 struct regcache *regcache = get_thread_regcache (current_thread, 1);
305 collect_register_by_name (regcache, "eda", &eda);
307 /* FIXME: Possibly adjust to match watched range. */
312 ps_get_thread_area (struct ps_prochandle *ph,
313 lwpid_t lwpid, int idx, void **base)
315 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
318 /* IDX is the bias from the thread pointer to the beginning of the
319 thread descriptor. It has to be subtracted due to implementation
320 quirks in libthread_db. */
321 *base = (void *) ((char *) *base - idx);
326 cris_fill_gregset (struct regcache *regcache, void *buf)
330 for (i = 0; i < cris_num_regs; i++)
332 if (cris_regmap[i] != -1)
333 collect_register (regcache, i, ((char *) buf) + cris_regmap[i]);
338 cris_store_gregset (struct regcache *regcache, const void *buf)
342 for (i = 0; i < cris_num_regs; i++)
344 if (cris_regmap[i] != -1)
345 supply_register (regcache, i, ((char *) buf) + cris_regmap[i]);
350 cris_arch_setup (void)
352 current_process ()->tdesc = tdesc_crisv32;
355 /* Support for hardware single step. */
358 cris_supports_hardware_single_step (void)
363 static struct regset_info cris_regsets[] = {
364 { PTRACE_GETREGS, PTRACE_SETREGS, 0, cris_num_regs * 4,
365 GENERAL_REGS, cris_fill_gregset, cris_store_gregset },
370 static struct regsets_info cris_regsets_info =
372 cris_regsets, /* regsets */
374 NULL, /* disabled_regsets */
377 static struct usrregs_info cris_usrregs_info =
383 static struct regs_info regs_info =
385 NULL, /* regset_bitmap */
390 static const struct regs_info *
391 cris_regs_info (void)
396 struct linux_target_ops the_low_target = {
401 NULL, /* fetch_register */
404 NULL, /* breakpoint_kind_from_pc */
405 cris_sw_breakpoint_from_kind,
406 NULL, /* get_next_pcs */
409 cris_supports_z_point_type,
412 cris_stopped_by_watchpoint,
413 cris_stopped_data_address,
414 NULL, /* collect_ptrace_register */
415 NULL, /* supply_ptrace_register */
416 NULL, /* siginfo_fixup */
417 NULL, /* new_process */
418 NULL, /* new_thread */
420 NULL, /* prepare_to_resume */
421 NULL, /* process_qsupported */
422 NULL, /* supports_tracepoints */
423 NULL, /* get_thread_area */
424 NULL, /* install_fast_tracepoint_jump_pad */
426 NULL, /* get_min_fast_tracepoint_insn_len */
427 NULL, /* supports_range_stepping */
428 NULL, /* breakpoint_kind_from_current_state */
429 cris_supports_hardware_single_step,
433 initialize_low_arch (void)
435 init_registers_crisv32 ();
437 initialize_regsets_info (&cris_regsets_info);