1 /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
2 Copyright 2002, 2003, 2004 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 #include "gdb_string.h"
25 #include "arch-utils.h"
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "trad-frame.h"
32 #include "gdb_assert.h"
33 #include "sim-regno.h"
34 #include "gdb/sim-frv.h"
35 #include "opcodes/frv-desc.h" /* for the H_SPR_... enums */
42 extern void _initialize_frv_tdep (void);
44 static gdbarch_init_ftype frv_gdbarch_init;
46 static gdbarch_register_name_ftype frv_register_name;
47 static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc;
48 static gdbarch_adjust_breakpoint_address_ftype frv_gdbarch_adjust_breakpoint_address;
49 static gdbarch_skip_prologue_ftype frv_skip_prologue;
51 static LONGEST frv_call_dummy_words[] =
55 struct frv_unwind_cache /* was struct frame_extra_info */
57 /* The previous frame's inner-most stack address. Used as this
58 frame ID's stack_addr. */
61 /* The frame's base, optionally used by the high-level debug info. */
64 /* Table indicating the location of each and every register. */
65 struct trad_frame_saved_reg *saved_regs;
69 /* A structure describing a particular variant of the FRV.
70 We allocate and initialize one of these structures when we create
71 the gdbarch object for a variant.
73 At the moment, all the FR variants we support differ only in which
74 registers are present; the portable code of GDB knows that
75 registers whose names are the empty string don't exist, so the
76 `register_names' array captures all the per-variant information we
79 in the future, if we need to have per-variant maps for raw size,
80 virtual type, etc., we should replace register_names with an array
81 of structures, each of which gives all the necessary info for one
82 register. Don't stick parallel arrays in here --- that's so
86 /* Which ABI is in use? */
89 /* How many general-purpose registers does this variant have? */
92 /* How many floating-point registers does this variant have? */
95 /* How many hardware watchpoints can it support? */
96 int num_hw_watchpoints;
98 /* How many hardware breakpoints can it support? */
99 int num_hw_breakpoints;
101 /* Register names. */
102 char **register_names;
105 #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
107 /* Return the FR-V ABI associated with GDBARCH. */
109 frv_abi (struct gdbarch *gdbarch)
111 return gdbarch_tdep (gdbarch)->frv_abi;
114 /* Fetch the interpreter and executable loadmap addresses (for shared
115 library support) for the FDPIC ABI. Return 0 if successful, -1 if
116 not. (E.g, -1 will be returned if the ABI isn't the FDPIC ABI.) */
118 frv_fdpic_loadmap_addresses (struct gdbarch *gdbarch, CORE_ADDR *interp_addr,
119 CORE_ADDR *exec_addr)
121 if (frv_abi (gdbarch) != FRV_ABI_FDPIC)
125 if (interp_addr != NULL)
128 regcache_cooked_read_unsigned (current_regcache,
129 fdpic_loadmap_interp_regnum, &val);
132 if (exec_addr != NULL)
135 regcache_cooked_read_unsigned (current_regcache,
136 fdpic_loadmap_exec_regnum, &val);
143 /* Allocate a new variant structure, and set up default values for all
145 static struct gdbarch_tdep *
148 struct gdbarch_tdep *var;
152 var = xmalloc (sizeof (*var));
153 memset (var, 0, sizeof (*var));
155 var->frv_abi = FRV_ABI_EABI;
158 var->num_hw_watchpoints = 0;
159 var->num_hw_breakpoints = 0;
161 /* By default, don't supply any general-purpose or floating-point
164 = (char **) xmalloc ((frv_num_regs + frv_num_pseudo_regs)
166 for (r = 0; r < frv_num_regs + frv_num_pseudo_regs; r++)
167 var->register_names[r] = "";
169 /* Do, however, supply default names for the known special-purpose
172 var->register_names[pc_regnum] = "pc";
173 var->register_names[lr_regnum] = "lr";
174 var->register_names[lcr_regnum] = "lcr";
176 var->register_names[psr_regnum] = "psr";
177 var->register_names[ccr_regnum] = "ccr";
178 var->register_names[cccr_regnum] = "cccr";
179 var->register_names[tbr_regnum] = "tbr";
181 /* Debug registers. */
182 var->register_names[brr_regnum] = "brr";
183 var->register_names[dbar0_regnum] = "dbar0";
184 var->register_names[dbar1_regnum] = "dbar1";
185 var->register_names[dbar2_regnum] = "dbar2";
186 var->register_names[dbar3_regnum] = "dbar3";
188 /* iacc0 (Only found on MB93405.) */
189 var->register_names[iacc0h_regnum] = "iacc0h";
190 var->register_names[iacc0l_regnum] = "iacc0l";
191 var->register_names[iacc0_regnum] = "iacc0";
197 /* Indicate that the variant VAR has NUM_GPRS general-purpose
198 registers, and fill in the names array appropriately. */
200 set_variant_num_gprs (struct gdbarch_tdep *var, int num_gprs)
204 var->num_gprs = num_gprs;
206 for (r = 0; r < num_gprs; ++r)
210 sprintf (buf, "gr%d", r);
211 var->register_names[first_gpr_regnum + r] = xstrdup (buf);
216 /* Indicate that the variant VAR has NUM_FPRS floating-point
217 registers, and fill in the names array appropriately. */
219 set_variant_num_fprs (struct gdbarch_tdep *var, int num_fprs)
223 var->num_fprs = num_fprs;
225 for (r = 0; r < num_fprs; ++r)
229 sprintf (buf, "fr%d", r);
230 var->register_names[first_fpr_regnum + r] = xstrdup (buf);
235 set_variant_abi_fdpic (struct gdbarch_tdep *var)
237 var->frv_abi = FRV_ABI_FDPIC;
238 var->register_names[fdpic_loadmap_exec_regnum] = xstrdup ("loadmap_exec");
239 var->register_names[fdpic_loadmap_interp_regnum] = xstrdup ("loadmap_interp");
243 set_variant_scratch_registers (struct gdbarch_tdep *var)
245 var->register_names[scr0_regnum] = xstrdup ("scr0");
246 var->register_names[scr1_regnum] = xstrdup ("scr1");
247 var->register_names[scr2_regnum] = xstrdup ("scr2");
248 var->register_names[scr3_regnum] = xstrdup ("scr3");
252 frv_register_name (int reg)
256 if (reg >= frv_num_regs + frv_num_pseudo_regs)
259 return CURRENT_VARIANT->register_names[reg];
264 frv_register_type (struct gdbarch *gdbarch, int reg)
266 if (reg >= first_fpr_regnum && reg <= last_fpr_regnum)
267 return builtin_type_float;
268 else if (reg == iacc0_regnum)
269 return builtin_type_int64;
271 return builtin_type_int32;
275 frv_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
276 int reg, void *buffer)
278 if (reg == iacc0_regnum)
280 regcache_raw_read (regcache, iacc0h_regnum, buffer);
281 regcache_raw_read (regcache, iacc0l_regnum, (bfd_byte *) buffer + 4);
286 frv_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
287 int reg, const void *buffer)
289 if (reg == iacc0_regnum)
291 regcache_raw_write (regcache, iacc0h_regnum, buffer);
292 regcache_raw_write (regcache, iacc0l_regnum, (bfd_byte *) buffer + 4);
297 frv_register_sim_regno (int reg)
299 static const int spr_map[] =
301 H_SPR_PSR, /* psr_regnum */
302 H_SPR_CCR, /* ccr_regnum */
303 H_SPR_CCCR, /* cccr_regnum */
307 H_SPR_TBR, /* tbr_regnum */
308 H_SPR_BRR, /* brr_regnum */
309 H_SPR_DBAR0, /* dbar0_regnum */
310 H_SPR_DBAR1, /* dbar1_regnum */
311 H_SPR_DBAR2, /* dbar2_regnum */
312 H_SPR_DBAR3, /* dbar3_regnum */
317 H_SPR_LR, /* lr_regnum */
318 H_SPR_LCR, /* lcr_regnum */
319 H_SPR_IACC0H, /* iacc0h_regnum */
320 H_SPR_IACC0L /* iacc0l_regnum */
323 gdb_assert (reg >= 0 && reg < NUM_REGS);
325 if (first_gpr_regnum <= reg && reg <= last_gpr_regnum)
326 return reg - first_gpr_regnum + SIM_FRV_GR0_REGNUM;
327 else if (first_fpr_regnum <= reg && reg <= last_fpr_regnum)
328 return reg - first_fpr_regnum + SIM_FRV_FR0_REGNUM;
329 else if (pc_regnum == reg)
330 return SIM_FRV_PC_REGNUM;
331 else if (reg >= first_spr_regnum
332 && reg < first_spr_regnum + sizeof (spr_map) / sizeof (spr_map[0]))
334 int spr_reg_offset = spr_map[reg - first_spr_regnum];
336 if (spr_reg_offset < 0)
337 return SIM_REGNO_DOES_NOT_EXIST;
339 return SIM_FRV_SPR0_REGNUM + spr_reg_offset;
342 internal_error (__FILE__, __LINE__, "Bad register number %d", reg);
345 static const unsigned char *
346 frv_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenp)
348 static unsigned char breakpoint[] = {0xc0, 0x70, 0x00, 0x01};
349 *lenp = sizeof (breakpoint);
353 /* Define the maximum number of instructions which may be packed into a
354 bundle (VLIW instruction). */
355 static const int max_instrs_per_bundle = 8;
357 /* Define the size (in bytes) of an FR-V instruction. */
358 static const int frv_instr_size = 4;
360 /* Adjust a breakpoint's address to account for the FR-V architecture's
361 constraint that a break instruction must not appear as any but the
362 first instruction in the bundle. */
364 frv_gdbarch_adjust_breakpoint_address (struct gdbarch *gdbarch, CORE_ADDR bpaddr)
366 int count = max_instrs_per_bundle;
367 CORE_ADDR addr = bpaddr - frv_instr_size;
368 CORE_ADDR func_start = get_pc_function_start (bpaddr);
370 /* Find the end of the previous packing sequence. This will be indicated
371 by either attempting to access some inaccessible memory or by finding
372 an instruction word whose packing bit is set to one. */
373 while (count-- > 0 && addr >= func_start)
375 char instr[frv_instr_size];
378 status = read_memory_nobpt (addr, instr, sizeof instr);
383 /* This is a big endian architecture, so byte zero will have most
384 significant byte. The most significant bit of this byte is the
389 addr -= frv_instr_size;
393 bpaddr = addr + frv_instr_size;
399 /* Return true if REG is a caller-saves ("scratch") register,
402 is_caller_saves_reg (int reg)
404 return ((4 <= reg && reg <= 7)
405 || (14 <= reg && reg <= 15)
406 || (32 <= reg && reg <= 47));
410 /* Return true if REG is a callee-saves register, false otherwise. */
412 is_callee_saves_reg (int reg)
414 return ((16 <= reg && reg <= 31)
415 || (48 <= reg && reg <= 63));
419 /* Return true if REG is an argument register, false otherwise. */
421 is_argument_reg (int reg)
423 return (8 <= reg && reg <= 13);
426 /* Scan an FR-V prologue, starting at PC, until frame->PC.
427 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
428 We assume FRAME's saved_regs array has already been allocated and cleared.
429 Return the first PC value after the prologue.
431 Note that, for unoptimized code, we almost don't need this function
432 at all; all arguments and locals live on the stack, so we just need
433 the FP to find everything. The catch: structures passed by value
434 have their addresses living in registers; they're never spilled to
435 the stack. So if you ever want to be able to get to these
436 arguments in any frame but the top, you'll need to do this serious
437 prologue analysis. */
439 frv_analyze_prologue (CORE_ADDR pc, struct frame_info *next_frame,
440 struct frv_unwind_cache *info)
442 /* When writing out instruction bitpatterns, we use the following
443 letters to label instruction fields:
444 P - The parallel bit. We don't use this.
445 J - The register number of GRj in the instruction description.
446 K - The register number of GRk in the instruction description.
447 I - The register number of GRi.
448 S - a signed imediate offset.
449 U - an unsigned immediate offset.
451 The dots below the numbers indicate where hex digit boundaries
452 fall, to make it easier to check the numbers. */
454 /* Non-zero iff we've seen the instruction that initializes the
455 frame pointer for this function's frame. */
458 /* If fp_set is non_zero, then this is the distance from
459 the stack pointer to frame pointer: fp = sp + fp_offset. */
462 /* Total size of frame prior to any alloca operations. */
465 /* Flag indicating if lr has been saved on the stack. */
466 int lr_saved_on_stack = 0;
468 /* The number of the general-purpose register we saved the return
469 address ("link register") in, or -1 if we haven't moved it yet. */
470 int lr_save_reg = -1;
472 /* Offset (from sp) at which lr has been saved on the stack. */
474 int lr_sp_offset = 0;
476 /* If gr_saved[i] is non-zero, then we've noticed that general
477 register i has been saved at gr_sp_offset[i] from the stack
480 int gr_sp_offset[64];
482 /* The address of the most recently scanned prologue instruction. */
483 CORE_ADDR last_prologue_pc;
485 /* The address of the next instruction. */
488 /* The upper bound to of the pc values to scan. */
491 memset (gr_saved, 0, sizeof (gr_saved));
493 last_prologue_pc = pc;
495 /* Try to compute an upper limit (on how far to scan) based on the
497 lim_pc = skip_prologue_using_sal (pc);
498 /* If there's no line number info, lim_pc will be 0. In that case,
499 set the limit to be 100 instructions away from pc. Hopefully, this
500 will be far enough away to account for the entire prologue. Don't
501 worry about overshooting the end of the function. The scan loop
502 below contains some checks to avoid scanning unreasonably far. */
506 /* If we have a frame, we don't want to scan past the frame's pc. This
507 will catch those cases where the pc is in the prologue. */
510 CORE_ADDR frame_pc = frame_pc_unwind (next_frame);
511 if (frame_pc < lim_pc)
515 /* Scan the prologue. */
518 LONGEST op = read_memory_integer (pc, 4);
521 /* The tests in this chain of ifs should be in order of
522 decreasing selectivity, so that more particular patterns get
523 to fire before less particular patterns. */
525 /* Some sort of control transfer instruction: stop scanning prologue.
526 Integer Conditional Branch:
527 X XXXX XX 0000110 XX XXXXXXXXXXXXXXXX
528 Floating-point / media Conditional Branch:
529 X XXXX XX 0000111 XX XXXXXXXXXXXXXXXX
530 LCR Conditional Branch to LR
531 X XXXX XX 0001110 XX XX 001 X XXXXXXXXXX
532 Integer conditional Branches to LR
533 X XXXX XX 0001110 XX XX 010 X XXXXXXXXXX
534 X XXXX XX 0001110 XX XX 011 X XXXXXXXXXX
535 Floating-point/Media Branches to LR
536 X XXXX XX 0001110 XX XX 110 X XXXXXXXXXX
537 X XXXX XX 0001110 XX XX 111 X XXXXXXXXXX
539 X XXXXX X 0001100 XXXXXX XXXXXX XXXXXX
540 X XXXXX X 0001101 XXXXXX XXXXXX XXXXXX
542 X XXXXXX 0001111 XXXXXXXXXXXXXXXXXX
544 X XXXXX X 0000101 XXXXXX XXXXXX XXXXXX
545 Integer Conditional Trap
546 X XXXX XX 0000100 XXXXXX XXXX 00 XXXXXX
547 X XXXX XX 0011100 XXXXXX XXXXXXXXXXXX
548 Floating-point /media Conditional Trap
549 X XXXX XX 0000100 XXXXXX XXXX 01 XXXXXX
550 X XXXX XX 0011101 XXXXXX XXXXXXXXXXXX
552 X XXXX XX 0000100 XXXXXX XXXX 11 XXXXXX
554 X XXXX XX 0000100 XXXXXX XXXX 10 XXXXXX */
555 if ((op & 0x01d80000) == 0x00180000 /* Conditional branches and Call */
556 || (op & 0x01f80000) == 0x00300000 /* Jump and Link */
557 || (op & 0x01f80000) == 0x00100000 /* Return from Trap, Trap */
558 || (op & 0x01f80000) == 0x00700000) /* Trap immediate */
560 /* Stop scanning; not in prologue any longer. */
564 /* Loading something from memory into fp probably means that
565 we're in the epilogue. Stop scanning the prologue.
567 X 000010 0000010 XXXXXX 000100 XXXXXX
569 X 000010 0110010 XXXXXX XXXXXXXXXXXX */
570 else if ((op & 0x7ffc0fc0) == 0x04080100
571 || (op & 0x7ffc0000) == 0x04c80000)
576 /* Setting the FP from the SP:
578 P 000010 0100010 000001 000000000000 = 0x04881000
579 0 111111 1111111 111111 111111111111 = 0x7fffffff
581 We treat this as part of the prologue. */
582 else if ((op & 0x7fffffff) == 0x04881000)
586 last_prologue_pc = next_pc;
589 /* Move the link register to the scratch register grJ, before saving:
591 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
592 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
594 We treat this as part of the prologue. */
595 else if ((op & 0x7fffffc0) == 0x080d01c0)
597 int gr_j = op & 0x3f;
599 /* If we're moving it to a scratch register, that's fine. */
600 if (is_caller_saves_reg (gr_j))
603 last_prologue_pc = next_pc;
607 /* To save multiple callee-saves registers on the stack, at
611 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
612 0 000000 1111111 111111 111111 111111 = 0x01ffffff
615 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
616 0 000000 1111111 111111 111111 111111 = 0x01ffffff
618 We treat this as part of the prologue, and record the register's
619 saved address in the frame structure. */
620 else if ((op & 0x01ffffff) == 0x000c10c0
621 || (op & 0x01ffffff) == 0x000c1100)
623 int gr_k = ((op >> 25) & 0x3f);
624 int ope = ((op >> 6) & 0x3f);
628 /* Is it an std or an stq? */
634 /* Is it really a callee-saves register? */
635 if (is_callee_saves_reg (gr_k))
637 for (i = 0; i < count; i++)
639 gr_saved[gr_k + i] = 1;
640 gr_sp_offset[gr_k + i] = 4 * i;
642 last_prologue_pc = next_pc;
646 /* Adjusting the stack pointer. (The stack pointer is GR1.)
648 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
649 0 111111 1111111 111111 000000000000 = 0x7ffff000
651 We treat this as part of the prologue. */
652 else if ((op & 0x7ffff000) == 0x02401000)
656 /* Sign-extend the twelve-bit field.
657 (Isn't there a better way to do this?) */
658 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
661 last_prologue_pc = pc;
665 /* If the prologue is being adjusted again, we've
666 likely gone too far; i.e. we're probably in the
672 /* Setting the FP to a constant distance from the SP:
674 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
675 0 111111 1111111 111111 000000000000 = 0x7ffff000
677 We treat this as part of the prologue. */
678 else if ((op & 0x7ffff000) == 0x04401000)
680 /* Sign-extend the twelve-bit field.
681 (Isn't there a better way to do this?) */
682 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
685 last_prologue_pc = pc;
688 /* To spill an argument register to a scratch register:
690 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
691 0 000000 1111111 000000 111111111111 = 0x01fc0fff
693 For the time being, we treat this as a prologue instruction,
694 assuming that GRi is an argument register. This one's kind
695 of suspicious, because it seems like it could be part of a
696 legitimate body instruction. But we only come here when the
697 source info wasn't helpful, so we have to do the best we can.
698 Hopefully once GCC and GDB agree on how to emit line number
699 info for prologues, then this code will never come into play. */
700 else if ((op & 0x01fc0fff) == 0x00880000)
702 int gr_i = ((op >> 12) & 0x3f);
704 /* Make sure that the source is an arg register; if it is, we'll
705 treat it as a prologue instruction. */
706 if (is_argument_reg (gr_i))
707 last_prologue_pc = next_pc;
710 /* To spill 16-bit values to the stack:
712 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
713 0 000000 1111111 111111 000000000000 = 0x01fff000
715 And for 8-bit values, we use STB instructions.
717 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
718 0 000000 1111111 111111 000000000000 = 0x01fff000
720 We check that GRk is really an argument register, and treat
721 all such as part of the prologue. */
722 else if ( (op & 0x01fff000) == 0x01442000
723 || (op & 0x01fff000) == 0x01402000)
725 int gr_k = ((op >> 25) & 0x3f);
727 /* Make sure that GRk is really an argument register; treat
728 it as a prologue instruction if so. */
729 if (is_argument_reg (gr_k))
730 last_prologue_pc = next_pc;
733 /* To save multiple callee-saves register on the stack, at a
737 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
738 0 000000 1111111 111111 000000000000 = 0x01fff000
741 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
742 0 000000 1111111 111111 000000000000 = 0x01fff000
744 We treat this as part of the prologue, and record the register's
745 saved address in the frame structure. */
746 else if ((op & 0x01fff000) == 0x014c1000
747 || (op & 0x01fff000) == 0x01501000)
749 int gr_k = ((op >> 25) & 0x3f);
753 /* Is it a stdi or a stqi? */
754 if ((op & 0x01fff000) == 0x014c1000)
759 /* Is it really a callee-saves register? */
760 if (is_callee_saves_reg (gr_k))
762 /* Sign-extend the twelve-bit field.
763 (Isn't there a better way to do this?) */
764 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
766 for (i = 0; i < count; i++)
768 gr_saved[gr_k + i] = 1;
769 gr_sp_offset[gr_k + i] = s + (4 * i);
771 last_prologue_pc = next_pc;
775 /* Storing any kind of integer register at any constant offset
776 from any other register.
779 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
780 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
783 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
784 0 000000 1111111 000000 000000000000 = 0x01fc0000
786 These could be almost anything, but a lot of prologue
787 instructions fall into this pattern, so let's decode the
788 instruction once, and then work at a higher level. */
789 else if (((op & 0x01fc0fff) == 0x000c0080)
790 || ((op & 0x01fc0000) == 0x01480000))
792 int gr_k = ((op >> 25) & 0x3f);
793 int gr_i = ((op >> 12) & 0x3f);
796 /* Are we storing with gr0 as an offset, or using an
798 if ((op & 0x01fc0fff) == 0x000c0080)
801 offset = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
803 /* If the address isn't relative to the SP or FP, it's not a
804 prologue instruction. */
805 if (gr_i != sp_regnum && gr_i != fp_regnum)
807 /* Do nothing; not a prologue instruction. */
810 /* Saving the old FP in the new frame (relative to the SP). */
811 else if (gr_k == fp_regnum && gr_i == sp_regnum)
813 gr_saved[fp_regnum] = 1;
814 gr_sp_offset[fp_regnum] = offset;
815 last_prologue_pc = next_pc;
818 /* Saving callee-saves register(s) on the stack, relative to
820 else if (gr_i == sp_regnum
821 && is_callee_saves_reg (gr_k))
824 if (gr_i == sp_regnum)
825 gr_sp_offset[gr_k] = offset;
827 gr_sp_offset[gr_k] = offset + fp_offset;
828 last_prologue_pc = next_pc;
831 /* Saving the scratch register holding the return address. */
832 else if (lr_save_reg != -1
833 && gr_k == lr_save_reg)
835 lr_saved_on_stack = 1;
836 if (gr_i == sp_regnum)
837 lr_sp_offset = offset;
839 lr_sp_offset = offset + fp_offset;
840 last_prologue_pc = next_pc;
843 /* Spilling int-sized arguments to the stack. */
844 else if (is_argument_reg (gr_k))
845 last_prologue_pc = next_pc;
850 if (next_frame && info)
855 /* If we know the relationship between the stack and frame
856 pointers, record the addresses of the registers we noticed.
857 Note that we have to do this as a separate step at the end,
858 because instructions may save relative to the SP, but we need
859 their addresses relative to the FP. */
861 frame_unwind_unsigned_register (next_frame, fp_regnum, &this_base);
863 frame_unwind_unsigned_register (next_frame, sp_regnum, &this_base);
865 for (i = 0; i < 64; i++)
867 info->saved_regs[i].addr = this_base - fp_offset + gr_sp_offset[i];
869 info->prev_sp = this_base - fp_offset + framesize;
870 info->base = this_base;
872 /* If LR was saved on the stack, record its location. */
873 if (lr_saved_on_stack)
874 info->saved_regs[lr_regnum].addr = this_base - fp_offset + lr_sp_offset;
876 /* The call instruction moves the caller's PC in the callee's LR.
877 Since this is an unwind, do the reverse. Copy the location of LR
878 into PC (the address / regnum) so that a request for PC will be
879 converted into a request for the LR. */
880 info->saved_regs[pc_regnum] = info->saved_regs[lr_regnum];
882 /* Save the previous frame's computed SP value. */
883 trad_frame_set_value (info->saved_regs, sp_regnum, info->prev_sp);
886 return last_prologue_pc;
891 frv_skip_prologue (CORE_ADDR pc)
893 CORE_ADDR func_addr, func_end, new_pc;
897 /* If the line table has entry for a line *within* the function
898 (i.e., not in the prologue, and not past the end), then that's
900 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
902 struct symtab_and_line sal;
904 sal = find_pc_line (func_addr, 0);
906 if (sal.line != 0 && sal.end < func_end)
912 /* The FR-V prologue is at least five instructions long (twenty bytes).
913 If we didn't find a real source location past that, then
914 do a full analysis of the prologue. */
915 if (new_pc < pc + 20)
916 new_pc = frv_analyze_prologue (pc, 0, 0);
922 static struct frv_unwind_cache *
923 frv_frame_unwind_cache (struct frame_info *next_frame,
924 void **this_prologue_cache)
926 struct gdbarch *gdbarch = get_frame_arch (next_frame);
930 struct frv_unwind_cache *info;
932 if ((*this_prologue_cache))
933 return (*this_prologue_cache);
935 info = FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache);
936 (*this_prologue_cache) = info;
937 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
939 /* Prologue analysis does the rest... */
940 frv_analyze_prologue (frame_func_unwind (next_frame), next_frame, info);
946 frv_extract_return_value (struct type *type, struct regcache *regcache,
949 int len = TYPE_LENGTH (type);
954 regcache_cooked_read_unsigned (regcache, 8, &gpr8_val);
955 store_unsigned_integer (valbuf, len, gpr8_val);
960 regcache_cooked_read_unsigned (regcache, 8, ®val);
961 store_unsigned_integer (valbuf, 4, regval);
962 regcache_cooked_read_unsigned (regcache, 9, ®val);
963 store_unsigned_integer ((bfd_byte *) valbuf + 4, 4, regval);
966 internal_error (__FILE__, __LINE__, "Illegal return value length: %d", len);
970 frv_extract_struct_value_address (struct regcache *regcache)
973 regcache_cooked_read_unsigned (regcache, struct_return_regnum, &addr);
978 frv_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
980 write_register (struct_return_regnum, addr);
984 frv_frameless_function_invocation (struct frame_info *frame)
986 return legacy_frameless_look_for_prologue (frame);
990 frv_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
992 /* Require dword alignment. */
993 return align_down (sp, 8);
997 find_func_descr (struct gdbarch *gdbarch, CORE_ADDR entry_point)
1002 descr = frv_fdpic_find_canonical_descriptor (entry_point);
1007 /* Construct a non-canonical descriptor from space allocated on
1010 descr = value_as_long (value_allocate_space_in_inferior (8));
1011 store_unsigned_integer (valbuf, 4, entry_point);
1012 write_memory (descr, valbuf, 4);
1013 store_unsigned_integer (valbuf, 4,
1014 frv_fdpic_find_global_pointer (entry_point));
1015 write_memory (descr + 4, valbuf, 4);
1020 frv_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
1021 struct target_ops *targ)
1023 CORE_ADDR entry_point;
1024 CORE_ADDR got_address;
1026 entry_point = get_target_memory_unsigned (targ, addr, 4);
1027 got_address = get_target_memory_unsigned (targ, addr + 4, 4);
1029 if (got_address == frv_fdpic_find_global_pointer (entry_point))
1036 frv_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
1037 struct regcache *regcache, CORE_ADDR bp_addr,
1038 int nargs, struct value **args, CORE_ADDR sp,
1039 int struct_return, CORE_ADDR struct_addr)
1046 struct type *arg_type;
1048 enum type_code typecode;
1052 enum frv_abi abi = frv_abi (gdbarch);
1055 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
1056 nargs, (int) sp, struct_return, struct_addr);
1060 for (argnum = 0; argnum < nargs; ++argnum)
1061 stack_space += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])), 4);
1063 stack_space -= (6 * 4);
1064 if (stack_space > 0)
1067 /* Make sure stack is dword aligned. */
1068 sp = align_down (sp, 8);
1075 regcache_cooked_write_unsigned (regcache, struct_return_regnum,
1078 for (argnum = 0; argnum < nargs; ++argnum)
1081 arg_type = check_typedef (VALUE_TYPE (arg));
1082 len = TYPE_LENGTH (arg_type);
1083 typecode = TYPE_CODE (arg_type);
1085 if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)
1087 store_unsigned_integer (valbuf, 4, VALUE_ADDRESS (arg));
1088 typecode = TYPE_CODE_PTR;
1092 else if (abi == FRV_ABI_FDPIC
1094 && typecode == TYPE_CODE_PTR
1095 && TYPE_CODE (TYPE_TARGET_TYPE (arg_type)) == TYPE_CODE_FUNC)
1097 /* The FDPIC ABI requires function descriptors to be passed instead
1099 store_unsigned_integer
1101 find_func_descr (gdbarch,
1102 extract_unsigned_integer (VALUE_CONTENTS (arg),
1104 typecode = TYPE_CODE_PTR;
1110 val = (char *) VALUE_CONTENTS (arg);
1115 int partial_len = (len < 4 ? len : 4);
1119 regval = extract_unsigned_integer (val, partial_len);
1121 printf(" Argnum %d data %x -> reg %d\n",
1122 argnum, (int) regval, argreg);
1124 regcache_cooked_write_unsigned (regcache, argreg, regval);
1130 printf(" Argnum %d data %x -> offset %d (%x)\n",
1131 argnum, *((int *)val), stack_offset, (int) (sp + stack_offset));
1133 write_memory (sp + stack_offset, val, partial_len);
1134 stack_offset += align_up (partial_len, 4);
1141 /* Set the return address. For the frv, the return breakpoint is
1142 always at BP_ADDR. */
1143 regcache_cooked_write_unsigned (regcache, lr_regnum, bp_addr);
1145 if (abi == FRV_ABI_FDPIC)
1147 /* Set the GOT register for the FDPIC ABI. */
1148 regcache_cooked_write_unsigned
1149 (regcache, first_gpr_regnum + 15,
1150 frv_fdpic_find_global_pointer (func_addr));
1153 /* Finally, update the SP register. */
1154 regcache_cooked_write_unsigned (regcache, sp_regnum, sp);
1160 frv_store_return_value (struct type *type, struct regcache *regcache,
1163 int len = TYPE_LENGTH (type);
1168 memset (val, 0, sizeof (val));
1169 memcpy (val + (4 - len), valbuf, len);
1170 regcache_cooked_write (regcache, 8, val);
1174 regcache_cooked_write (regcache, 8, valbuf);
1175 regcache_cooked_write (regcache, 9, (bfd_byte *) valbuf + 4);
1178 internal_error (__FILE__, __LINE__,
1179 "Don't know how to return a %d-byte value.", len);
1183 /* Hardware watchpoint / breakpoint support for the FR500
1187 frv_check_watch_resources (int type, int cnt, int ot)
1189 struct gdbarch_tdep *var = CURRENT_VARIANT;
1191 /* Watchpoints not supported on simulator. */
1192 if (strcmp (target_shortname, "sim") == 0)
1195 if (type == bp_hardware_breakpoint)
1197 if (var->num_hw_breakpoints == 0)
1199 else if (cnt <= var->num_hw_breakpoints)
1204 if (var->num_hw_watchpoints == 0)
1208 else if (cnt <= var->num_hw_watchpoints)
1216 frv_stopped_data_address (void)
1218 CORE_ADDR brr, dbar0, dbar1, dbar2, dbar3;
1220 brr = read_register (brr_regnum);
1221 dbar0 = read_register (dbar0_regnum);
1222 dbar1 = read_register (dbar1_regnum);
1223 dbar2 = read_register (dbar2_regnum);
1224 dbar3 = read_register (dbar3_regnum);
1228 else if (brr & (1<<10))
1230 else if (brr & (1<<9))
1232 else if (brr & (1<<8))
1239 frv_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1241 return frame_unwind_register_unsigned (next_frame, pc_regnum);
1244 /* Given a GDB frame, determine the address of the calling function's
1245 frame. This will be used to create a new GDB frame struct. */
1248 frv_frame_this_id (struct frame_info *next_frame,
1249 void **this_prologue_cache, struct frame_id *this_id)
1251 struct frv_unwind_cache *info
1252 = frv_frame_unwind_cache (next_frame, this_prologue_cache);
1255 struct minimal_symbol *msym_stack;
1258 /* The FUNC is easy. */
1259 func = frame_func_unwind (next_frame);
1261 /* Check if the stack is empty. */
1262 msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL);
1263 if (msym_stack && info->base == SYMBOL_VALUE_ADDRESS (msym_stack))
1266 /* Hopefully the prologue analysis either correctly determined the
1267 frame's base (which is the SP from the previous frame), or set
1268 that base to "NULL". */
1269 base = info->prev_sp;
1273 id = frame_id_build (base, func);
1275 /* Check that we're not going round in circles with the same frame
1276 ID (but avoid applying the test to sentinel frames which do go
1277 round in circles). Can't use frame_id_eq() as that doesn't yet
1278 compare the frame's PC value. */
1279 if (frame_relative_level (next_frame) >= 0
1280 && get_frame_type (next_frame) != DUMMY_FRAME
1281 && frame_id_eq (get_frame_id (next_frame), id))
1288 frv_frame_prev_register (struct frame_info *next_frame,
1289 void **this_prologue_cache,
1290 int regnum, int *optimizedp,
1291 enum lval_type *lvalp, CORE_ADDR *addrp,
1292 int *realnump, void *bufferp)
1294 struct frv_unwind_cache *info
1295 = frv_frame_unwind_cache (next_frame, this_prologue_cache);
1296 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
1297 optimizedp, lvalp, addrp, realnump, bufferp);
1300 static const struct frame_unwind frv_frame_unwind = {
1303 frv_frame_prev_register
1306 static const struct frame_unwind *
1307 frv_frame_sniffer (struct frame_info *next_frame)
1309 return &frv_frame_unwind;
1313 frv_frame_base_address (struct frame_info *next_frame, void **this_cache)
1315 struct frv_unwind_cache *info
1316 = frv_frame_unwind_cache (next_frame, this_cache);
1320 static const struct frame_base frv_frame_base = {
1322 frv_frame_base_address,
1323 frv_frame_base_address,
1324 frv_frame_base_address
1328 frv_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
1330 return frame_unwind_register_unsigned (next_frame, sp_regnum);
1334 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1335 dummy frame. The frame ID's base needs to match the TOS value
1336 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1339 static struct frame_id
1340 frv_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1342 return frame_id_build (frv_unwind_sp (gdbarch, next_frame),
1343 frame_pc_unwind (next_frame));
1347 static struct gdbarch *
1348 frv_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1350 struct gdbarch *gdbarch;
1351 struct gdbarch_tdep *var;
1354 /* Check to see if we've already built an appropriate architecture
1355 object for this executable. */
1356 arches = gdbarch_list_lookup_by_info (arches, &info);
1358 return arches->gdbarch;
1360 /* Select the right tdep structure for this variant. */
1361 var = new_variant ();
1362 switch (info.bfd_arch_info->mach)
1365 case bfd_mach_frvsimple:
1366 case bfd_mach_fr500:
1367 case bfd_mach_frvtomcat:
1368 case bfd_mach_fr550:
1369 set_variant_num_gprs (var, 64);
1370 set_variant_num_fprs (var, 64);
1373 case bfd_mach_fr400:
1374 case bfd_mach_fr450:
1375 set_variant_num_gprs (var, 32);
1376 set_variant_num_fprs (var, 32);
1380 /* Never heard of this variant. */
1384 /* Extract the ELF flags, if available. */
1385 if (info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1386 elf_flags = elf_elfheader (info.abfd)->e_flags;
1388 if (elf_flags & EF_FRV_FDPIC)
1389 set_variant_abi_fdpic (var);
1391 if (elf_flags & EF_FRV_CPU_FR450)
1392 set_variant_scratch_registers (var);
1394 gdbarch = gdbarch_alloc (&info, var);
1396 set_gdbarch_short_bit (gdbarch, 16);
1397 set_gdbarch_int_bit (gdbarch, 32);
1398 set_gdbarch_long_bit (gdbarch, 32);
1399 set_gdbarch_long_long_bit (gdbarch, 64);
1400 set_gdbarch_float_bit (gdbarch, 32);
1401 set_gdbarch_double_bit (gdbarch, 64);
1402 set_gdbarch_long_double_bit (gdbarch, 64);
1403 set_gdbarch_ptr_bit (gdbarch, 32);
1405 set_gdbarch_num_regs (gdbarch, frv_num_regs);
1406 set_gdbarch_num_pseudo_regs (gdbarch, frv_num_pseudo_regs);
1408 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
1409 set_gdbarch_deprecated_fp_regnum (gdbarch, fp_regnum);
1410 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
1412 set_gdbarch_register_name (gdbarch, frv_register_name);
1413 set_gdbarch_register_type (gdbarch, frv_register_type);
1414 set_gdbarch_register_sim_regno (gdbarch, frv_register_sim_regno);
1416 set_gdbarch_pseudo_register_read (gdbarch, frv_pseudo_register_read);
1417 set_gdbarch_pseudo_register_write (gdbarch, frv_pseudo_register_write);
1419 set_gdbarch_skip_prologue (gdbarch, frv_skip_prologue);
1420 set_gdbarch_breakpoint_from_pc (gdbarch, frv_breakpoint_from_pc);
1421 set_gdbarch_adjust_breakpoint_address (gdbarch, frv_gdbarch_adjust_breakpoint_address);
1423 set_gdbarch_deprecated_frameless_function_invocation (gdbarch, frv_frameless_function_invocation);
1425 set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention);
1426 set_gdbarch_extract_return_value (gdbarch, frv_extract_return_value);
1428 set_gdbarch_deprecated_store_struct_return (gdbarch, frv_store_struct_return);
1429 set_gdbarch_store_return_value (gdbarch, frv_store_return_value);
1430 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, frv_extract_struct_value_address);
1433 set_gdbarch_unwind_pc (gdbarch, frv_unwind_pc);
1434 set_gdbarch_unwind_sp (gdbarch, frv_unwind_sp);
1435 set_gdbarch_frame_align (gdbarch, frv_frame_align);
1436 frame_unwind_append_sniffer (gdbarch, frv_frame_sniffer);
1437 frame_base_set_default (gdbarch, &frv_frame_base);
1439 /* Settings for calling functions in the inferior. */
1440 set_gdbarch_push_dummy_call (gdbarch, frv_push_dummy_call);
1441 set_gdbarch_unwind_dummy_id (gdbarch, frv_unwind_dummy_id);
1443 /* Settings that should be unnecessary. */
1444 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1446 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
1448 set_gdbarch_remote_translate_xfer_address
1449 (gdbarch, generic_remote_translate_xfer_address);
1451 /* Hardware watchpoint / breakpoint support. */
1452 switch (info.bfd_arch_info->mach)
1455 case bfd_mach_frvsimple:
1456 case bfd_mach_fr500:
1457 case bfd_mach_frvtomcat:
1458 /* fr500-style hardware debugging support. */
1459 var->num_hw_watchpoints = 4;
1460 var->num_hw_breakpoints = 4;
1463 case bfd_mach_fr400:
1464 case bfd_mach_fr450:
1465 /* fr400-style hardware debugging support. */
1466 var->num_hw_watchpoints = 2;
1467 var->num_hw_breakpoints = 4;
1471 /* Otherwise, assume we don't have hardware debugging support. */
1472 var->num_hw_watchpoints = 0;
1473 var->num_hw_breakpoints = 0;
1477 set_gdbarch_print_insn (gdbarch, print_insn_frv);
1478 if (frv_abi (gdbarch) == FRV_ABI_FDPIC)
1479 set_gdbarch_convert_from_func_ptr_addr (gdbarch,
1480 frv_convert_from_func_ptr_addr);
1486 _initialize_frv_tdep (void)
1488 register_gdbarch_init (bfd_arch_frv, frv_gdbarch_init);