1 /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
2 Copyright 2002, 2003 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 #include "gdb_string.h"
24 #include "symfile.h" /* for entry_point_address */
26 #include "arch-utils.h"
29 #include "frame-unwind.h"
30 #include "frame-base.h"
31 #include "trad-frame.h"
33 #include "gdb_assert.h"
34 #include "sim-regno.h"
35 #include "gdb/sim-frv.h"
36 #include "opcodes/frv-desc.h" /* for the H_SPR_... enums */
38 extern void _initialize_frv_tdep (void);
40 static gdbarch_init_ftype frv_gdbarch_init;
42 static gdbarch_register_name_ftype frv_register_name;
43 static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc;
44 static gdbarch_adjust_breakpoint_address_ftype frv_gdbarch_adjust_breakpoint_address;
45 static gdbarch_skip_prologue_ftype frv_skip_prologue;
46 static gdbarch_deprecated_extract_return_value_ftype frv_extract_return_value;
47 static gdbarch_deprecated_extract_struct_value_address_ftype frv_extract_struct_value_address;
48 static gdbarch_frameless_function_invocation_ftype frv_frameless_function_invocation;
49 static gdbarch_deprecated_push_arguments_ftype frv_push_arguments;
50 static gdbarch_deprecated_saved_pc_after_call_ftype frv_saved_pc_after_call;
52 /* Register numbers. The order in which these appear define the
53 remote protocol, so take care in changing them. */
55 /* Register numbers 0 -- 63 are always reserved for general-purpose
56 registers. The chip at hand may have less. */
60 struct_return_regnum = 3,
63 /* Register numbers 64 -- 127 are always reserved for floating-point
64 registers. The chip at hand may have less. */
65 first_fpr_regnum = 64,
66 last_fpr_regnum = 127,
68 /* The PC register. */
71 /* Register numbers 129 on up are always reserved for special-purpose
73 first_spr_regnum = 129,
87 last_spr_regnum = 148,
89 /* The total number of registers we know exist. */
90 frv_num_regs = last_spr_regnum + 1
93 static LONGEST frv_call_dummy_words[] =
97 struct frv_unwind_cache /* was struct frame_extra_info */
99 /* The previous frame's inner-most stack address. Used as this
100 frame ID's stack_addr. */
103 /* The frame's base, optionally used by the high-level debug info. */
106 /* Table indicating the location of each and every register. */
107 struct trad_frame_saved_reg *saved_regs;
111 /* A structure describing a particular variant of the FRV.
112 We allocate and initialize one of these structures when we create
113 the gdbarch object for a variant.
115 At the moment, all the FR variants we support differ only in which
116 registers are present; the portable code of GDB knows that
117 registers whose names are the empty string don't exist, so the
118 `register_names' array captures all the per-variant information we
121 in the future, if we need to have per-variant maps for raw size,
122 virtual type, etc., we should replace register_names with an array
123 of structures, each of which gives all the necessary info for one
124 register. Don't stick parallel arrays in here --- that's so
128 /* How many general-purpose registers does this variant have? */
131 /* How many floating-point registers does this variant have? */
134 /* How many hardware watchpoints can it support? */
135 int num_hw_watchpoints;
137 /* How many hardware breakpoints can it support? */
138 int num_hw_breakpoints;
140 /* Register names. */
141 char **register_names;
144 #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
147 /* Allocate a new variant structure, and set up default values for all
149 static struct gdbarch_tdep *
152 struct gdbarch_tdep *var;
156 var = xmalloc (sizeof (*var));
157 memset (var, 0, sizeof (*var));
161 var->num_hw_watchpoints = 0;
162 var->num_hw_breakpoints = 0;
164 /* By default, don't supply any general-purpose or floating-point
166 var->register_names = (char **) xmalloc (frv_num_regs * sizeof (char *));
167 for (r = 0; r < frv_num_regs; r++)
168 var->register_names[r] = "";
170 /* Do, however, supply default names for the known special-purpose
173 var->register_names[pc_regnum] = "pc";
174 var->register_names[lr_regnum] = "lr";
175 var->register_names[lcr_regnum] = "lcr";
177 var->register_names[psr_regnum] = "psr";
178 var->register_names[ccr_regnum] = "ccr";
179 var->register_names[cccr_regnum] = "cccr";
180 var->register_names[tbr_regnum] = "tbr";
182 /* Debug registers. */
183 var->register_names[brr_regnum] = "brr";
184 var->register_names[dbar0_regnum] = "dbar0";
185 var->register_names[dbar1_regnum] = "dbar1";
186 var->register_names[dbar2_regnum] = "dbar2";
187 var->register_names[dbar3_regnum] = "dbar3";
189 /* iacc0 (Only found on MB93405.) */
190 var->register_names[iacc0h_regnum] = "iacc0h";
191 var->register_names[iacc0l_regnum] = "iacc0l";
197 /* Indicate that the variant VAR has NUM_GPRS general-purpose
198 registers, and fill in the names array appropriately. */
200 set_variant_num_gprs (struct gdbarch_tdep *var, int num_gprs)
204 var->num_gprs = num_gprs;
206 for (r = 0; r < num_gprs; ++r)
210 sprintf (buf, "gr%d", r);
211 var->register_names[first_gpr_regnum + r] = xstrdup (buf);
216 /* Indicate that the variant VAR has NUM_FPRS floating-point
217 registers, and fill in the names array appropriately. */
219 set_variant_num_fprs (struct gdbarch_tdep *var, int num_fprs)
223 var->num_fprs = num_fprs;
225 for (r = 0; r < num_fprs; ++r)
229 sprintf (buf, "fr%d", r);
230 var->register_names[first_fpr_regnum + r] = xstrdup (buf);
236 frv_register_name (int reg)
240 if (reg >= frv_num_regs)
243 return CURRENT_VARIANT->register_names[reg];
248 frv_register_type (struct gdbarch *gdbarch, int reg)
250 if (reg >= first_fpr_regnum && reg <= last_fpr_regnum)
251 return builtin_type_float;
253 return builtin_type_int32;
257 frv_register_byte (int reg)
263 frv_register_sim_regno (int reg)
265 static const int spr_map[] =
267 H_SPR_PSR, /* psr_regnum */
268 H_SPR_CCR, /* ccr_regnum */
269 H_SPR_CCCR, /* cccr_regnum */
273 H_SPR_TBR, /* tbr_regnum */
274 H_SPR_BRR, /* brr_regnum */
275 H_SPR_DBAR0, /* dbar0_regnum */
276 H_SPR_DBAR1, /* dbar1_regnum */
277 H_SPR_DBAR2, /* dbar2_regnum */
278 H_SPR_DBAR3, /* dbar3_regnum */
283 H_SPR_LR, /* lr_regnum */
284 H_SPR_LCR, /* lcr_regnum */
285 H_SPR_IACC0H, /* iacc0h_regnum */
286 H_SPR_IACC0L /* iacc0l_regnum */
289 gdb_assert (reg >= 0 && reg < NUM_REGS);
291 if (first_gpr_regnum <= reg && reg <= last_gpr_regnum)
292 return reg - first_gpr_regnum + SIM_FRV_GR0_REGNUM;
293 else if (first_fpr_regnum <= reg && reg <= last_fpr_regnum)
294 return reg - first_fpr_regnum + SIM_FRV_FR0_REGNUM;
295 else if (pc_regnum == reg)
296 return SIM_FRV_PC_REGNUM;
297 else if (reg >= first_spr_regnum
298 && reg < first_spr_regnum + sizeof (spr_map) / sizeof (spr_map[0]))
300 int spr_reg_offset = spr_map[reg - first_spr_regnum];
302 if (spr_reg_offset < 0)
303 return SIM_REGNO_DOES_NOT_EXIST;
305 return SIM_FRV_SPR0_REGNUM + spr_reg_offset;
308 internal_error (__FILE__, __LINE__, "Bad register number %d", reg);
311 static const unsigned char *
312 frv_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenp)
314 static unsigned char breakpoint[] = {0xc0, 0x70, 0x00, 0x01};
315 *lenp = sizeof (breakpoint);
319 /* Define the maximum number of instructions which may be packed into a
320 bundle (VLIW instruction). */
321 static const int max_instrs_per_bundle = 8;
323 /* Define the size (in bytes) of an FR-V instruction. */
324 static const int frv_instr_size = 4;
326 /* Adjust a breakpoint's address to account for the FR-V architecture's
327 constraint that a break instruction must not appear as any but the
328 first instruction in the bundle. */
330 frv_gdbarch_adjust_breakpoint_address (struct gdbarch *gdbarch, CORE_ADDR bpaddr)
332 int count = max_instrs_per_bundle;
333 CORE_ADDR addr = bpaddr - frv_instr_size;
334 CORE_ADDR func_start = get_pc_function_start (bpaddr);
336 /* Find the end of the previous packing sequence. This will be indicated
337 by either attempting to access some inaccessible memory or by finding
338 an instruction word whose packing bit is set to one. */
339 while (count-- > 0 && addr >= func_start)
341 char instr[frv_instr_size];
344 status = read_memory_nobpt (addr, instr, sizeof instr);
349 /* This is a big endian architecture, so byte zero will have most
350 significant byte. The most significant bit of this byte is the
355 addr -= frv_instr_size;
359 bpaddr = addr + frv_instr_size;
365 /* Return true if REG is a caller-saves ("scratch") register,
368 is_caller_saves_reg (int reg)
370 return ((4 <= reg && reg <= 7)
371 || (14 <= reg && reg <= 15)
372 || (32 <= reg && reg <= 47));
376 /* Return true if REG is a callee-saves register, false otherwise. */
378 is_callee_saves_reg (int reg)
380 return ((16 <= reg && reg <= 31)
381 || (48 <= reg && reg <= 63));
385 /* Return true if REG is an argument register, false otherwise. */
387 is_argument_reg (int reg)
389 return (8 <= reg && reg <= 13);
393 /* Scan an FR-V prologue, starting at PC, until frame->PC.
394 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
395 We assume FRAME's saved_regs array has already been allocated and cleared.
396 Return the first PC value after the prologue.
398 Note that, for unoptimized code, we almost don't need this function
399 at all; all arguments and locals live on the stack, so we just need
400 the FP to find everything. The catch: structures passed by value
401 have their addresses living in registers; they're never spilled to
402 the stack. So if you ever want to be able to get to these
403 arguments in any frame but the top, you'll need to do this serious
404 prologue analysis. */
406 frv_analyze_prologue (CORE_ADDR pc, struct frame_info *next_frame,
407 struct frv_unwind_cache *info)
409 /* When writing out instruction bitpatterns, we use the following
410 letters to label instruction fields:
411 P - The parallel bit. We don't use this.
412 J - The register number of GRj in the instruction description.
413 K - The register number of GRk in the instruction description.
414 I - The register number of GRi.
415 S - a signed imediate offset.
416 U - an unsigned immediate offset.
418 The dots below the numbers indicate where hex digit boundaries
419 fall, to make it easier to check the numbers. */
421 /* Non-zero iff we've seen the instruction that initializes the
422 frame pointer for this function's frame. */
425 /* If fp_set is non_zero, then this is the distance from
426 the stack pointer to frame pointer: fp = sp + fp_offset. */
429 /* Total size of frame prior to any alloca operations. */
432 /* Flag indicating if lr has been saved on the stack. */
433 int lr_saved_on_stack = 0;
435 /* The number of the general-purpose register we saved the return
436 address ("link register") in, or -1 if we haven't moved it yet. */
437 int lr_save_reg = -1;
439 /* Offset (from sp) at which lr has been saved on the stack. */
441 int lr_sp_offset = 0;
443 /* If gr_saved[i] is non-zero, then we've noticed that general
444 register i has been saved at gr_sp_offset[i] from the stack
447 int gr_sp_offset[64];
449 memset (gr_saved, 0, sizeof (gr_saved));
451 while (! next_frame || pc < frame_pc_unwind (next_frame))
453 LONGEST op = read_memory_integer (pc, 4);
455 /* The tests in this chain of ifs should be in order of
456 decreasing selectivity, so that more particular patterns get
457 to fire before less particular patterns. */
459 /* Setting the FP from the SP:
461 P 000010 0100010 000001 000000000000 = 0x04881000
462 0 111111 1111111 111111 111111111111 = 0x7fffffff
464 We treat this as part of the prologue. */
465 if ((op & 0x7fffffff) == 0x04881000)
471 /* Move the link register to the scratch register grJ, before saving:
473 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
474 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
476 We treat this as part of the prologue. */
477 else if ((op & 0x7fffffc0) == 0x080d01c0)
479 int gr_j = op & 0x3f;
481 /* If we're moving it to a scratch register, that's fine. */
482 if (is_caller_saves_reg (gr_j))
484 /* Otherwise it's not a prologue instruction that we
490 /* To save multiple callee-saves registers on the stack, at
494 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
495 0 000000 1111111 111111 111111 111111 = 0x01ffffff
498 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
499 0 000000 1111111 111111 111111 111111 = 0x01ffffff
501 We treat this as part of the prologue, and record the register's
502 saved address in the frame structure. */
503 else if ((op & 0x01ffffff) == 0x000c10c0
504 || (op & 0x01ffffff) == 0x000c1100)
506 int gr_k = ((op >> 25) & 0x3f);
507 int ope = ((op >> 6) & 0x3f);
511 /* Is it an std or an stq? */
517 /* Is it really a callee-saves register? */
518 if (is_callee_saves_reg (gr_k))
520 for (i = 0; i < count; i++)
522 gr_saved[gr_k + i] = 1;
523 gr_sp_offset[gr_k + i] = 4 * i;
527 /* It's not a prologue instruction. */
531 /* Adjusting the stack pointer. (The stack pointer is GR1.)
533 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
534 0 111111 1111111 111111 000000000000 = 0x7ffff000
536 We treat this as part of the prologue. */
537 else if ((op & 0x7ffff000) == 0x02401000)
539 /* Sign-extend the twelve-bit field.
540 (Isn't there a better way to do this?) */
541 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
546 /* Setting the FP to a constant distance from the SP:
548 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
549 0 111111 1111111 111111 000000000000 = 0x7ffff000
551 We treat this as part of the prologue. */
552 else if ((op & 0x7ffff000) == 0x04401000)
554 /* Sign-extend the twelve-bit field.
555 (Isn't there a better way to do this?) */
556 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
561 /* To spill an argument register to a scratch register:
563 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
564 0 000000 1111111 000000 111111111111 = 0x01fc0fff
566 For the time being, we treat this as a prologue instruction,
567 assuming that GRi is an argument register. This one's kind
568 of suspicious, because it seems like it could be part of a
569 legitimate body instruction. But we only come here when the
570 source info wasn't helpful, so we have to do the best we can.
571 Hopefully once GCC and GDB agree on how to emit line number
572 info for prologues, then this code will never come into play. */
573 else if ((op & 0x01fc0fff) == 0x00880000)
575 int gr_i = ((op >> 12) & 0x3f);
577 /* If the source isn't an arg register, then this isn't a
578 prologue instruction. */
579 if (! is_argument_reg (gr_i))
583 /* To spill 16-bit values to the stack:
585 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
586 0 000000 1111111 111111 000000000000 = 0x01fff000
588 And for 8-bit values, we use STB instructions.
590 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
591 0 000000 1111111 111111 000000000000 = 0x01fff000
593 We check that GRk is really an argument register, and treat
594 all such as part of the prologue. */
595 else if ( (op & 0x01fff000) == 0x01442000
596 || (op & 0x01fff000) == 0x01402000)
598 int gr_k = ((op >> 25) & 0x3f);
600 if (! is_argument_reg (gr_k))
601 break; /* Source isn't an arg register. */
604 /* To save multiple callee-saves register on the stack, at a
608 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
609 0 000000 1111111 111111 000000000000 = 0x01fff000
612 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
613 0 000000 1111111 111111 000000000000 = 0x01fff000
615 We treat this as part of the prologue, and record the register's
616 saved address in the frame structure. */
617 else if ((op & 0x01fff000) == 0x014c1000
618 || (op & 0x01fff000) == 0x01501000)
620 int gr_k = ((op >> 25) & 0x3f);
624 /* Is it a stdi or a stqi? */
625 if ((op & 0x01fff000) == 0x014c1000)
630 /* Is it really a callee-saves register? */
631 if (is_callee_saves_reg (gr_k))
633 /* Sign-extend the twelve-bit field.
634 (Isn't there a better way to do this?) */
635 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
637 for (i = 0; i < count; i++)
639 gr_saved[gr_k + i] = 1;
640 gr_sp_offset[gr_k + i] = s + (4 * i);
644 /* It's not a prologue instruction. */
648 /* Storing any kind of integer register at any constant offset
649 from any other register.
652 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
653 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
656 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
657 0 000000 1111111 000000 000000000000 = 0x01fc0000
659 These could be almost anything, but a lot of prologue
660 instructions fall into this pattern, so let's decode the
661 instruction once, and then work at a higher level. */
662 else if (((op & 0x01fc0fff) == 0x000c0080)
663 || ((op & 0x01fc0000) == 0x01480000))
665 int gr_k = ((op >> 25) & 0x3f);
666 int gr_i = ((op >> 12) & 0x3f);
669 /* Are we storing with gr0 as an offset, or using an
671 if ((op & 0x01fc0fff) == 0x000c0080)
674 offset = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
676 /* If the address isn't relative to the SP or FP, it's not a
677 prologue instruction. */
678 if (gr_i != sp_regnum && gr_i != fp_regnum)
681 /* Saving the old FP in the new frame (relative to the SP). */
682 if (gr_k == fp_regnum && gr_i == sp_regnum)
684 gr_saved[fp_regnum] = 1;
685 gr_sp_offset[fp_regnum] = offset;
688 /* Saving callee-saves register(s) on the stack, relative to
690 else if (gr_i == sp_regnum
691 && is_callee_saves_reg (gr_k))
694 if (gr_i == sp_regnum)
695 gr_sp_offset[gr_k] = offset;
697 gr_sp_offset[gr_k] = offset + fp_offset;
700 /* Saving the scratch register holding the return address. */
701 else if (lr_save_reg != -1
702 && gr_k == lr_save_reg)
704 lr_saved_on_stack = 1;
705 if (gr_i == sp_regnum)
706 lr_sp_offset = offset;
708 lr_sp_offset = offset + fp_offset;
711 /* Spilling int-sized arguments to the stack. */
712 else if (is_argument_reg (gr_k))
715 /* It's not a store instruction we recognize, so this must
716 be the end of the prologue. */
721 /* It's not any instruction we recognize, so this must be the end
729 if (next_frame && info)
734 /* If we know the relationship between the stack and frame
735 pointers, record the addresses of the registers we noticed.
736 Note that we have to do this as a separate step at the end,
737 because instructions may save relative to the SP, but we need
738 their addresses relative to the FP. */
740 frame_unwind_unsigned_register (next_frame, fp_regnum, &this_base);
742 frame_unwind_unsigned_register (next_frame, sp_regnum, &this_base);
744 for (i = 0; i < 64; i++)
746 info->saved_regs[i].addr = this_base - fp_offset + gr_sp_offset[i];
748 info->prev_sp = this_base - fp_offset + framesize;
749 info->base = this_base;
751 /* If LR was saved on the stack, record its location. */
752 if (lr_saved_on_stack)
753 info->saved_regs[lr_regnum].addr = this_base - fp_offset + lr_sp_offset;
755 /* The call instruction moves the caller's PC in the callee's LR.
756 Since this is an unwind, do the reverse. Copy the location of LR
757 into PC (the address / regnum) so that a request for PC will be
758 converted into a request for the LR. */
759 info->saved_regs[pc_regnum] = info->saved_regs[lr_regnum];
761 /* Save the previous frame's computed SP value. */
762 trad_frame_set_value (info->saved_regs, sp_regnum, info->prev_sp);
770 frv_skip_prologue (CORE_ADDR pc)
772 CORE_ADDR func_addr, func_end, new_pc;
776 /* If the line table has entry for a line *within* the function
777 (i.e., not in the prologue, and not past the end), then that's
779 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
781 struct symtab_and_line sal;
783 sal = find_pc_line (func_addr, 0);
785 if (sal.line != 0 && sal.end < func_end)
791 /* The FR-V prologue is at least five instructions long (twenty bytes).
792 If we didn't find a real source location past that, then
793 do a full analysis of the prologue. */
794 if (new_pc < pc + 20)
795 new_pc = frv_analyze_prologue (pc, 0, 0);
801 static struct frv_unwind_cache *
802 frv_frame_unwind_cache (struct frame_info *next_frame,
803 void **this_prologue_cache)
805 struct gdbarch *gdbarch = get_frame_arch (next_frame);
809 struct frv_unwind_cache *info;
811 if ((*this_prologue_cache))
812 return (*this_prologue_cache);
814 info = FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache);
815 (*this_prologue_cache) = info;
816 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
818 /* Prologue analysis does the rest... */
819 frv_analyze_prologue (frame_func_unwind (next_frame), next_frame, info);
825 frv_extract_return_value (struct type *type, char *regbuf, char *valbuf)
827 memcpy (valbuf, (regbuf
828 + frv_register_byte (8)
829 + (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0)),
834 frv_extract_struct_value_address (char *regbuf)
836 return extract_unsigned_integer (regbuf +
837 frv_register_byte (struct_return_regnum),
842 frv_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
844 write_register (struct_return_regnum, addr);
848 frv_frameless_function_invocation (struct frame_info *frame)
850 return frameless_look_for_prologue (frame);
854 frv_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
856 /* Require dword alignment. */
857 return align_down (sp, 8);
861 frv_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
862 struct regcache *regcache, CORE_ADDR bp_addr,
863 int nargs, struct value **args, CORE_ADDR sp,
864 int struct_return, CORE_ADDR struct_addr)
871 struct type *arg_type;
873 enum type_code typecode;
879 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
880 nargs, (int) sp, struct_return, struct_addr);
884 for (argnum = 0; argnum < nargs; ++argnum)
885 stack_space += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])), 4);
887 stack_space -= (6 * 4);
891 /* Make sure stack is dword aligned. */
892 sp = align_down (sp, 8);
899 regcache_cooked_write_unsigned (regcache, struct_return_regnum,
902 for (argnum = 0; argnum < nargs; ++argnum)
905 arg_type = check_typedef (VALUE_TYPE (arg));
906 len = TYPE_LENGTH (arg_type);
907 typecode = TYPE_CODE (arg_type);
909 if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)
911 store_unsigned_integer (valbuf, 4, VALUE_ADDRESS (arg));
912 typecode = TYPE_CODE_PTR;
918 val = (char *) VALUE_CONTENTS (arg);
923 int partial_len = (len < 4 ? len : 4);
927 regval = extract_unsigned_integer (val, partial_len);
929 printf(" Argnum %d data %x -> reg %d\n",
930 argnum, (int) regval, argreg);
932 regcache_cooked_write_unsigned (regcache, argreg, regval);
938 printf(" Argnum %d data %x -> offset %d (%x)\n",
939 argnum, *((int *)val), stack_offset, (int) (sp + stack_offset));
941 write_memory (sp + stack_offset, val, partial_len);
942 stack_offset += align_up (partial_len, 4);
949 /* Set the return address. For the frv, the return breakpoint is
950 always at BP_ADDR. */
951 regcache_cooked_write_unsigned (regcache, lr_regnum, bp_addr);
953 /* Finally, update the SP register. */
954 regcache_cooked_write_unsigned (regcache, sp_regnum, sp);
960 frv_store_return_value (struct type *type, char *valbuf)
962 int length = TYPE_LENGTH (type);
963 int reg8_offset = frv_register_byte (8);
966 deprecated_write_register_bytes (reg8_offset + (4 - length), valbuf,
968 else if (length == 8)
969 deprecated_write_register_bytes (reg8_offset, valbuf, length);
971 internal_error (__FILE__, __LINE__,
972 "Don't know how to return a %d-byte value.", length);
976 /* Hardware watchpoint / breakpoint support for the FR500
980 frv_check_watch_resources (int type, int cnt, int ot)
982 struct gdbarch_tdep *var = CURRENT_VARIANT;
984 /* Watchpoints not supported on simulator. */
985 if (strcmp (target_shortname, "sim") == 0)
988 if (type == bp_hardware_breakpoint)
990 if (var->num_hw_breakpoints == 0)
992 else if (cnt <= var->num_hw_breakpoints)
997 if (var->num_hw_watchpoints == 0)
1001 else if (cnt <= var->num_hw_watchpoints)
1009 frv_stopped_data_address (void)
1011 CORE_ADDR brr, dbar0, dbar1, dbar2, dbar3;
1013 brr = read_register (brr_regnum);
1014 dbar0 = read_register (dbar0_regnum);
1015 dbar1 = read_register (dbar1_regnum);
1016 dbar2 = read_register (dbar2_regnum);
1017 dbar3 = read_register (dbar3_regnum);
1021 else if (brr & (1<<10))
1023 else if (brr & (1<<9))
1025 else if (brr & (1<<8))
1032 frv_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1034 return frame_unwind_register_unsigned (next_frame, pc_regnum);
1037 /* Given a GDB frame, determine the address of the calling function's
1038 frame. This will be used to create a new GDB frame struct. */
1041 frv_frame_this_id (struct frame_info *next_frame,
1042 void **this_prologue_cache, struct frame_id *this_id)
1044 struct frv_unwind_cache *info
1045 = frv_frame_unwind_cache (next_frame, this_prologue_cache);
1048 struct minimal_symbol *msym_stack;
1051 /* The FUNC is easy. */
1052 func = frame_func_unwind (next_frame);
1054 /* This is meant to halt the backtrace at "_start". Make sure we
1055 don't halt it at a generic dummy frame. */
1056 if (inside_entry_func (func))
1059 /* Check if the stack is empty. */
1060 msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL);
1061 if (msym_stack && info->base == SYMBOL_VALUE_ADDRESS (msym_stack))
1064 /* Hopefully the prologue analysis either correctly determined the
1065 frame's base (which is the SP from the previous frame), or set
1066 that base to "NULL". */
1067 base = info->prev_sp;
1071 id = frame_id_build (base, func);
1073 /* Check that we're not going round in circles with the same frame
1074 ID (but avoid applying the test to sentinel frames which do go
1075 round in circles). Can't use frame_id_eq() as that doesn't yet
1076 compare the frame's PC value. */
1077 if (frame_relative_level (next_frame) >= 0
1078 && get_frame_type (next_frame) != DUMMY_FRAME
1079 && frame_id_eq (get_frame_id (next_frame), id))
1086 frv_frame_prev_register (struct frame_info *next_frame,
1087 void **this_prologue_cache,
1088 int regnum, int *optimizedp,
1089 enum lval_type *lvalp, CORE_ADDR *addrp,
1090 int *realnump, void *bufferp)
1092 struct frv_unwind_cache *info
1093 = frv_frame_unwind_cache (next_frame, this_prologue_cache);
1094 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
1095 optimizedp, lvalp, addrp, realnump, bufferp);
1098 static const struct frame_unwind frv_frame_unwind = {
1101 frv_frame_prev_register
1104 static const struct frame_unwind *
1105 frv_frame_sniffer (struct frame_info *next_frame)
1107 return &frv_frame_unwind;
1111 frv_frame_base_address (struct frame_info *next_frame, void **this_cache)
1113 struct frv_unwind_cache *info
1114 = frv_frame_unwind_cache (next_frame, this_cache);
1118 static const struct frame_base frv_frame_base = {
1120 frv_frame_base_address,
1121 frv_frame_base_address,
1122 frv_frame_base_address
1126 frv_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
1128 return frame_unwind_register_unsigned (next_frame, sp_regnum);
1132 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1133 dummy frame. The frame ID's base needs to match the TOS value
1134 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1137 static struct frame_id
1138 frv_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1140 return frame_id_build (frv_unwind_sp (gdbarch, next_frame),
1141 frame_pc_unwind (next_frame));
1145 static struct gdbarch *
1146 frv_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1148 struct gdbarch *gdbarch;
1149 struct gdbarch_tdep *var;
1151 /* Check to see if we've already built an appropriate architecture
1152 object for this executable. */
1153 arches = gdbarch_list_lookup_by_info (arches, &info);
1155 return arches->gdbarch;
1157 /* Select the right tdep structure for this variant. */
1158 var = new_variant ();
1159 switch (info.bfd_arch_info->mach)
1162 case bfd_mach_frvsimple:
1163 case bfd_mach_fr500:
1164 case bfd_mach_frvtomcat:
1165 set_variant_num_gprs (var, 64);
1166 set_variant_num_fprs (var, 64);
1169 case bfd_mach_fr400:
1170 set_variant_num_gprs (var, 32);
1171 set_variant_num_fprs (var, 32);
1175 /* Never heard of this variant. */
1179 gdbarch = gdbarch_alloc (&info, var);
1181 set_gdbarch_short_bit (gdbarch, 16);
1182 set_gdbarch_int_bit (gdbarch, 32);
1183 set_gdbarch_long_bit (gdbarch, 32);
1184 set_gdbarch_long_long_bit (gdbarch, 64);
1185 set_gdbarch_float_bit (gdbarch, 32);
1186 set_gdbarch_double_bit (gdbarch, 64);
1187 set_gdbarch_long_double_bit (gdbarch, 64);
1188 set_gdbarch_ptr_bit (gdbarch, 32);
1190 set_gdbarch_num_regs (gdbarch, frv_num_regs);
1191 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
1192 set_gdbarch_deprecated_fp_regnum (gdbarch, fp_regnum);
1193 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
1195 set_gdbarch_register_name (gdbarch, frv_register_name);
1196 set_gdbarch_deprecated_register_byte (gdbarch, frv_register_byte);
1197 set_gdbarch_register_type (gdbarch, frv_register_type);
1198 set_gdbarch_register_sim_regno (gdbarch, frv_register_sim_regno);
1200 set_gdbarch_skip_prologue (gdbarch, frv_skip_prologue);
1201 set_gdbarch_breakpoint_from_pc (gdbarch, frv_breakpoint_from_pc);
1202 set_gdbarch_adjust_breakpoint_address (gdbarch, frv_gdbarch_adjust_breakpoint_address);
1204 set_gdbarch_frame_args_skip (gdbarch, 0);
1205 set_gdbarch_frameless_function_invocation (gdbarch, frv_frameless_function_invocation);
1207 set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention);
1208 set_gdbarch_deprecated_extract_return_value (gdbarch, frv_extract_return_value);
1210 set_gdbarch_deprecated_store_struct_return (gdbarch, frv_store_struct_return);
1211 set_gdbarch_deprecated_store_return_value (gdbarch, frv_store_return_value);
1212 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, frv_extract_struct_value_address);
1215 set_gdbarch_unwind_pc (gdbarch, frv_unwind_pc);
1216 set_gdbarch_unwind_sp (gdbarch, frv_unwind_sp);
1217 set_gdbarch_frame_align (gdbarch, frv_frame_align);
1218 frame_unwind_append_sniffer (gdbarch, frv_frame_sniffer);
1219 frame_base_set_default (gdbarch, &frv_frame_base);
1221 /* Settings for calling functions in the inferior. */
1222 set_gdbarch_push_dummy_call (gdbarch, frv_push_dummy_call);
1223 set_gdbarch_unwind_dummy_id (gdbarch, frv_unwind_dummy_id);
1225 /* Settings that should be unnecessary. */
1226 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1228 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
1230 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1231 set_gdbarch_function_start_offset (gdbarch, 0);
1233 set_gdbarch_remote_translate_xfer_address
1234 (gdbarch, generic_remote_translate_xfer_address);
1236 /* Hardware watchpoint / breakpoint support. */
1237 switch (info.bfd_arch_info->mach)
1240 case bfd_mach_frvsimple:
1241 case bfd_mach_fr500:
1242 case bfd_mach_frvtomcat:
1243 /* fr500-style hardware debugging support. */
1244 var->num_hw_watchpoints = 4;
1245 var->num_hw_breakpoints = 4;
1248 case bfd_mach_fr400:
1249 /* fr400-style hardware debugging support. */
1250 var->num_hw_watchpoints = 2;
1251 var->num_hw_breakpoints = 4;
1255 /* Otherwise, assume we don't have hardware debugging support. */
1256 var->num_hw_watchpoints = 0;
1257 var->num_hw_breakpoints = 0;
1261 set_gdbarch_print_insn (gdbarch, print_insn_frv);
1267 _initialize_frv_tdep (void)
1269 register_gdbarch_init (bfd_arch_frv, frv_gdbarch_init);