1 /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
2 Copyright 2002, 2003 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 #include "gdb_string.h"
24 #include "symfile.h" /* for entry_point_address */
26 #include "arch-utils.h"
29 #include "frame-unwind.h"
30 #include "frame-base.h"
31 #include "trad-frame.h"
34 extern void _initialize_frv_tdep (void);
36 static gdbarch_init_ftype frv_gdbarch_init;
38 static gdbarch_register_name_ftype frv_register_name;
39 static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc;
40 static gdbarch_adjust_breakpoint_address_ftype frv_gdbarch_adjust_breakpoint_address;
41 static gdbarch_skip_prologue_ftype frv_skip_prologue;
42 static gdbarch_deprecated_extract_return_value_ftype frv_extract_return_value;
43 static gdbarch_deprecated_extract_struct_value_address_ftype frv_extract_struct_value_address;
44 static gdbarch_frameless_function_invocation_ftype frv_frameless_function_invocation;
45 static gdbarch_deprecated_push_arguments_ftype frv_push_arguments;
46 static gdbarch_deprecated_saved_pc_after_call_ftype frv_saved_pc_after_call;
48 /* Register numbers. You can change these as needed, but don't forget
49 to update the simulator accordingly. */
51 /* The total number of registers we know exist. */
54 /* Register numbers 0 -- 63 are always reserved for general-purpose
55 registers. The chip at hand may have less. */
59 struct_return_regnum = 3,
62 /* Register numbers 64 -- 127 are always reserved for floating-point
63 registers. The chip at hand may have less. */
64 first_fpr_regnum = 64,
65 last_fpr_regnum = 127,
67 /* Register numbers 128 on up are always reserved for special-purpose
69 first_spr_regnum = 128,
85 static LONGEST frv_call_dummy_words[] =
89 struct frv_unwind_cache /* was struct frame_extra_info */
91 /* The previous frame's inner-most stack address. Used as this
92 frame ID's stack_addr. */
95 /* The frame's base, optionally used by the high-level debug info. */
98 /* Table indicating the location of each and every register. */
99 struct trad_frame_saved_reg *saved_regs;
103 /* A structure describing a particular variant of the FRV.
104 We allocate and initialize one of these structures when we create
105 the gdbarch object for a variant.
107 At the moment, all the FR variants we support differ only in which
108 registers are present; the portable code of GDB knows that
109 registers whose names are the empty string don't exist, so the
110 `register_names' array captures all the per-variant information we
113 in the future, if we need to have per-variant maps for raw size,
114 virtual type, etc., we should replace register_names with an array
115 of structures, each of which gives all the necessary info for one
116 register. Don't stick parallel arrays in here --- that's so
120 /* How many general-purpose registers does this variant have? */
123 /* How many floating-point registers does this variant have? */
126 /* How many hardware watchpoints can it support? */
127 int num_hw_watchpoints;
129 /* How many hardware breakpoints can it support? */
130 int num_hw_breakpoints;
132 /* Register names. */
133 char **register_names;
136 #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
139 /* Allocate a new variant structure, and set up default values for all
141 static struct gdbarch_tdep *
144 struct gdbarch_tdep *var;
148 var = xmalloc (sizeof (*var));
149 memset (var, 0, sizeof (*var));
153 var->num_hw_watchpoints = 0;
154 var->num_hw_breakpoints = 0;
156 /* By default, don't supply any general-purpose or floating-point
158 var->register_names = (char **) xmalloc (frv_num_regs * sizeof (char *));
159 for (r = 0; r < frv_num_regs; r++)
160 var->register_names[r] = "";
162 /* Do, however, supply default names for the special-purpose
164 for (r = first_spr_regnum; r <= last_spr_regnum; ++r)
166 sprintf (buf, "x%d", r);
167 var->register_names[r] = xstrdup (buf);
170 var->register_names[pc_regnum] = "pc";
171 var->register_names[lr_regnum] = "lr";
172 var->register_names[lcr_regnum] = "lcr";
174 var->register_names[psr_regnum] = "psr";
175 var->register_names[ccr_regnum] = "ccr";
176 var->register_names[cccr_regnum] = "cccr";
177 var->register_names[tbr_regnum] = "tbr";
179 /* Debug registers. */
180 var->register_names[brr_regnum] = "brr";
181 var->register_names[dbar0_regnum] = "dbar0";
182 var->register_names[dbar1_regnum] = "dbar1";
183 var->register_names[dbar2_regnum] = "dbar2";
184 var->register_names[dbar3_regnum] = "dbar3";
190 /* Indicate that the variant VAR has NUM_GPRS general-purpose
191 registers, and fill in the names array appropriately. */
193 set_variant_num_gprs (struct gdbarch_tdep *var, int num_gprs)
197 var->num_gprs = num_gprs;
199 for (r = 0; r < num_gprs; ++r)
203 sprintf (buf, "gr%d", r);
204 var->register_names[first_gpr_regnum + r] = xstrdup (buf);
209 /* Indicate that the variant VAR has NUM_FPRS floating-point
210 registers, and fill in the names array appropriately. */
212 set_variant_num_fprs (struct gdbarch_tdep *var, int num_fprs)
216 var->num_fprs = num_fprs;
218 for (r = 0; r < num_fprs; ++r)
222 sprintf (buf, "fr%d", r);
223 var->register_names[first_fpr_regnum + r] = xstrdup (buf);
229 frv_register_name (int reg)
233 if (reg >= frv_num_regs)
236 return CURRENT_VARIANT->register_names[reg];
241 frv_register_raw_size (int reg)
247 frv_register_virtual_size (int reg)
253 frv_register_virtual_type (int reg)
255 if (reg >= 64 && reg <= 127)
256 return builtin_type_float;
258 return builtin_type_int;
262 frv_register_byte (int reg)
267 static const unsigned char *
268 frv_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenp)
270 static unsigned char breakpoint[] = {0xc0, 0x70, 0x00, 0x01};
271 *lenp = sizeof (breakpoint);
275 /* Define the maximum number of instructions which may be packed into a
276 bundle (VLIW instruction). */
277 static const int max_instrs_per_bundle = 8;
279 /* Define the size (in bytes) of an FR-V instruction. */
280 static const int frv_instr_size = 4;
282 /* Adjust a breakpoint's address to account for the FR-V architecture's
283 constraint that a break instruction must not appear as any but the
284 first instruction in the bundle. */
286 frv_gdbarch_adjust_breakpoint_address (struct gdbarch *gdbarch, CORE_ADDR bpaddr)
288 int count = max_instrs_per_bundle;
289 CORE_ADDR addr = bpaddr - frv_instr_size;
290 CORE_ADDR func_start = get_pc_function_start (bpaddr);
292 /* Find the end of the previous packing sequence. This will be indicated
293 by either attempting to access some inaccessible memory or by finding
294 an instruction word whose packing bit is set to one. */
295 while (count-- > 0 && addr >= func_start)
297 char instr[frv_instr_size];
300 status = read_memory_nobpt (addr, instr, sizeof instr);
305 /* This is a big endian architecture, so byte zero will have most
306 significant byte. The most significant bit of this byte is the
311 addr -= frv_instr_size;
315 bpaddr = addr + frv_instr_size;
321 /* Return true if REG is a caller-saves ("scratch") register,
324 is_caller_saves_reg (int reg)
326 return ((4 <= reg && reg <= 7)
327 || (14 <= reg && reg <= 15)
328 || (32 <= reg && reg <= 47));
332 /* Return true if REG is a callee-saves register, false otherwise. */
334 is_callee_saves_reg (int reg)
336 return ((16 <= reg && reg <= 31)
337 || (48 <= reg && reg <= 63));
341 /* Return true if REG is an argument register, false otherwise. */
343 is_argument_reg (int reg)
345 return (8 <= reg && reg <= 13);
349 /* Scan an FR-V prologue, starting at PC, until frame->PC.
350 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
351 We assume FRAME's saved_regs array has already been allocated and cleared.
352 Return the first PC value after the prologue.
354 Note that, for unoptimized code, we almost don't need this function
355 at all; all arguments and locals live on the stack, so we just need
356 the FP to find everything. The catch: structures passed by value
357 have their addresses living in registers; they're never spilled to
358 the stack. So if you ever want to be able to get to these
359 arguments in any frame but the top, you'll need to do this serious
360 prologue analysis. */
362 frv_analyze_prologue (CORE_ADDR pc, struct frame_info *next_frame,
363 struct frv_unwind_cache *info)
365 /* When writing out instruction bitpatterns, we use the following
366 letters to label instruction fields:
367 P - The parallel bit. We don't use this.
368 J - The register number of GRj in the instruction description.
369 K - The register number of GRk in the instruction description.
370 I - The register number of GRi.
371 S - a signed imediate offset.
372 U - an unsigned immediate offset.
374 The dots below the numbers indicate where hex digit boundaries
375 fall, to make it easier to check the numbers. */
377 /* Non-zero iff we've seen the instruction that initializes the
378 frame pointer for this function's frame. */
381 /* If fp_set is non_zero, then this is the distance from
382 the stack pointer to frame pointer: fp = sp + fp_offset. */
385 /* Total size of frame prior to any alloca operations. */
388 /* Flag indicating if lr has been saved on the stack. */
389 int lr_saved_on_stack = 0;
391 /* The number of the general-purpose register we saved the return
392 address ("link register") in, or -1 if we haven't moved it yet. */
393 int lr_save_reg = -1;
395 /* Offset (from sp) at which lr has been saved on the stack. */
397 int lr_sp_offset = 0;
399 /* If gr_saved[i] is non-zero, then we've noticed that general
400 register i has been saved at gr_sp_offset[i] from the stack
403 int gr_sp_offset[64];
405 memset (gr_saved, 0, sizeof (gr_saved));
407 while (! next_frame || pc < frame_pc_unwind (next_frame))
409 LONGEST op = read_memory_integer (pc, 4);
411 /* The tests in this chain of ifs should be in order of
412 decreasing selectivity, so that more particular patterns get
413 to fire before less particular patterns. */
415 /* Setting the FP from the SP:
417 P 000010 0100010 000001 000000000000 = 0x04881000
418 0 111111 1111111 111111 111111111111 = 0x7fffffff
420 We treat this as part of the prologue. */
421 if ((op & 0x7fffffff) == 0x04881000)
427 /* Move the link register to the scratch register grJ, before saving:
429 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
430 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
432 We treat this as part of the prologue. */
433 else if ((op & 0x7fffffc0) == 0x080d01c0)
435 int gr_j = op & 0x3f;
437 /* If we're moving it to a scratch register, that's fine. */
438 if (is_caller_saves_reg (gr_j))
440 /* Otherwise it's not a prologue instruction that we
446 /* To save multiple callee-saves registers on the stack, at
450 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
451 0 000000 1111111 111111 111111 111111 = 0x01ffffff
454 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
455 0 000000 1111111 111111 111111 111111 = 0x01ffffff
457 We treat this as part of the prologue, and record the register's
458 saved address in the frame structure. */
459 else if ((op & 0x01ffffff) == 0x000c10c0
460 || (op & 0x01ffffff) == 0x000c1100)
462 int gr_k = ((op >> 25) & 0x3f);
463 int ope = ((op >> 6) & 0x3f);
467 /* Is it an std or an stq? */
473 /* Is it really a callee-saves register? */
474 if (is_callee_saves_reg (gr_k))
476 for (i = 0; i < count; i++)
478 gr_saved[gr_k + i] = 1;
479 gr_sp_offset[gr_k + i] = 4 * i;
483 /* It's not a prologue instruction. */
487 /* Adjusting the stack pointer. (The stack pointer is GR1.)
489 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
490 0 111111 1111111 111111 000000000000 = 0x7ffff000
492 We treat this as part of the prologue. */
493 else if ((op & 0x7ffff000) == 0x02401000)
495 /* Sign-extend the twelve-bit field.
496 (Isn't there a better way to do this?) */
497 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
502 /* Setting the FP to a constant distance from the SP:
504 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
505 0 111111 1111111 111111 000000000000 = 0x7ffff000
507 We treat this as part of the prologue. */
508 else if ((op & 0x7ffff000) == 0x04401000)
510 /* Sign-extend the twelve-bit field.
511 (Isn't there a better way to do this?) */
512 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
517 /* To spill an argument register to a scratch register:
519 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
520 0 000000 1111111 000000 111111111111 = 0x01fc0fff
522 For the time being, we treat this as a prologue instruction,
523 assuming that GRi is an argument register. This one's kind
524 of suspicious, because it seems like it could be part of a
525 legitimate body instruction. But we only come here when the
526 source info wasn't helpful, so we have to do the best we can.
527 Hopefully once GCC and GDB agree on how to emit line number
528 info for prologues, then this code will never come into play. */
529 else if ((op & 0x01fc0fff) == 0x00880000)
531 int gr_i = ((op >> 12) & 0x3f);
533 /* If the source isn't an arg register, then this isn't a
534 prologue instruction. */
535 if (! is_argument_reg (gr_i))
539 /* To spill 16-bit values to the stack:
541 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
542 0 000000 1111111 111111 000000000000 = 0x01fff000
544 And for 8-bit values, we use STB instructions.
546 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
547 0 000000 1111111 111111 000000000000 = 0x01fff000
549 We check that GRk is really an argument register, and treat
550 all such as part of the prologue. */
551 else if ( (op & 0x01fff000) == 0x01442000
552 || (op & 0x01fff000) == 0x01402000)
554 int gr_k = ((op >> 25) & 0x3f);
556 if (! is_argument_reg (gr_k))
557 break; /* Source isn't an arg register. */
560 /* To save multiple callee-saves register on the stack, at a
564 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
565 0 000000 1111111 111111 000000000000 = 0x01fff000
568 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
569 0 000000 1111111 111111 000000000000 = 0x01fff000
571 We treat this as part of the prologue, and record the register's
572 saved address in the frame structure. */
573 else if ((op & 0x01fff000) == 0x014c1000
574 || (op & 0x01fff000) == 0x01501000)
576 int gr_k = ((op >> 25) & 0x3f);
580 /* Is it a stdi or a stqi? */
581 if ((op & 0x01fff000) == 0x014c1000)
586 /* Is it really a callee-saves register? */
587 if (is_callee_saves_reg (gr_k))
589 /* Sign-extend the twelve-bit field.
590 (Isn't there a better way to do this?) */
591 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
593 for (i = 0; i < count; i++)
595 gr_saved[gr_k + i] = 1;
596 gr_sp_offset[gr_k + i] = s + (4 * i);
600 /* It's not a prologue instruction. */
604 /* Storing any kind of integer register at any constant offset
605 from any other register.
608 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
609 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
612 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
613 0 000000 1111111 000000 000000000000 = 0x01fc0000
615 These could be almost anything, but a lot of prologue
616 instructions fall into this pattern, so let's decode the
617 instruction once, and then work at a higher level. */
618 else if (((op & 0x01fc0fff) == 0x000c0080)
619 || ((op & 0x01fc0000) == 0x01480000))
621 int gr_k = ((op >> 25) & 0x3f);
622 int gr_i = ((op >> 12) & 0x3f);
625 /* Are we storing with gr0 as an offset, or using an
627 if ((op & 0x01fc0fff) == 0x000c0080)
630 offset = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
632 /* If the address isn't relative to the SP or FP, it's not a
633 prologue instruction. */
634 if (gr_i != sp_regnum && gr_i != fp_regnum)
637 /* Saving the old FP in the new frame (relative to the SP). */
638 if (gr_k == fp_regnum && gr_i == sp_regnum)
640 gr_saved[fp_regnum] = 1;
641 gr_sp_offset[fp_regnum] = offset;
644 /* Saving callee-saves register(s) on the stack, relative to
646 else if (gr_i == sp_regnum
647 && is_callee_saves_reg (gr_k))
650 if (gr_i == sp_regnum)
651 gr_sp_offset[gr_k] = offset;
653 gr_sp_offset[gr_k] = offset + fp_offset;
656 /* Saving the scratch register holding the return address. */
657 else if (lr_save_reg != -1
658 && gr_k == lr_save_reg)
660 lr_saved_on_stack = 1;
661 if (gr_i == sp_regnum)
662 lr_sp_offset = offset;
664 lr_sp_offset = offset + fp_offset;
667 /* Spilling int-sized arguments to the stack. */
668 else if (is_argument_reg (gr_k))
671 /* It's not a store instruction we recognize, so this must
672 be the end of the prologue. */
677 /* It's not any instruction we recognize, so this must be the end
685 if (next_frame && info)
690 /* If we know the relationship between the stack and frame
691 pointers, record the addresses of the registers we noticed.
692 Note that we have to do this as a separate step at the end,
693 because instructions may save relative to the SP, but we need
694 their addresses relative to the FP. */
696 frame_unwind_unsigned_register (next_frame, fp_regnum, &this_base);
698 frame_unwind_unsigned_register (next_frame, sp_regnum, &this_base);
700 for (i = 0; i < 64; i++)
702 info->saved_regs[i].addr = this_base - fp_offset + gr_sp_offset[i];
704 info->prev_sp = this_base - fp_offset + framesize;
705 info->base = this_base;
707 /* If LR was saved on the stack, record its location. */
708 if (lr_saved_on_stack)
709 info->saved_regs[lr_regnum].addr = this_base - fp_offset + lr_sp_offset;
711 /* The call instruction moves the caller's PC in the callee's LR.
712 Since this is an unwind, do the reverse. Copy the location of LR
713 into PC (the address / regnum) so that a request for PC will be
714 converted into a request for the LR. */
715 info->saved_regs[pc_regnum] = info->saved_regs[lr_regnum];
717 /* Save the previous frame's computed SP value. */
718 trad_frame_set_value (info->saved_regs, sp_regnum, info->prev_sp);
726 frv_skip_prologue (CORE_ADDR pc)
728 CORE_ADDR func_addr, func_end, new_pc;
732 /* If the line table has entry for a line *within* the function
733 (i.e., not in the prologue, and not past the end), then that's
735 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
737 struct symtab_and_line sal;
739 sal = find_pc_line (func_addr, 0);
741 if (sal.line != 0 && sal.end < func_end)
747 /* The FR-V prologue is at least five instructions long (twenty bytes).
748 If we didn't find a real source location past that, then
749 do a full analysis of the prologue. */
750 if (new_pc < pc + 20)
751 new_pc = frv_analyze_prologue (pc, 0, 0);
757 static struct frv_unwind_cache *
758 frv_frame_unwind_cache (struct frame_info *next_frame,
759 void **this_prologue_cache)
761 struct gdbarch *gdbarch = get_frame_arch (next_frame);
765 struct frv_unwind_cache *info;
767 if ((*this_prologue_cache))
768 return (*this_prologue_cache);
770 info = FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache);
771 (*this_prologue_cache) = info;
772 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
774 /* Prologue analysis does the rest... */
775 frv_analyze_prologue (frame_func_unwind (next_frame), next_frame, info);
781 frv_extract_return_value (struct type *type, char *regbuf, char *valbuf)
783 memcpy (valbuf, (regbuf
784 + frv_register_byte (8)
785 + (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0)),
790 frv_extract_struct_value_address (char *regbuf)
792 return extract_unsigned_integer (regbuf +
793 frv_register_byte (struct_return_regnum),
798 frv_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
800 write_register (struct_return_regnum, addr);
804 frv_frameless_function_invocation (struct frame_info *frame)
806 return frameless_look_for_prologue (frame);
810 frv_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
812 /* Require dword alignment. */
813 return align_down (sp, 8);
817 frv_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
818 struct regcache *regcache, CORE_ADDR bp_addr,
819 int nargs, struct value **args, CORE_ADDR sp,
820 int struct_return, CORE_ADDR struct_addr)
827 struct type *arg_type;
829 enum type_code typecode;
835 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
836 nargs, (int) sp, struct_return, struct_addr);
840 for (argnum = 0; argnum < nargs; ++argnum)
841 stack_space += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])), 4);
843 stack_space -= (6 * 4);
847 /* Make sure stack is dword aligned. */
848 sp = align_down (sp, 8);
855 regcache_cooked_write_unsigned (regcache, struct_return_regnum,
858 for (argnum = 0; argnum < nargs; ++argnum)
861 arg_type = check_typedef (VALUE_TYPE (arg));
862 len = TYPE_LENGTH (arg_type);
863 typecode = TYPE_CODE (arg_type);
865 if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)
867 store_unsigned_integer (valbuf, 4, VALUE_ADDRESS (arg));
868 typecode = TYPE_CODE_PTR;
874 val = (char *) VALUE_CONTENTS (arg);
879 int partial_len = (len < 4 ? len : 4);
883 regval = extract_unsigned_integer (val, partial_len);
885 printf(" Argnum %d data %x -> reg %d\n",
886 argnum, (int) regval, argreg);
888 regcache_cooked_write_unsigned (regcache, argreg, regval);
894 printf(" Argnum %d data %x -> offset %d (%x)\n",
895 argnum, *((int *)val), stack_offset, (int) (sp + stack_offset));
897 write_memory (sp + stack_offset, val, partial_len);
898 stack_offset += align_up (partial_len, 4);
905 /* Set the return address. For the frv, the return breakpoint is
906 always at BP_ADDR. */
907 regcache_cooked_write_unsigned (regcache, lr_regnum, bp_addr);
909 /* Finally, update the SP register. */
910 regcache_cooked_write_unsigned (regcache, sp_regnum, sp);
916 frv_store_return_value (struct type *type, char *valbuf)
918 int length = TYPE_LENGTH (type);
919 int reg8_offset = frv_register_byte (8);
922 deprecated_write_register_bytes (reg8_offset + (4 - length), valbuf,
924 else if (length == 8)
925 deprecated_write_register_bytes (reg8_offset, valbuf, length);
927 internal_error (__FILE__, __LINE__,
928 "Don't know how to return a %d-byte value.", length);
932 /* Hardware watchpoint / breakpoint support for the FR500
936 frv_check_watch_resources (int type, int cnt, int ot)
938 struct gdbarch_tdep *var = CURRENT_VARIANT;
940 /* Watchpoints not supported on simulator. */
941 if (strcmp (target_shortname, "sim") == 0)
944 if (type == bp_hardware_breakpoint)
946 if (var->num_hw_breakpoints == 0)
948 else if (cnt <= var->num_hw_breakpoints)
953 if (var->num_hw_watchpoints == 0)
957 else if (cnt <= var->num_hw_watchpoints)
965 frv_stopped_data_address (void)
967 CORE_ADDR brr, dbar0, dbar1, dbar2, dbar3;
969 brr = read_register (brr_regnum);
970 dbar0 = read_register (dbar0_regnum);
971 dbar1 = read_register (dbar1_regnum);
972 dbar2 = read_register (dbar2_regnum);
973 dbar3 = read_register (dbar3_regnum);
977 else if (brr & (1<<10))
979 else if (brr & (1<<9))
981 else if (brr & (1<<8))
988 frv_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
990 return frame_unwind_register_unsigned (next_frame, pc_regnum);
993 /* Given a GDB frame, determine the address of the calling function's
994 frame. This will be used to create a new GDB frame struct. */
997 frv_frame_this_id (struct frame_info *next_frame,
998 void **this_prologue_cache, struct frame_id *this_id)
1000 struct frv_unwind_cache *info
1001 = frv_frame_unwind_cache (next_frame, this_prologue_cache);
1004 struct minimal_symbol *msym_stack;
1007 /* The FUNC is easy. */
1008 func = frame_func_unwind (next_frame);
1010 /* This is meant to halt the backtrace at "_start". Make sure we
1011 don't halt it at a generic dummy frame. */
1012 if (inside_entry_func (func))
1015 /* Check if the stack is empty. */
1016 msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL);
1017 if (msym_stack && info->base == SYMBOL_VALUE_ADDRESS (msym_stack))
1020 /* Hopefully the prologue analysis either correctly determined the
1021 frame's base (which is the SP from the previous frame), or set
1022 that base to "NULL". */
1023 base = info->prev_sp;
1027 id = frame_id_build (base, func);
1029 /* Check that we're not going round in circles with the same frame
1030 ID (but avoid applying the test to sentinel frames which do go
1031 round in circles). Can't use frame_id_eq() as that doesn't yet
1032 compare the frame's PC value. */
1033 if (frame_relative_level (next_frame) >= 0
1034 && get_frame_type (next_frame) != DUMMY_FRAME
1035 && frame_id_eq (get_frame_id (next_frame), id))
1042 frv_frame_prev_register (struct frame_info *next_frame,
1043 void **this_prologue_cache,
1044 int regnum, int *optimizedp,
1045 enum lval_type *lvalp, CORE_ADDR *addrp,
1046 int *realnump, void *bufferp)
1048 struct frv_unwind_cache *info
1049 = frv_frame_unwind_cache (next_frame, this_prologue_cache);
1050 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
1051 optimizedp, lvalp, addrp, realnump, bufferp);
1054 static const struct frame_unwind frv_frame_unwind = {
1057 frv_frame_prev_register
1060 static const struct frame_unwind *
1061 frv_frame_sniffer (struct frame_info *next_frame)
1063 return &frv_frame_unwind;
1067 frv_frame_base_address (struct frame_info *next_frame, void **this_cache)
1069 struct frv_unwind_cache *info
1070 = frv_frame_unwind_cache (next_frame, this_cache);
1074 static const struct frame_base frv_frame_base = {
1076 frv_frame_base_address,
1077 frv_frame_base_address,
1078 frv_frame_base_address
1082 frv_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
1084 return frame_unwind_register_unsigned (next_frame, sp_regnum);
1088 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1089 dummy frame. The frame ID's base needs to match the TOS value
1090 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1093 static struct frame_id
1094 frv_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1096 return frame_id_build (frv_unwind_sp (gdbarch, next_frame),
1097 frame_pc_unwind (next_frame));
1101 static struct gdbarch *
1102 frv_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1104 struct gdbarch *gdbarch;
1105 struct gdbarch_tdep *var;
1107 /* Check to see if we've already built an appropriate architecture
1108 object for this executable. */
1109 arches = gdbarch_list_lookup_by_info (arches, &info);
1111 return arches->gdbarch;
1113 /* Select the right tdep structure for this variant. */
1114 var = new_variant ();
1115 switch (info.bfd_arch_info->mach)
1118 case bfd_mach_frvsimple:
1119 case bfd_mach_fr500:
1120 case bfd_mach_frvtomcat:
1121 set_variant_num_gprs (var, 64);
1122 set_variant_num_fprs (var, 64);
1125 case bfd_mach_fr400:
1126 set_variant_num_gprs (var, 32);
1127 set_variant_num_fprs (var, 32);
1131 /* Never heard of this variant. */
1135 gdbarch = gdbarch_alloc (&info, var);
1137 set_gdbarch_short_bit (gdbarch, 16);
1138 set_gdbarch_int_bit (gdbarch, 32);
1139 set_gdbarch_long_bit (gdbarch, 32);
1140 set_gdbarch_long_long_bit (gdbarch, 64);
1141 set_gdbarch_float_bit (gdbarch, 32);
1142 set_gdbarch_double_bit (gdbarch, 64);
1143 set_gdbarch_long_double_bit (gdbarch, 64);
1144 set_gdbarch_ptr_bit (gdbarch, 32);
1146 set_gdbarch_num_regs (gdbarch, frv_num_regs);
1147 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
1148 set_gdbarch_deprecated_fp_regnum (gdbarch, fp_regnum);
1149 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
1151 set_gdbarch_register_name (gdbarch, frv_register_name);
1152 set_gdbarch_deprecated_register_size (gdbarch, 4);
1153 set_gdbarch_deprecated_register_bytes (gdbarch, frv_num_regs * 4);
1154 set_gdbarch_deprecated_register_byte (gdbarch, frv_register_byte);
1155 set_gdbarch_deprecated_register_raw_size (gdbarch, frv_register_raw_size);
1156 set_gdbarch_deprecated_max_register_raw_size (gdbarch, 4);
1157 set_gdbarch_deprecated_register_virtual_size (gdbarch, frv_register_virtual_size);
1158 set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 4);
1159 set_gdbarch_deprecated_register_virtual_type (gdbarch, frv_register_virtual_type);
1161 set_gdbarch_skip_prologue (gdbarch, frv_skip_prologue);
1162 set_gdbarch_breakpoint_from_pc (gdbarch, frv_breakpoint_from_pc);
1163 set_gdbarch_adjust_breakpoint_address (gdbarch, frv_gdbarch_adjust_breakpoint_address);
1165 set_gdbarch_frame_args_skip (gdbarch, 0);
1166 set_gdbarch_frameless_function_invocation (gdbarch, frv_frameless_function_invocation);
1168 set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention);
1169 set_gdbarch_deprecated_extract_return_value (gdbarch, frv_extract_return_value);
1171 set_gdbarch_deprecated_store_struct_return (gdbarch, frv_store_struct_return);
1172 set_gdbarch_deprecated_store_return_value (gdbarch, frv_store_return_value);
1173 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, frv_extract_struct_value_address);
1176 set_gdbarch_unwind_pc (gdbarch, frv_unwind_pc);
1177 set_gdbarch_unwind_sp (gdbarch, frv_unwind_sp);
1178 set_gdbarch_frame_align (gdbarch, frv_frame_align);
1179 frame_unwind_append_sniffer (gdbarch, frv_frame_sniffer);
1180 frame_base_set_default (gdbarch, &frv_frame_base);
1182 /* Settings for calling functions in the inferior. */
1183 set_gdbarch_push_dummy_call (gdbarch, frv_push_dummy_call);
1184 set_gdbarch_unwind_dummy_id (gdbarch, frv_unwind_dummy_id);
1186 /* Settings that should be unnecessary. */
1187 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1189 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
1191 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1192 set_gdbarch_function_start_offset (gdbarch, 0);
1194 set_gdbarch_remote_translate_xfer_address
1195 (gdbarch, generic_remote_translate_xfer_address);
1197 /* Hardware watchpoint / breakpoint support. */
1198 switch (info.bfd_arch_info->mach)
1201 case bfd_mach_frvsimple:
1202 case bfd_mach_fr500:
1203 case bfd_mach_frvtomcat:
1204 /* fr500-style hardware debugging support. */
1205 var->num_hw_watchpoints = 4;
1206 var->num_hw_breakpoints = 4;
1209 case bfd_mach_fr400:
1210 /* fr400-style hardware debugging support. */
1211 var->num_hw_watchpoints = 2;
1212 var->num_hw_breakpoints = 4;
1216 /* Otherwise, assume we don't have hardware debugging support. */
1217 var->num_hw_watchpoints = 0;
1218 var->num_hw_breakpoints = 0;
1222 set_gdbarch_print_insn (gdbarch, print_insn_frv);
1228 _initialize_frv_tdep (void)
1230 register_gdbarch_init (bfd_arch_frv, frv_gdbarch_init);