gdb/csky-tdep.c

   1 /* Target-dependent code for the CSKY architecture, for GDB.
   2
   3    Copyright (C) 2010-2019 Free Software Foundation, Inc.
   4
   5    Contributed by C-SKY Microsystems and Mentor Graphics.
   6
   7    This file is part of GDB.
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  21
  22 #include "defs.h"
  23 #include "gdbsupport/gdb_assert.h"
  24 #include "frame.h"
  25 #include "inferior.h"
  26 #include "symtab.h"
  27 #include "value.h"
  28 #include "gdbcmd.h"
  29 #include "language.h"
  30 #include "gdbcore.h"
  31 #include "symfile.h"
  32 #include "objfiles.h"
  33 #include "gdbtypes.h"
  34 #include "target.h"
  35 #include "arch-utils.h"
  36 #include "regcache.h"
  37 #include "osabi.h"
  38 #include "block.h"
  39 #include "reggroups.h"
  40 #include "elf/csky.h"
  41 #include "elf-bfd.h"
  42 #include "symcat.h"
  43 #include "sim-regno.h"
  44 #include "dis-asm.h"
  45 #include "frame-unwind.h"
  46 #include "frame-base.h"
  47 #include "trad-frame.h"
  48 #include "infcall.h"
  49 #include "floatformat.h"
  50 #include "remote.h"
  51 #include "target-descriptions.h"
  52 #include "dwarf2-frame.h"
  53 #include "user-regs.h"
  54 #include "valprint.h"
  55 #include "csky-tdep.h"
  56 #include "regset.h"
  57 #include "opcode/csky.h"
  58 #include <algorithm>
  59 #include <vector>
  60
  61 /* Control debugging information emitted in this file.  */
  62 static int csky_debug = 0;
  63
  64 static struct reggroup *cr_reggroup;
  65 static struct reggroup *fr_reggroup;
  66 static struct reggroup *vr_reggroup;
  67 static struct reggroup *mmu_reggroup;
  68 static struct reggroup *prof_reggroup;
  69
  70 /* Convenience function to print debug messages in prologue analysis.  */
  71
  72 static void
  73 print_savedreg_msg (int regno, int offsets[], bool print_continuing)
  74 {
  75   fprintf_unfiltered (gdb_stdlog, "csky: r%d saved at offset 0x%x\n",
  76                       regno, offsets[regno]);
  77   if (print_continuing)
  78     fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
  79 }
  80
  81 /*  Check whether the instruction at ADDR is 16-bit or not.  */
  82
  83 static int
  84 csky_pc_is_csky16 (struct gdbarch *gdbarch, CORE_ADDR addr)
  85 {
  86   gdb_byte target_mem[2];
  87   int status;
  88   unsigned int insn;
  89   int ret = 1;
  90   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  91
  92   status = target_read_memory (addr, target_mem, 2);
  93   /* Assume a 16-bit instruction if we can't read memory.  */
  94   if (status)
  95     return 1;
  96
  97   /* Get instruction from memory.  */
  98   insn = extract_unsigned_integer (target_mem, 2, byte_order);
  99   if ((insn & CSKY_32_INSN_MASK) == CSKY_32_INSN_MASK)
 100     ret = 0;
 101   else if (insn == CSKY_BKPT_INSN)
 102     {
 103       /* Check for 32-bit bkpt instruction which is all 0.  */
 104       status = target_read_memory (addr + 2, target_mem, 2);
 105       if (status)
 106         return 1;
 107
 108       insn = extract_unsigned_integer (target_mem, 2, byte_order);
 109       if (insn == CSKY_BKPT_INSN)
 110         ret = 0;
 111     }
 112   return ret;
 113 }
 114
 115 /* Get one instruction at ADDR and store it in INSN.  Return 2 for
 116    a 16-bit instruction or 4 for a 32-bit instruction.  */
 117
 118 static int
 119 csky_get_insn (struct gdbarch *gdbarch, CORE_ADDR addr, unsigned int *insn)
 120 {
 121   gdb_byte target_mem[2];
 122   unsigned int insn_type;
 123   int status;
 124   int insn_len = 2;
 125   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 126
 127   status = target_read_memory (addr, target_mem, 2);
 128   if (status)
 129     memory_error (TARGET_XFER_E_IO, addr);
 130
 131   insn_type = extract_unsigned_integer (target_mem, 2, byte_order);
 132   if (CSKY_32_INSN_MASK == (insn_type & CSKY_32_INSN_MASK))
 133     {
 134       status = target_read_memory (addr + 2, target_mem, 2);
 135       if (status)
 136         memory_error (TARGET_XFER_E_IO, addr);
 137       insn_type = ((insn_type << 16)
 138                    | extract_unsigned_integer (target_mem, 2, byte_order));
 139       insn_len = 4;
 140     }
 141   *insn = insn_type;
 142   return insn_len;
 143 }
 144
 145 /* Implement the read_pc gdbarch method.  */
 146
 147 static CORE_ADDR
 148 csky_read_pc (readable_regcache *regcache)
 149 {
 150   ULONGEST pc;
 151   regcache->cooked_read (CSKY_PC_REGNUM, &pc);
 152   return pc;
 153 }
 154
 155 /* Implement the write_pc gdbarch method.  */
 156
 157 static void
 158 csky_write_pc (regcache *regcache, CORE_ADDR val)
 159 {
 160   regcache_cooked_write_unsigned (regcache, CSKY_PC_REGNUM, val);
 161 }
 162
 163 /* C-Sky ABI register names.  */
 164
 165 static const char *csky_register_names[] =
 166 {
 167   /* General registers 0 - 31.  */
 168   "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",
 169   "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",
 170   "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
 171   "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
 172
 173   /* DSP hilo registers 36 and 37.  */
 174   "",      "",    "",     "",     "hi",    "lo",   "",    "",
 175
 176   /* FPU/VPU general registers 40 - 71.  */
 177   "fr0", "fr1", "fr2",  "fr3",  "fr4",  "fr5",  "fr6",  "fr7",
 178   "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
 179   "vr0", "vr1", "vr2",  "vr3",  "vr4",  "vr5",  "vr6",  "vr7",
 180   "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15",
 181
 182   /* Program counter 72.  */
 183   "pc",
 184
 185   /* Optional registers (ar) 73 - 88.  */
 186   "ar0", "ar1", "ar2",  "ar3",  "ar4",  "ar5",  "ar6",  "ar7",
 187   "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
 188
 189   /* Control registers (cr) 89 - 119.  */
 190   "psr",  "vbr",  "epsr", "fpsr", "epc",  "fpc",  "ss0",  "ss1",
 191   "ss2",  "ss3",  "ss4",  "gcr",  "gsr",  "cr13", "cr14", "cr15",
 192   "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
 193   "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
 194
 195   /* FPU/VPU control registers 121 ~ 123.  */
 196   /* User sp 127.  */
 197   "fid", "fcr", "fesr", "", "", "", "usp",
 198
 199   /* MMU control registers: 128 - 136.  */
 200   "mcr0", "mcr2", "mcr3", "mcr4", "mcr6", "mcr8", "mcr29", "mcr30",
 201   "mcr31", "", "", "",
 202
 203   /* Profiling control registers 140 - 143.  */
 204   /* Profiling software general registers 144 - 157.  */
 205   "profcr0",  "profcr1",  "profcr2",  "profcr3",  "profsgr0",  "profsgr1",
 206   "profsgr2", "profsgr3", "profsgr4", "profsgr5", "profsgr6",  "profsgr7",
 207   "profsgr8", "profsgr9", "profsgr10","profsgr11","profsgr12", "profsgr13",
 208   "",    "",
 209
 210   /* Profiling architecture general registers 160 - 174.  */
 211   "profagr0", "profagr1", "profagr2", "profagr3", "profagr4", "profagr5",
 212   "profagr6", "profagr7", "profagr8", "profagr9", "profagr10","profagr11",
 213   "profagr12","profagr13","profagr14", "",
 214
 215   /* Profiling extension general registers 176 - 188.  */
 216   "profxgr0", "profxgr1", "profxgr2", "profxgr3", "profxgr4", "profxgr5",
 217   "profxgr6", "profxgr7", "profxgr8", "profxgr9", "profxgr10","profxgr11",
 218   "profxgr12",
 219
 220   /* Control registers in bank1.  */
 221   "", "", "", "", "", "", "", "",
 222   "", "", "", "", "", "", "", "",
 223   "cp1cr16", "cp1cr17", "cp1cr18", "cp1cr19", "cp1cr20", "", "", "",
 224   "", "", "", "", "", "", "", "",
 225
 226   /* Control registers in bank3 (ICE).  */
 227   "sepsr", "sevbr", "seepsr", "", "seepc", "", "nsssp", "seusp",
 228   "sedcr", "", "", "", "", "", "", "",
 229   "", "", "", "", "", "", "", "",
 230   "", "", "", "", "", "", "", ""
 231 };
 232
 233 /* Implement the register_name gdbarch method.  */
 234
 235 static const char *
 236 csky_register_name (struct gdbarch *gdbarch, int reg_nr)
 237 {
 238   if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
 239     return tdesc_register_name (gdbarch, reg_nr);
 240
 241   if (reg_nr < 0)
 242     return NULL;
 243
 244   if (reg_nr >= gdbarch_num_regs (gdbarch))
 245     return NULL;
 246
 247   return csky_register_names[reg_nr];
 248 }
 249
 250 /* Construct vector type for vrx registers.  */
 251
 252 static struct type *
 253 csky_vector_type (struct gdbarch *gdbarch)
 254 {
 255   const struct builtin_type *bt = builtin_type (gdbarch);
 256
 257   struct type *t;
 258
 259   t = arch_composite_type (gdbarch, "__gdb_builtin_type_vec128i",
 260                            TYPE_CODE_UNION);
 261
 262   append_composite_type_field (t, "u32",
 263                                init_vector_type (bt->builtin_int32, 4));
 264   append_composite_type_field (t, "u16",
 265                                init_vector_type (bt->builtin_int16, 8));
 266   append_composite_type_field (t, "u8",
 267                                init_vector_type (bt->builtin_int8, 16));
 268
 269   TYPE_VECTOR (t) = 1;
 270   TYPE_NAME (t) = "builtin_type_vec128i";
 271
 272   return t;
 273 }
 274
 275 /* Return the GDB type object for the "standard" data type
 276    of data in register N.  */
 277
 278 static struct type *
 279 csky_register_type (struct gdbarch *gdbarch, int reg_nr)
 280 {
 281   /* PC, EPC, FPC is a text pointer.  */
 282   if ((reg_nr == CSKY_PC_REGNUM)  || (reg_nr == CSKY_EPC_REGNUM)
 283       || (reg_nr == CSKY_FPC_REGNUM))
 284     return builtin_type (gdbarch)->builtin_func_ptr;
 285
 286   /* VBR is a data pointer.  */
 287   if (reg_nr == CSKY_VBR_REGNUM)
 288     return builtin_type (gdbarch)->builtin_data_ptr;
 289
 290   /* Float register has 64 bits, and only in ck810.  */
 291   if ((reg_nr >=CSKY_FR0_REGNUM) && (reg_nr <= CSKY_FR0_REGNUM + 15))
 292       return arch_float_type (gdbarch, 64, "builtin_type_csky_ext",
 293                               floatformats_ieee_double);
 294
 295   /* Vector register has 128 bits, and only in ck810.  */
 296   if ((reg_nr >= CSKY_VR0_REGNUM) && (reg_nr <= CSKY_VR0_REGNUM + 15))
 297     return csky_vector_type (gdbarch);
 298
 299   /* Profiling general register has 48 bits, we use 64bit.  */
 300   if ((reg_nr >= CSKY_PROFGR_REGNUM) && (reg_nr <= CSKY_PROFGR_REGNUM + 44))
 301     return builtin_type (gdbarch)->builtin_uint64;
 302
 303   if (reg_nr == CSKY_SP_REGNUM)
 304     return builtin_type (gdbarch)->builtin_data_ptr;
 305
 306   /* Others are 32 bits.  */
 307   return builtin_type (gdbarch)->builtin_int32;
 308 }
 309
 310 /* Data structure to marshall items in a dummy stack frame when
 311    calling a function in the inferior.  */
 312
 313 struct stack_item
 314 {
 315   stack_item (int len_, const gdb_byte *data_)
 316   : len (len_), data (data_)
 317   {}
 318
 319   int len;
 320   const gdb_byte *data;
 321 };
 322
 323 /* Implement the push_dummy_call gdbarch method.  */
 324
 325 static CORE_ADDR
 326 csky_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
 327                       struct regcache *regcache, CORE_ADDR bp_addr,
 328                       int nargs, struct value **args, CORE_ADDR sp,
 329                       function_call_return_method return_method,
 330                       CORE_ADDR struct_addr)
 331 {
 332   int argnum;
 333   int argreg = CSKY_ABI_A0_REGNUM;
 334   int last_arg_regnum = CSKY_ABI_LAST_ARG_REGNUM;
 335   int need_dummy_stack = 0;
 336   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 337   std::vector<stack_item> stack_items;
 338
 339   /* Set the return address.  For CSKY, the return breakpoint is
 340      always at BP_ADDR.  */
 341   regcache_cooked_write_unsigned (regcache, CSKY_LR_REGNUM, bp_addr);
 342
 343   /* The struct_return pointer occupies the first parameter
 344      passing register.  */
 345   if (return_method == return_method_struct)
 346     {
 347       if (csky_debug)
 348         {
 349           fprintf_unfiltered (gdb_stdlog,
 350                               "csky: struct return in %s = %s\n",
 351                               gdbarch_register_name (gdbarch, argreg),
 352                               paddress (gdbarch, struct_addr));
 353         }
 354       regcache_cooked_write_unsigned (regcache, argreg, struct_addr);
 355       argreg++;
 356     }
 357
 358   /* Put parameters into argument registers in REGCACHE.
 359      In ABI argument registers are r0 through r3.  */
 360   for (argnum = 0; argnum < nargs; argnum++)
 361     {
 362       int len;
 363       struct type *arg_type;
 364       const gdb_byte *val;
 365
 366       arg_type = check_typedef (value_type (args[argnum]));
 367       len = TYPE_LENGTH (arg_type);
 368       val = value_contents (args[argnum]);
 369
 370       /* Copy the argument to argument registers or the dummy stack.
 371          Large arguments are split between registers and stack.
 372
 373          If len < 4, there is no need to worry about endianness since
 374          the arguments will always be stored in the low address.  */
 375       if (len < 4)
 376         {
 377           CORE_ADDR regval
 378             = extract_unsigned_integer (val, len, byte_order);
 379           regcache_cooked_write_unsigned (regcache, argreg, regval);
 380           argreg++;
 381         }
 382       else
 383         {
 384           while (len > 0)
 385             {
 386               int partial_len = len < 4 ? len : 4;
 387               if (argreg <= last_arg_regnum)
 388                 {
 389                   /* The argument is passed in an argument register.  */
 390                   CORE_ADDR regval
 391                     = extract_unsigned_integer (val, partial_len,
 392                                                 byte_order);
 393                   if (byte_order == BFD_ENDIAN_BIG)
 394                     regval <<= (4 - partial_len) * 8;
 395
 396                   /* Put regval into register in REGCACHE.  */
 397                   regcache_cooked_write_unsigned (regcache, argreg,
 398                                                   regval);
 399                   argreg++;
 400                 }
 401               else
 402                 {
 403                   /* The argument should be pushed onto the dummy stack.  */
 404                   stack_items.emplace_back (4, val);
 405                   need_dummy_stack += 4;
 406                 }
 407               len -= partial_len;
 408               val += partial_len;
 409             }
 410         }
 411     }
 412
 413   /* Transfer the dummy stack frame to the target.  */
 414   std::vector<stack_item>::reverse_iterator iter;
 415   for (iter = stack_items.rbegin (); iter != stack_items.rend (); ++iter)
 416     {
 417       sp -= iter->len;
 418       write_memory (sp, iter->data, iter->len);
 419     }
 420
 421   /* Finally, update the SP register.  */
 422   regcache_cooked_write_unsigned (regcache, CSKY_SP_REGNUM, sp);
 423   return sp;
 424 }
 425
 426 /* Implement the return_value gdbarch method.  */
 427
 428 static enum return_value_convention
 429 csky_return_value (struct gdbarch *gdbarch, struct value *function,
 430                    struct type *valtype, struct regcache *regcache,
 431                    gdb_byte *readbuf, const gdb_byte *writebuf)
 432 {
 433   CORE_ADDR regval;
 434   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 435   int len = TYPE_LENGTH (valtype);
 436   unsigned int ret_regnum = CSKY_RET_REGNUM;
 437
 438   /* Csky abi specifies that return values larger than 8 bytes
 439      are put on the stack.  */
 440   if (len > 8)
 441     return RETURN_VALUE_STRUCT_CONVENTION;
 442   else
 443     {
 444       if (readbuf != NULL)
 445         {
 446           ULONGEST tmp;
 447           /* By using store_unsigned_integer we avoid having to do
 448              anything special for small big-endian values.  */
 449           regcache->cooked_read (ret_regnum, &tmp);
 450           store_unsigned_integer (readbuf, (len > 4 ? 4 : len),
 451                                   byte_order, tmp);
 452           if (len > 4)
 453             {
 454               regcache->cooked_read (ret_regnum + 1, &tmp);
 455               store_unsigned_integer (readbuf + 4,  4, byte_order, tmp);
 456             }
 457         }
 458       if (writebuf != NULL)
 459         {
 460           regval = extract_unsigned_integer (writebuf, len > 4 ? 4 : len,
 461                                              byte_order);
 462           regcache_cooked_write_unsigned (regcache, ret_regnum, regval);
 463           if (len > 4)
 464             {
 465               regval = extract_unsigned_integer ((gdb_byte *) writebuf + 4,
 466                                                  4, byte_order);
 467               regcache_cooked_write_unsigned (regcache, ret_regnum + 1,
 468                                               regval);
 469             }
 470
 471         }
 472       return RETURN_VALUE_REGISTER_CONVENTION;
 473     }
 474 }
 475
 476 /* Implement the frame_align gdbarch method.
 477
 478    Adjust the address downward (direction of stack growth) so that it
 479    is correctly aligned for a new stack frame.  */
 480
 481 static CORE_ADDR
 482 csky_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
 483 {
 484   return align_down (addr, 4);
 485 }
 486
 487 /* Unwind cache used for gdbarch fallback unwinder.  */
 488
 489 struct csky_unwind_cache
 490 {
 491   /* The stack pointer at the time this frame was created; i.e. the
 492      caller's stack pointer when this function was called.  It is used
 493      to identify this frame.  */
 494   CORE_ADDR prev_sp;
 495
 496   /* The frame base for this frame is just prev_sp - frame size.
 497      FRAMESIZE is the distance from the frame pointer to the
 498      initial stack pointer.  */
 499   int framesize;
 500
 501   /* The register used to hold the frame pointer for this frame.  */
 502   int framereg;
 503
 504   /* Saved register offsets.  */
 505   struct trad_frame_saved_reg *saved_regs;
 506 };
 507
 508 /* Do prologue analysis, returning the PC of the first instruction
 509    after the function prologue.  */
 510
 511 static CORE_ADDR
 512 csky_analyze_prologue (struct gdbarch *gdbarch,
 513                        CORE_ADDR start_pc,
 514                        CORE_ADDR limit_pc,
 515                        CORE_ADDR end_pc,
 516                        struct frame_info *this_frame,
 517                        struct csky_unwind_cache *this_cache,
 518                        lr_type_t lr_type)
 519 {
 520   CORE_ADDR addr;
 521   unsigned int insn, rn;
 522   int framesize = 0;
 523   int stacksize = 0;
 524   int register_offsets[CSKY_NUM_GREGS_SAVED_GREGS];
 525   int insn_len;
 526   /* For adjusting fp.  */
 527   int is_fp_saved = 0;
 528   int adjust_fp = 0;
 529
 530   /* REGISTER_OFFSETS will contain offsets from the top of the frame
 531      (NOT the frame pointer) for the various saved registers, or -1
 532      if the register is not saved.  */
 533   for (rn = 0; rn < CSKY_NUM_GREGS_SAVED_GREGS; rn++)
 534     register_offsets[rn] = -1;
 535
 536   /* Analyze the prologue.  Things we determine from analyzing the
 537      prologue include the size of the frame and which registers are
 538      saved (and where).  */
 539   if (csky_debug)
 540     {
 541       fprintf_unfiltered (gdb_stdlog,
 542                           "csky: Scanning prologue: start_pc = 0x%x,"
 543                           "limit_pc = 0x%x\n", (unsigned int) start_pc,
 544                           (unsigned int) limit_pc);
 545     }
 546
 547   /* Default to 16 bit instruction.  */
 548   insn_len = 2;
 549   stacksize = 0;
 550   for (addr = start_pc; addr < limit_pc; addr += insn_len)
 551     {
 552       /* Get next insn.  */
 553       insn_len = csky_get_insn (gdbarch, addr, &insn);
 554
 555       /* Check if 32 bit.  */
 556       if (insn_len == 4)
 557         {
 558           /* subi32 sp,sp oimm12.  */
 559           if (CSKY_32_IS_SUBI0 (insn))
 560             {
 561               /* Got oimm12.  */
 562               int offset = CSKY_32_SUBI_IMM (insn);
 563               if (csky_debug)
 564                 {
 565                   fprintf_unfiltered (gdb_stdlog,
 566                                       "csky: got subi sp,%d; continuing\n",
 567                                       offset);
 568                 }
 569               stacksize += offset;
 570               continue;
 571             }
 572           /* stm32 ry-rz,(sp).  */
 573           else if (CSKY_32_IS_STMx0 (insn))
 574             {
 575               /* Spill register(s).  */
 576               int start_register;
 577               int reg_count;
 578               int offset;
 579
 580               /* BIG WARNING! The CKCore ABI does not restrict functions
 581                  to taking only one stack allocation.  Therefore, when
 582                  we save a register, we record the offset of where it was
 583                  saved relative to the current stacksize.  This will
 584                  then give an offset from the SP upon entry to our
 585                  function.  Remember, stacksize is NOT constant until
 586                  we're done scanning the prologue.  */
 587               start_register = CSKY_32_STM_VAL_REGNUM (insn);
 588               reg_count = CSKY_32_STM_SIZE (insn);
 589               if (csky_debug)
 590                 {
 591                   fprintf_unfiltered (gdb_stdlog,
 592                                       "csky: got stm r%d-r%d,(sp)\n",
 593                                       start_register,
 594                                       start_register + reg_count);
 595                 }
 596
 597               for (rn = start_register, offset = 0;
 598                    rn <= start_register + reg_count;
 599                    rn++, offset += 4)
 600                 {
 601                   register_offsets[rn] = stacksize - offset;
 602                   if (csky_debug)
 603                     {
 604                       fprintf_unfiltered (gdb_stdlog,
 605                                           "csky: r%d saved at 0x%x"
 606                                           " (offset %d)\n",
 607                                           rn, register_offsets[rn],
 608                                           offset);
 609                     }
 610                 }
 611               if (csky_debug)
 612                 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
 613               continue;
 614             }
 615           /* stw ry,(sp,disp).  */
 616           else if (CSKY_32_IS_STWx0 (insn))
 617             {
 618               /* Spill register: see note for IS_STM above.  */
 619               int disp;
 620
 621               rn = CSKY_32_ST_VAL_REGNUM (insn);
 622               disp = CSKY_32_ST_OFFSET (insn);
 623               register_offsets[rn] = stacksize - disp;
 624               if (csky_debug)
 625                 print_savedreg_msg (rn, register_offsets, true);
 626               continue;
 627             }
 628           else if (CSKY_32_IS_MOV_FP_SP (insn))
 629             {
 630               /* SP is saved to FP reg, means code afer prologue may
 631                  modify SP.  */
 632               is_fp_saved = 1;
 633               adjust_fp = stacksize;
 634               continue;
 635             }
 636           else if (CSKY_32_IS_MFCR_EPSR (insn))
 637             {
 638               unsigned int insn2;
 639               addr += 4;
 640               int mfcr_regnum = insn & 0x1f;
 641               insn_len = csky_get_insn (gdbarch, addr, &insn2);
 642               if (insn_len == 2)
 643                 {
 644                   int stw_regnum = (insn2 >> 5) & 0x7;
 645                   if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
 646                     {
 647                       int offset;
 648
 649                       /* CSKY_EPSR_REGNUM.  */
 650                       rn  = CSKY_NUM_GREGS;
 651                       offset = CSKY_16_STWx0_OFFSET (insn2);
 652                       register_offsets[rn] = stacksize - offset;
 653                       if (csky_debug)
 654                         print_savedreg_msg (rn, register_offsets, true);
 655                       continue;
 656                     }
 657                   break;
 658                 }
 659               else
 660                 {
 661                   /* INSN_LEN == 4.  */
 662                   int stw_regnum = (insn2 >> 21) & 0x1f;
 663                   if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
 664                     {
 665                       int offset;
 666
 667                       /* CSKY_EPSR_REGNUM.  */
 668                       rn  = CSKY_NUM_GREGS;
 669                       offset = CSKY_32_ST_OFFSET (insn2);
 670                       register_offsets[rn] = framesize - offset;
 671                       if (csky_debug)
 672                         print_savedreg_msg (rn, register_offsets, true);
 673                       continue;
 674                     }
 675                   break;
 676                 }
 677             }
 678           else if (CSKY_32_IS_MFCR_FPSR (insn))
 679             {
 680               unsigned int insn2;
 681               addr += 4;
 682               int mfcr_regnum = insn & 0x1f;
 683               insn_len = csky_get_insn (gdbarch, addr, &insn2);
 684               if (insn_len == 2)
 685                 {
 686                   int stw_regnum = (insn2 >> 5) & 0x7;
 687                   if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum
 688                                                  == stw_regnum))
 689                     {
 690                       int offset;
 691
 692                       /* CSKY_FPSR_REGNUM.  */
 693                       rn  = CSKY_NUM_GREGS + 1;
 694                       offset = CSKY_16_STWx0_OFFSET (insn2);
 695                       register_offsets[rn] = stacksize - offset;
 696                       if (csky_debug)
 697                         print_savedreg_msg (rn, register_offsets, true);
 698                       continue;
 699                     }
 700                   break;
 701                 }
 702               else
 703                 {
 704                   /* INSN_LEN == 4.  */
 705                   int stw_regnum = (insn2 >> 21) & 0x1f;
 706                   if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
 707                     {
 708                       int offset;
 709
 710                       /* CSKY_FPSR_REGNUM.  */
 711                       rn  = CSKY_NUM_GREGS + 1;
 712                       offset = CSKY_32_ST_OFFSET (insn2);
 713                       register_offsets[rn] = framesize - offset;
 714                       if (csky_debug)
 715                         print_savedreg_msg (rn, register_offsets, true);
 716                       continue;
 717                     }
 718                   break;
 719                 }
 720             }
 721           else if (CSKY_32_IS_MFCR_EPC (insn))
 722             {
 723               unsigned int insn2;
 724               addr += 4;
 725               int mfcr_regnum = insn & 0x1f;
 726               insn_len = csky_get_insn (gdbarch, addr, &insn2);
 727               if (insn_len == 2)
 728                 {
 729                   int stw_regnum = (insn2 >> 5) & 0x7;
 730                   if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
 731                     {
 732                       int offset;
 733
 734                       /* CSKY_EPC_REGNUM.  */
 735                       rn  = CSKY_NUM_GREGS + 2;
 736                       offset = CSKY_16_STWx0_OFFSET (insn2);
 737                       register_offsets[rn] = stacksize - offset;
 738                       if (csky_debug)
 739                         print_savedreg_msg (rn, register_offsets, true);
 740                       continue;
 741                     }
 742                   break;
 743                 }
 744               else
 745                 {
 746                   /* INSN_LEN == 4.  */
 747                   int stw_regnum = (insn2 >> 21) & 0x1f;
 748                   if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
 749                     {
 750                       int offset;
 751
 752                       /* CSKY_EPC_REGNUM.  */
 753                       rn  = CSKY_NUM_GREGS + 2;
 754                       offset = CSKY_32_ST_OFFSET (insn2);
 755                       register_offsets[rn] = framesize - offset;
 756                       if (csky_debug)
 757                         print_savedreg_msg (rn, register_offsets, true);
 758                       continue;
 759                     }
 760                   break;
 761                 }
 762             }
 763           else if (CSKY_32_IS_MFCR_FPC (insn))
 764             {
 765               unsigned int insn2;
 766               addr += 4;
 767               int mfcr_regnum = insn & 0x1f;
 768               insn_len = csky_get_insn (gdbarch, addr, &insn2);
 769               if (insn_len == 2)
 770                 {
 771                   int stw_regnum = (insn2 >> 5) & 0x7;
 772                   if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
 773                     {
 774                       int offset;
 775
 776                       /* CSKY_FPC_REGNUM.  */
 777                       rn  = CSKY_NUM_GREGS + 3;
 778                       offset = CSKY_16_STWx0_OFFSET (insn2);
 779                       register_offsets[rn] = stacksize - offset;
 780                       if (csky_debug)
 781                         print_savedreg_msg (rn, register_offsets, true);
 782                       continue;
 783                     }
 784                   break;
 785                 }
 786               else
 787                 {
 788                   /* INSN_LEN == 4.  */
 789                   int stw_regnum = (insn2 >> 21) & 0x1f;
 790                   if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
 791                     {
 792                       int offset;
 793
 794                       /* CSKY_FPC_REGNUM.  */
 795                       rn  = CSKY_NUM_GREGS + 3;
 796                       offset = CSKY_32_ST_OFFSET (insn2);
 797                       register_offsets[rn] = framesize - offset;
 798                       if (csky_debug)
 799                         print_savedreg_msg (rn, register_offsets, true);
 800                       continue;
 801                     }
 802                   break;
 803                 }
 804             }
 805           else if (CSKY_32_IS_PUSH (insn))
 806             {
 807               /* Push for 32_bit.  */
 808               int offset = 0;
 809               if (CSKY_32_IS_PUSH_R29 (insn))
 810                 {
 811                   stacksize += 4;
 812                   register_offsets[29] = stacksize;
 813                   if (csky_debug)
 814                     print_savedreg_msg (29, register_offsets, false);
 815                   offset += 4;
 816                 }
 817               if (CSKY_32_PUSH_LIST2 (insn))
 818                 {
 819                   int num = CSKY_32_PUSH_LIST2 (insn);
 820                   int tmp = 0;
 821                   stacksize += num * 4;
 822                   offset += num * 4;
 823                   if (csky_debug)
 824                     {
 825                       fprintf_unfiltered (gdb_stdlog,
 826                                           "csky: push regs_array: r16-r%d\n",
 827                                           16 + num - 1);
 828                     }
 829                   for (rn = 16; rn <= 16 + num - 1; rn++)
 830                     {
 831                        register_offsets[rn] = stacksize - tmp;
 832                        if (csky_debug)
 833                          {
 834                            fprintf_unfiltered (gdb_stdlog,
 835                                                "csky: r%d saved at 0x%x"
 836                                                " (offset %d)\n", rn,
 837                                                register_offsets[rn], tmp);
 838                          }
 839                        tmp += 4;
 840                     }
 841                 }
 842               if (CSKY_32_IS_PUSH_R15 (insn))
 843                 {
 844                   stacksize += 4;
 845                   register_offsets[15] = stacksize;
 846                   if (csky_debug)
 847                     print_savedreg_msg (15, register_offsets, false);
 848                   offset += 4;
 849                 }
 850               if (CSKY_32_PUSH_LIST1 (insn))
 851                 {
 852                   int num = CSKY_32_PUSH_LIST1 (insn);
 853                   int tmp = 0;
 854                   stacksize += num * 4;
 855                   offset += num * 4;
 856                   if (csky_debug)
 857                     {
 858                       fprintf_unfiltered (gdb_stdlog,
 859                                           "csky: push regs_array: r4-r%d\n",
 860                                           4 + num - 1);
 861                     }
 862                   for (rn = 4; rn <= 4 + num - 1; rn++)
 863                     {
 864                        register_offsets[rn] = stacksize - tmp;
 865                        if (csky_debug)
 866                          {
 867                            fprintf_unfiltered (gdb_stdlog,
 868                                                "csky: r%d saved at 0x%x"
 869                                                " (offset %d)\n", rn,
 870                                                register_offsets[rn], tmp);
 871                          }
 872                         tmp += 4;
 873                     }
 874                 }
 875
 876               framesize = stacksize;
 877               if (csky_debug)
 878                 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
 879               continue;
 880             }
 881           else if (CSKY_32_IS_LRW4 (insn) || CSKY_32_IS_MOVI4 (insn)
 882                    || CSKY_32_IS_MOVIH4 (insn) || CSKY_32_IS_BMASKI4 (insn))
 883             {
 884               int adjust = 0;
 885               int offset = 0;
 886               unsigned int insn2;
 887
 888               if (csky_debug)
 889                 {
 890                   fprintf_unfiltered (gdb_stdlog,
 891                                       "csky: looking at large frame\n");
 892                 }
 893               if (CSKY_32_IS_LRW4 (insn))
 894                 {
 895                   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 896                   int literal_addr = (addr + ((insn & 0xffff) << 2))
 897                                      & 0xfffffffc;
 898                   adjust = read_memory_unsigned_integer (literal_addr, 4,
 899                                                          byte_order);
 900                 }
 901               else if (CSKY_32_IS_MOVI4 (insn))
 902                 adjust = (insn  & 0xffff);
 903               else if (CSKY_32_IS_MOVIH4 (insn))
 904                 adjust = (insn & 0xffff) << 16;
 905               else
 906                 {
 907                   /* CSKY_32_IS_BMASKI4 (insn).  */
 908                   adjust = (1 << (((insn & 0x3e00000) >> 21) + 1)) - 1;
 909                 }
 910
 911               if (csky_debug)
 912                 {
 913                   fprintf_unfiltered (gdb_stdlog,
 914                                       "csky: base stacksize=0x%x\n", adjust);
 915
 916                   /* May have zero or more insns which modify r4.  */
 917                   fprintf_unfiltered (gdb_stdlog,
 918                                       "csky: looking for r4 adjusters...\n");
 919                 }
 920
 921               offset = 4;
 922               insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
 923               while (CSKY_IS_R4_ADJUSTER (insn2))
 924                 {
 925                   if (CSKY_32_IS_ADDI4 (insn2))
 926                     {
 927                       int imm = (insn2 & 0xfff) + 1;
 928                       adjust += imm;
 929                       if (csky_debug)
 930                         {
 931                           fprintf_unfiltered (gdb_stdlog,
 932                                               "csky: addi r4,%d\n", imm);
 933                         }
 934                     }
 935                   else if (CSKY_32_IS_SUBI4 (insn2))
 936                     {
 937                       int imm = (insn2 & 0xfff) + 1;
 938                       adjust -= imm;
 939                       if (csky_debug)
 940                         {
 941                           fprintf_unfiltered (gdb_stdlog,
 942                                               "csky: subi r4,%d\n", imm);
 943                         }
 944                     }
 945                   else if (CSKY_32_IS_NOR4 (insn2))
 946                     {
 947                       adjust = ~adjust;
 948                       if (csky_debug)
 949                         {
 950                           fprintf_unfiltered (gdb_stdlog,
 951                                               "csky: nor r4,r4,r4\n");
 952                         }
 953                     }
 954                   else if (CSKY_32_IS_ROTLI4 (insn2))
 955                     {
 956                       int imm = ((insn2 >> 21) & 0x1f);
 957                       int temp = adjust >> (32 - imm);
 958                       adjust <<= imm;
 959                       adjust |= temp;
 960                       if (csky_debug)
 961                         {
 962                           fprintf_unfiltered (gdb_stdlog,
 963                                               "csky: rotli r4,r4,%d\n", imm);
 964                         }
 965                     }
 966                   else if (CSKY_32_IS_LISI4 (insn2))
 967                     {
 968                       int imm = ((insn2 >> 21) & 0x1f);
 969                       adjust <<= imm;
 970                       if (csky_debug)
 971                         {
 972                           fprintf_unfiltered (gdb_stdlog,
 973                                               "csky: lsli r4,r4,%d\n", imm);
 974                         }
 975                     }
 976                   else if (CSKY_32_IS_BSETI4 (insn2))
 977                     {
 978                       int imm = ((insn2 >> 21) & 0x1f);
 979                       adjust |= (1 << imm);
 980                       if (csky_debug)
 981                         {
 982                           fprintf_unfiltered (gdb_stdlog,
 983                                               "csky: bseti r4,r4 %d\n", imm);
 984                         }
 985                     }
 986                   else if (CSKY_32_IS_BCLRI4 (insn2))
 987                     {
 988                       int imm = ((insn2 >> 21) & 0x1f);
 989                       adjust &= ~(1 << imm);
 990                       if (csky_debug)
 991                         {
 992                           fprintf_unfiltered (gdb_stdlog,
 993                                               "csky: bclri r4,r4 %d\n", imm);
 994                         }
 995                     }
 996                   else if (CSKY_32_IS_IXH4 (insn2))
 997                     {
 998                       adjust *= 3;
 999                       if (csky_debug)
1000                         {
1001                           fprintf_unfiltered (gdb_stdlog,
1002                                               "csky: ixh r4,r4,r4\n");
1003                         }
1004                     }
1005                   else if (CSKY_32_IS_IXW4 (insn2))
1006                     {
1007                       adjust *= 5;
1008                       if (csky_debug)
1009                         {
1010                           fprintf_unfiltered (gdb_stdlog,
1011                                               "csky: ixw r4,r4,r4\n");
1012                         }
1013                     }
1014                   else if (CSKY_16_IS_ADDI4 (insn2))
1015                     {
1016                       int imm = (insn2 & 0xff) + 1;
1017                       adjust += imm;
1018                       if (csky_debug)
1019                         {
1020                           fprintf_unfiltered (gdb_stdlog,
1021                                               "csky: addi r4,%d\n", imm);
1022                         }
1023                     }
1024                   else if (CSKY_16_IS_SUBI4 (insn2))
1025                     {
1026                       int imm = (insn2 & 0xff) + 1;
1027                       adjust -= imm;
1028                       if (csky_debug)
1029                         {
1030                           fprintf_unfiltered (gdb_stdlog,
1031                                               "csky: subi r4,%d\n", imm);
1032                         }
1033                     }
1034                   else if (CSKY_16_IS_NOR4 (insn2))
1035                     {
1036                       adjust = ~adjust;
1037                       if (csky_debug)
1038                         {
1039                           fprintf_unfiltered (gdb_stdlog,
1040                                               "csky: nor r4,r4\n");
1041                         }
1042                     }
1043                   else if (CSKY_16_IS_BSETI4 (insn2))
1044                     {
1045                       int imm = (insn2 & 0x1f);
1046                       adjust |= (1 << imm);
1047                       if (csky_debug)
1048                         {
1049                           fprintf_unfiltered (gdb_stdlog,
1050                                               "csky: bseti r4, %d\n", imm);
1051                         }
1052                     }
1053                   else if (CSKY_16_IS_BCLRI4 (insn2))
1054                     {
1055                       int imm = (insn2 & 0x1f);
1056                       adjust &= ~(1 << imm);
1057                       if (csky_debug)
1058                         {
1059                           fprintf_unfiltered (gdb_stdlog,
1060                                               "csky: bclri r4, %d\n", imm);
1061                         }
1062                     }
1063                   else if (CSKY_16_IS_LSLI4 (insn2))
1064                     {
1065                       int imm = (insn2 & 0x1f);
1066                       adjust <<= imm;
1067                       if (csky_debug)
1068                         {
1069                           fprintf_unfiltered (gdb_stdlog,
1070                                               "csky: lsli r4,r4, %d\n", imm);
1071                         }
1072                     }
1073
1074                   offset += insn_len;
1075                   insn_len =  csky_get_insn (gdbarch, addr + offset, &insn2);
1076                 };
1077
1078               if (csky_debug)
1079                 {
1080                   fprintf_unfiltered (gdb_stdlog, "csky: done looking for"
1081                                       " r4 adjusters\n");
1082                 }
1083
1084               /* If the next insn adjusts the stack pointer, we keep
1085                  everything; if not, we scrap it and we've found the
1086                  end of the prologue.  */
1087               if (CSKY_IS_SUBU4 (insn2))
1088                 {
1089                   addr += offset;
1090                   stacksize += adjust;
1091                   if (csky_debug)
1092                     {
1093                       fprintf_unfiltered (gdb_stdlog,
1094                                           "csky: found stack adjustment of"
1095                                           " 0x%x bytes.\n", adjust);
1096                       fprintf_unfiltered (gdb_stdlog,
1097                                           "csky: skipping to new address %s\n",
1098                                           core_addr_to_string_nz (addr));
1099                       fprintf_unfiltered (gdb_stdlog,
1100                                           "csky: continuing\n");
1101                     }
1102                   continue;
1103                 }
1104
1105               /* None of these instructions are prologue, so don't touch
1106                  anything.  */
1107               if (csky_debug)
1108                 {
1109                   fprintf_unfiltered (gdb_stdlog,
1110                                       "csky: no subu sp,sp,r4; NOT altering"
1111                                       " stacksize.\n");
1112                 }
1113               break;
1114             }
1115         }
1116       else
1117         {
1118           /* insn_len != 4.  */
1119
1120           /* subi.sp sp,disp.  */
1121           if (CSKY_16_IS_SUBI0 (insn))
1122             {
1123               int offset = CSKY_16_SUBI_IMM (insn);
1124               if (csky_debug)
1125                 {
1126                   fprintf_unfiltered (gdb_stdlog,
1127                                       "csky: got subi r0,%d; continuing\n",
1128                                       offset);
1129                 }
1130               stacksize += offset;
1131               continue;
1132             }
1133           /* stw.16 rz,(sp,disp).  */
1134           else if (CSKY_16_IS_STWx0 (insn))
1135             {
1136               /* Spill register: see note for IS_STM above.  */
1137               int disp;
1138
1139               rn = CSKY_16_ST_VAL_REGNUM (insn);
1140               disp = CSKY_16_ST_OFFSET (insn);
1141               register_offsets[rn] = stacksize - disp;
1142               if (csky_debug)
1143                 print_savedreg_msg (rn, register_offsets, true);
1144               continue;
1145             }
1146           else if (CSKY_16_IS_MOV_FP_SP (insn))
1147             {
1148               /* SP is saved to FP reg, means prologue may modify SP.  */
1149               is_fp_saved = 1;
1150               adjust_fp = stacksize;
1151               continue;
1152             }
1153           else if (CSKY_16_IS_PUSH (insn))
1154             {
1155               /* Push for 16_bit.  */
1156               int offset = 0;
1157               if (CSKY_16_IS_PUSH_R15 (insn))
1158                 {
1159                   stacksize += 4;
1160                   register_offsets[15] = stacksize;
1161                   if (csky_debug)
1162                     print_savedreg_msg (15, register_offsets, false);
1163                   offset += 4;
1164                  }
1165               if (CSKY_16_PUSH_LIST1 (insn))
1166                 {
1167                   int num = CSKY_16_PUSH_LIST1 (insn);
1168                   int tmp = 0;
1169                   stacksize += num * 4;
1170                   offset += num * 4;
1171                   if (csky_debug)
1172                     {
1173                       fprintf_unfiltered (gdb_stdlog,
1174                                           "csky: push regs_array: r4-r%d\n",
1175                                           4 + num - 1);
1176                     }
1177                   for (rn = 4; rn <= 4 + num - 1; rn++)
1178                     {
1179                        register_offsets[rn] = stacksize - tmp;
1180                        if (csky_debug)
1181                          {
1182                            fprintf_unfiltered (gdb_stdlog,
1183                                                "csky: r%d saved at 0x%x"
1184                                                " (offset %d)\n", rn,
1185                                                register_offsets[rn], offset);
1186                          }
1187                        tmp += 4;
1188                     }
1189                 }
1190
1191               framesize = stacksize;
1192               if (csky_debug)
1193                 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
1194               continue;
1195             }
1196           else if (CSKY_16_IS_LRW4 (insn) || CSKY_16_IS_MOVI4 (insn))
1197             {
1198               int adjust = 0;
1199               unsigned int insn2;
1200
1201               if (csky_debug)
1202                 {
1203                   fprintf_unfiltered (gdb_stdlog,
1204                                       "csky: looking at large frame\n");
1205                 }
1206               if (CSKY_16_IS_LRW4 (insn))
1207                 {
1208                   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1209                   int offset = ((insn & 0x300) >> 3) | (insn & 0x1f);
1210                   int literal_addr = (addr + ( offset << 2)) & 0xfffffffc;
1211                   adjust = read_memory_unsigned_integer (literal_addr, 4,
1212                                                          byte_order);
1213                 }
1214               else
1215                 {
1216                   /* CSKY_16_IS_MOVI4 (insn).  */
1217                   adjust = (insn  & 0xff);
1218                 }
1219
1220               if (csky_debug)
1221                 {
1222                   fprintf_unfiltered (gdb_stdlog,
1223                                       "csky: base stacksize=0x%x\n", adjust);
1224                 }
1225
1226               /* May have zero or more instructions which modify r4.  */
1227               if (csky_debug)
1228                 {
1229                   fprintf_unfiltered (gdb_stdlog,
1230                                       "csky: looking for r4 adjusters...\n");
1231                 }
1232               int offset = 2;
1233               insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1234               while (CSKY_IS_R4_ADJUSTER (insn2))
1235                 {
1236                   if (CSKY_32_IS_ADDI4 (insn2))
1237                     {
1238                       int imm = (insn2 & 0xfff) + 1;
1239                       adjust += imm;
1240                       if (csky_debug)
1241                         {
1242                           fprintf_unfiltered (gdb_stdlog,
1243                                               "csky: addi r4,%d\n", imm);
1244                         }
1245                     }
1246                   else if (CSKY_32_IS_SUBI4 (insn2))
1247                     {
1248                       int imm = (insn2 & 0xfff) + 1;
1249                       adjust -= imm;
1250                       if (csky_debug)
1251                         {
1252                           fprintf_unfiltered (gdb_stdlog,
1253                                               "csky: subi r4,%d\n", imm);
1254                         }
1255                     }
1256                   else if (CSKY_32_IS_NOR4 (insn2))
1257                     {
1258                       adjust = ~adjust;
1259                       if (csky_debug)
1260                         {
1261                           fprintf_unfiltered (gdb_stdlog,
1262                                               "csky: nor r4,r4,r4\n");
1263                         }
1264                     }
1265                   else if (CSKY_32_IS_ROTLI4 (insn2))
1266                     {
1267                       int imm = ((insn2 >> 21) & 0x1f);
1268                       int temp = adjust >> (32 - imm);
1269                       adjust <<= imm;
1270                       adjust |= temp;
1271                       if (csky_debug)
1272                         {
1273                           fprintf_unfiltered (gdb_stdlog,
1274                                               "csky: rotli r4,r4,%d\n", imm);
1275                         }
1276                     }
1277                   else if (CSKY_32_IS_LISI4 (insn2))
1278                     {
1279                       int imm = ((insn2 >> 21) & 0x1f);
1280                       adjust <<= imm;
1281                       if (csky_debug)
1282                         {
1283                           fprintf_unfiltered (gdb_stdlog,
1284                                               "csky: lsli r4,r4,%d\n", imm);
1285                         }
1286                     }
1287                   else if (CSKY_32_IS_BSETI4 (insn2))
1288                     {
1289                       int imm = ((insn2 >> 21) & 0x1f);
1290                       adjust |= (1 << imm);
1291                       if (csky_debug)
1292                         {
1293                           fprintf_unfiltered (gdb_stdlog,
1294                                               "csky: bseti r4,r4 %d\n", imm);
1295                         }
1296                     }
1297                   else if (CSKY_32_IS_BCLRI4 (insn2))
1298                     {
1299                       int imm = ((insn2 >> 21) & 0x1f);
1300                       adjust &= ~(1 << imm);
1301                       if (csky_debug)
1302                         {
1303                           fprintf_unfiltered (gdb_stdlog,
1304                                               "csky: bclri r4,r4 %d\n", imm);
1305                         }
1306                     }
1307                   else if (CSKY_32_IS_IXH4 (insn2))
1308                     {
1309                       adjust *= 3;
1310                       if (csky_debug)
1311                         {
1312                           fprintf_unfiltered (gdb_stdlog,
1313                                               "csky: ixh r4,r4,r4\n");
1314                         }
1315                     }
1316                   else if (CSKY_32_IS_IXW4 (insn2))
1317                     {
1318                       adjust *= 5;
1319                       if (csky_debug)
1320                         {
1321                           fprintf_unfiltered (gdb_stdlog,
1322                                               "csky: ixw r4,r4,r4\n");
1323                         }
1324                     }
1325                   else if (CSKY_16_IS_ADDI4 (insn2))
1326                     {
1327                       int imm = (insn2 & 0xff) + 1;
1328                       adjust += imm;
1329                       if (csky_debug)
1330                         {
1331                           fprintf_unfiltered (gdb_stdlog,
1332                                               "csky: addi r4,%d\n", imm);
1333                         }
1334                     }
1335                   else if (CSKY_16_IS_SUBI4 (insn2))
1336                     {
1337                       int imm = (insn2 & 0xff) + 1;
1338                       adjust -= imm;
1339                       if (csky_debug)
1340                         {
1341                           fprintf_unfiltered (gdb_stdlog,
1342                                               "csky: subi r4,%d\n", imm);
1343                         }
1344                     }
1345                   else if (CSKY_16_IS_NOR4 (insn2))
1346                     {
1347                       adjust = ~adjust;
1348                       if (csky_debug)
1349                         {
1350                           fprintf_unfiltered (gdb_stdlog,
1351                                               "csky: nor r4,r4\n");
1352                         }
1353                     }
1354                   else if (CSKY_16_IS_BSETI4 (insn2))
1355                     {
1356                       int imm = (insn2 & 0x1f);
1357                       adjust |= (1 << imm);
1358                       if (csky_debug)
1359                         {
1360                           fprintf_unfiltered (gdb_stdlog,
1361                                               "csky: bseti r4, %d\n", imm);
1362                         }
1363                     }
1364                   else if (CSKY_16_IS_BCLRI4 (insn2))
1365                     {
1366                       int imm = (insn2 & 0x1f);
1367                       adjust &= ~(1 << imm);
1368                       if (csky_debug)
1369                         {
1370                           fprintf_unfiltered (gdb_stdlog,
1371                                               "csky: bclri r4, %d\n", imm);
1372                         }
1373                     }
1374                   else if (CSKY_16_IS_LSLI4 (insn2))
1375                     {
1376                       int imm = (insn2 & 0x1f);
1377                       adjust <<= imm;
1378                       if (csky_debug)
1379                         {
1380                           fprintf_unfiltered (gdb_stdlog,
1381                                               "csky: lsli r4,r4, %d\n", imm);
1382                         }
1383                     }
1384
1385                   offset += insn_len;
1386                   insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1387                 };
1388
1389               if (csky_debug)
1390                 {
1391                   fprintf_unfiltered (gdb_stdlog, "csky: "
1392                                       "done looking for r4 adjusters\n");
1393                 }
1394
1395               /* If the next instruction adjusts the stack pointer, we keep
1396                  everything; if not, we scrap it and we've found the end
1397                  of the prologue.  */
1398               if (CSKY_IS_SUBU4 (insn2))
1399                 {
1400                   addr += offset;
1401                   stacksize += adjust;
1402                   if (csky_debug)
1403                     {
1404                       fprintf_unfiltered (gdb_stdlog, "csky: "
1405                                           "found stack adjustment of 0x%x"
1406                                           " bytes.\n", adjust);
1407                       fprintf_unfiltered (gdb_stdlog, "csky: "
1408                                           "skipping to new address %s\n",
1409                                           core_addr_to_string_nz (addr));
1410                       fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
1411                     }
1412                   continue;
1413                 }
1414
1415               /* None of these instructions are prologue, so don't touch
1416                  anything.  */
1417               if (csky_debug)
1418                 {
1419                   fprintf_unfiltered (gdb_stdlog, "csky: no subu sp,r4; "
1420                                       "NOT altering stacksize.\n");
1421                 }
1422               break;
1423             }
1424         }
1425
1426       /* This is not a prologue instruction, so stop here.  */
1427       if (csky_debug)
1428         {
1429           fprintf_unfiltered (gdb_stdlog, "csky: insn is not a prologue"
1430                               " insn -- ending scan\n");
1431         }
1432       break;
1433     }
1434
1435   if (this_cache)
1436     {
1437       CORE_ADDR unwound_fp;
1438       enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1439       this_cache->framesize = framesize;
1440
1441       if (is_fp_saved)
1442         {
1443           this_cache->framereg = CSKY_FP_REGNUM;
1444           unwound_fp = get_frame_register_unsigned (this_frame,
1445                                                     this_cache->framereg);
1446           this_cache->prev_sp = unwound_fp + adjust_fp;
1447         }
1448       else
1449         {
1450           this_cache->framereg = CSKY_SP_REGNUM;
1451           unwound_fp = get_frame_register_unsigned (this_frame,
1452                                                     this_cache->framereg);
1453           this_cache->prev_sp = unwound_fp + stacksize;
1454         }
1455
1456       /* Note where saved registers are stored.  The offsets in
1457          REGISTER_OFFSETS are computed relative to the top of the frame.  */
1458       for (rn = 0; rn < CSKY_NUM_GREGS; rn++)
1459         {
1460           if (register_offsets[rn] >= 0)
1461             {
1462               this_cache->saved_regs[rn].addr
1463                 = this_cache->prev_sp - register_offsets[rn];
1464               if (csky_debug)
1465                 {
1466                   CORE_ADDR rn_value = read_memory_unsigned_integer (
1467                     this_cache->saved_regs[rn].addr, 4, byte_order);
1468                   fprintf_unfiltered (gdb_stdlog, "Saved register %s "
1469                                       "stored at 0x%08lx, value=0x%08lx\n",
1470                                       csky_register_names[rn],
1471                                       (unsigned long)
1472                                         this_cache->saved_regs[rn].addr,
1473                                       (unsigned long) rn_value);
1474                 }
1475             }
1476         }
1477       if (lr_type == LR_TYPE_EPC)
1478         {
1479           /* rte || epc .  */
1480           this_cache->saved_regs[CSKY_PC_REGNUM]
1481             = this_cache->saved_regs[CSKY_EPC_REGNUM];
1482         }
1483       else if (lr_type == LR_TYPE_FPC)
1484         {
1485           /* rfi || fpc .  */
1486           this_cache->saved_regs[CSKY_PC_REGNUM]
1487             = this_cache->saved_regs[CSKY_FPC_REGNUM];
1488         }
1489       else
1490         {
1491           this_cache->saved_regs[CSKY_PC_REGNUM]
1492             = this_cache->saved_regs[CSKY_LR_REGNUM];
1493         }
1494     }
1495
1496   return addr;
1497 }
1498
1499 /* Detect whether PC is at a point where the stack frame has been
1500    destroyed.  */
1501
1502 static int
1503 csky_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1504 {
1505   unsigned int insn;
1506   CORE_ADDR addr;
1507   CORE_ADDR func_start, func_end;
1508
1509   if (!find_pc_partial_function (pc, NULL, &func_start, &func_end))
1510     return 0;
1511
1512   bool fp_saved = false;
1513   int insn_len;
1514   for (addr = func_start; addr < func_end; addr += insn_len)
1515     {
1516       /* Get next insn.  */
1517       insn_len = csky_get_insn (gdbarch, addr, &insn);
1518
1519       if (insn_len == 2)
1520         {
1521           /* Is sp is saved to fp.  */
1522           if (CSKY_16_IS_MOV_FP_SP (insn))
1523             fp_saved = true;
1524           /* If sp was saved to fp and now being restored from
1525              fp then it indicates the start of epilog.  */
1526           else if (fp_saved && CSKY_16_IS_MOV_SP_FP (insn))
1527             return pc >= addr;
1528         }
1529     }
1530   return 0;
1531 }
1532
1533 /* Implement the skip_prologue gdbarch hook.  */
1534
1535 static CORE_ADDR
1536 csky_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1537 {
1538   CORE_ADDR func_addr, func_end;
1539   struct symtab_and_line sal;
1540   const int default_search_limit = 128;
1541
1542   /* See if we can find the end of the prologue using the symbol table.  */
1543   if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
1544     {
1545       CORE_ADDR post_prologue_pc
1546         = skip_prologue_using_sal (gdbarch, func_addr);
1547
1548       if (post_prologue_pc != 0)
1549         return std::max (pc, post_prologue_pc);
1550     }
1551   else
1552     func_end = pc + default_search_limit;
1553
1554   /* Find the end of prologue.  Default lr_type.  */
1555   return csky_analyze_prologue (gdbarch, pc, func_end, func_end,
1556                                 NULL, NULL, LR_TYPE_R15);
1557 }
1558
1559 /* Implement the breakpoint_kind_from_pc gdbarch method.  */
1560
1561 static int
1562 csky_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
1563 {
1564   if (csky_pc_is_csky16 (gdbarch, *pcptr))
1565     return CSKY_INSN_SIZE16;
1566   else
1567     return CSKY_INSN_SIZE32;
1568 }
1569
1570 /* Implement the sw_breakpoint_from_kind gdbarch method.  */
1571
1572 static const gdb_byte *
1573 csky_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
1574 {
1575   *size = kind;
1576   if (kind == CSKY_INSN_SIZE16)
1577     {
1578       static gdb_byte csky_16_breakpoint[] = { 0, 0 };
1579       return csky_16_breakpoint;
1580     }
1581   else
1582     {
1583       static gdb_byte csky_32_breakpoint[] = { 0, 0, 0, 0 };
1584       return csky_32_breakpoint;
1585     }
1586 }
1587
1588 /* Implement the memory_insert_breakpoint gdbarch method.  */
1589
1590 static int
1591 csky_memory_insert_breakpoint (struct gdbarch *gdbarch,
1592                                struct bp_target_info *bp_tgt)
1593 {
1594   int val;
1595   const unsigned char *bp;
1596   gdb_byte bp_write_record1[] = { 0, 0, 0, 0 };
1597   gdb_byte bp_write_record2[] = { 0, 0, 0, 0 };
1598   gdb_byte bp_record[] = { 0, 0, 0, 0 };
1599
1600   /* Sanity-check bp_address.  */
1601   if (bp_tgt->reqstd_address % 2)
1602     warning (_("Invalid breakpoint address 0x%x is an odd number."),
1603              (unsigned int) bp_tgt->reqstd_address);
1604   scoped_restore restore_memory
1605     = make_scoped_restore_show_memory_breakpoints (1);
1606
1607   /* Determine appropriate breakpoint_kind for this address.  */
1608   bp_tgt->kind = csky_breakpoint_kind_from_pc (gdbarch,
1609                                                &bp_tgt->reqstd_address);
1610
1611   /* Save the memory contents.  */
1612   bp_tgt->shadow_len = bp_tgt->kind;
1613
1614   /* Fill bp_tgt->placed_address.  */
1615   bp_tgt->placed_address = bp_tgt->reqstd_address;
1616
1617   if (bp_tgt->kind == CSKY_INSN_SIZE16)
1618     {
1619       if ((bp_tgt->reqstd_address % 4) == 0)
1620         {
1621           /* Read two bytes.  */
1622           val = target_read_memory (bp_tgt->reqstd_address,
1623                                     bp_tgt->shadow_contents, 2);
1624           if (val)
1625             return val;
1626
1627           /* Read two bytes.  */
1628           val = target_read_memory (bp_tgt->reqstd_address + 2,
1629                                     bp_record, 2);
1630           if (val)
1631             return val;
1632
1633           /* Write the breakpoint.  */
1634           bp_write_record1[2] = bp_record[0];
1635           bp_write_record1[3] = bp_record[1];
1636           bp = bp_write_record1;
1637           val = target_write_raw_memory (bp_tgt->reqstd_address, bp,
1638                                          CSKY_WR_BKPT_MODE);
1639         }
1640       else
1641         {
1642           val = target_read_memory (bp_tgt->reqstd_address,
1643                                     bp_tgt->shadow_contents, 2);
1644           if (val)
1645             return val;
1646
1647           val = target_read_memory (bp_tgt->reqstd_address - 2,
1648                                     bp_record, 2);
1649           if (val)
1650             return val;
1651
1652           /* Write the breakpoint.  */
1653           bp_write_record1[0] = bp_record[0];
1654           bp_write_record1[1] = bp_record[1];
1655           bp = bp_write_record1;
1656           val = target_write_raw_memory (bp_tgt->reqstd_address - 2,
1657                                          bp, CSKY_WR_BKPT_MODE);
1658         }
1659     }
1660   else
1661     {
1662       if (bp_tgt->placed_address % 4 == 0)
1663         {
1664           val = target_read_memory (bp_tgt->reqstd_address,
1665                                     bp_tgt->shadow_contents,
1666                                     CSKY_WR_BKPT_MODE);
1667           if (val)
1668             return val;
1669
1670           /* Write the breakpoint.  */
1671           bp = bp_write_record1;
1672           val = target_write_raw_memory (bp_tgt->reqstd_address,
1673                                          bp, CSKY_WR_BKPT_MODE);
1674         }
1675       else
1676         {
1677           val = target_read_memory (bp_tgt->reqstd_address,
1678                                     bp_tgt->shadow_contents,
1679                                     CSKY_WR_BKPT_MODE);
1680           if (val)
1681             return val;
1682
1683           val = target_read_memory (bp_tgt->reqstd_address - 2,
1684                                     bp_record, 2);
1685           if (val)
1686             return val;
1687
1688           val = target_read_memory (bp_tgt->reqstd_address + 4,
1689                                     bp_record + 2, 2);
1690           if (val)
1691             return val;
1692
1693           bp_write_record1[0] = bp_record[0];
1694           bp_write_record1[1] = bp_record[1];
1695           bp_write_record2[2] = bp_record[2];
1696           bp_write_record2[3] = bp_record[3];
1697
1698           /* Write the breakpoint.  */
1699           bp = bp_write_record1;
1700           val = target_write_raw_memory (bp_tgt->reqstd_address - 2, bp,
1701                                          CSKY_WR_BKPT_MODE);
1702           if (val)
1703             return val;
1704
1705           /* Write the breakpoint.  */
1706           bp = bp_write_record2;
1707           val = target_write_raw_memory (bp_tgt->reqstd_address + 2, bp,
1708                                          CSKY_WR_BKPT_MODE);
1709         }
1710     }
1711   return val;
1712 }
1713
1714 /* Restore the breakpoint shadow_contents to the target.  */
1715
1716 static int
1717 csky_memory_remove_breakpoint (struct gdbarch *gdbarch,
1718                                struct bp_target_info *bp_tgt)
1719 {
1720   int val;
1721   gdb_byte bp_record[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
1722   /* Different for shadow_len 2 or 4.  */
1723   if (bp_tgt->shadow_len == 2)
1724     {
1725       /* Do word-sized writes on word-aligned boundaries and read
1726          padding bytes as necessary.  */
1727       if (bp_tgt->reqstd_address % 4 == 0)
1728         {
1729           val = target_read_memory (bp_tgt->reqstd_address + 2,
1730                                     bp_record + 2, 2);
1731           if (val)
1732             return val;
1733           bp_record[0] = bp_tgt->shadow_contents[0];
1734           bp_record[1] = bp_tgt->shadow_contents[1];
1735           return target_write_raw_memory (bp_tgt->reqstd_address,
1736                                           bp_record, CSKY_WR_BKPT_MODE);
1737         }
1738       else
1739         {
1740           val = target_read_memory (bp_tgt->reqstd_address - 2,
1741                                     bp_record, 2);
1742           if (val)
1743             return val;
1744           bp_record[2] = bp_tgt->shadow_contents[0];
1745           bp_record[3] = bp_tgt->shadow_contents[1];
1746           return target_write_raw_memory (bp_tgt->reqstd_address - 2,
1747                                           bp_record, CSKY_WR_BKPT_MODE);
1748         }
1749     }
1750   else
1751     {
1752       /* Do word-sized writes on word-aligned boundaries and read
1753          padding bytes as necessary.  */
1754       if (bp_tgt->placed_address % 4 == 0)
1755         {
1756           return target_write_raw_memory (bp_tgt->reqstd_address,
1757                                           bp_tgt->shadow_contents,
1758                                           CSKY_WR_BKPT_MODE);
1759         }
1760       else
1761         {
1762           val = target_read_memory (bp_tgt->reqstd_address - 2,
1763                                     bp_record, 2);
1764           if (val)
1765             return val;
1766           val = target_read_memory (bp_tgt->reqstd_address + 4,
1767                                     bp_record+6, 2);
1768           if (val)
1769             return val;
1770
1771           bp_record[2] = bp_tgt->shadow_contents[0];
1772           bp_record[3] = bp_tgt->shadow_contents[1];
1773           bp_record[4] = bp_tgt->shadow_contents[2];
1774           bp_record[5] = bp_tgt->shadow_contents[3];
1775
1776           return target_write_raw_memory (bp_tgt->reqstd_address - 2,
1777                                           bp_record,
1778                                           CSKY_WR_BKPT_MODE * 2);
1779         }
1780     }
1781 }
1782
1783 /* Determine link register type.  */
1784
1785 static lr_type_t
1786 csky_analyze_lr_type (struct gdbarch *gdbarch,
1787                       CORE_ADDR start_pc, CORE_ADDR end_pc)
1788 {
1789   CORE_ADDR addr;
1790   unsigned int insn, insn_len;
1791   insn_len = 2;
1792
1793   for (addr = start_pc; addr < end_pc; addr += insn_len)
1794     {
1795       insn_len = csky_get_insn (gdbarch, addr, &insn);
1796       if (insn_len == 4)
1797         {
1798           if (CSKY_32_IS_MFCR_EPSR (insn) || CSKY_32_IS_MFCR_EPC (insn)
1799               || CSKY_32_IS_RTE (insn))
1800             return LR_TYPE_EPC;
1801         }
1802       else if (CSKY_32_IS_MFCR_FPSR (insn) || CSKY_32_IS_MFCR_FPC (insn)
1803                || CSKY_32_IS_RFI (insn))
1804         return LR_TYPE_FPC;
1805       else if (CSKY_32_IS_JMP (insn) || CSKY_32_IS_BR (insn)
1806                || CSKY_32_IS_JMPIX (insn) || CSKY_32_IS_JMPI (insn))
1807         return LR_TYPE_R15;
1808       else
1809         {
1810           /* 16 bit instruction.  */
1811           if (CSKY_16_IS_JMP (insn) || CSKY_16_IS_BR (insn)
1812               || CSKY_16_IS_JMPIX (insn))
1813             return LR_TYPE_R15;
1814         }
1815     }
1816     return LR_TYPE_R15;
1817 }
1818
1819 /* Heuristic unwinder.  */
1820
1821 static struct csky_unwind_cache *
1822 csky_frame_unwind_cache (struct frame_info *this_frame)
1823 {
1824   CORE_ADDR prologue_start, prologue_end, func_end, prev_pc, block_addr;
1825   struct csky_unwind_cache *cache;
1826   const struct block *bl;
1827   unsigned long func_size = 0;
1828   struct gdbarch *gdbarch = get_frame_arch (this_frame);
1829   unsigned int sp_regnum = CSKY_SP_REGNUM;
1830
1831   /* Default lr type is r15.  */
1832   lr_type_t lr_type = LR_TYPE_R15;
1833
1834   cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
1835   cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1836
1837   /* Assume there is no frame until proven otherwise.  */
1838   cache->framereg = sp_regnum;
1839
1840   cache->framesize = 0;
1841
1842   prev_pc = get_frame_pc (this_frame);
1843   block_addr = get_frame_address_in_block (this_frame);
1844   if (find_pc_partial_function (block_addr, NULL, &prologue_start,
1845                                 &func_end) == 0)
1846     /* We couldn't find a function containing block_addr, so bail out
1847        and hope for the best.  */
1848     return cache;
1849
1850   /* Get the (function) symbol matching prologue_start.  */
1851   bl = block_for_pc (prologue_start);
1852   if (bl != NULL)
1853     func_size = bl->endaddr - bl->startaddr;
1854   else
1855     {
1856       struct bound_minimal_symbol msymbol
1857         = lookup_minimal_symbol_by_pc (prologue_start);
1858       if (msymbol.minsym != NULL)
1859         func_size = MSYMBOL_SIZE (msymbol.minsym);
1860     }
1861
1862   /* If FUNC_SIZE is 0 we may have a special-case use of lr
1863      e.g. exception or interrupt.  */
1864   if (func_size == 0)
1865     lr_type = csky_analyze_lr_type (gdbarch, prologue_start, func_end);
1866
1867   prologue_end = std::min (func_end, prev_pc);
1868
1869   /* Analyze the function prologue.  */
1870   csky_analyze_prologue (gdbarch, prologue_start, prologue_end,
1871                             func_end, this_frame, cache, lr_type);
1872
1873   /* gdbarch_sp_regnum contains the value and not the address.  */
1874   trad_frame_set_value (cache->saved_regs, sp_regnum, cache->prev_sp);
1875   return cache;
1876 }
1877
1878 /* Implement the this_id function for the normal unwinder.  */
1879
1880 static void
1881 csky_frame_this_id (struct frame_info *this_frame,
1882                     void **this_prologue_cache, struct frame_id *this_id)
1883 {
1884   struct csky_unwind_cache *cache;
1885   struct frame_id id;
1886
1887   if (*this_prologue_cache == NULL)
1888     *this_prologue_cache = csky_frame_unwind_cache (this_frame);
1889   cache = (struct csky_unwind_cache *) *this_prologue_cache;
1890
1891   /* This marks the outermost frame.  */
1892   if (cache->prev_sp == 0)
1893     return;
1894
1895   id = frame_id_build (cache->prev_sp, get_frame_func (this_frame));
1896   *this_id = id;
1897 }
1898
1899 /* Implement the prev_register function for the normal unwinder.  */
1900
1901 static struct value *
1902 csky_frame_prev_register (struct frame_info *this_frame,
1903                           void **this_prologue_cache, int regnum)
1904 {
1905   struct csky_unwind_cache *cache;
1906
1907   if (*this_prologue_cache == NULL)
1908     *this_prologue_cache = csky_frame_unwind_cache (this_frame);
1909   cache = (struct csky_unwind_cache *) *this_prologue_cache;
1910
1911   return trad_frame_get_prev_register (this_frame, cache->saved_regs,
1912                                        regnum);
1913 }
1914
1915 /* Data structures for the normal prologue-analysis-based
1916    unwinder.  */
1917
1918 static const struct frame_unwind csky_unwind_cache = {
1919   NORMAL_FRAME,
1920   default_frame_unwind_stop_reason,
1921   csky_frame_this_id,
1922   csky_frame_prev_register,
1923   NULL,
1924   default_frame_sniffer,
1925   NULL,
1926   NULL
1927 };
1928
1929
1930
1931 static int
1932 csky_stub_unwind_sniffer (const struct frame_unwind *self,
1933                          struct frame_info *this_frame,
1934                          void **this_prologue_cache)
1935 {
1936   CORE_ADDR addr_in_block;
1937
1938   addr_in_block = get_frame_address_in_block (this_frame);
1939
1940   if (find_pc_partial_function (addr_in_block, NULL, NULL, NULL) == 0
1941       || in_plt_section (addr_in_block))
1942     return 1;
1943
1944   return 0;
1945 }
1946
1947 static struct csky_unwind_cache *
1948 csky_make_stub_cache (struct frame_info *this_frame)
1949 {
1950   struct csky_unwind_cache *cache;
1951
1952   cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
1953   cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1954   cache->prev_sp = get_frame_register_unsigned (this_frame, CSKY_SP_REGNUM);
1955
1956   return cache;
1957 }
1958
1959 static void
1960 csky_stub_this_id (struct frame_info *this_frame,
1961                   void **this_cache,
1962                   struct frame_id *this_id)
1963 {
1964   struct csky_unwind_cache *cache;
1965
1966   if (*this_cache == NULL)
1967     *this_cache = csky_make_stub_cache (this_frame);
1968   cache = (struct csky_unwind_cache *) *this_cache;
1969
1970   /* Our frame ID for a stub frame is the current SP and LR.  */
1971   *this_id = frame_id_build (cache->prev_sp, get_frame_pc (this_frame));
1972 }
1973
1974 static struct value *
1975 csky_stub_prev_register (struct frame_info *this_frame,
1976                             void **this_cache,
1977                             int prev_regnum)
1978 {
1979   struct csky_unwind_cache *cache;
1980
1981   if (*this_cache == NULL)
1982     *this_cache = csky_make_stub_cache (this_frame);
1983   cache = (struct csky_unwind_cache *) *this_cache;
1984
1985   /* If we are asked to unwind the PC, then return the LR.  */
1986   if (prev_regnum == CSKY_PC_REGNUM)
1987     {
1988       CORE_ADDR lr;
1989
1990       lr = frame_unwind_register_unsigned (this_frame, CSKY_LR_REGNUM);
1991       return frame_unwind_got_constant (this_frame, prev_regnum, lr);
1992     }
1993
1994   if (prev_regnum == CSKY_SP_REGNUM)
1995     return frame_unwind_got_constant (this_frame, prev_regnum, cache->prev_sp);
1996
1997   return trad_frame_get_prev_register (this_frame, cache->saved_regs,
1998                                        prev_regnum);
1999 }
2000
2001 struct frame_unwind csky_stub_unwind = {
2002   NORMAL_FRAME,
2003   default_frame_unwind_stop_reason,
2004   csky_stub_this_id,
2005   csky_stub_prev_register,
2006   NULL,
2007   csky_stub_unwind_sniffer
2008 };
2009
2010 /* Implement the this_base, this_locals, and this_args hooks
2011    for the normal unwinder.  */
2012
2013 static CORE_ADDR
2014 csky_frame_base_address (struct frame_info *this_frame, void **this_cache)
2015 {
2016   struct csky_unwind_cache *cache;
2017
2018   if (*this_cache == NULL)
2019     *this_cache = csky_frame_unwind_cache (this_frame);
2020   cache = (struct csky_unwind_cache *) *this_cache;
2021
2022   return cache->prev_sp - cache->framesize;
2023 }
2024
2025 static const struct frame_base csky_frame_base = {
2026   &csky_unwind_cache,
2027   csky_frame_base_address,
2028   csky_frame_base_address,
2029   csky_frame_base_address
2030 };
2031
2032 /* Initialize register access method.  */
2033
2034 static void
2035 csky_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2036                             struct dwarf2_frame_state_reg *reg,
2037                             struct frame_info *this_frame)
2038 {
2039   if (regnum == gdbarch_pc_regnum (gdbarch))
2040     reg->how = DWARF2_FRAME_REG_RA;
2041   else if (regnum == gdbarch_sp_regnum (gdbarch))
2042     reg->how = DWARF2_FRAME_REG_CFA;
2043 }
2044
2045 /* Create csky register groups.  */
2046
2047 static void
2048 csky_init_reggroup ()
2049 {
2050   cr_reggroup = reggroup_new ("cr", USER_REGGROUP);
2051   fr_reggroup = reggroup_new ("fr", USER_REGGROUP);
2052   vr_reggroup = reggroup_new ("vr", USER_REGGROUP);
2053   mmu_reggroup = reggroup_new ("mmu", USER_REGGROUP);
2054   prof_reggroup = reggroup_new ("profiling", USER_REGGROUP);
2055 }
2056
2057 /* Add register groups into reggroup list.  */
2058
2059 static void
2060 csky_add_reggroups (struct gdbarch *gdbarch)
2061 {
2062   reggroup_add (gdbarch, all_reggroup);
2063   reggroup_add (gdbarch, general_reggroup);
2064   reggroup_add (gdbarch, cr_reggroup);
2065   reggroup_add (gdbarch, fr_reggroup);
2066   reggroup_add (gdbarch, vr_reggroup);
2067   reggroup_add (gdbarch, mmu_reggroup);
2068   reggroup_add (gdbarch, prof_reggroup);
2069 }
2070
2071 /* Return the groups that a CSKY register can be categorised into.  */
2072
2073 static int
2074 csky_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
2075                           struct reggroup *reggroup)
2076 {
2077   int raw_p;
2078
2079   if (gdbarch_register_name (gdbarch, regnum) == NULL
2080       || gdbarch_register_name (gdbarch, regnum)[0] == '\0')
2081     return 0;
2082
2083   if (reggroup == all_reggroup)
2084     return 1;
2085
2086   raw_p = regnum < gdbarch_num_regs (gdbarch);
2087   if (reggroup == save_reggroup || reggroup == restore_reggroup)
2088     return raw_p;
2089
2090   if (((regnum >= CSKY_R0_REGNUM) && (regnum <= CSKY_R0_REGNUM + 31))
2091       && (reggroup == general_reggroup))
2092     return 1;
2093
2094   if (((regnum == CSKY_PC_REGNUM)
2095        || ((regnum >= CSKY_CR0_REGNUM)
2096            && (regnum <= CSKY_CR0_REGNUM + 30)))
2097       && (reggroup == cr_reggroup))
2098     return 2;
2099
2100   if ((((regnum >= CSKY_VR0_REGNUM) && (regnum <= CSKY_VR0_REGNUM + 15))
2101        || ((regnum >= CSKY_VCR0_REGNUM)
2102            && (regnum <= CSKY_VCR0_REGNUM + 2)))
2103       && (reggroup == vr_reggroup))
2104     return 3;
2105
2106   if (((regnum >= CSKY_MMU_REGNUM) && (regnum <= CSKY_MMU_REGNUM + 8))
2107       && (reggroup == mmu_reggroup))
2108     return 4;
2109
2110   if (((regnum >= CSKY_PROFCR_REGNUM)
2111        && (regnum <= CSKY_PROFCR_REGNUM + 48))
2112       && (reggroup == prof_reggroup))
2113     return 5;
2114
2115   if ((((regnum >= CSKY_FR0_REGNUM) && (regnum <= CSKY_FR0_REGNUM + 15))
2116        || ((regnum >= CSKY_VCR0_REGNUM) && (regnum <= CSKY_VCR0_REGNUM + 2)))
2117       && (reggroup == fr_reggroup))
2118     return 6;
2119
2120   return 0;
2121 }
2122
2123 /* Implement the dwarf2_reg_to_regnum gdbarch method.  */
2124
2125 static int
2126 csky_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int dw_reg)
2127 {
2128   if (dw_reg < 0 || dw_reg >= CSKY_NUM_REGS)
2129     return -1;
2130   return dw_reg;
2131 }
2132
2133 /* Override interface for command: info register.  */
2134
2135 static void
2136 csky_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
2137                            struct frame_info *frame, int regnum, int all)
2138 {
2139   /* Call default print_registers_info function.  */
2140   default_print_registers_info (gdbarch, file, frame, regnum, all);
2141
2142   /* For command: info register.  */
2143   if (regnum == -1 && all == 0)
2144     {
2145       default_print_registers_info (gdbarch, file, frame,
2146                                     CSKY_PC_REGNUM, 0);
2147       default_print_registers_info (gdbarch, file, frame,
2148                                     CSKY_EPC_REGNUM, 0);
2149       default_print_registers_info (gdbarch, file, frame,
2150                                     CSKY_CR0_REGNUM, 0);
2151       default_print_registers_info (gdbarch, file, frame,
2152                                     CSKY_EPSR_REGNUM, 0);
2153     }
2154   return;
2155 }
2156
2157 /* Initialize the current architecture based on INFO.  If possible,
2158    re-use an architecture from ARCHES, which is a list of
2159    architectures already created during this debugging session.
2160
2161    Called at program startup, when reading a core file, and when
2162    reading a binary file.  */
2163
2164 static struct gdbarch *
2165 csky_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2166 {
2167   struct gdbarch *gdbarch;
2168   struct gdbarch_tdep *tdep;
2169
2170   /* Find a candidate among the list of pre-declared architectures.  */
2171   arches = gdbarch_list_lookup_by_info (arches, &info);
2172   if (arches != NULL)
2173     return arches->gdbarch;
2174
2175   /* None found, create a new architecture from the information
2176      provided.  */
2177   tdep = XCNEW (struct gdbarch_tdep);
2178   gdbarch = gdbarch_alloc (&info, tdep);
2179
2180   /* Target data types.  */
2181   set_gdbarch_ptr_bit (gdbarch, 32);
2182   set_gdbarch_addr_bit (gdbarch, 32);
2183   set_gdbarch_short_bit (gdbarch, 16);
2184   set_gdbarch_int_bit (gdbarch, 32);
2185   set_gdbarch_long_bit (gdbarch, 32);
2186   set_gdbarch_long_long_bit (gdbarch, 64);
2187   set_gdbarch_float_bit (gdbarch, 32);
2188   set_gdbarch_double_bit (gdbarch, 64);
2189   set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
2190   set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
2191
2192   /* Information about the target architecture.  */
2193   set_gdbarch_return_value (gdbarch, csky_return_value);
2194   set_gdbarch_breakpoint_kind_from_pc (gdbarch, csky_breakpoint_kind_from_pc);
2195   set_gdbarch_sw_breakpoint_from_kind (gdbarch, csky_sw_breakpoint_from_kind);
2196
2197   /* Register architecture.  */
2198   set_gdbarch_num_regs (gdbarch, CSKY_NUM_REGS);
2199   set_gdbarch_pc_regnum (gdbarch, CSKY_PC_REGNUM);
2200   set_gdbarch_sp_regnum (gdbarch, CSKY_SP_REGNUM);
2201   set_gdbarch_register_name (gdbarch, csky_register_name);
2202   set_gdbarch_register_type (gdbarch, csky_register_type);
2203   set_gdbarch_read_pc (gdbarch, csky_read_pc);
2204   set_gdbarch_write_pc (gdbarch, csky_write_pc);
2205   set_gdbarch_print_registers_info (gdbarch, csky_print_registers_info);
2206   csky_add_reggroups (gdbarch);
2207   set_gdbarch_register_reggroup_p (gdbarch, csky_register_reggroup_p);
2208   set_gdbarch_stab_reg_to_regnum (gdbarch, csky_dwarf_reg_to_regnum);
2209   set_gdbarch_dwarf2_reg_to_regnum (gdbarch, csky_dwarf_reg_to_regnum);
2210   dwarf2_frame_set_init_reg (gdbarch, csky_dwarf2_frame_init_reg);
2211
2212   /* Functions to analyze frames.  */
2213   frame_base_set_default (gdbarch, &csky_frame_base);
2214   set_gdbarch_skip_prologue (gdbarch, csky_skip_prologue);
2215   set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2216   set_gdbarch_frame_align (gdbarch, csky_frame_align);
2217   set_gdbarch_stack_frame_destroyed_p (gdbarch, csky_stack_frame_destroyed_p);
2218
2219   /* Functions handling dummy frames.  */
2220   set_gdbarch_push_dummy_call (gdbarch, csky_push_dummy_call);
2221
2222   /* Frame unwinders.  Use DWARF debug info if available,
2223      otherwise use our own unwinder.  */
2224   dwarf2_append_unwinders (gdbarch);
2225   frame_unwind_append_unwinder (gdbarch, &csky_stub_unwind);
2226   frame_unwind_append_unwinder (gdbarch, &csky_unwind_cache);
2227
2228   /* Breakpoints.  */
2229   set_gdbarch_memory_insert_breakpoint (gdbarch,
2230                                         csky_memory_insert_breakpoint);
2231   set_gdbarch_memory_remove_breakpoint (gdbarch,
2232                                         csky_memory_remove_breakpoint);
2233
2234   /* Hook in ABI-specific overrides, if they have been registered.  */
2235   gdbarch_init_osabi (info, gdbarch);
2236
2237   /* Support simple overlay manager.  */
2238   set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
2239   set_gdbarch_char_signed (gdbarch, 0);
2240   return gdbarch;
2241 }
2242
2243 void
2244 _initialize_csky_tdep (void)
2245 {
2246
2247   register_gdbarch_init (bfd_arch_csky, csky_gdbarch_init);
2248
2249   csky_init_reggroup ();
2250
2251   /* Allow debugging this file's internals.  */
2252   add_setshow_boolean_cmd ("csky", class_maintenance, &csky_debug,
2253                            _("Set C-Sky debugging."),
2254                            _("Show C-Sky debugging."),
2255                            _("When on, C-Sky specific debugging is enabled."),
2256                            NULL,
2257                            NULL,
2258                            &setdebuglist, &showdebuglist);
2259 }