1 /* Target dependent code for CRIS, for GDB, the GNU debugger.
2 Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by Axis Communications AB.
4 Written by Hendrik Ruijter, Stefan Andersson, and Orjan Friberg.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
31 #include "opcode/cris.h"
32 #include "arch-utils.h"
35 /* To get entry_point_address. */
38 #include "solib.h" /* Support for shared libraries. */
39 #include "solib-svr4.h" /* For struct link_map_offsets. */
40 #include "gdb_string.h"
45 /* There are no floating point registers. Used in gdbserver low-linux.c. */
48 /* There are 16 general registers. */
51 /* There are 16 special registers. */
55 /* Register numbers of various important registers.
56 FP_REGNUM Contains address of executing stack frame.
57 STR_REGNUM Contains the address of structure return values.
58 RET_REGNUM Contains the return value when shorter than or equal to 32 bits
59 ARG1_REGNUM Contains the first parameter to a function.
60 ARG2_REGNUM Contains the second parameter to a function.
61 ARG3_REGNUM Contains the third parameter to a function.
62 ARG4_REGNUM Contains the fourth parameter to a function. Rest on stack.
63 SP_REGNUM Contains address of top of stack.
64 PC_REGNUM Contains address of next instruction.
65 SRP_REGNUM Subroutine return pointer register.
66 BRP_REGNUM Breakpoint return pointer register. */
68 /* FP_REGNUM = 8, SP_REGNUM = 14, and PC_REGNUM = 15 have been incorporated
69 into the multi-arch framework. */
73 /* Enums with respect to the general registers, valid for all
82 /* Enums with respect to the special registers, some of which may not be
83 applicable to all CRIS versions. */
101 extern const struct cris_spec_reg cris_spec_regs[];
103 /* CRIS version, set via the user command 'set cris-version'. Affects
104 register names and sizes.*/
105 static int usr_cmd_cris_version;
107 /* Indicates whether to trust the above variable. */
108 static int usr_cmd_cris_version_valid = 0;
110 /* CRIS mode, set via the user command 'set cris-mode'. Affects availability
111 of some registers. */
112 static const char *usr_cmd_cris_mode;
114 /* Indicates whether to trust the above variable. */
115 static int usr_cmd_cris_mode_valid = 0;
117 static const char CRIS_MODE_USER[] = "CRIS_MODE_USER";
118 static const char CRIS_MODE_SUPERVISOR[] = "CRIS_MODE_SUPERVISOR";
119 static const char *cris_mode_enums[] =
122 CRIS_MODE_SUPERVISOR,
126 /* CRIS ABI, set via the user command 'set cris-abi'.
127 There are two flavours:
128 1. Original ABI with 32-bit doubles, where arguments <= 4 bytes are
130 2. New ABI with 64-bit doubles, where arguments <= 8 bytes are passed by
132 static const char *usr_cmd_cris_abi;
134 /* Indicates whether to trust the above variable. */
135 static int usr_cmd_cris_abi_valid = 0;
137 /* These variables are strings instead of enums to make them usable as
138 parameters to add_set_enum_cmd. */
139 static const char CRIS_ABI_ORIGINAL[] = "CRIS_ABI_ORIGINAL";
140 static const char CRIS_ABI_V2[] = "CRIS_ABI_V2";
141 static const char CRIS_ABI_SYMBOL[] = ".$CRIS_ABI_V2";
142 static const char *cris_abi_enums[] =
149 /* CRIS architecture specific information. */
153 const char *cris_mode;
154 const char *cris_abi;
157 /* Functions for accessing target dependent data. */
162 return (gdbarch_tdep (current_gdbarch)->cris_version);
168 return (gdbarch_tdep (current_gdbarch)->cris_mode);
174 return (gdbarch_tdep (current_gdbarch)->cris_abi);
177 /* For saving call-clobbered contents in R9 when returning structs. */
178 static CORE_ADDR struct_return_address;
180 struct frame_extra_info
186 /* The instruction environment needed to find single-step breakpoints. */
188 struct instruction_environment
190 unsigned long reg[NUM_GENREGS];
191 unsigned long preg[NUM_SPECREGS];
192 unsigned long branch_break_address;
193 unsigned long delay_slot_pc;
194 unsigned long prefix_value;
199 int delay_slot_pc_active;
201 int disable_interrupt;
204 /* Save old breakpoints in order to restore the state before a single_step.
205 At most, two breakpoints will have to be remembered. */
207 char binsn_quantum[BREAKPOINT_MAX];
208 static binsn_quantum break_mem[2];
209 static CORE_ADDR next_pc = 0;
210 static CORE_ADDR branch_target_address = 0;
211 static unsigned char branch_break_inserted = 0;
213 /* Machine-dependencies in CRIS for opcodes. */
215 /* Instruction sizes. */
216 enum cris_instruction_sizes
223 /* Addressing modes. */
224 enum cris_addressing_modes
231 /* Prefix addressing modes. */
232 enum cris_prefix_addressing_modes
234 PREFIX_INDEX_MODE = 2,
235 PREFIX_ASSIGN_MODE = 3,
237 /* Handle immediate byte offset addressing mode prefix format. */
238 PREFIX_OFFSET_MODE = 2
241 /* Masks for opcodes. */
242 enum cris_opcode_masks
244 BRANCH_SIGNED_SHORT_OFFSET_MASK = 0x1,
245 SIGNED_EXTEND_BIT_MASK = 0x2,
246 SIGNED_BYTE_MASK = 0x80,
247 SIGNED_BYTE_EXTEND_MASK = 0xFFFFFF00,
248 SIGNED_WORD_MASK = 0x8000,
249 SIGNED_WORD_EXTEND_MASK = 0xFFFF0000,
250 SIGNED_DWORD_MASK = 0x80000000,
251 SIGNED_QUICK_VALUE_MASK = 0x20,
252 SIGNED_QUICK_VALUE_EXTEND_MASK = 0xFFFFFFC0
255 /* Functions for opcodes. The general form of the ETRAX 16-bit instruction:
263 cris_get_operand2 (unsigned short insn)
265 return ((insn & 0xF000) >> 12);
269 cris_get_mode (unsigned short insn)
271 return ((insn & 0x0C00) >> 10);
275 cris_get_opcode (unsigned short insn)
277 return ((insn & 0x03C0) >> 6);
281 cris_get_size (unsigned short insn)
283 return ((insn & 0x0030) >> 4);
287 cris_get_operand1 (unsigned short insn)
289 return (insn & 0x000F);
292 /* Additional functions in order to handle opcodes. */
295 cris_get_wide_opcode (unsigned short insn)
297 return ((insn & 0x03E0) >> 5);
301 cris_get_short_size (unsigned short insn)
303 return ((insn & 0x0010) >> 4);
307 cris_get_quick_value (unsigned short insn)
309 return (insn & 0x003F);
313 cris_get_bdap_quick_offset (unsigned short insn)
315 return (insn & 0x00FF);
319 cris_get_branch_short_offset (unsigned short insn)
321 return (insn & 0x00FF);
325 cris_get_asr_shift_steps (unsigned long value)
327 return (value & 0x3F);
331 cris_get_asr_quick_shift_steps (unsigned short insn)
333 return (insn & 0x1F);
337 cris_get_clear_size (unsigned short insn)
339 return ((insn) & 0xC000);
343 cris_is_signed_extend_bit_on (unsigned short insn)
345 return (((insn) & 0x20) == 0x20);
349 cris_is_xflag_bit_on (unsigned short insn)
351 return (((insn) & 0x1000) == 0x1000);
355 cris_set_size_to_dword (unsigned short *insn)
362 cris_get_signed_offset (unsigned short insn)
364 return ((signed char) (insn & 0x00FF));
367 /* Calls an op function given the op-type, working on the insn and the
369 static void cris_gdb_func (enum cris_op_type, unsigned short, inst_env_type *);
371 static CORE_ADDR cris_skip_prologue_main (CORE_ADDR pc, int frameless_p);
373 static struct gdbarch *cris_gdbarch_init (struct gdbarch_info,
374 struct gdbarch_list *);
376 static int cris_delayed_get_disassembler (bfd_vma, disassemble_info *);
378 static void cris_dump_tdep (struct gdbarch *, struct ui_file *);
380 static void cris_version_update (char *ignore_args, int from_tty,
381 struct cmd_list_element *c);
383 static void cris_mode_update (char *ignore_args, int from_tty,
384 struct cmd_list_element *c);
386 static void cris_abi_update (char *ignore_args, int from_tty,
387 struct cmd_list_element *c);
389 static CORE_ADDR bfd_lookup_symbol (bfd *, const char *);
391 /* Frames information. The definition of the struct frame_info is
395 enum frame_type type;
399 If the compilation option -fno-omit-frame-pointer is present the
400 variable frame will be set to the content of R8 which is the frame
403 The variable pc contains the address where execution is performed
404 in the present frame. The innermost frame contains the current content
405 of the register PC. All other frames contain the content of the
406 register PC in the next frame.
408 The variable `type' indicates the frame's type: normal, SIGTRAMP
409 (associated with a signal handler), dummy (associated with a dummy
412 The variable return_pc contains the address where execution should be
413 resumed when the present frame has finished, the return address.
415 The variable leaf_function is 1 if the return address is in the register
416 SRP, and 0 if it is on the stack.
418 Prologue instructions C-code.
419 The prologue may consist of (-fno-omit-frame-pointer)
423 move.d sp,r8 move.d sp,r8
425 movem rY,[sp] movem rY,[sp]
426 move.S rZ,[r8-U] move.S rZ,[r8-U]
428 where 1 is a non-terminal function, and 2 is a leaf-function.
430 Note that this assumption is extremely brittle, and will break at the
431 slightest change in GCC's prologue.
433 If local variables are declared or register contents are saved on stack
434 the subq-instruction will be present with X as the number of bytes
435 needed for storage. The reshuffle with respect to r8 may be performed
436 with any size S (b, w, d) and any of the general registers Z={0..13}.
437 The offset U should be representable by a signed 8-bit value in all cases.
438 Thus, the prefix word is assumed to be immediate byte offset mode followed
439 by another word containing the instruction.
448 Prologue instructions C++-code.
449 Case 1) and 2) in the C-code may be followed by
455 move.S [r8+U],rZ ; P4
457 if any of the call parameters are stored. The host expects these
458 instructions to be executed in order to get the call parameters right. */
460 /* Examine the prologue of a function. The variable ip is the address of
461 the first instruction of the prologue. The variable limit is the address
462 of the first instruction after the prologue. The variable fi contains the
463 information in struct frame_info. The variable frameless_p controls whether
464 the entire prologue is examined (0) or just enough instructions to
465 determine that it is a prologue (1). */
468 cris_examine (CORE_ADDR ip, CORE_ADDR limit, struct frame_info *fi,
471 /* Present instruction. */
474 /* Next instruction, lookahead. */
475 unsigned short insn_next;
478 /* Is there a push fp? */
481 /* Number of byte on stack used for local variables and movem. */
484 /* Highest register number in a movem. */
487 /* move.d r<source_register>,rS */
488 short source_register;
490 /* This frame is with respect to a leaf until a push srp is found. */
491 get_frame_extra_info (fi)->leaf_function = 1;
493 /* This frame is without the FP until a push fp is found. */
496 /* Assume nothing on stack. */
500 /* No information about register contents so far. */
502 /* We only want to know the end of the prologue when fi->saved_regs == 0.
503 When the saved registers are allocated full information is required. */
504 if (get_frame_saved_regs (fi))
506 for (regno = 0; regno < NUM_REGS; regno++)
507 get_frame_saved_regs (fi)[regno] = 0;
510 /* Find the prologue instructions. */
513 insn = read_memory_unsigned_integer (ip, sizeof (short));
514 ip += sizeof (short);
517 /* push <reg> 32 bit instruction */
518 insn_next = read_memory_unsigned_integer (ip, sizeof (short));
519 ip += sizeof (short);
520 regno = cris_get_operand2 (insn_next);
522 /* This check, meant to recognize srp, used to be regno ==
523 (SRP_REGNUM - NUM_GENREGS), but that covers r11 also. */
524 if (insn_next == 0xBE7E)
530 get_frame_extra_info (fi)->leaf_function = 0;
532 else if (regno == FP_REGNUM)
537 else if (insn == 0x866E)
546 else if (cris_get_operand2 (insn) == SP_REGNUM
547 && cris_get_mode (insn) == 0x0000
548 && cris_get_opcode (insn) == 0x000A)
551 val = cris_get_quick_value (insn);
553 else if (cris_get_mode (insn) == 0x0002
554 && cris_get_opcode (insn) == 0x000F
555 && cris_get_size (insn) == 0x0003
556 && cris_get_operand1 (insn) == SP_REGNUM)
558 /* movem r<regsave>,[sp] */
563 regsave = cris_get_operand2 (insn);
565 else if (cris_get_operand2 (insn) == SP_REGNUM
566 && ((insn & 0x0F00) >> 8) == 0x0001
567 && (cris_get_signed_offset (insn) < 0))
569 /* Immediate byte offset addressing prefix word with sp as base
570 register. Used for CRIS v8 i.e. ETRAX 100 and newer if <val>
571 is between 64 and 128.
572 movem r<regsave>,[sp=sp-<val>] */
573 val = -cris_get_signed_offset (insn);
574 insn_next = read_memory_unsigned_integer (ip, sizeof (short));
575 ip += sizeof (short);
576 if (cris_get_mode (insn_next) == PREFIX_ASSIGN_MODE
577 && cris_get_opcode (insn_next) == 0x000F
578 && cris_get_size (insn_next) == 0x0003
579 && cris_get_operand1 (insn_next) == SP_REGNUM)
585 regsave = cris_get_operand2 (insn_next);
589 /* The prologue ended before the limit was reached. */
590 ip -= 2 * sizeof (short);
594 else if (cris_get_mode (insn) == 0x0001
595 && cris_get_opcode (insn) == 0x0009
596 && cris_get_size (insn) == 0x0002)
598 /* move.d r<10..13>,r<0..15> */
603 source_register = cris_get_operand1 (insn);
605 /* FIXME? In the glibc solibs, the prologue might contain something
606 like (this example taken from relocate_doit):
609 which isn't covered by the source_register check below. Question
610 is whether to add a check for this combo, or make better use of
611 the limit variable instead. */
612 if (source_register < ARG1_REGNUM || source_register > ARG4_REGNUM)
614 /* The prologue ended before the limit was reached. */
615 ip -= sizeof (short);
619 else if (cris_get_operand2 (insn) == FP_REGNUM
620 /* The size is a fixed-size. */
621 && ((insn & 0x0F00) >> 8) == 0x0001
622 /* A negative offset. */
623 && (cris_get_signed_offset (insn) < 0))
625 /* move.S rZ,[r8-U] (?) */
626 insn_next = read_memory_unsigned_integer (ip, sizeof (short));
627 ip += sizeof (short);
628 regno = cris_get_operand2 (insn_next);
629 if ((regno >= 0 && regno < SP_REGNUM)
630 && cris_get_mode (insn_next) == PREFIX_OFFSET_MODE
631 && cris_get_opcode (insn_next) == 0x000F)
633 /* move.S rZ,[r8-U] */
638 /* The prologue ended before the limit was reached. */
639 ip -= 2 * sizeof (short);
643 else if (cris_get_operand2 (insn) == FP_REGNUM
644 /* The size is a fixed-size. */
645 && ((insn & 0x0F00) >> 8) == 0x0001
646 /* A positive offset. */
647 && (cris_get_signed_offset (insn) > 0))
649 /* move.S [r8+U],rZ (?) */
650 insn_next = read_memory_unsigned_integer (ip, sizeof (short));
651 ip += sizeof (short);
652 regno = cris_get_operand2 (insn_next);
653 if ((regno >= 0 && regno < SP_REGNUM)
654 && cris_get_mode (insn_next) == PREFIX_OFFSET_MODE
655 && cris_get_opcode (insn_next) == 0x0009
656 && cris_get_operand1 (insn_next) == regno)
658 /* move.S [r8+U],rZ */
663 /* The prologue ended before the limit was reached. */
664 ip -= 2 * sizeof (short);
670 /* The prologue ended before the limit was reached. */
671 ip -= sizeof (short);
677 /* We only want to know the end of the prologue when
678 fi->saved_regs == 0. */
679 if (!get_frame_saved_regs (fi))
684 get_frame_saved_regs (fi)[FP_REGNUM] = get_frame_base (fi);
686 /* Calculate the addresses. */
687 for (regno = regsave; regno >= 0; regno--)
689 get_frame_saved_regs (fi)[regno] = get_frame_base (fi) - val;
692 if (get_frame_extra_info (fi)->leaf_function)
694 /* Set the register SP to contain the stack pointer of
696 get_frame_saved_regs (fi)[SP_REGNUM] = get_frame_base (fi) + 4;
700 /* Set the register SP to contain the stack pointer of
702 get_frame_saved_regs (fi)[SP_REGNUM] = get_frame_base (fi) + 8;
704 /* Set the register SRP to contain the return address of
706 get_frame_saved_regs (fi)[SRP_REGNUM] = get_frame_base (fi) + 4;
712 /* Advance pc beyond any function entry prologue instructions at pc
713 to reach some "real" code. */
716 cris_skip_prologue (CORE_ADDR pc)
718 return cris_skip_prologue_main (pc, 0);
721 /* As cris_skip_prologue, but stops as soon as it knows that the function
722 has a frame. Its result is equal to its input pc if the function is
723 frameless, unequal otherwise. */
726 cris_skip_prologue_frameless_p (CORE_ADDR pc)
728 return cris_skip_prologue_main (pc, 1);
731 /* Given a PC value corresponding to the start of a function, return the PC
732 of the first instruction after the function prologue. */
735 cris_skip_prologue_main (CORE_ADDR pc, int frameless_p)
737 struct cleanup *old_chain = make_cleanup (null_cleanup, NULL);
738 struct frame_info *fi;
739 struct symtab_and_line sal = find_pc_line (pc, 0);
741 CORE_ADDR pc_after_prologue;
743 /* frame_info now contains dynamic memory. Since fi is a dummy
744 here, I don't bother allocating memory for saved_regs. */
745 fi = deprecated_frame_xmalloc_with_cleanup (0, sizeof (struct frame_extra_info));
747 /* If there is no symbol information then sal.end == 0, and we end up
748 examining only the first instruction in the function prologue.
749 Exaggerating the limit seems to be harmless. */
751 best_limit = sal.end;
753 best_limit = pc + 100;
755 pc_after_prologue = cris_examine (pc, best_limit, fi, frameless_p);
756 do_cleanups (old_chain);
757 return pc_after_prologue;
760 /* Use the program counter to determine the contents and size of a breakpoint
761 instruction. It returns a pointer to a string of bytes that encode a
762 breakpoint instruction, stores the length of the string to *lenptr, and
763 adjusts pcptr (if necessary) to point to the actual memory location where
764 the breakpoint should be inserted. */
766 const unsigned char *
767 cris_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
769 static unsigned char break_insn[] = {0x38, 0xe9};
775 /* Returns the register SRP (subroutine return pointer) which must contain
776 the content of the register PC after a function call. */
779 cris_saved_pc_after_call (struct frame_info *frame)
781 return read_register (SRP_REGNUM);
784 /* Returns 1 if spec_reg is applicable to the current gdbarch's CRIS version,
788 cris_spec_reg_applicable (struct cris_spec_reg spec_reg)
790 int version = cris_version ();
792 switch (spec_reg.applicable_version)
794 case cris_ver_version_all:
796 case cris_ver_warning:
797 /* Indeterminate/obsolete. */
800 /* Simulator only. */
803 return (version >= 0 && version <= 3);
805 return (version >= 3);
807 return (version == 8 || version == 9);
809 return (version >= 8);
811 return (version >= 10);
813 /* Invalid cris version. */
818 /* Returns the register size in unit byte. Returns 0 for an unimplemented
819 register, -1 for an invalid register. */
822 cris_register_size (int regno)
827 if (regno >= 0 && regno < NUM_GENREGS)
829 /* General registers (R0 - R15) are 32 bits. */
832 else if (regno >= NUM_GENREGS && regno < NUM_REGS)
834 /* Special register (R16 - R31). cris_spec_regs is zero-based.
835 Adjust regno accordingly. */
836 spec_regno = regno - NUM_GENREGS;
838 /* The entries in cris_spec_regs are stored in register number order,
839 which means we can shortcut into the array when searching it. */
840 for (i = spec_regno; cris_spec_regs[i].name != NULL; i++)
842 if (cris_spec_regs[i].number == spec_regno
843 && cris_spec_reg_applicable (cris_spec_regs[i]))
844 /* Go with the first applicable register. */
845 return cris_spec_regs[i].reg_size;
847 /* Special register not applicable to this CRIS version. */
852 /* Invalid register. */
857 /* Nonzero if regno should not be fetched from the target. This is the case
858 for unimplemented (size 0) and non-existant registers. */
861 cris_cannot_fetch_register (int regno)
863 return ((regno < 0 || regno >= NUM_REGS)
864 || (cris_register_size (regno) == 0));
867 /* Nonzero if regno should not be written to the target, for various
871 cris_cannot_store_register (int regno)
873 /* There are three kinds of registers we refuse to write to.
874 1. Those that not implemented.
875 2. Those that are read-only (depends on the processor mode).
876 3. Those registers to which a write has no effect.
879 if (regno < 0 || regno >= NUM_REGS || cris_register_size (regno) == 0)
880 /* Not implemented. */
883 else if (regno == VR_REGNUM)
887 else if (regno == P0_REGNUM || regno == P4_REGNUM || regno == P8_REGNUM)
888 /* Writing has no effect. */
891 else if (cris_mode () == CRIS_MODE_USER)
893 if (regno == IBR_REGNUM || regno == BAR_REGNUM || regno == BRP_REGNUM
894 || regno == IRP_REGNUM)
895 /* Read-only in user mode. */
902 /* Returns the register offset for the first byte of register regno's space
903 in the saved register state. Returns -1 for an invalid or unimplemented
907 cris_register_offset (int regno)
913 if (regno >= 0 && regno < NUM_REGS)
915 /* FIXME: The offsets should be cached and calculated only once,
916 when the architecture being debugged has changed. */
917 for (i = 0; i < regno; i++)
918 offset += cris_register_size (i);
924 /* Invalid register. */
929 /* Return the GDB type (defined in gdbtypes.c) for the "standard" data type
930 of data in register regno. */
933 cris_register_virtual_type (int regno)
935 if (regno == SP_REGNUM || regno == PC_REGNUM
936 || (regno > P8_REGNUM && regno < USP_REGNUM))
938 /* SP, PC, IBR, IRP, SRP, BAR, DCCR, BRP */
939 return lookup_pointer_type (builtin_type_void);
941 else if (regno == P8_REGNUM || regno == USP_REGNUM
942 || (regno >= 0 && regno < SP_REGNUM))
944 /* R0 - R13, P8, P15 */
945 return builtin_type_unsigned_long;
947 else if (regno > P3_REGNUM && regno < P8_REGNUM)
949 /* P4, CCR, DCR0, DCR1 */
950 return builtin_type_unsigned_short;
952 else if (regno > PC_REGNUM && regno < P4_REGNUM)
955 return builtin_type_unsigned_char;
959 /* Invalid register. */
960 return builtin_type_void;
964 /* Stores a function return value of type type, where valbuf is the address
965 of the value to be stored. */
967 /* In the original CRIS ABI, R10 is used to store return values. */
970 cris_abi_original_store_return_value (struct type *type, char *valbuf)
972 int len = TYPE_LENGTH (type);
974 if (len <= REGISTER_SIZE)
975 deprecated_write_register_bytes (REGISTER_BYTE (RET_REGNUM), valbuf, len);
977 internal_error (__FILE__, __LINE__, "cris_abi_original_store_return_value: type length too large.");
980 /* In the CRIS ABI V2, R10 and R11 are used to store return values. */
983 cris_abi_v2_store_return_value (struct type *type, char *valbuf)
985 int len = TYPE_LENGTH (type);
987 if (len <= 2 * REGISTER_SIZE)
989 /* Note that this works since R10 and R11 are consecutive registers. */
990 deprecated_write_register_bytes (REGISTER_BYTE (RET_REGNUM), valbuf,
994 internal_error (__FILE__, __LINE__, "cris_abi_v2_store_return_value: type length too large.");
997 /* Return the name of register regno as a string. Return NULL for an invalid or
998 unimplemented register. */
1001 cris_register_name (int regno)
1003 static char *cris_genreg_names[] =
1004 { "r0", "r1", "r2", "r3", \
1005 "r4", "r5", "r6", "r7", \
1006 "r8", "r9", "r10", "r11", \
1007 "r12", "r13", "sp", "pc" };
1012 if (regno >= 0 && regno < NUM_GENREGS)
1014 /* General register. */
1015 return cris_genreg_names[regno];
1017 else if (regno >= NUM_GENREGS && regno < NUM_REGS)
1019 /* Special register (R16 - R31). cris_spec_regs is zero-based.
1020 Adjust regno accordingly. */
1021 spec_regno = regno - NUM_GENREGS;
1023 /* The entries in cris_spec_regs are stored in register number order,
1024 which means we can shortcut into the array when searching it. */
1025 for (i = spec_regno; cris_spec_regs[i].name != NULL; i++)
1027 if (cris_spec_regs[i].number == spec_regno
1028 && cris_spec_reg_applicable (cris_spec_regs[i]))
1029 /* Go with the first applicable register. */
1030 return cris_spec_regs[i].name;
1032 /* Special register not applicable to this CRIS version. */
1037 /* Invalid register. */
1043 cris_register_bytes_ok (long bytes)
1045 return (bytes == REGISTER_BYTES);
1048 /* Extract from an array regbuf containing the raw register state a function
1049 return value of type type, and copy that, in virtual format, into
1052 /* In the original CRIS ABI, R10 is used to return values. */
1055 cris_abi_original_extract_return_value (struct type *type, char *regbuf,
1058 int len = TYPE_LENGTH (type);
1060 if (len <= REGISTER_SIZE)
1061 memcpy (valbuf, regbuf + REGISTER_BYTE (RET_REGNUM), len);
1063 internal_error (__FILE__, __LINE__, "cris_abi_original_extract_return_value: type length too large");
1066 /* In the CRIS ABI V2, R10 and R11 are used to store return values. */
1069 cris_abi_v2_extract_return_value (struct type *type, char *regbuf,
1072 int len = TYPE_LENGTH (type);
1074 if (len <= 2 * REGISTER_SIZE)
1075 memcpy (valbuf, regbuf + REGISTER_BYTE (RET_REGNUM), len);
1077 internal_error (__FILE__, __LINE__, "cris_abi_v2_extract_return_value: type length too large");
1080 /* Store the address of the place in which to copy the structure the
1081 subroutine will return. In the CRIS ABI, R9 is used in order to pass
1082 the address of the allocated area where a structure return value must
1083 be stored. R9 is call-clobbered, which means we must save it here for
1087 cris_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1089 write_register (STR_REGNUM, addr);
1090 struct_return_address = addr;
1093 /* Extract from regbuf the address where a function should return a
1094 structure value. It's not there in the CRIS ABI, so we must do it another
1098 cris_extract_struct_value_address (char *regbuf)
1100 return struct_return_address;
1103 /* Returns 1 if a value of the given type being returned from a function
1104 must have space allocated for it on the stack. gcc_p is true if the
1105 function being considered is known to have been compiled by GCC.
1106 In the CRIS ABI, structure return values are passed to the called
1107 function by reference in register R9 to a caller-allocated area, so
1108 this is always true. */
1111 cris_use_struct_convention (int gcc_p, struct type *type)
1116 /* Returns 1 if the given type will be passed by pointer rather than
1119 /* In the original CRIS ABI, arguments shorter than or equal to 32 bits are
1123 cris_abi_original_reg_struct_has_addr (int gcc_p, struct type *type)
1125 return (TYPE_LENGTH (type) > 4);
1128 /* In the CRIS ABI V2, arguments shorter than or equal to 64 bits are passed
1132 cris_abi_v2_reg_struct_has_addr (int gcc_p, struct type *type)
1134 return (TYPE_LENGTH (type) > 8);
1137 /* Returns 1 if the function invocation represented by fi does not have a
1138 stack frame associated with it. Otherwise return 0. */
1141 cris_frameless_function_invocation (struct frame_info *fi)
1143 if ((get_frame_type (fi) == SIGTRAMP_FRAME))
1146 return frameless_look_for_prologue (fi);
1149 /* See frame.h. Determines the address of all registers in the current stack
1150 frame storing each in frame->saved_regs. Space for frame->saved_regs shall
1151 be allocated by FRAME_INIT_SAVED_REGS using frame_saved_regs_zalloc. */
1154 cris_frame_init_saved_regs (struct frame_info *fi)
1157 struct symtab_and_line sal;
1159 char *dummy_regs = deprecated_generic_find_dummy_frame (get_frame_pc (fi),
1160 get_frame_base (fi));
1162 /* Examine the entire prologue. */
1163 register int frameless_p = 0;
1165 /* Has this frame's registers already been initialized? */
1166 if (get_frame_saved_regs (fi))
1169 frame_saved_regs_zalloc (fi);
1173 /* I don't see this ever happening, considering the context in which
1174 cris_frame_init_saved_regs is called (always when we're not in
1176 memcpy (get_frame_saved_regs (fi), dummy_regs, SIZEOF_FRAME_SAVED_REGS);
1180 ip = get_pc_function_start (get_frame_pc (fi));
1181 sal = find_pc_line (ip, 0);
1183 /* If there is no symbol information then sal.end == 0, and we end up
1184 examining only the first instruction in the function prologue.
1185 Exaggerating the limit seems to be harmless. */
1187 best_limit = sal.end;
1189 best_limit = ip + 100;
1191 cris_examine (ip, best_limit, fi, frameless_p);
1195 /* Initialises the extra frame information at the creation of a new frame.
1196 The inparameter fromleaf is 0 when the call is from create_new_frame.
1197 When the call is from get_prev_frame_info, fromleaf is determined by
1198 cris_frameless_function_invocation. */
1201 cris_init_extra_frame_info (int fromleaf, struct frame_info *fi)
1203 if (get_next_frame (fi))
1205 /* Called from get_prev_frame. */
1206 deprecated_update_frame_pc_hack (fi, FRAME_SAVED_PC (get_next_frame (fi)));
1209 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
1211 get_frame_extra_info (fi)->return_pc = 0;
1212 get_frame_extra_info (fi)->leaf_function = 0;
1214 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi),
1215 get_frame_base (fi),
1216 get_frame_base (fi)))
1218 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
1219 by assuming it's always FP. */
1220 deprecated_update_frame_base_hack (fi, deprecated_read_register_dummy (get_frame_pc (fi), get_frame_base (fi), SP_REGNUM));
1221 get_frame_extra_info (fi)->return_pc =
1222 deprecated_read_register_dummy (get_frame_pc (fi),
1223 get_frame_base (fi), PC_REGNUM);
1225 /* FIXME: Is this necessarily true? */
1226 get_frame_extra_info (fi)->leaf_function = 0;
1230 cris_frame_init_saved_regs (fi);
1232 /* Check fromleaf/frameless_function_invocation. (FIXME) */
1234 if (get_frame_saved_regs (fi)[SRP_REGNUM] != 0)
1236 /* SRP was saved on the stack; non-leaf function. */
1237 get_frame_extra_info (fi)->return_pc =
1238 read_memory_integer (get_frame_saved_regs (fi)[SRP_REGNUM],
1239 REGISTER_RAW_SIZE (SRP_REGNUM));
1243 /* SRP is still in a register; leaf function. */
1244 get_frame_extra_info (fi)->return_pc = read_register (SRP_REGNUM);
1245 /* FIXME: Should leaf_function be set to 1 here? */
1246 get_frame_extra_info (fi)->leaf_function = 1;
1251 /* Return the content of the frame pointer in the present frame. In other
1252 words, determine the address of the calling function's frame. */
1255 cris_frame_chain (struct frame_info *fi)
1257 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi),
1258 get_frame_base (fi),
1259 get_frame_base (fi)))
1261 return get_frame_base (fi);
1263 else if (!inside_entry_file (get_frame_pc (fi)))
1265 return read_memory_unsigned_integer (get_frame_base (fi), 4);
1273 /* Return the saved PC (which equals the return address) of this frame. */
1276 cris_frame_saved_pc (struct frame_info *fi)
1278 return get_frame_extra_info (fi)->return_pc;
1281 /* Setup the function arguments for calling a function in the inferior. */
1284 cris_abi_original_push_arguments (int nargs, struct value **args,
1285 CORE_ADDR sp, int struct_return,
1286 CORE_ADDR struct_addr)
1297 /* Data and parameters reside in different areas on the stack.
1298 Both frame pointers grow toward higher addresses. */
1299 CORE_ADDR fp_params;
1302 /* Are we returning a value using a structure return or a normal value
1303 return? struct_addr is the address of the reserved space for the return
1304 structure to be written on the stack. */
1307 write_register (STR_REGNUM, struct_addr);
1310 /* Make sure there's space on the stack. Allocate space for data and a
1311 parameter to refer to that data. */
1312 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
1313 stack_alloc += (TYPE_LENGTH (VALUE_TYPE (args[argnum])) + REGISTER_SIZE);
1315 /* We may over-allocate a little here, but that won't hurt anything. */
1317 /* Initialize stack frame pointers. */
1319 fp_data = sp + (nargs * REGISTER_SIZE);
1321 /* Now load as many as possible of the first arguments into
1322 registers, and push the rest onto the stack. */
1323 argreg = ARG1_REGNUM;
1326 for (argnum = 0; argnum < nargs; argnum++)
1328 type = VALUE_TYPE (args[argnum]);
1329 len = TYPE_LENGTH (type);
1330 val = (char *) VALUE_CONTENTS (args[argnum]);
1332 if (len <= REGISTER_SIZE && argreg <= ARG4_REGNUM)
1334 /* Data fits in a register; put it in the first available
1336 write_register (argreg, *(unsigned long *) val);
1339 else if (len > REGISTER_SIZE && argreg <= ARG4_REGNUM)
1341 /* Data does not fit in register; pass it on the stack and
1342 put its address in the first available register. */
1343 write_memory (fp_data, val, len);
1344 write_register (argreg, fp_data);
1348 else if (len > REGISTER_SIZE)
1350 /* Data does not fit in register; put both data and
1351 parameter on the stack. */
1352 write_memory (fp_data, val, len);
1353 write_memory (fp_params, (char *) (&fp_data), REGISTER_SIZE);
1355 fp_params += REGISTER_SIZE;
1359 /* Data fits in a register, but we are out of registers;
1360 put the parameter on the stack. */
1361 write_memory (fp_params, val, REGISTER_SIZE);
1362 fp_params += REGISTER_SIZE;
1370 cris_abi_v2_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
1371 int struct_return, CORE_ADDR struct_addr)
1380 /* The function's arguments and memory allocated by gdb for the arguments to
1381 point at reside in separate areas on the stack.
1382 Both frame pointers grow toward higher addresses. */
1386 /* Are we returning a value using a structure return or a normal value
1387 return? struct_addr is the address of the reserved space for the return
1388 structure to be written on the stack. */
1391 write_register (STR_REGNUM, struct_addr);
1394 /* Allocate enough to keep things word-aligned on both parts of the
1397 for (argnum = 0; argnum < nargs; argnum++)
1402 len = TYPE_LENGTH (VALUE_TYPE (args[argnum]));
1403 reg_demand = (len / REGISTER_SIZE) + (len % REGISTER_SIZE != 0 ? 1 : 0);
1405 /* reg_demand * REGISTER_SIZE is the amount of memory we might need to
1406 allocate for this argument. 2 * REGISTER_SIZE is the amount of stack
1407 space we might need to pass the argument itself (either by value or by
1409 stack_alloc += (reg_demand * REGISTER_SIZE + 2 * REGISTER_SIZE);
1412 /* We may over-allocate a little here, but that won't hurt anything. */
1414 /* Initialize frame pointers. */
1416 fp_mem = sp + (nargs * (2 * REGISTER_SIZE));
1418 /* Now load as many as possible of the first arguments into registers,
1419 and push the rest onto the stack. */
1420 argreg = ARG1_REGNUM;
1423 for (argnum = 0; argnum < nargs; argnum++)
1430 len = TYPE_LENGTH (VALUE_TYPE (args[argnum]));
1431 val = (char *) VALUE_CONTENTS (args[argnum]);
1433 /* How may registers worth of storage do we need for this argument? */
1434 reg_demand = (len / REGISTER_SIZE) + (len % REGISTER_SIZE != 0 ? 1 : 0);
1436 if (len <= (2 * REGISTER_SIZE)
1437 && (argreg + reg_demand - 1 <= ARG4_REGNUM))
1439 /* Data passed by value. Fits in available register(s). */
1440 for (i = 0; i < reg_demand; i++)
1442 write_register (argreg, *(unsigned long *) val);
1444 val += REGISTER_SIZE;
1447 else if (len <= (2 * REGISTER_SIZE) && argreg <= ARG4_REGNUM)
1449 /* Data passed by value. Does not fit in available register(s).
1450 Use the register(s) first, then the stack. */
1451 for (i = 0; i < reg_demand; i++)
1453 if (argreg <= ARG4_REGNUM)
1455 write_register (argreg, *(unsigned long *) val);
1457 val += REGISTER_SIZE;
1461 /* I guess this memory write could write the remaining data
1462 all at once instead of in REGISTER_SIZE chunks. */
1463 write_memory (fp_arg, val, REGISTER_SIZE);
1464 fp_arg += REGISTER_SIZE;
1465 val += REGISTER_SIZE;
1469 else if (len > (2 * REGISTER_SIZE))
1471 /* Data passed by reference. Put it on the stack. */
1472 write_memory (fp_mem, val, len);
1473 write_memory (fp_arg, (char *) (&fp_mem), REGISTER_SIZE);
1475 /* fp_mem need not be word-aligned since it's just a chunk of
1476 memory being pointed at. That is, += len would do. */
1477 fp_mem += reg_demand * REGISTER_SIZE;
1478 fp_arg += REGISTER_SIZE;
1482 /* Data passed by value. No available registers. Put it on
1484 write_memory (fp_arg, val, len);
1486 /* fp_arg must be word-aligned (i.e., don't += len) to match
1487 the function prologue. */
1488 fp_arg += reg_demand * REGISTER_SIZE;
1495 /* Never put the return address on the stack. The register SRP is pushed
1496 by the called function unless it is a leaf-function. Due to the BRP
1497 register the PC will change when continue is sent. */
1500 cris_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1502 write_register (SRP_REGNUM, CALL_DUMMY_ADDRESS ());
1506 /* Restore the machine to the state it had before the current frame
1507 was created. Discard the innermost frame from the stack and restore
1508 all saved registers. */
1511 cris_pop_frame (void)
1513 register struct frame_info *fi = get_current_frame ();
1515 register int stack_offset = 0;
1517 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi),
1518 get_frame_base (fi),
1519 get_frame_base (fi)))
1521 /* This happens when we hit a breakpoint set at the entry point,
1522 when returning from a dummy frame. */
1523 generic_pop_dummy_frame ();
1527 cris_frame_init_saved_regs (fi);
1529 /* For each register, the address of where it was saved on entry to
1530 the frame now lies in fi->saved_regs[regno], or zero if it was not
1531 saved. This includes special registers such as PC and FP saved in
1532 special ways in the stack frame. The SP_REGNUM is even more
1533 special, the address here is the SP for the next frame, not the
1534 address where the SP was saved. */
1536 /* Restore general registers R0 - R7. They were pushed on the stack
1537 after SP was saved. */
1538 for (regno = 0; regno < FP_REGNUM; regno++)
1540 if (get_frame_saved_regs (fi)[regno])
1542 write_register (regno,
1543 read_memory_integer (get_frame_saved_regs (fi)[regno], 4));
1547 if (get_frame_saved_regs (fi)[FP_REGNUM])
1549 /* Pop the frame pointer (R8). It was pushed before SP
1551 write_register (FP_REGNUM,
1552 read_memory_integer (get_frame_saved_regs (fi)[FP_REGNUM], 4));
1555 /* Not a leaf function. */
1556 if (get_frame_saved_regs (fi)[SRP_REGNUM])
1558 /* SRP was pushed before SP was saved. */
1562 /* Restore the SP and adjust for R8 and (possibly) SRP. */
1563 write_register (SP_REGNUM, get_frame_saved_regs (fi)[FP_REGNUM] + stack_offset);
1567 /* Currently, we can't get the correct info into fi->saved_regs
1568 without a frame pointer. */
1571 /* Restore the PC. */
1572 write_register (PC_REGNUM, get_frame_extra_info (fi)->return_pc);
1574 flush_cached_frames ();
1577 /* Calculates a value that measures how good inst_args constraints an
1578 instruction. It stems from cris_constraint, found in cris-dis.c. */
1581 constraint (unsigned int insn, const signed char *inst_args,
1582 inst_env_type *inst_env)
1587 const char *s = inst_args;
1593 if ((insn & 0x30) == 0x30)
1598 /* A prefix operand. */
1599 if (inst_env->prefix_found)
1605 /* A "push" prefix. (This check was REMOVED by san 970921.) Check for
1606 valid "push" size. In case of special register, it may be != 4. */
1607 if (inst_env->prefix_found)
1613 retval = (((insn >> 0xC) & 0xF) == (insn & 0xF));
1621 tmp = (insn >> 0xC) & 0xF;
1623 for (i = 0; cris_spec_regs[i].name != NULL; i++)
1625 /* Since we match four bits, we will give a value of
1626 4 - 1 = 3 in a match. If there is a corresponding
1627 exact match of a special register in another pattern, it
1628 will get a value of 4, which will be higher. This should
1629 be correct in that an exact pattern would match better that
1631 Note that there is a reason for not returning zero; the
1632 pattern for "clear" is partly matched in the bit-pattern
1633 (the two lower bits must be zero), while the bit-pattern
1634 for a move from a special register is matched in the
1635 register constraint.
1636 This also means we will will have a race condition if
1637 there is a partly match in three bits in the bit pattern. */
1638 if (tmp == cris_spec_regs[i].number)
1645 if (cris_spec_regs[i].name == NULL)
1652 /* Returns the number of bits set in the variable value. */
1655 number_of_bits (unsigned int value)
1657 int number_of_bits = 0;
1661 number_of_bits += 1;
1662 value &= (value - 1);
1664 return number_of_bits;
1667 /* Finds the address that should contain the single step breakpoint(s).
1668 It stems from code in cris-dis.c. */
1671 find_cris_op (unsigned short insn, inst_env_type *inst_env)
1674 int max_level_of_match = -1;
1675 int max_matched = -1;
1678 for (i = 0; cris_opcodes[i].name != NULL; i++)
1680 if (((cris_opcodes[i].match & insn) == cris_opcodes[i].match)
1681 && ((cris_opcodes[i].lose & insn) == 0))
1683 level_of_match = constraint (insn, cris_opcodes[i].args, inst_env);
1684 if (level_of_match >= 0)
1687 number_of_bits (cris_opcodes[i].match | cris_opcodes[i].lose);
1688 if (level_of_match > max_level_of_match)
1691 max_level_of_match = level_of_match;
1692 if (level_of_match == 16)
1694 /* All bits matched, cannot find better. */
1704 /* Attempts to find single-step breakpoints. Returns -1 on failure which is
1705 actually an internal error. */
1708 find_step_target (inst_env_type *inst_env)
1712 unsigned short insn;
1714 /* Create a local register image and set the initial state. */
1715 for (i = 0; i < NUM_GENREGS; i++)
1717 inst_env->reg[i] = (unsigned long) read_register (i);
1719 offset = NUM_GENREGS;
1720 for (i = 0; i < NUM_SPECREGS; i++)
1722 inst_env->preg[i] = (unsigned long) read_register (offset + i);
1724 inst_env->branch_found = 0;
1725 inst_env->slot_needed = 0;
1726 inst_env->delay_slot_pc_active = 0;
1727 inst_env->prefix_found = 0;
1728 inst_env->invalid = 0;
1729 inst_env->xflag_found = 0;
1730 inst_env->disable_interrupt = 0;
1732 /* Look for a step target. */
1735 /* Read an instruction from the client. */
1736 insn = read_memory_unsigned_integer (inst_env->reg[PC_REGNUM], 2);
1738 /* If the instruction is not in a delay slot the new content of the
1739 PC is [PC] + 2. If the instruction is in a delay slot it is not
1740 that simple. Since a instruction in a delay slot cannot change
1741 the content of the PC, it does not matter what value PC will have.
1742 Just make sure it is a valid instruction. */
1743 if (!inst_env->delay_slot_pc_active)
1745 inst_env->reg[PC_REGNUM] += 2;
1749 inst_env->delay_slot_pc_active = 0;
1750 inst_env->reg[PC_REGNUM] = inst_env->delay_slot_pc;
1752 /* Analyse the present instruction. */
1753 i = find_cris_op (insn, inst_env);
1756 inst_env->invalid = 1;
1760 cris_gdb_func (cris_opcodes[i].op, insn, inst_env);
1762 } while (!inst_env->invalid
1763 && (inst_env->prefix_found || inst_env->xflag_found
1764 || inst_env->slot_needed));
1768 /* There is no hardware single-step support. The function find_step_target
1769 digs through the opcodes in order to find all possible targets.
1770 Either one ordinary target or two targets for branches may be found. */
1773 cris_software_single_step (enum target_signal ignore, int insert_breakpoints)
1775 inst_env_type inst_env;
1777 if (insert_breakpoints)
1779 /* Analyse the present instruction environment and insert
1781 int status = find_step_target (&inst_env);
1784 /* Could not find a target. FIXME: Should do something. */
1788 /* Insert at most two breakpoints. One for the next PC content
1789 and possibly another one for a branch, jump, etc. */
1790 next_pc = (CORE_ADDR) inst_env.reg[PC_REGNUM];
1791 target_insert_breakpoint (next_pc, break_mem[0]);
1792 if (inst_env.branch_found
1793 && (CORE_ADDR) inst_env.branch_break_address != next_pc)
1795 branch_target_address =
1796 (CORE_ADDR) inst_env.branch_break_address;
1797 target_insert_breakpoint (branch_target_address, break_mem[1]);
1798 branch_break_inserted = 1;
1804 /* Remove breakpoints. */
1805 target_remove_breakpoint (next_pc, break_mem[0]);
1806 if (branch_break_inserted)
1808 target_remove_breakpoint (branch_target_address, break_mem[1]);
1809 branch_break_inserted = 0;
1814 /* Calculates the prefix value for quick offset addressing mode. */
1817 quick_mode_bdap_prefix (unsigned short inst, inst_env_type *inst_env)
1819 /* It's invalid to be in a delay slot. You can't have a prefix to this
1820 instruction (not 100% sure). */
1821 if (inst_env->slot_needed || inst_env->prefix_found)
1823 inst_env->invalid = 1;
1827 inst_env->prefix_value = inst_env->reg[cris_get_operand2 (inst)];
1828 inst_env->prefix_value += cris_get_bdap_quick_offset (inst);
1830 /* A prefix doesn't change the xflag_found. But the rest of the flags
1832 inst_env->slot_needed = 0;
1833 inst_env->prefix_found = 1;
1836 /* Updates the autoincrement register. The size of the increment is derived
1837 from the size of the operation. The PC is always kept aligned on even
1841 process_autoincrement (int size, unsigned short inst, inst_env_type *inst_env)
1843 if (size == INST_BYTE_SIZE)
1845 inst_env->reg[cris_get_operand1 (inst)] += 1;
1847 /* The PC must be word aligned, so increase the PC with one
1848 word even if the size is byte. */
1849 if (cris_get_operand1 (inst) == REG_PC)
1851 inst_env->reg[REG_PC] += 1;
1854 else if (size == INST_WORD_SIZE)
1856 inst_env->reg[cris_get_operand1 (inst)] += 2;
1858 else if (size == INST_DWORD_SIZE)
1860 inst_env->reg[cris_get_operand1 (inst)] += 4;
1865 inst_env->invalid = 1;
1869 /* Just a forward declaration. */
1871 unsigned long get_data_from_address (unsigned short *inst, CORE_ADDR address);
1873 /* Calculates the prefix value for the general case of offset addressing
1877 bdap_prefix (unsigned short inst, inst_env_type *inst_env)
1882 /* It's invalid to be in a delay slot. */
1883 if (inst_env->slot_needed || inst_env->prefix_found)
1885 inst_env->invalid = 1;
1889 /* The calculation of prefix_value used to be after process_autoincrement,
1890 but that fails for an instruction such as jsr [$r0+12] which is encoded
1891 as 5f0d 0c00 30b9 when compiled with -fpic. Since PC is operand1 it
1892 mustn't be incremented until we have read it and what it points at. */
1893 inst_env->prefix_value = inst_env->reg[cris_get_operand2 (inst)];
1895 /* The offset is an indirection of the contents of the operand1 register. */
1896 inst_env->prefix_value +=
1897 get_data_from_address (&inst, inst_env->reg[cris_get_operand1 (inst)]);
1899 if (cris_get_mode (inst) == AUTOINC_MODE)
1901 process_autoincrement (cris_get_size (inst), inst, inst_env);
1904 /* A prefix doesn't change the xflag_found. But the rest of the flags
1906 inst_env->slot_needed = 0;
1907 inst_env->prefix_found = 1;
1910 /* Calculates the prefix value for the index addressing mode. */
1913 biap_prefix (unsigned short inst, inst_env_type *inst_env)
1915 /* It's invalid to be in a delay slot. I can't see that it's possible to
1916 have a prefix to this instruction. So I will treat this as invalid. */
1917 if (inst_env->slot_needed || inst_env->prefix_found)
1919 inst_env->invalid = 1;
1923 inst_env->prefix_value = inst_env->reg[cris_get_operand1 (inst)];
1925 /* The offset is the operand2 value shifted the size of the instruction
1927 inst_env->prefix_value +=
1928 inst_env->reg[cris_get_operand2 (inst)] << cris_get_size (inst);
1930 /* If the PC is operand1 (base) the address used is the address after
1931 the main instruction, i.e. address + 2 (the PC is already compensated
1932 for the prefix operation). */
1933 if (cris_get_operand1 (inst) == REG_PC)
1935 inst_env->prefix_value += 2;
1938 /* A prefix doesn't change the xflag_found. But the rest of the flags
1940 inst_env->slot_needed = 0;
1941 inst_env->xflag_found = 0;
1942 inst_env->prefix_found = 1;
1945 /* Calculates the prefix value for the double indirect addressing mode. */
1948 dip_prefix (unsigned short inst, inst_env_type *inst_env)
1953 /* It's invalid to be in a delay slot. */
1954 if (inst_env->slot_needed || inst_env->prefix_found)
1956 inst_env->invalid = 1;
1960 /* The prefix value is one dereference of the contents of the operand1
1962 address = (CORE_ADDR) inst_env->reg[cris_get_operand1 (inst)];
1963 inst_env->prefix_value = read_memory_unsigned_integer (address, 4);
1965 /* Check if the mode is autoincrement. */
1966 if (cris_get_mode (inst) == AUTOINC_MODE)
1968 inst_env->reg[cris_get_operand1 (inst)] += 4;
1971 /* A prefix doesn't change the xflag_found. But the rest of the flags
1973 inst_env->slot_needed = 0;
1974 inst_env->xflag_found = 0;
1975 inst_env->prefix_found = 1;
1978 /* Finds the destination for a branch with 8-bits offset. */
1981 eight_bit_offset_branch_op (unsigned short inst, inst_env_type *inst_env)
1986 /* If we have a prefix or are in a delay slot it's bad. */
1987 if (inst_env->slot_needed || inst_env->prefix_found)
1989 inst_env->invalid = 1;
1993 /* We have a branch, find out where the branch will land. */
1994 offset = cris_get_branch_short_offset (inst);
1996 /* Check if the offset is signed. */
1997 if (offset & BRANCH_SIGNED_SHORT_OFFSET_MASK)
2002 /* The offset ends with the sign bit, set it to zero. The address
2003 should always be word aligned. */
2004 offset &= ~BRANCH_SIGNED_SHORT_OFFSET_MASK;
2006 inst_env->branch_found = 1;
2007 inst_env->branch_break_address = inst_env->reg[REG_PC] + offset;
2009 inst_env->slot_needed = 1;
2010 inst_env->prefix_found = 0;
2011 inst_env->xflag_found = 0;
2012 inst_env->disable_interrupt = 1;
2015 /* Finds the destination for a branch with 16-bits offset. */
2018 sixteen_bit_offset_branch_op (unsigned short inst, inst_env_type *inst_env)
2022 /* If we have a prefix or is in a delay slot it's bad. */
2023 if (inst_env->slot_needed || inst_env->prefix_found)
2025 inst_env->invalid = 1;
2029 /* We have a branch, find out the offset for the branch. */
2030 offset = read_memory_integer (inst_env->reg[REG_PC], 2);
2032 /* The instruction is one word longer than normal, so add one word
2034 inst_env->reg[REG_PC] += 2;
2036 inst_env->branch_found = 1;
2037 inst_env->branch_break_address = inst_env->reg[REG_PC] + offset;
2040 inst_env->slot_needed = 1;
2041 inst_env->prefix_found = 0;
2042 inst_env->xflag_found = 0;
2043 inst_env->disable_interrupt = 1;
2046 /* Handles the ABS instruction. */
2049 abs_op (unsigned short inst, inst_env_type *inst_env)
2054 /* ABS can't have a prefix, so it's bad if it does. */
2055 if (inst_env->prefix_found)
2057 inst_env->invalid = 1;
2061 /* Check if the operation affects the PC. */
2062 if (cris_get_operand2 (inst) == REG_PC)
2065 /* It's invalid to change to the PC if we are in a delay slot. */
2066 if (inst_env->slot_needed)
2068 inst_env->invalid = 1;
2072 value = (long) inst_env->reg[REG_PC];
2074 /* The value of abs (SIGNED_DWORD_MASK) is SIGNED_DWORD_MASK. */
2075 if (value != SIGNED_DWORD_MASK)
2078 inst_env->reg[REG_PC] = (long) value;
2082 inst_env->slot_needed = 0;
2083 inst_env->prefix_found = 0;
2084 inst_env->xflag_found = 0;
2085 inst_env->disable_interrupt = 0;
2088 /* Handles the ADDI instruction. */
2091 addi_op (unsigned short inst, inst_env_type *inst_env)
2093 /* It's invalid to have the PC as base register. And ADDI can't have
2095 if (inst_env->prefix_found || (cris_get_operand1 (inst) == REG_PC))
2097 inst_env->invalid = 1;
2101 inst_env->slot_needed = 0;
2102 inst_env->prefix_found = 0;
2103 inst_env->xflag_found = 0;
2104 inst_env->disable_interrupt = 0;
2107 /* Handles the ASR instruction. */
2110 asr_op (unsigned short inst, inst_env_type *inst_env)
2113 unsigned long value;
2114 unsigned long signed_extend_mask = 0;
2116 /* ASR can't have a prefix, so check that it doesn't. */
2117 if (inst_env->prefix_found)
2119 inst_env->invalid = 1;
2123 /* Check if the PC is the target register. */
2124 if (cris_get_operand2 (inst) == REG_PC)
2126 /* It's invalid to change the PC in a delay slot. */
2127 if (inst_env->slot_needed)
2129 inst_env->invalid = 1;
2132 /* Get the number of bits to shift. */
2133 shift_steps = cris_get_asr_shift_steps (inst_env->reg[cris_get_operand1 (inst)]);
2134 value = inst_env->reg[REG_PC];
2136 /* Find out how many bits the operation should apply to. */
2137 if (cris_get_size (inst) == INST_BYTE_SIZE)
2139 if (value & SIGNED_BYTE_MASK)
2141 signed_extend_mask = 0xFF;
2142 signed_extend_mask = signed_extend_mask >> shift_steps;
2143 signed_extend_mask = ~signed_extend_mask;
2145 value = value >> shift_steps;
2146 value |= signed_extend_mask;
2148 inst_env->reg[REG_PC] &= 0xFFFFFF00;
2149 inst_env->reg[REG_PC] |= value;
2151 else if (cris_get_size (inst) == INST_WORD_SIZE)
2153 if (value & SIGNED_WORD_MASK)
2155 signed_extend_mask = 0xFFFF;
2156 signed_extend_mask = signed_extend_mask >> shift_steps;
2157 signed_extend_mask = ~signed_extend_mask;
2159 value = value >> shift_steps;
2160 value |= signed_extend_mask;
2162 inst_env->reg[REG_PC] &= 0xFFFF0000;
2163 inst_env->reg[REG_PC] |= value;
2165 else if (cris_get_size (inst) == INST_DWORD_SIZE)
2167 if (value & SIGNED_DWORD_MASK)
2169 signed_extend_mask = 0xFFFFFFFF;
2170 signed_extend_mask = signed_extend_mask >> shift_steps;
2171 signed_extend_mask = ~signed_extend_mask;
2173 value = value >> shift_steps;
2174 value |= signed_extend_mask;
2175 inst_env->reg[REG_PC] = value;
2178 inst_env->slot_needed = 0;
2179 inst_env->prefix_found = 0;
2180 inst_env->xflag_found = 0;
2181 inst_env->disable_interrupt = 0;
2184 /* Handles the ASRQ instruction. */
2187 asrq_op (unsigned short inst, inst_env_type *inst_env)
2191 unsigned long value;
2192 unsigned long signed_extend_mask = 0;
2194 /* ASRQ can't have a prefix, so check that it doesn't. */
2195 if (inst_env->prefix_found)
2197 inst_env->invalid = 1;
2201 /* Check if the PC is the target register. */
2202 if (cris_get_operand2 (inst) == REG_PC)
2205 /* It's invalid to change the PC in a delay slot. */
2206 if (inst_env->slot_needed)
2208 inst_env->invalid = 1;
2211 /* The shift size is given as a 5 bit quick value, i.e. we don't
2212 want the the sign bit of the quick value. */
2213 shift_steps = cris_get_asr_shift_steps (inst);
2214 value = inst_env->reg[REG_PC];
2215 if (value & SIGNED_DWORD_MASK)
2217 signed_extend_mask = 0xFFFFFFFF;
2218 signed_extend_mask = signed_extend_mask >> shift_steps;
2219 signed_extend_mask = ~signed_extend_mask;
2221 value = value >> shift_steps;
2222 value |= signed_extend_mask;
2223 inst_env->reg[REG_PC] = value;
2225 inst_env->slot_needed = 0;
2226 inst_env->prefix_found = 0;
2227 inst_env->xflag_found = 0;
2228 inst_env->disable_interrupt = 0;
2231 /* Handles the AX, EI and SETF instruction. */
2234 ax_ei_setf_op (unsigned short inst, inst_env_type *inst_env)
2236 if (inst_env->prefix_found)
2238 inst_env->invalid = 1;
2241 /* Check if the instruction is setting the X flag. */
2242 if (cris_is_xflag_bit_on (inst))
2244 inst_env->xflag_found = 1;
2248 inst_env->xflag_found = 0;
2250 inst_env->slot_needed = 0;
2251 inst_env->prefix_found = 0;
2252 inst_env->disable_interrupt = 1;
2255 /* Checks if the instruction is in assign mode. If so, it updates the assign
2256 register. Note that check_assign assumes that the caller has checked that
2257 there is a prefix to this instruction. The mode check depends on this. */
2260 check_assign (unsigned short inst, inst_env_type *inst_env)
2262 /* Check if it's an assign addressing mode. */
2263 if (cris_get_mode (inst) == PREFIX_ASSIGN_MODE)
2265 /* Assign the prefix value to operand 1. */
2266 inst_env->reg[cris_get_operand1 (inst)] = inst_env->prefix_value;
2270 /* Handles the 2-operand BOUND instruction. */
2273 two_operand_bound_op (unsigned short inst, inst_env_type *inst_env)
2275 /* It's invalid to have the PC as the index operand. */
2276 if (cris_get_operand2 (inst) == REG_PC)
2278 inst_env->invalid = 1;
2281 /* Check if we have a prefix. */
2282 if (inst_env->prefix_found)
2284 check_assign (inst, inst_env);
2286 /* Check if this is an autoincrement mode. */
2287 else if (cris_get_mode (inst) == AUTOINC_MODE)
2289 /* It's invalid to change the PC in a delay slot. */
2290 if (inst_env->slot_needed)
2292 inst_env->invalid = 1;
2295 process_autoincrement (cris_get_size (inst), inst, inst_env);
2297 inst_env->slot_needed = 0;
2298 inst_env->prefix_found = 0;
2299 inst_env->xflag_found = 0;
2300 inst_env->disable_interrupt = 0;
2303 /* Handles the 3-operand BOUND instruction. */
2306 three_operand_bound_op (unsigned short inst, inst_env_type *inst_env)
2308 /* It's an error if we haven't got a prefix. And it's also an error
2309 if the PC is the destination register. */
2310 if ((!inst_env->prefix_found) || (cris_get_operand1 (inst) == REG_PC))
2312 inst_env->invalid = 1;
2315 inst_env->slot_needed = 0;
2316 inst_env->prefix_found = 0;
2317 inst_env->xflag_found = 0;
2318 inst_env->disable_interrupt = 0;
2321 /* Clears the status flags in inst_env. */
2324 btst_nop_op (unsigned short inst, inst_env_type *inst_env)
2326 /* It's an error if we have got a prefix. */
2327 if (inst_env->prefix_found)
2329 inst_env->invalid = 1;
2333 inst_env->slot_needed = 0;
2334 inst_env->prefix_found = 0;
2335 inst_env->xflag_found = 0;
2336 inst_env->disable_interrupt = 0;
2339 /* Clears the status flags in inst_env. */
2342 clearf_di_op (unsigned short inst, inst_env_type *inst_env)
2344 /* It's an error if we have got a prefix. */
2345 if (inst_env->prefix_found)
2347 inst_env->invalid = 1;
2351 inst_env->slot_needed = 0;
2352 inst_env->prefix_found = 0;
2353 inst_env->xflag_found = 0;
2354 inst_env->disable_interrupt = 1;
2357 /* Handles the CLEAR instruction if it's in register mode. */
2360 reg_mode_clear_op (unsigned short inst, inst_env_type *inst_env)
2362 /* Check if the target is the PC. */
2363 if (cris_get_operand2 (inst) == REG_PC)
2365 /* The instruction will clear the instruction's size bits. */
2366 int clear_size = cris_get_clear_size (inst);
2367 if (clear_size == INST_BYTE_SIZE)
2369 inst_env->delay_slot_pc = inst_env->reg[REG_PC] & 0xFFFFFF00;
2371 if (clear_size == INST_WORD_SIZE)
2373 inst_env->delay_slot_pc = inst_env->reg[REG_PC] & 0xFFFF0000;
2375 if (clear_size == INST_DWORD_SIZE)
2377 inst_env->delay_slot_pc = 0x0;
2379 /* The jump will be delayed with one delay slot. So we need a delay
2381 inst_env->slot_needed = 1;
2382 inst_env->delay_slot_pc_active = 1;
2386 /* The PC will not change => no delay slot. */
2387 inst_env->slot_needed = 0;
2389 inst_env->prefix_found = 0;
2390 inst_env->xflag_found = 0;
2391 inst_env->disable_interrupt = 0;
2394 /* Handles the TEST instruction if it's in register mode. */
2397 reg_mode_test_op (unsigned short inst, inst_env_type *inst_env)
2399 /* It's an error if we have got a prefix. */
2400 if (inst_env->prefix_found)
2402 inst_env->invalid = 1;
2405 inst_env->slot_needed = 0;
2406 inst_env->prefix_found = 0;
2407 inst_env->xflag_found = 0;
2408 inst_env->disable_interrupt = 0;
2412 /* Handles the CLEAR and TEST instruction if the instruction isn't
2413 in register mode. */
2416 none_reg_mode_clear_test_op (unsigned short inst, inst_env_type *inst_env)
2418 /* Check if we are in a prefix mode. */
2419 if (inst_env->prefix_found)
2421 /* The only way the PC can change is if this instruction is in
2422 assign addressing mode. */
2423 check_assign (inst, inst_env);
2425 /* Indirect mode can't change the PC so just check if the mode is
2427 else if (cris_get_mode (inst) == AUTOINC_MODE)
2429 process_autoincrement (cris_get_size (inst), inst, inst_env);
2431 inst_env->slot_needed = 0;
2432 inst_env->prefix_found = 0;
2433 inst_env->xflag_found = 0;
2434 inst_env->disable_interrupt = 0;
2437 /* Checks that the PC isn't the destination register or the instructions has
2441 dstep_logshift_mstep_neg_not_op (unsigned short inst, inst_env_type *inst_env)
2443 /* It's invalid to have the PC as the destination. The instruction can't
2445 if ((cris_get_operand2 (inst) == REG_PC) || inst_env->prefix_found)
2447 inst_env->invalid = 1;
2451 inst_env->slot_needed = 0;
2452 inst_env->prefix_found = 0;
2453 inst_env->xflag_found = 0;
2454 inst_env->disable_interrupt = 0;
2457 /* Checks that the instruction doesn't have a prefix. */
2460 break_op (unsigned short inst, inst_env_type *inst_env)
2462 /* The instruction can't have a prefix. */
2463 if (inst_env->prefix_found)
2465 inst_env->invalid = 1;
2469 inst_env->slot_needed = 0;
2470 inst_env->prefix_found = 0;
2471 inst_env->xflag_found = 0;
2472 inst_env->disable_interrupt = 1;
2475 /* Checks that the PC isn't the destination register and that the instruction
2476 doesn't have a prefix. */
2479 scc_op (unsigned short inst, inst_env_type *inst_env)
2481 /* It's invalid to have the PC as the destination. The instruction can't
2483 if ((cris_get_operand2 (inst) == REG_PC) || inst_env->prefix_found)
2485 inst_env->invalid = 1;
2489 inst_env->slot_needed = 0;
2490 inst_env->prefix_found = 0;
2491 inst_env->xflag_found = 0;
2492 inst_env->disable_interrupt = 1;
2495 /* Handles the register mode JUMP instruction. */
2498 reg_mode_jump_op (unsigned short inst, inst_env_type *inst_env)
2500 /* It's invalid to do a JUMP in a delay slot. The mode is register, so
2501 you can't have a prefix. */
2502 if ((inst_env->slot_needed) || (inst_env->prefix_found))
2504 inst_env->invalid = 1;
2508 /* Just change the PC. */
2509 inst_env->reg[REG_PC] = inst_env->reg[cris_get_operand1 (inst)];
2510 inst_env->slot_needed = 0;
2511 inst_env->prefix_found = 0;
2512 inst_env->xflag_found = 0;
2513 inst_env->disable_interrupt = 1;
2516 /* Handles the JUMP instruction for all modes except register. */
2518 void none_reg_mode_jump_op (unsigned short inst, inst_env_type *inst_env)
2520 unsigned long newpc;
2523 /* It's invalid to do a JUMP in a delay slot. */
2524 if (inst_env->slot_needed)
2526 inst_env->invalid = 1;
2530 /* Check if we have a prefix. */
2531 if (inst_env->prefix_found)
2533 check_assign (inst, inst_env);
2535 /* Get the new value for the the PC. */
2537 read_memory_unsigned_integer ((CORE_ADDR) inst_env->prefix_value,
2542 /* Get the new value for the PC. */
2543 address = (CORE_ADDR) inst_env->reg[cris_get_operand1 (inst)];
2544 newpc = read_memory_unsigned_integer (address, 4);
2546 /* Check if we should increment a register. */
2547 if (cris_get_mode (inst) == AUTOINC_MODE)
2549 inst_env->reg[cris_get_operand1 (inst)] += 4;
2552 inst_env->reg[REG_PC] = newpc;
2554 inst_env->slot_needed = 0;
2555 inst_env->prefix_found = 0;
2556 inst_env->xflag_found = 0;
2557 inst_env->disable_interrupt = 1;
2560 /* Handles moves to special registers (aka P-register) for all modes. */
2563 move_to_preg_op (unsigned short inst, inst_env_type *inst_env)
2565 if (inst_env->prefix_found)
2567 /* The instruction has a prefix that means we are only interested if
2568 the instruction is in assign mode. */
2569 if (cris_get_mode (inst) == PREFIX_ASSIGN_MODE)
2571 /* The prefix handles the problem if we are in a delay slot. */
2572 if (cris_get_operand1 (inst) == REG_PC)
2574 /* Just take care of the assign. */
2575 check_assign (inst, inst_env);
2579 else if (cris_get_mode (inst) == AUTOINC_MODE)
2581 /* The instruction doesn't have a prefix, the only case left that we
2582 are interested in is the autoincrement mode. */
2583 if (cris_get_operand1 (inst) == REG_PC)
2585 /* If the PC is to be incremented it's invalid to be in a
2587 if (inst_env->slot_needed)
2589 inst_env->invalid = 1;
2593 /* The increment depends on the size of the special register. */
2594 if (cris_register_size (cris_get_operand2 (inst)) == 1)
2596 process_autoincrement (INST_BYTE_SIZE, inst, inst_env);
2598 else if (cris_register_size (cris_get_operand2 (inst)) == 2)
2600 process_autoincrement (INST_WORD_SIZE, inst, inst_env);
2604 process_autoincrement (INST_DWORD_SIZE, inst, inst_env);
2608 inst_env->slot_needed = 0;
2609 inst_env->prefix_found = 0;
2610 inst_env->xflag_found = 0;
2611 inst_env->disable_interrupt = 1;
2614 /* Handles moves from special registers (aka P-register) for all modes
2618 none_reg_mode_move_from_preg_op (unsigned short inst, inst_env_type *inst_env)
2620 if (inst_env->prefix_found)
2622 /* The instruction has a prefix that means we are only interested if
2623 the instruction is in assign mode. */
2624 if (cris_get_mode (inst) == PREFIX_ASSIGN_MODE)
2626 /* The prefix handles the problem if we are in a delay slot. */
2627 if (cris_get_operand1 (inst) == REG_PC)
2629 /* Just take care of the assign. */
2630 check_assign (inst, inst_env);
2634 /* The instruction doesn't have a prefix, the only case left that we
2635 are interested in is the autoincrement mode. */
2636 else if (cris_get_mode (inst) == AUTOINC_MODE)
2638 if (cris_get_operand1 (inst) == REG_PC)
2640 /* If the PC is to be incremented it's invalid to be in a
2642 if (inst_env->slot_needed)
2644 inst_env->invalid = 1;
2648 /* The increment depends on the size of the special register. */
2649 if (cris_register_size (cris_get_operand2 (inst)) == 1)
2651 process_autoincrement (INST_BYTE_SIZE, inst, inst_env);
2653 else if (cris_register_size (cris_get_operand2 (inst)) == 2)
2655 process_autoincrement (INST_WORD_SIZE, inst, inst_env);
2659 process_autoincrement (INST_DWORD_SIZE, inst, inst_env);
2663 inst_env->slot_needed = 0;
2664 inst_env->prefix_found = 0;
2665 inst_env->xflag_found = 0;
2666 inst_env->disable_interrupt = 1;
2669 /* Handles moves from special registers (aka P-register) when the mode
2673 reg_mode_move_from_preg_op (unsigned short inst, inst_env_type *inst_env)
2675 /* Register mode move from special register can't have a prefix. */
2676 if (inst_env->prefix_found)
2678 inst_env->invalid = 1;
2682 if (cris_get_operand1 (inst) == REG_PC)
2684 /* It's invalid to change the PC in a delay slot. */
2685 if (inst_env->slot_needed)
2687 inst_env->invalid = 1;
2690 /* The destination is the PC, the jump will have a delay slot. */
2691 inst_env->delay_slot_pc = inst_env->preg[cris_get_operand2 (inst)];
2692 inst_env->slot_needed = 1;
2693 inst_env->delay_slot_pc_active = 1;
2697 /* If the destination isn't PC, there will be no jump. */
2698 inst_env->slot_needed = 0;
2700 inst_env->prefix_found = 0;
2701 inst_env->xflag_found = 0;
2702 inst_env->disable_interrupt = 1;
2705 /* Handles the MOVEM from memory to general register instruction. */
2708 move_mem_to_reg_movem_op (unsigned short inst, inst_env_type *inst_env)
2710 if (inst_env->prefix_found)
2712 /* The prefix handles the problem if we are in a delay slot. Is the
2713 MOVEM instruction going to change the PC? */
2714 if (cris_get_operand2 (inst) >= REG_PC)
2716 inst_env->reg[REG_PC] =
2717 read_memory_unsigned_integer (inst_env->prefix_value, 4);
2719 /* The assign value is the value after the increment. Normally, the
2720 assign value is the value before the increment. */
2721 if ((cris_get_operand1 (inst) == REG_PC)
2722 && (cris_get_mode (inst) == PREFIX_ASSIGN_MODE))
2724 inst_env->reg[REG_PC] = inst_env->prefix_value;
2725 inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1);
2730 /* Is the MOVEM instruction going to change the PC? */
2731 if (cris_get_operand2 (inst) == REG_PC)
2733 /* It's invalid to change the PC in a delay slot. */
2734 if (inst_env->slot_needed)
2736 inst_env->invalid = 1;
2739 inst_env->reg[REG_PC] =
2740 read_memory_unsigned_integer (inst_env->reg[cris_get_operand1 (inst)],
2743 /* The increment is not depending on the size, instead it's depending
2744 on the number of registers loaded from memory. */
2745 if ((cris_get_operand1 (inst) == REG_PC) && (cris_get_mode (inst) == AUTOINC_MODE))
2747 /* It's invalid to change the PC in a delay slot. */
2748 if (inst_env->slot_needed)
2750 inst_env->invalid = 1;
2753 inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1);
2756 inst_env->slot_needed = 0;
2757 inst_env->prefix_found = 0;
2758 inst_env->xflag_found = 0;
2759 inst_env->disable_interrupt = 0;
2762 /* Handles the MOVEM to memory from general register instruction. */
2765 move_reg_to_mem_movem_op (unsigned short inst, inst_env_type *inst_env)
2767 if (inst_env->prefix_found)
2769 /* The assign value is the value after the increment. Normally, the
2770 assign value is the value before the increment. */
2771 if ((cris_get_operand1 (inst) == REG_PC) &&
2772 (cris_get_mode (inst) == PREFIX_ASSIGN_MODE))
2774 /* The prefix handles the problem if we are in a delay slot. */
2775 inst_env->reg[REG_PC] = inst_env->prefix_value;
2776 inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1);
2781 /* The increment is not depending on the size, instead it's depending
2782 on the number of registers loaded to memory. */
2783 if ((cris_get_operand1 (inst) == REG_PC) && (cris_get_mode (inst) == AUTOINC_MODE))
2785 /* It's invalid to change the PC in a delay slot. */
2786 if (inst_env->slot_needed)
2788 inst_env->invalid = 1;
2791 inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1);
2794 inst_env->slot_needed = 0;
2795 inst_env->prefix_found = 0;
2796 inst_env->xflag_found = 0;
2797 inst_env->disable_interrupt = 0;
2800 /* Handles the pop instruction to a general register.
2801 POP is a assembler macro for MOVE.D [SP+], Rd. */
2804 reg_pop_op (unsigned short inst, inst_env_type *inst_env)
2806 /* POP can't have a prefix. */
2807 if (inst_env->prefix_found)
2809 inst_env->invalid = 1;
2812 if (cris_get_operand2 (inst) == REG_PC)
2814 /* It's invalid to change the PC in a delay slot. */
2815 if (inst_env->slot_needed)
2817 inst_env->invalid = 1;
2820 inst_env->reg[REG_PC] =
2821 read_memory_unsigned_integer (inst_env->reg[REG_SP], 4);
2823 inst_env->slot_needed = 0;
2824 inst_env->prefix_found = 0;
2825 inst_env->xflag_found = 0;
2826 inst_env->disable_interrupt = 0;
2829 /* Handles moves from register to memory. */
2832 move_reg_to_mem_index_inc_op (unsigned short inst, inst_env_type *inst_env)
2834 /* Check if we have a prefix. */
2835 if (inst_env->prefix_found)
2837 /* The only thing that can change the PC is an assign. */
2838 check_assign (inst, inst_env);
2840 else if ((cris_get_operand1 (inst) == REG_PC)
2841 && (cris_get_mode (inst) == AUTOINC_MODE))
2843 /* It's invalid to change the PC in a delay slot. */
2844 if (inst_env->slot_needed)
2846 inst_env->invalid = 1;
2849 process_autoincrement (cris_get_size (inst), inst, inst_env);
2851 inst_env->slot_needed = 0;
2852 inst_env->prefix_found = 0;
2853 inst_env->xflag_found = 0;
2854 inst_env->disable_interrupt = 0;
2857 /* Handles the intructions that's not yet implemented, by setting
2858 inst_env->invalid to true. */
2861 not_implemented_op (unsigned short inst, inst_env_type *inst_env)
2863 inst_env->invalid = 1;
2866 /* Handles the XOR instruction. */
2869 xor_op (unsigned short inst, inst_env_type *inst_env)
2871 /* XOR can't have a prefix. */
2872 if (inst_env->prefix_found)
2874 inst_env->invalid = 1;
2878 /* Check if the PC is the target. */
2879 if (cris_get_operand2 (inst) == REG_PC)
2881 /* It's invalid to change the PC in a delay slot. */
2882 if (inst_env->slot_needed)
2884 inst_env->invalid = 1;
2887 inst_env->reg[REG_PC] ^= inst_env->reg[cris_get_operand1 (inst)];
2889 inst_env->slot_needed = 0;
2890 inst_env->prefix_found = 0;
2891 inst_env->xflag_found = 0;
2892 inst_env->disable_interrupt = 0;
2895 /* Handles the MULS instruction. */
2898 muls_op (unsigned short inst, inst_env_type *inst_env)
2900 /* MULS/U can't have a prefix. */
2901 if (inst_env->prefix_found)
2903 inst_env->invalid = 1;
2907 /* Consider it invalid if the PC is the target. */
2908 if (cris_get_operand2 (inst) == REG_PC)
2910 inst_env->invalid = 1;
2913 inst_env->slot_needed = 0;
2914 inst_env->prefix_found = 0;
2915 inst_env->xflag_found = 0;
2916 inst_env->disable_interrupt = 0;
2919 /* Handles the MULU instruction. */
2922 mulu_op (unsigned short inst, inst_env_type *inst_env)
2924 /* MULS/U can't have a prefix. */
2925 if (inst_env->prefix_found)
2927 inst_env->invalid = 1;
2931 /* Consider it invalid if the PC is the target. */
2932 if (cris_get_operand2 (inst) == REG_PC)
2934 inst_env->invalid = 1;
2937 inst_env->slot_needed = 0;
2938 inst_env->prefix_found = 0;
2939 inst_env->xflag_found = 0;
2940 inst_env->disable_interrupt = 0;
2943 /* Calculate the result of the instruction for ADD, SUB, CMP AND, OR and MOVE.
2944 The MOVE instruction is the move from source to register. */
2947 add_sub_cmp_and_or_move_action (unsigned short inst, inst_env_type *inst_env,
2948 unsigned long source1, unsigned long source2)
2950 unsigned long pc_mask;
2951 unsigned long operation_mask;
2953 /* Find out how many bits the operation should apply to. */
2954 if (cris_get_size (inst) == INST_BYTE_SIZE)
2956 pc_mask = 0xFFFFFF00;
2957 operation_mask = 0xFF;
2959 else if (cris_get_size (inst) == INST_WORD_SIZE)
2961 pc_mask = 0xFFFF0000;
2962 operation_mask = 0xFFFF;
2964 else if (cris_get_size (inst) == INST_DWORD_SIZE)
2967 operation_mask = 0xFFFFFFFF;
2971 /* The size is out of range. */
2972 inst_env->invalid = 1;
2976 /* The instruction just works on uw_operation_mask bits. */
2977 source2 &= operation_mask;
2978 source1 &= operation_mask;
2980 /* Now calculate the result. The opcode's 3 first bits separates
2981 the different actions. */
2982 switch (cris_get_opcode (inst) & 7)
2992 case 2: /* subtract */
2996 case 3: /* compare */
3008 inst_env->invalid = 1;
3014 /* Make sure that the result doesn't contain more than the instruction
3016 source2 &= operation_mask;
3018 /* Calculate the new breakpoint address. */
3019 inst_env->reg[REG_PC] &= pc_mask;
3020 inst_env->reg[REG_PC] |= source1;
3024 /* Extends the value from either byte or word size to a dword. If the mode
3025 is zero extend then the value is extended with zero. If instead the mode
3026 is signed extend the sign bit of the value is taken into consideration. */
3029 do_sign_or_zero_extend (unsigned long value, unsigned short *inst)
3031 /* The size can be either byte or word, check which one it is.
3032 Don't check the highest bit, it's indicating if it's a zero
3034 if (cris_get_size (*inst) & INST_WORD_SIZE)
3039 /* Check if the instruction is signed extend. If so, check if value has
3041 if (cris_is_signed_extend_bit_on (*inst) && (value & SIGNED_WORD_MASK))
3043 value |= SIGNED_WORD_EXTEND_MASK;
3051 /* Check if the instruction is signed extend. If so, check if value has
3053 if (cris_is_signed_extend_bit_on (*inst) && (value & SIGNED_BYTE_MASK))
3055 value |= SIGNED_BYTE_EXTEND_MASK;
3058 /* The size should now be dword. */
3059 cris_set_size_to_dword (inst);
3063 /* Handles the register mode for the ADD, SUB, CMP, AND, OR and MOVE
3064 instruction. The MOVE instruction is the move from source to register. */
3067 reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst,
3068 inst_env_type *inst_env)
3070 unsigned long operand1;
3071 unsigned long operand2;
3073 /* It's invalid to have a prefix to the instruction. This is a register
3074 mode instruction and can't have a prefix. */
3075 if (inst_env->prefix_found)
3077 inst_env->invalid = 1;
3080 /* Check if the instruction has PC as its target. */
3081 if (cris_get_operand2 (inst) == REG_PC)
3083 if (inst_env->slot_needed)
3085 inst_env->invalid = 1;
3088 /* The instruction has the PC as its target register. */
3089 operand1 = inst_env->reg[cris_get_operand1 (inst)];
3090 operand2 = inst_env->reg[REG_PC];
3092 /* Check if it's a extend, signed or zero instruction. */
3093 if (cris_get_opcode (inst) < 4)
3095 operand1 = do_sign_or_zero_extend (operand1, &inst);
3097 /* Calculate the PC value after the instruction, i.e. where the
3098 breakpoint should be. The order of the udw_operands is vital. */
3099 add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand1);
3101 inst_env->slot_needed = 0;
3102 inst_env->prefix_found = 0;
3103 inst_env->xflag_found = 0;
3104 inst_env->disable_interrupt = 0;
3107 /* Returns the data contained at address. The size of the data is derived from
3108 the size of the operation. If the instruction is a zero or signed
3109 extend instruction, the size field is changed in instruction. */
3112 get_data_from_address (unsigned short *inst, CORE_ADDR address)
3114 int size = cris_get_size (*inst);
3115 unsigned long value;
3117 /* If it's an extend instruction we don't want the signed extend bit,
3118 because it influences the size. */
3119 if (cris_get_opcode (*inst) < 4)
3121 size &= ~SIGNED_EXTEND_BIT_MASK;
3123 /* Is there a need for checking the size? Size should contain the number of
3126 value = read_memory_unsigned_integer (address, size);
3128 /* Check if it's an extend, signed or zero instruction. */
3129 if (cris_get_opcode (*inst) < 4)
3131 value = do_sign_or_zero_extend (value, inst);
3136 /* Handles the assign addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
3137 instructions. The MOVE instruction is the move from source to register. */
3140 handle_prefix_assign_mode_for_aritm_op (unsigned short inst,
3141 inst_env_type *inst_env)
3143 unsigned long operand2;
3144 unsigned long operand3;
3146 check_assign (inst, inst_env);
3147 if (cris_get_operand2 (inst) == REG_PC)
3149 operand2 = inst_env->reg[REG_PC];
3151 /* Get the value of the third operand. */
3152 operand3 = get_data_from_address (&inst, inst_env->prefix_value);
3154 /* Calculate the PC value after the instruction, i.e. where the
3155 breakpoint should be. The order of the udw_operands is vital. */
3156 add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand3);
3158 inst_env->slot_needed = 0;
3159 inst_env->prefix_found = 0;
3160 inst_env->xflag_found = 0;
3161 inst_env->disable_interrupt = 0;
3164 /* Handles the three-operand addressing mode for the ADD, SUB, CMP, AND and
3165 OR instructions. Note that for this to work as expected, the calling
3166 function must have made sure that there is a prefix to this instruction. */
3169 three_operand_add_sub_cmp_and_or_op (unsigned short inst,
3170 inst_env_type *inst_env)
3172 unsigned long operand2;
3173 unsigned long operand3;
3175 if (cris_get_operand1 (inst) == REG_PC)
3177 /* The PC will be changed by the instruction. */
3178 operand2 = inst_env->reg[cris_get_operand2 (inst)];
3180 /* Get the value of the third operand. */
3181 operand3 = get_data_from_address (&inst, inst_env->prefix_value);
3183 /* Calculate the PC value after the instruction, i.e. where the
3184 breakpoint should be. */
3185 add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand3);
3187 inst_env->slot_needed = 0;
3188 inst_env->prefix_found = 0;
3189 inst_env->xflag_found = 0;
3190 inst_env->disable_interrupt = 0;
3193 /* Handles the index addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
3194 instructions. The MOVE instruction is the move from source to register. */
3197 handle_prefix_index_mode_for_aritm_op (unsigned short inst,
3198 inst_env_type *inst_env)
3200 if (cris_get_operand1 (inst) != cris_get_operand2 (inst))
3202 /* If the instruction is MOVE it's invalid. If the instruction is ADD,
3203 SUB, AND or OR something weird is going on (if everything works these
3204 instructions should end up in the three operand version). */
3205 inst_env->invalid = 1;
3210 /* three_operand_add_sub_cmp_and_or does the same as we should do here
3212 three_operand_add_sub_cmp_and_or_op (inst, inst_env);
3214 inst_env->slot_needed = 0;
3215 inst_env->prefix_found = 0;
3216 inst_env->xflag_found = 0;
3217 inst_env->disable_interrupt = 0;
3220 /* Handles the autoincrement and indirect addresing mode for the ADD, SUB,
3221 CMP, AND OR and MOVE instruction. The MOVE instruction is the move from
3222 source to register. */
3225 handle_inc_and_index_mode_for_aritm_op (unsigned short inst,
3226 inst_env_type *inst_env)
3228 unsigned long operand1;
3229 unsigned long operand2;
3230 unsigned long operand3;
3233 /* The instruction is either an indirect or autoincrement addressing mode.
3234 Check if the destination register is the PC. */
3235 if (cris_get_operand2 (inst) == REG_PC)
3237 /* Must be done here, get_data_from_address may change the size
3239 size = cris_get_size (inst);
3240 operand2 = inst_env->reg[REG_PC];
3242 /* Get the value of the third operand, i.e. the indirect operand. */
3243 operand1 = inst_env->reg[cris_get_operand1 (inst)];
3244 operand3 = get_data_from_address (&inst, operand1);
3246 /* Calculate the PC value after the instruction, i.e. where the
3247 breakpoint should be. The order of the udw_operands is vital. */
3248 add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand3);
3250 /* If this is an autoincrement addressing mode, check if the increment
3252 if ((cris_get_operand1 (inst) == REG_PC) && (cris_get_mode (inst) == AUTOINC_MODE))
3254 /* Get the size field. */
3255 size = cris_get_size (inst);
3257 /* If it's an extend instruction we don't want the signed extend bit,
3258 because it influences the size. */
3259 if (cris_get_opcode (inst) < 4)
3261 size &= ~SIGNED_EXTEND_BIT_MASK;
3263 process_autoincrement (size, inst, inst_env);
3265 inst_env->slot_needed = 0;
3266 inst_env->prefix_found = 0;
3267 inst_env->xflag_found = 0;
3268 inst_env->disable_interrupt = 0;
3271 /* Handles the two-operand addressing mode, all modes except register, for
3272 the ADD, SUB CMP, AND and OR instruction. */
3275 none_reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst,
3276 inst_env_type *inst_env)
3278 if (inst_env->prefix_found)
3280 if (cris_get_mode (inst) == PREFIX_INDEX_MODE)
3282 handle_prefix_index_mode_for_aritm_op (inst, inst_env);
3284 else if (cris_get_mode (inst) == PREFIX_ASSIGN_MODE)
3286 handle_prefix_assign_mode_for_aritm_op (inst, inst_env);
3290 /* The mode is invalid for a prefixed base instruction. */
3291 inst_env->invalid = 1;
3297 handle_inc_and_index_mode_for_aritm_op (inst, inst_env);
3301 /* Handles the quick addressing mode for the ADD and SUB instruction. */
3304 quick_mode_add_sub_op (unsigned short inst, inst_env_type *inst_env)
3306 unsigned long operand1;
3307 unsigned long operand2;
3309 /* It's a bad idea to be in a prefix instruction now. This is a quick mode
3310 instruction and can't have a prefix. */
3311 if (inst_env->prefix_found)
3313 inst_env->invalid = 1;
3317 /* Check if the instruction has PC as its target. */
3318 if (cris_get_operand2 (inst) == REG_PC)
3320 if (inst_env->slot_needed)
3322 inst_env->invalid = 1;
3325 operand1 = cris_get_quick_value (inst);
3326 operand2 = inst_env->reg[REG_PC];
3328 /* The size should now be dword. */
3329 cris_set_size_to_dword (&inst);
3331 /* Calculate the PC value after the instruction, i.e. where the
3332 breakpoint should be. */
3333 add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand1);
3335 inst_env->slot_needed = 0;
3336 inst_env->prefix_found = 0;
3337 inst_env->xflag_found = 0;
3338 inst_env->disable_interrupt = 0;
3341 /* Handles the quick addressing mode for the CMP, AND and OR instruction. */
3344 quick_mode_and_cmp_move_or_op (unsigned short inst, inst_env_type *inst_env)
3346 unsigned long operand1;
3347 unsigned long operand2;
3349 /* It's a bad idea to be in a prefix instruction now. This is a quick mode
3350 instruction and can't have a prefix. */
3351 if (inst_env->prefix_found)
3353 inst_env->invalid = 1;
3356 /* Check if the instruction has PC as its target. */
3357 if (cris_get_operand2 (inst) == REG_PC)
3359 if (inst_env->slot_needed)
3361 inst_env->invalid = 1;
3364 /* The instruction has the PC as its target register. */
3365 operand1 = cris_get_quick_value (inst);
3366 operand2 = inst_env->reg[REG_PC];
3368 /* The quick value is signed, so check if we must do a signed extend. */
3369 if (operand1 & SIGNED_QUICK_VALUE_MASK)
3372 operand1 |= SIGNED_QUICK_VALUE_EXTEND_MASK;
3374 /* The size should now be dword. */
3375 cris_set_size_to_dword (&inst);
3377 /* Calculate the PC value after the instruction, i.e. where the
3378 breakpoint should be. */
3379 add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand1);
3381 inst_env->slot_needed = 0;
3382 inst_env->prefix_found = 0;
3383 inst_env->xflag_found = 0;
3384 inst_env->disable_interrupt = 0;
3387 /* Translate op_type to a function and call it. */
3389 static void cris_gdb_func (enum cris_op_type op_type, unsigned short inst,
3390 inst_env_type *inst_env)
3394 case cris_not_implemented_op:
3395 not_implemented_op (inst, inst_env);
3399 abs_op (inst, inst_env);
3403 addi_op (inst, inst_env);
3407 asr_op (inst, inst_env);
3411 asrq_op (inst, inst_env);
3414 case cris_ax_ei_setf_op:
3415 ax_ei_setf_op (inst, inst_env);
3418 case cris_bdap_prefix:
3419 bdap_prefix (inst, inst_env);
3422 case cris_biap_prefix:
3423 biap_prefix (inst, inst_env);
3427 break_op (inst, inst_env);
3430 case cris_btst_nop_op:
3431 btst_nop_op (inst, inst_env);
3434 case cris_clearf_di_op:
3435 clearf_di_op (inst, inst_env);
3438 case cris_dip_prefix:
3439 dip_prefix (inst, inst_env);
3442 case cris_dstep_logshift_mstep_neg_not_op:
3443 dstep_logshift_mstep_neg_not_op (inst, inst_env);
3446 case cris_eight_bit_offset_branch_op:
3447 eight_bit_offset_branch_op (inst, inst_env);
3450 case cris_move_mem_to_reg_movem_op:
3451 move_mem_to_reg_movem_op (inst, inst_env);
3454 case cris_move_reg_to_mem_movem_op:
3455 move_reg_to_mem_movem_op (inst, inst_env);
3458 case cris_move_to_preg_op:
3459 move_to_preg_op (inst, inst_env);
3463 muls_op (inst, inst_env);
3467 mulu_op (inst, inst_env);
3470 case cris_none_reg_mode_add_sub_cmp_and_or_move_op:
3471 none_reg_mode_add_sub_cmp_and_or_move_op (inst, inst_env);
3474 case cris_none_reg_mode_clear_test_op:
3475 none_reg_mode_clear_test_op (inst, inst_env);
3478 case cris_none_reg_mode_jump_op:
3479 none_reg_mode_jump_op (inst, inst_env);
3482 case cris_none_reg_mode_move_from_preg_op:
3483 none_reg_mode_move_from_preg_op (inst, inst_env);
3486 case cris_quick_mode_add_sub_op:
3487 quick_mode_add_sub_op (inst, inst_env);
3490 case cris_quick_mode_and_cmp_move_or_op:
3491 quick_mode_and_cmp_move_or_op (inst, inst_env);
3494 case cris_quick_mode_bdap_prefix:
3495 quick_mode_bdap_prefix (inst, inst_env);
3498 case cris_reg_mode_add_sub_cmp_and_or_move_op:
3499 reg_mode_add_sub_cmp_and_or_move_op (inst, inst_env);
3502 case cris_reg_mode_clear_op:
3503 reg_mode_clear_op (inst, inst_env);
3506 case cris_reg_mode_jump_op:
3507 reg_mode_jump_op (inst, inst_env);
3510 case cris_reg_mode_move_from_preg_op:
3511 reg_mode_move_from_preg_op (inst, inst_env);
3514 case cris_reg_mode_test_op:
3515 reg_mode_test_op (inst, inst_env);
3519 scc_op (inst, inst_env);
3522 case cris_sixteen_bit_offset_branch_op:
3523 sixteen_bit_offset_branch_op (inst, inst_env);
3526 case cris_three_operand_add_sub_cmp_and_or_op:
3527 three_operand_add_sub_cmp_and_or_op (inst, inst_env);
3530 case cris_three_operand_bound_op:
3531 three_operand_bound_op (inst, inst_env);
3534 case cris_two_operand_bound_op:
3535 two_operand_bound_op (inst, inst_env);
3539 xor_op (inst, inst_env);
3544 /* This wrapper is to avoid cris_get_assembler being called before
3545 exec_bfd has been set. */
3548 cris_delayed_get_disassembler (bfd_vma addr, disassemble_info *info)
3550 tm_print_insn = cris_get_disassembler (exec_bfd);
3551 return TARGET_PRINT_INSN (addr, info);
3554 /* Copied from <asm/elf.h>. */
3555 typedef unsigned long elf_greg_t;
3557 /* Same as user_regs_struct struct in <asm/user.h>. */
3558 typedef elf_greg_t elf_gregset_t[35];
3560 /* Unpack an elf_gregset_t into GDB's register cache. */
3563 supply_gregset (elf_gregset_t *gregsetp)
3566 elf_greg_t *regp = *gregsetp;
3567 static char zerobuf[4] = {0};
3569 /* The kernel dumps all 32 registers as unsigned longs, but supply_register
3570 knows about the actual size of each register so that's no problem. */
3571 for (i = 0; i < NUM_GENREGS + NUM_SPECREGS; i++)
3573 supply_register (i, (char *)®p[i]);
3577 /* Use a local version of this function to get the correct types for
3578 regsets, until multi-arch core support is ready. */
3581 fetch_core_registers (char *core_reg_sect, unsigned core_reg_size,
3582 int which, CORE_ADDR reg_addr)
3584 elf_gregset_t gregset;
3589 if (core_reg_size != sizeof (gregset))
3591 warning ("wrong size gregset struct in core file");
3595 memcpy (&gregset, core_reg_sect, sizeof (gregset));
3596 supply_gregset (&gregset);
3600 /* We've covered all the kinds of registers we know about here,
3601 so this must be something we wouldn't know what to do with
3602 anyway. Just ignore it. */
3607 static struct core_fns cris_elf_core_fns =
3609 bfd_target_elf_flavour, /* core_flavour */
3610 default_check_format, /* check_format */
3611 default_core_sniffer, /* core_sniffer */
3612 fetch_core_registers, /* core_read_registers */
3616 /* Fetch (and possibly build) an appropriate link_map_offsets
3617 structure for native GNU/Linux CRIS targets using the struct
3618 offsets defined in link.h (but without actual reference to that
3621 This makes it possible to access GNU/Linux CRIS shared libraries
3622 from a GDB that was not built on an GNU/Linux CRIS host (for cross
3625 See gdb/solib-svr4.h for an explanation of these fields. */
3627 struct link_map_offsets *
3628 cris_linux_svr4_fetch_link_map_offsets (void)
3630 static struct link_map_offsets lmo;
3631 static struct link_map_offsets *lmp = NULL;
3637 lmo.r_debug_size = 8; /* The actual size is 20 bytes, but
3638 this is all we need. */
3639 lmo.r_map_offset = 4;
3642 lmo.link_map_size = 20;
3644 lmo.l_addr_offset = 0;
3645 lmo.l_addr_size = 4;
3647 lmo.l_name_offset = 4;
3648 lmo.l_name_size = 4;
3650 lmo.l_next_offset = 12;
3651 lmo.l_next_size = 4;
3653 lmo.l_prev_offset = 16;
3654 lmo.l_prev_size = 4;
3661 cris_fpless_backtrace (char *noargs, int from_tty)
3663 /* Points at the instruction after the jsr (except when in innermost frame
3664 where it points at the original pc). */
3667 /* Temporary variable, used for parsing from the start of the function that
3668 the pc is in, up to the pc. */
3669 CORE_ADDR tmp_pc = 0;
3672 /* Information about current frame. */
3673 struct symtab_and_line sal;
3676 /* Present instruction. */
3677 unsigned short insn;
3679 /* Next instruction, lookahead. */
3680 unsigned short insn_next;
3682 /* This is to store the offset between sp at start of function and until we
3683 reach push srp (if any). */
3684 int sp_add_later = 0;
3685 int push_srp_found = 0;
3689 /* Frame counter. */
3692 /* For the innermost frame, we want to look at srp in case it's a leaf
3693 function (since there's no push srp in that case). */
3694 int innermost_frame = 1;
3696 deprecated_read_register_gen (PC_REGNUM, (char *) &pc);
3697 deprecated_read_register_gen (SP_REGNUM, (char *) &sp);
3699 /* We make an explicit return when we can't find an outer frame. */
3702 /* Get file name and line number. */
3703 sal = find_pc_line (pc, 0);
3705 /* Get function name. */
3706 find_pc_partial_function (pc, &func_name, (CORE_ADDR *) NULL,
3707 (CORE_ADDR *) NULL);
3709 /* Print information about current frame. */
3710 printf_unfiltered ("#%i 0x%08lx in %s", frame++, pc, func_name);
3713 printf_unfiltered (" at %s:%i", sal.symtab->filename, sal.line);
3715 printf_unfiltered ("\n");
3717 /* Get the start address of this function. */
3718 tmp_pc = get_pc_function_start (pc);
3720 /* Mini parser, only meant to find push sp and sub ...,sp from the start
3721 of the function, up to the pc. */
3724 insn = read_memory_unsigned_integer (tmp_pc, sizeof (short));
3725 tmp_pc += sizeof (short);
3728 /* push <reg> 32 bit instruction */
3729 insn_next = read_memory_unsigned_integer (tmp_pc,
3731 tmp_pc += sizeof (short);
3733 /* Recognize srp. */
3734 if (insn_next == 0xBE7E)
3736 /* For subsequent (not this one though) push or sub which
3737 affects sp, adjust sp immediately. */
3740 /* Note: this will break if we ever encounter a
3741 push vr (1 byte) or push ccr (2 bytes). */
3746 /* Some other register was pushed. */
3757 else if (cris_get_operand2 (insn) == SP_REGNUM
3758 && cris_get_mode (insn) == 0x0000
3759 && cris_get_opcode (insn) == 0x000A)
3762 val = cris_get_quick_value (insn);
3770 sp_add_later += val;
3774 else if (cris_get_operand2 (insn) == SP_REGNUM
3775 /* Autoincrement addressing mode. */
3776 && cris_get_mode (insn) == 0x0003
3778 && ((insn) & 0x03E0) >> 5 == 0x0004)
3781 val = get_data_from_address (&insn, tmp_pc);
3789 sp_add_later += val;
3792 else if (cris_get_operand2 (insn) == SP_REGNUM
3793 && ((insn & 0x0F00) >> 8) == 0x0001
3794 && (cris_get_signed_offset (insn) < 0))
3796 /* Immediate byte offset addressing prefix word with sp as base
3797 register. Used for CRIS v8 i.e. ETRAX 100 and newer if <val>
3798 is between 64 and 128.
3799 movem r<regsave>,[sp=sp-<val>] */
3800 val = -cris_get_signed_offset (insn);
3801 insn_next = read_memory_unsigned_integer (tmp_pc,
3803 tmp_pc += sizeof (short);
3805 if (cris_get_mode (insn_next) == PREFIX_ASSIGN_MODE
3806 && cris_get_opcode (insn_next) == 0x000F
3807 && cris_get_size (insn_next) == 0x0003
3808 && cris_get_operand1 (insn_next) == SP_REGNUM)
3816 sp_add_later += val;
3827 /* sp should now point at where srp is stored on the stack. Update
3828 the pc to the srp. */
3829 pc = read_memory_unsigned_integer (sp, 4);
3831 else if (innermost_frame)
3833 /* We couldn't find a push srp in the prologue, so this must be
3834 a leaf function, and thus we use the srp register directly.
3835 This should happen at most once, for the innermost function. */
3836 deprecated_read_register_gen (SRP_REGNUM, (char *) &pc);
3840 /* Couldn't find an outer frame. */
3844 /* Reset flag. (In case the innermost frame wasn't a leaf, we don't
3845 want to look at the srp register later either). */
3846 innermost_frame = 0;
3848 /* Now, add the offset for everything up to, and including push srp,
3849 that was held back during the prologue parsing. */
3856 _initialize_cris_tdep (void)
3858 struct cmd_list_element *c;
3860 gdbarch_register (bfd_arch_cris, cris_gdbarch_init, cris_dump_tdep);
3862 /* Used in disassembly. */
3863 tm_print_insn = cris_delayed_get_disassembler;
3865 /* CRIS-specific user-commands. */
3866 c = add_set_cmd ("cris-version", class_support, var_integer,
3867 (char *) &usr_cmd_cris_version,
3868 "Set the current CRIS version.", &setlist);
3869 set_cmd_sfunc (c, cris_version_update);
3870 add_show_from_set (c, &showlist);
3872 c = add_set_enum_cmd ("cris-mode", class_support, cris_mode_enums,
3874 "Set the current CRIS mode.", &setlist);
3875 set_cmd_sfunc (c, cris_mode_update);
3876 add_show_from_set (c, &showlist);
3878 c = add_set_enum_cmd ("cris-abi", class_support, cris_abi_enums,
3880 "Set the current CRIS ABI version.", &setlist);
3881 set_cmd_sfunc (c, cris_abi_update);
3882 add_show_from_set (c, &showlist);
3884 c = add_cmd ("cris-fpless-backtrace", class_support, cris_fpless_backtrace,
3885 "Display call chain using the subroutine return pointer.\n"
3886 "Note that this displays the address after the jump to the "
3887 "subroutine.", &cmdlist);
3889 add_core_fns (&cris_elf_core_fns);
3893 /* Prints out all target specific values. */
3896 cris_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
3898 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
3901 fprintf_unfiltered (file, "cris_dump_tdep: tdep->cris_version = %i\n",
3902 tdep->cris_version);
3903 fprintf_unfiltered (file, "cris_dump_tdep: tdep->cris_mode = %s\n",
3905 fprintf_unfiltered (file, "cris_dump_tdep: tdep->cris_abi = %s\n",
3912 cris_version_update (char *ignore_args, int from_tty,
3913 struct cmd_list_element *c)
3915 struct gdbarch_info info;
3917 /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones
3918 the set command passed as a parameter. The clone operation will
3919 include (BUG?) any ``set'' command callback, if present.
3920 Commands like ``info set'' call all the ``show'' command
3921 callbacks. Unfortunatly, for ``show'' commands cloned from
3922 ``set'', this includes callbacks belonging to ``set'' commands.
3923 Making this worse, this only occures if add_show_from_set() is
3924 called after add_cmd_sfunc() (BUG?). */
3926 /* From here on, trust the user's CRIS version setting. */
3927 if (cmd_type (c) == set_cmd)
3929 usr_cmd_cris_version_valid = 1;
3931 /* Update the current architecture, if needed. */
3932 gdbarch_info_init (&info);
3933 if (!gdbarch_update_p (info))
3934 internal_error (__FILE__, __LINE__, "cris_gdbarch_update: failed to update architecture.");
3939 cris_mode_update (char *ignore_args, int from_tty,
3940 struct cmd_list_element *c)
3942 struct gdbarch_info info;
3944 /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones
3945 the set command passed as a parameter. The clone operation will
3946 include (BUG?) any ``set'' command callback, if present.
3947 Commands like ``info set'' call all the ``show'' command
3948 callbacks. Unfortunatly, for ``show'' commands cloned from
3949 ``set'', this includes callbacks belonging to ``set'' commands.
3950 Making this worse, this only occures if add_show_from_set() is
3951 called after add_cmd_sfunc() (BUG?). */
3953 /* From here on, trust the user's CRIS mode setting. */
3954 if (cmd_type (c) == set_cmd)
3956 usr_cmd_cris_mode_valid = 1;
3958 /* Update the current architecture, if needed. */
3959 gdbarch_info_init (&info);
3960 if (!gdbarch_update_p (info))
3961 internal_error (__FILE__, __LINE__, "cris_gdbarch_update: failed to update architecture.");
3966 cris_abi_update (char *ignore_args, int from_tty,
3967 struct cmd_list_element *c)
3969 struct gdbarch_info info;
3971 /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones
3972 the set command passed as a parameter. The clone operation will
3973 include (BUG?) any ``set'' command callback, if present.
3974 Commands like ``info set'' call all the ``show'' command
3975 callbacks. Unfortunatly, for ``show'' commands cloned from
3976 ``set'', this includes callbacks belonging to ``set'' commands.
3977 Making this worse, this only occures if add_show_from_set() is
3978 called after add_cmd_sfunc() (BUG?). */
3980 /* From here on, trust the user's CRIS ABI setting. */
3981 if (cmd_type (c) == set_cmd)
3983 usr_cmd_cris_abi_valid = 1;
3985 /* Update the current architecture, if needed. */
3986 gdbarch_info_init (&info);
3987 if (!gdbarch_update_p (info))
3988 internal_error (__FILE__, __LINE__, "cris_gdbarch_update: failed to update architecture.");
3992 /* Copied from pa64solib.c, with a couple of minor changes. */
3995 bfd_lookup_symbol (bfd *abfd, const char *symname)
3997 unsigned int storage_needed;
3999 asymbol **symbol_table;
4000 unsigned int number_of_symbols;
4002 struct cleanup *back_to;
4003 CORE_ADDR symaddr = 0;
4005 storage_needed = bfd_get_symtab_upper_bound (abfd);
4007 if (storage_needed > 0)
4009 symbol_table = (asymbol **) xmalloc (storage_needed);
4010 back_to = make_cleanup (free, symbol_table);
4011 number_of_symbols = bfd_canonicalize_symtab (abfd, symbol_table);
4013 for (i = 0; i < number_of_symbols; i++)
4015 sym = *symbol_table++;
4016 if (!strcmp (sym->name, symname))
4018 /* Bfd symbols are section relative. */
4019 symaddr = sym->value + sym->section->vma;
4023 do_cleanups (back_to);
4028 static struct gdbarch *
4029 cris_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
4031 struct gdbarch *gdbarch;
4032 struct gdbarch_tdep *tdep;
4034 const char *cris_mode;
4035 const char *cris_abi;
4036 CORE_ADDR cris_abi_sym = 0;
4039 if (usr_cmd_cris_version_valid)
4041 /* Trust the user's CRIS version setting. */
4042 cris_version = usr_cmd_cris_version;
4046 /* Assume it's CRIS version 10. */
4050 if (usr_cmd_cris_mode_valid)
4052 /* Trust the user's CRIS mode setting. */
4053 cris_mode = usr_cmd_cris_mode;
4055 else if (cris_version == 10)
4057 /* Assume CRIS version 10 is in user mode. */
4058 cris_mode = CRIS_MODE_USER;
4062 /* Strictly speaking, older CRIS version don't have a supervisor mode,
4063 but we regard its only mode as supervisor mode. */
4064 cris_mode = CRIS_MODE_SUPERVISOR;
4067 if (usr_cmd_cris_abi_valid)
4069 /* Trust the user's ABI setting. */
4070 cris_abi = usr_cmd_cris_abi;
4074 if (bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
4076 /* An elf target uses the new ABI. */
4077 cris_abi = CRIS_ABI_V2;
4079 else if (bfd_get_flavour (info.abfd) == bfd_target_aout_flavour)
4081 /* An a.out target may use either ABI. Look for hints in the
4083 cris_abi_sym = bfd_lookup_symbol (info.abfd, CRIS_ABI_SYMBOL);
4084 cris_abi = cris_abi_sym ? CRIS_ABI_V2 : CRIS_ABI_ORIGINAL;
4088 /* Unknown bfd flavour. Assume it's the new ABI. */
4089 cris_abi = CRIS_ABI_V2;
4092 else if (arches != NULL)
4094 /* No bfd available. Stick with the ABI from the most recently
4095 selected architecture of this same family (the head of arches
4096 always points to this). (This is to avoid changing the ABI
4097 when the user updates the architecture with the 'set
4098 cris-version' command.) */
4099 cris_abi = gdbarch_tdep (arches->gdbarch)->cris_abi;
4103 /* No bfd, and no previously selected architecture available.
4104 Assume it's the new ABI. */
4105 cris_abi = CRIS_ABI_V2;
4108 /* Make the current settings visible to the user. */
4109 usr_cmd_cris_version = cris_version;
4110 usr_cmd_cris_mode = cris_mode;
4111 usr_cmd_cris_abi = cris_abi;
4113 /* Find a candidate among the list of pre-declared architectures. Both
4114 CRIS version and ABI must match. */
4115 for (arches = gdbarch_list_lookup_by_info (arches, &info);
4117 arches = gdbarch_list_lookup_by_info (arches->next, &info))
4119 if ((gdbarch_tdep (arches->gdbarch)->cris_version == cris_version)
4120 && (gdbarch_tdep (arches->gdbarch)->cris_mode == cris_mode)
4121 && (gdbarch_tdep (arches->gdbarch)->cris_abi == cris_abi))
4122 return arches->gdbarch;
4125 /* No matching architecture was found. Create a new one. */
4126 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
4127 gdbarch = gdbarch_alloc (&info, tdep);
4129 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
4130 ready to unwind the PC first (see frame.c:get_prev_frame()). */
4131 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
4133 tdep->cris_version = cris_version;
4134 tdep->cris_mode = cris_mode;
4135 tdep->cris_abi = cris_abi;
4137 /* INIT shall ensure that the INFO.BYTE_ORDER is non-zero. */
4138 switch (info.byte_order)
4140 case BFD_ENDIAN_LITTLE:
4144 case BFD_ENDIAN_BIG:
4145 internal_error (__FILE__, __LINE__, "cris_gdbarch_init: big endian byte order in info");
4149 internal_error (__FILE__, __LINE__, "cris_gdbarch_init: unknown byte order in info");
4152 /* Initialize the ABI dependent things. */
4153 if (tdep->cris_abi == CRIS_ABI_ORIGINAL)
4155 set_gdbarch_double_bit (gdbarch, 32);
4156 set_gdbarch_push_arguments (gdbarch, cris_abi_original_push_arguments);
4157 set_gdbarch_deprecated_store_return_value (gdbarch,
4158 cris_abi_original_store_return_value);
4159 set_gdbarch_deprecated_extract_return_value
4160 (gdbarch, cris_abi_original_extract_return_value);
4161 set_gdbarch_reg_struct_has_addr
4162 (gdbarch, cris_abi_original_reg_struct_has_addr);
4164 else if (tdep->cris_abi == CRIS_ABI_V2)
4166 set_gdbarch_double_bit (gdbarch, 64);
4167 set_gdbarch_push_arguments (gdbarch, cris_abi_v2_push_arguments);
4168 set_gdbarch_deprecated_store_return_value (gdbarch, cris_abi_v2_store_return_value);
4169 set_gdbarch_deprecated_extract_return_value
4170 (gdbarch, cris_abi_v2_extract_return_value);
4171 set_gdbarch_reg_struct_has_addr (gdbarch,
4172 cris_abi_v2_reg_struct_has_addr);
4175 internal_error (__FILE__, __LINE__, "cris_gdbarch_init: unknown CRIS ABI");
4177 /* The default definition of a long double is 2 * TARGET_DOUBLE_BIT,
4178 which means we have to set this explicitly. */
4179 set_gdbarch_long_double_bit (gdbarch, 64);
4181 /* There are 32 registers (some of which may not be implemented). */
4182 set_gdbarch_num_regs (gdbarch, 32);
4183 set_gdbarch_sp_regnum (gdbarch, 14);
4184 set_gdbarch_fp_regnum (gdbarch, 8);
4185 set_gdbarch_pc_regnum (gdbarch, 15);
4187 set_gdbarch_register_name (gdbarch, cris_register_name);
4189 /* Length of ordinary registers used in push_word and a few other places.
4190 REGISTER_RAW_SIZE is the real way to know how big a register is. */
4191 set_gdbarch_register_size (gdbarch, 4);
4194 set_gdbarch_register_bytes_ok (gdbarch, cris_register_bytes_ok);
4195 set_gdbarch_software_single_step (gdbarch, cris_software_single_step);
4198 set_gdbarch_cannot_store_register (gdbarch, cris_cannot_store_register);
4199 set_gdbarch_cannot_fetch_register (gdbarch, cris_cannot_fetch_register);
4202 /* The total amount of space needed to store (in an array called registers)
4203 GDB's copy of the machine's register state. Note: We can not use
4204 cris_register_size at this point, since it relies on current_gdbarch
4206 switch (tdep->cris_version)
4212 /* Support for these may be added later. */
4213 internal_error (__FILE__, __LINE__, "cris_gdbarch_init: unsupported CRIS version");
4218 /* CRIS v8 and v9, a.k.a. ETRAX 100. General registers R0 - R15
4219 (32 bits), special registers P0 - P1 (8 bits), P4 - P5 (16 bits),
4220 and P8 - P14 (32 bits). */
4221 register_bytes = (16 * 4) + (2 * 1) + (2 * 2) + (7 * 4);
4226 /* CRIS v10 and v11, a.k.a. ETRAX 100LX. In addition to ETRAX 100,
4227 P7 (32 bits), and P15 (32 bits) have been implemented. */
4228 register_bytes = (16 * 4) + (2 * 1) + (2 * 2) + (9 * 4);
4232 internal_error (__FILE__, __LINE__, "cris_gdbarch_init: unknown CRIS version");
4235 set_gdbarch_register_bytes (gdbarch, register_bytes);
4237 /* Returns the register offset for the first byte of register regno's space
4238 in the saved register state. */
4239 set_gdbarch_register_byte (gdbarch, cris_register_offset);
4241 /* The length of the registers in the actual machine representation. */
4242 set_gdbarch_register_raw_size (gdbarch, cris_register_size);
4244 /* The largest value REGISTER_RAW_SIZE can have. */
4245 set_gdbarch_max_register_raw_size (gdbarch, 32);
4247 /* The length of the registers in the program's representation. */
4248 set_gdbarch_register_virtual_size (gdbarch, cris_register_size);
4250 /* The largest value REGISTER_VIRTUAL_SIZE can have. */
4251 set_gdbarch_max_register_virtual_size (gdbarch, 32);
4253 set_gdbarch_register_virtual_type (gdbarch, cris_register_virtual_type);
4255 /* Use generic dummy frames. */
4257 /* Where to execute the call in the memory segments. */
4258 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
4260 /* Start execution at the beginning of dummy. */
4261 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
4262 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
4264 /* Set to 1 since call_dummy_breakpoint_offset was defined. */
4265 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
4267 /* Read all about dummy frames in blockframe.c. */
4268 set_gdbarch_call_dummy_length (gdbarch, 0);
4269 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_at_entry_point);
4271 /* Defined to 1 to indicate that the target supports inferior function
4273 set_gdbarch_call_dummy_p (gdbarch, 1);
4274 set_gdbarch_call_dummy_words (gdbarch, 0);
4275 set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
4277 /* No stack adjustment needed when peforming an inferior function call. */
4278 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
4279 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
4281 set_gdbarch_get_saved_register (gdbarch, deprecated_generic_get_saved_register);
4283 /* No register requires conversion from raw format to virtual format. */
4284 set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not);
4286 set_gdbarch_push_return_address (gdbarch, cris_push_return_address);
4287 set_gdbarch_pop_frame (gdbarch, cris_pop_frame);
4289 set_gdbarch_store_struct_return (gdbarch, cris_store_struct_return);
4290 set_gdbarch_deprecated_extract_struct_value_address
4291 (gdbarch, cris_extract_struct_value_address);
4292 set_gdbarch_use_struct_convention (gdbarch, cris_use_struct_convention);
4294 set_gdbarch_frame_init_saved_regs (gdbarch, cris_frame_init_saved_regs);
4295 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, cris_init_extra_frame_info);
4296 set_gdbarch_skip_prologue (gdbarch, cris_skip_prologue);
4297 set_gdbarch_prologue_frameless_p (gdbarch, generic_prologue_frameless_p);
4299 /* The stack grows downward. */
4300 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
4302 set_gdbarch_breakpoint_from_pc (gdbarch, cris_breakpoint_from_pc);
4304 /* The PC must not be decremented after a breakpoint. (The breakpoint
4305 handler takes care of that.) */
4306 set_gdbarch_decr_pc_after_break (gdbarch, 0);
4308 /* Offset from address of function to start of its code. */
4309 set_gdbarch_function_start_offset (gdbarch, 0);
4311 /* The number of bytes at the start of arglist that are not really args,
4312 0 in the CRIS ABI. */
4313 set_gdbarch_frame_args_skip (gdbarch, 0);
4314 set_gdbarch_frameless_function_invocation
4315 (gdbarch, cris_frameless_function_invocation);
4316 set_gdbarch_frame_chain (gdbarch, cris_frame_chain);
4318 set_gdbarch_frame_saved_pc (gdbarch, cris_frame_saved_pc);
4319 set_gdbarch_saved_pc_after_call (gdbarch, cris_saved_pc_after_call);
4321 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
4323 /* No extra stack alignment needed. Set to 1 by default. */
4324 set_gdbarch_extra_stack_alignment_needed (gdbarch, 0);
4326 /* Helpful for backtracing and returning in a call dummy. */
4327 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
4329 /* Use target_specific function to define link map offsets. */
4330 set_solib_svr4_fetch_link_map_offsets
4331 (gdbarch, cris_linux_svr4_fetch_link_map_offsets);