1 /* Parameters for execution on any Hewlett-Packard PA-RISC machine.
2 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1995
3 Free Software Foundation, Inc.
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
8 This file is part of GDB.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24 /* PA 64-bit specific definitions. Override those which are in
27 #include "pa/tm-hppah.h"
31 /* jimb: this must go. I'm just using it to disable code I haven't
32 gotten working yet. */
33 #define GDB_TARGET_IS_HPPA_20W
35 /* The low two bits of the IA are the privilege level of the instruction. */
36 #define ADDR_BITS_REMOVE(addr) ((CORE_ADDR)addr & (CORE_ADDR)~3)
38 /* Say how long (ordinary) registers are. This is used in
39 push_word and a few other places, but REGISTER_RAW_SIZE is
40 the real way to know how big a register is. */
43 #define REGISTER_SIZE 8
45 /* Number of bytes of storage in the actual machine representation
46 for register N. On the PA-RISC 2.0, all regs are 8 bytes, including
47 the FP registers (they're accessed as two 4 byte halves). */
49 #undef REGISTER_RAW_SIZE
50 #define REGISTER_RAW_SIZE(N) 8
52 /* Largest value REGISTER_RAW_SIZE can have. */
54 #undef MAX_REGISTER_RAW_SIZE
55 #define MAX_REGISTER_RAW_SIZE 8
57 /* Total amount of space needed to store our copies of the machine's
58 register state, the array `registers'. */
61 #define REGISTER_BYTES (NUM_REGS * 8)
63 /* Index within `registers' of the first byte of the space for
67 #define REGISTER_BYTE(N) ((N) * 8)
69 #undef REGISTER_VIRTUAL_TYPE
70 #define REGISTER_VIRTUAL_TYPE(N) \
71 ((N) < FP4_REGNUM ? builtin_type_unsigned_long_long : builtin_type_double)
74 /* Number of machine registers */
78 /* Initializer for an array of names of registers.
79 There should be NUM_REGS strings in this initializer.
80 They are in rows of eight entries */
82 #define REGISTER_NAMES \
83 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", \
84 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
85 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
86 "r24", "r25", "r26", "dp", "ret0", "ret1", "sp", "r31", \
87 "sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", "eiem", "iir", "isr", \
88 "ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", "sr3", \
89 "sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", \
90 "cr13", "cr24", "cr25", "cr26", "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",\
91 "fpsr", "fpe1", "fpe2", "fpe3", "fr4", "fr5", "fr6", "fr7", \
92 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", \
93 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", \
94 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"}
98 #define FP0_REGNUM 64 /* floating point reg. 0 (fspr)*/
101 /* Redefine some target bit sizes from the default. */
103 /* Number of bits in a long or unsigned long for the target machine. */
105 #define TARGET_LONG_BIT 64
107 /* Number of bits in a long long or unsigned long long for the
110 #define TARGET_LONG_LONG_BIT 64
112 /* Number of bits in a pointer for the target machine */
114 #define TARGET_PTR_BIT 64
116 /* Argument Pointer Register */
121 #define FP5_REGNUM 70
123 #define SR5_REGNUM 48
125 #undef FRAME_ARGS_ADDRESS
126 #define FRAME_ARGS_ADDRESS(fi) ((fi)->ap)
128 /* We access locals from SP. This may not work for frames which call
129 alloca; for those, we may need to consult unwind tables.
131 #undef FRAME_LOCALS_ADDRESS
132 #define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
134 #define INIT_FRAME_AP init_frame_ap
136 #define EXTRA_FRAME_INFO \
139 /* For a number of horrible reasons we may have to adjust the location
140 of variables on the stack. Ugh. jimb: why? */
141 #define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)
143 extern int hpread_adjust_stack_address PARAMS ((CORE_ADDR));
146 /* jimb: omitted dynamic linking stuff here */
148 /* This sequence of words is the instructions
150 ; Call stack frame has already been built by gdb. Since we could be calling
151 ; a varargs function, and we do not have the benefit of a stub to put things in
152 ; the right place, we load the first 8 word of arguments into both the general
158 fldd -64(0,%r29),%fr4
159 fldd -56(0,%r29),%fr5
160 fldd -48(0,%r29),%fr6
161 fldd -40(0,%r29),%fr7
162 fldd -32(0,%r29),%fr8
163 fldd -24(0,%r29),%fr9
164 fldd -16(0,%r29),%fr10
165 fldd -8(0,%r29),%fr11
183 #define CALL_DUMMY {0x349d0000, 0x34b60000, 0x34db0000, \
184 0x53a43f83, 0x53a53f93, 0x53a63fa3, 0x53a73fb3,\
185 0x53a83fc3, 0x53a93fd3, 0x2fa1100a, 0x2fb1100b,\
186 0x36c10000, 0x53ba3f81, 0x53b93f91, 0x53b83fa1,\
187 0x53b73fb1, 0x53b63fc1, 0x53b53fd1, 0x0fa110d4,\
188 0xe820f000, 0x0fb110d3, 0x00010004, 0x00151820,\
189 0xe6c00000, 0x08000240}
191 #undef CALL_DUMMY_LENGTH
192 #define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 25)
194 #undef FUNC_LDIL_OFFSET
195 #undef FUNC_LDO_OFFSET
196 #undef SR4EXPORT_LDIL_OFFSET
197 #undef SR4EXPORT_LDO_OFFSET
198 #undef CALL_DUMMY_LOCATION
199 /* jimb: need to find out what AT_WDB_CALL_DUMMY is about */
201 #define CALL_DUMMY_LOCATION AFTER_TEXT_END
202 extern CORE_ADDR wdb_call_dummy_addr;
203 #undef PC_IN_CALL_DUMMY
204 #define PC_IN_CALL_DUMMY(pc, sp, frame_address) \
205 ((pc) >= wdb_call_dummy_addr && \
206 (pc) <= wdb_call_dummy_addr + CALL_DUMMY_LENGTH)
209 #undef REG_STRUCT_HAS_ADDR
211 #undef EXTRACT_RETURN_VALUE
212 /* RM: floats are returned in FR4R, doubles in FR4
213 * integral values are in r28, padded on the left
214 * aggregates less that 65 bits are in r28, right padded
215 * aggregates upto 128 bits are in r28 and r29, right padded
217 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
219 if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
221 ((char *)(REGBUF)) + REGISTER_BYTE (FP4_REGNUM) + \
222 (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
223 TYPE_LENGTH (TYPE)); \
224 else if (is_integral_type(TYPE) || SOFT_FLOAT) \
226 (char *)(REGBUF) + REGISTER_BYTE (28) + \
227 (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
228 TYPE_LENGTH (TYPE)); \
229 else if (TYPE_LENGTH (TYPE) <= 8) \
231 (char *)(REGBUF) + REGISTER_BYTE (28), \
232 TYPE_LENGTH (TYPE)); \
233 else if (TYPE_LENGTH (TYPE) <= 16) \
236 (char *)(REGBUF) + REGISTER_BYTE (28), \
238 memcpy (((char *) VALBUF + 8), \
239 (char *)(REGBUF) + REGISTER_BYTE (29), \
240 TYPE_LENGTH (TYPE) - 8); \
244 /* RM: struct upto 128 bits are returned in registers */
245 #undef USE_STRUCT_CONVENTION
246 #define USE_STRUCT_CONVENTION(gcc_p, value_type)\
247 (TYPE_LENGTH (value_type) > 16)
249 /* RM: for return command */
250 #undef STORE_RETURN_VALUE
251 #define STORE_RETURN_VALUE(TYPE,VALBUF) \
253 if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
254 write_register_bytes \
255 (REGISTER_BYTE (FP4_REGNUM) + \
256 (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
258 TYPE_LENGTH (TYPE)); \
259 else if (is_integral_type(TYPE) || SOFT_FLOAT) \
260 write_register_bytes \
261 (REGISTER_BYTE (28) + \
262 (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
264 TYPE_LENGTH (TYPE)); \
265 else if (TYPE_LENGTH (TYPE) <= 8) \
266 write_register_bytes \
267 ( REGISTER_BYTE (28), \
269 TYPE_LENGTH (TYPE)); \
270 else if (TYPE_LENGTH (TYPE) <= 16) \
272 write_register_bytes \
273 (REGISTER_BYTE (28), \
276 write_register_bytes \
277 (REGISTER_BYTE (29), \
278 ((char *) VALBUF + 8), \
279 TYPE_LENGTH (TYPE) - 8); \
283 /* RM: these are the PA64 equivalents of the macros in tm-hppah.h --
284 * see comments there. For PA64, the save_state structure is at an
285 * offset of 24 32-bit words from the sigcontext structure. The 64 bit
286 * general registers are at an offset of 640 bytes from the beginning of the
287 * save_state structure, and the floating pointer register are at an offset
288 * of 256 bytes from the beginning of the save_state structure.
290 #undef FRAME_SAVED_PC_IN_SIGTRAMP
291 #define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
293 *(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (33 * 8), 8); \
296 #undef FRAME_BASE_BEFORE_SIGTRAMP
297 #define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
299 *(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (30 * 8), 8); \
302 #undef FRAME_FIND_SAVED_REGS_IN_SIGTRAMP
303 #define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
306 CORE_ADDR TMP1, TMP2; \
307 TMP1 = (FRAME)->frame + (24 * 4) + 640; \
308 TMP2 = (FRAME)->frame + (24 * 4) + 256; \
309 for (i = 0; i < NUM_REGS; i++) \
311 if (i == SP_REGNUM) \
312 (FSR)->regs[SP_REGNUM] = read_memory_integer (TMP1 + SP_REGNUM * 8, 8); \
313 else if (i >= FP0_REGNUM) \
314 (FSR)->regs[i] = TMP2 + (i - FP0_REGNUM) * 8; \
316 (FSR)->regs[i] = TMP1 + i * 8; \
320 /* jimb: omitted purify call support */